DSI3 data bus short circuit prevention driving circuit with double current limitation
By combining a dual current limiting mechanism and a bridging resistor, the problems of fast current limiting under high voltage and effective control loop under short-circuit conditions of the DSI3 data bus switching transistor are solved, achieving stable current control and avoiding current overload and oscillation.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- ELMOS SEMICON AG
- Filing Date
- 2020-06-05
- Publication Date
- 2026-07-14
AI Technical Summary
In the prior art, the switching transistors of the DSI3 data bus have difficulty achieving fast and stable current limiting under high voltage conditions, and the control loop fails under short circuit conditions, resulting in current overload or oscillation.
A dual current limiting mechanism is adopted, which interferes with the current flowing through the first resistor by the first source follower transistor and the second source follower transistor. Combined with the bridging resistor and the current mirror, it ensures that the switching transistor has a fast current limit under high voltage, and maintains the effectiveness of the control loop by the fourth transistor in the case of short circuit.
It achieves rapid current limiting of switching transistors under high voltage conditions, avoiding current overload and oscillation, and ensuring the stability and safety of the drive circuit.
Smart Images
Figure CN112242837B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a drive circuit TR having a switching transistor MPO, the drive circuit being used to control a data bus connected to the output terminal Out of the drive circuit TR. Background Technology
[0002] The DSI3 data bus is used in many automotive sensor systems to transmit data between sensors and control units. To prevent short circuits, the driver used for this data bus must be current-limited. The problem here is that the operating voltage is relatively high, and the voltage level depends on the operating voltage rather than the reference potential. Summary of the Invention
[0003] Therefore, the object of the present invention is to provide a solution that does not have the above-mentioned disadvantages of the prior art and has other advantages.
[0004] The object of this invention is to limit the current of a switching transistor MPO, preferably a P-channel field-effect transistor. Although the first terminal of the switching transistor MPO is at a relatively high potential (e.g., 30V) on the first voltage supply line VbatH, it should be possible to use a simple digital transistor that does not have insulation strength in this region. Importantly, due to the low impedance of the line, the current limiting of the switching transistor MPO must start very quickly and without oscillation. This is the object of this invention.
[0005] This objective is achieved by means of the apparatus described herein.
[0006] Solution
[0007] During the receive phase, the switching transistor MPO clamps the DSI3 bus at the output terminal Out of the drive circuit TR to the potential of the first voltage power supply line VbatH. This receive phase of the DSI3 bus is characterized by an input current signal at the output terminal Out of the drive circuit TR. This means that current is drawn from the switching transistor MPO via the output terminal Out of the drive circuit TR, based on the reference potential of the reference potential line GND. In the DSI3 bus, the signal current can have three values: 0A, 12mA, and 24mA. Furthermore, the positive current value always corresponds to the current flowing out of the circuit at the output terminal Out. In addition to this signal current, there is also a DC current ranging from 0 to 40mA.
[0008] Standard operating mode
[0009] A switching transistor (MPO) is typically a P-channel MOS field-effect transistor used as a switch. Operating an MPO causes its gate voltage to switch between 0V and a defined potential.
[0010] A potential VR is defined as the voltage drop across the first resistor R7V. Here, this voltage drop across the first resistor R7V corresponds to the voltage value VR. Wert =Iref Wert *Mirror Factor* R7V Wert The mirror factor of the current mirror is preferably 1:10. The reference current Iref is preferably about 10 μA. Since the switching transistor MPO preferably has a 5V gate on its gate-source path, the size of the first resistor R7V is preferably determined based on the potential of the first voltage supply line VbatH, for example, preferably about 4.8V is set as the defining potential VR. Therefore, the potential at the sixth node K6 is then determined. This is the normal operating mode.
[0011] Implementation of current limiting
[0012] Because the switching transistor MPO needs to be very large to meet the requirements, no component can be connected in series with it. Therefore, current limiting cannot be achieved by inserting a current-limiting component into the current path of the switching transistor MPO to meet the requirements. Furthermore, a particularly important requirement is, for example, that the on-resistance of the switching transistor MPO is only about 1.5 Ohms. This typically cannot be achieved by connecting other functional components in series with the switching transistor MPO.
[0013] Conversely, the current-limiting mechanism interferes with the current flowing through the first resistor R7V via the first source follower transistor M128 and the second source follower transistor M33. Therefore, the defined potential VR is changed by current limiting. This also changes the gate-source voltage of the switching transistor MPO, and thus also changes the current flowing through the switching transistor MPO.
[0014] The first source follower transistor M128 has no effect on current limiting. However, it intervenes in the same mechanism to switch the switching transistor MPO to the off state. Therefore, the first source follower transistor M128 has a switching function for the switching operation of the switching transistor MPO. The first source follower transistor M128 is used for switching operation, and the second source follower transistor M33 ensures intervention in one of the two current limiting mechanisms for the current flowing through the first resistor R7V.
[0015] The second current limiting device consists of the third transistor M66, the bridging resistor R, the fourth transistor M73, and the fifth transistor MPH. clmp form.
[0016] The operating modes of the current limiting device used for the current flowing through the switching transistor MPO will be discussed below.
[0017] Current limiting device 1
[0018] A portion of the first current limiting device (hereinafter referred to as current limiting device 1) monitors the current flowing through the switching transistor MPO. This is done by replicating the drain voltage of the switching transistor MPO to a parallel-model transistor MPO having the same gate voltage and the same source voltage. ref Completed. The sixth transistor M27, the seventh transistor M28, the first current source M218, and the second current source M36 form the so-called current conveyor circuit, see "The current conveyor – a new circuit building block" by Kenneth C. Smith and Adel Sedra in Proc. IEEE Vol. 56, pp. 1368-1369, or "Currentonveyors – Variants, Applications and Hardware Implementations" by Raj Senani, DRBhaskar, and AK Singh in Springer ISBN 978-3-319-35049-3, 2015.
[0019] The first current source M218, together with the sixth transistor M27 (which acts as a MOS diode), generates a defined potential at the gate of the seventh transistor M28 (which acts as a P-channel transistor). The current flowing through the seventh transistor M28 is determined by the second current source M36. Therefore, this generates a gate-source voltage on the seventh transistor M28 and replicates the drain potential of the switching transistor MPO to that of the model transistor MPO. ref The drain electrode.
[0020] The current from above satisfies the current source current of the second current source M36 located below the eighth transistor M37. The potential of the common fourth node K4 of the eighth transistor M37 and the second current source M36 drives the second source follower transistor M33, which draws more or less current from the first resistor R7V. The parasitic input capacitance of the common fourth node K4 of the eighth transistor M37 and the second current source M36 is charged or discharged using the transistor current of the eighth transistor M37 and the current difference of the second current source M36.
[0021] The mirror ratio is selected such that the current limit value of the P-channel switching transistor MPO can preferably be, for example, from 10 μA to 84 mA.
[0022] Current limiting device 2
[0023] The aforementioned current limiting device 1 alone is insufficient. Specifically, if, for example, due to an operational or handling error in the workshop, the output terminal Out of the drive circuit TR is short-circuited to the reference potential of the reference potential line GND, the voltage drop across the sixth transistor M27 and the first current source M218 will approach 0V. Therefore, if this short circuit cannot be eliminated, the control loop of the aforementioned current limiting device 1 will no longer function.
[0024] In this short-circuit condition with a very low voltage drop, due to the short circuit, the bridging resistor R will draw current from the fifth transistor MPH through the output terminal Out of the drive circuit TR. clmp The current mirror, which is composed of the third transistor M66, is pulled towards the reference potential line GND.
[0025] Through the fifth transistor MPH clmp A third transistor, M66, which acts as another current mirror transistor, feeds a resistive current across the bridging resistor R to the gate node of the switching transistor MPO. Therefore, this resistive current across the bridging resistor R reduces the gate-source voltage of the switching transistor MPO, thereby reducing the conductivity of the switching transistor MPO. This controls the switching transistor MPO. In this current limiting device 2, the current limit value for the current flowing through the switching transistor MPO is set by the resistance value of the bridging resistor R.
[0026] Improvement of current limiting device 2
[0027] According to the present invention, improvements to the current limiting device 2 can be considered:
[0028] The foldback characteristic can be configured via the fourth transistor M73. This means that, in the case of a short circuit, a reduced short-circuit current is defined, minimizing the power loss of the P-channel switching transistor MPO. The advantage is that, on the one hand, no destructive current flows through the switching transistor MPO, and on the other hand, the control loop can continue to function.
[0029] Invention features
[0030] A problem persists when the circuit is turned on. Initially, the output terminal Out of the drive circuit TR is at the reference potential of the reference potential line GND. Because the bus capacitance is large, the transient response at the output terminal Out of the drive circuit TR is shortened. Therefore, during startup, the aforementioned current limiting device 2 activates and prevents the circuit from starting. To avoid this situation, a fourth transistor M73 is added, which ensures the startup of the entire circuit even with the current limiting device 2 in operation.
[0031] Therefore, in the event of a short circuit between the output terminal Out of the drive circuit TR and the reference potential of the reference potential line GND, the fourth transistor M73 can ensure a minimum current, so that the control loop still receives a valid control signal when an opening condition similar to a short circuit occurs.
[0032] The difference between this circuit and existing technologies lies in the fact that the potential within the circuit is defined by a first resistor R7V. Resistors like the first resistor R7V are well-defined and highly scalable process elements in CMOS semiconductor manufacturing, capable of providing any voltage within a certain range and having a stable current.
[0033] Although the switching transistor MPO is large, the circuit is very fast because it only uses current.
[0034] For example, the current flowing through the first resistor R7V can preferably be corrected relatively quickly at 100μA and 48kOhm without stability issues.
[0035] The proposed circuit is characterized by generating the gate potential of the switching transistor MPO using a first resistor R7V and a bandgap circuit (not shown), which generates the reference current Iref through a conversion resistor RS for converting the bandgap voltage into a reference current Iref. On the crystal of a common integrated circuit, the first resistor R7V and the conversion resistor RS should be of the same type (e.g., polysilicon resistors) and preferably similar (matched). Thus, the bandgap voltage based on the reference potential line GND can be converted into a defined potential VR based on the potential of the first voltage supply line VbatH, wherein the voltage difference between this defined potential VR (the gate potential of the switching transistor MPO) and the potential of the first voltage supply line VbatH is determined by the ratio between the resistance value of the conversion resistor RS and the resistance value of the first resistor R7V.
[0036] For the functions claimed in this invention, the eighth transistor M37 is generally unnecessary. As a cascode transistor, the eighth transistor only protects the second current source M36 from overvoltage. In a pure 5V embodiment, the eighth transistor M37 is redundant and preferably not used. Correspondingly, the thirteenth node K13 is unnecessary and can be replaced by the fourth node K4 after removing the eighth transistor M37. The second terminal of the seventh transistor M28 is the fourth node K4.
[0037] For the functions claimed in this invention, the thirteenth transistor M38 is generally unnecessary. As a cascode transistor, the thirteenth transistor only protects the first current source M218 from overvoltage. In a pure 5V embodiment, the thirteenth transistor M38 is redundant and preferably not used. Correspondingly, the twelfth node K12 is unnecessary and can be replaced by the seventh node K7 after removing the thirteenth transistor M38. The first current source M218 is directly connected to the second terminal of the sixth transistor M27 via the seventh node K7.
[0038] advantage
[0039] In the proposed circuit, no amplifier or feedback control is used to limit the current. Furthermore, this means there is no control loop with oscillatory capabilities. Therefore, this is a precise control, not a regulation.
[0040] The advantages of this invention are not limited thereto. Attached Figure Description
[0041] Figure 1 A circuit according to the present invention is shown.
[0042] Figure 2 A circuit according to the present invention without common-source cascode transistors M37 and M38 is shown. Detailed Implementation
[0043] Figure 1 A circuit according to the present invention is shown.
[0044] From this point onward, the explanation will be based on the content for which protection is sought.
[0045] This invention relates to a drive circuit TR for a data bus, the drive circuit having a switching transistor MPO, a first current limiting device M27, M28, M218, M36, M37, M38, M33, and MPO at its output terminal Out. ref Second current limiting devices M66, M73, MPH clmp The first voltage power supply line VbatH and the reference potential line GND. The switching transistor MPO is set and / or configured to pull the data bus at the output terminal Out to the voltage power supply line VbatH based on the input signal IN. First current limiting devices M27, M28, M218, M36, M37, M38, M33, MPO ref R limits the current through the switching transistor MPO. The second current limiting devices are M66, M73, and MPH. clmpR also limits the current through the switching transistor MPO. However, the second current limiting device is primarily configured to limit the current in the event of a short circuit between the reference potential line GND and the output terminal Out of the drive circuit TR. To maintain regulation, the second current limiting device limits or regulates the current through the switching transistor MPO to a value different from 0A.
[0046] A specific implementation of the drive circuit TR has at least the following components, which can be replaced individually and / or in groups by interconnecting functionally equivalent functional elements. This also applies to nodes. The list of functional elements includes:
[0047] - Reference potential line GND;
[0048] -First voltage power supply line VbatH;
[0049] - Input signal IN;
[0050] - First node K1;
[0051] -Second node K2;
[0052] -Third node K3;
[0053] - Fourth node K4;
[0054] - Fifth node K5;
[0055] -Sixth node K6;
[0056] - Seventh node K7;
[0057] -Eighth node K8;
[0058] -Eleventh node K11;
[0059] - Node K12;
[0060] - Node 13;
[0061] - Switching transistor MPO;
[0062] -Model Transistor MPO ref ;
[0063] -Third transistor M66;
[0064] -Fourth transistor M73;
[0065] - Fifth transistor MPH clmp ;
[0066] -Sixth transistor M27;
[0067] - Seventh transistor M28;
[0068] -Eighth transistor M37;
[0069] -Thirteenth transistor M38;
[0070] - Ninth transistor M394;
[0071] -Tenth transistor M173;
[0072] -Eleventh transistor M395;
[0073] - Twelfth transistor M184;
[0074] - First source follower transistor M128;
[0075] -Second source follower transistor M33;
[0076] - First current source M218;
[0077] -Second current source M36;
[0078] -Output terminal: Out;
[0079] -Bridging resistor R;
[0080] - First resistor R7V.
[0081] The terminals of the functional elements are defined below:
[0082] The switching transistor MPO has a first terminal, a second terminal, and a control terminal.
[0083] Model transistor MPO ref It has a first terminal, a second terminal, and a control terminal.
[0084] The third transistor M66 has a first terminal, a second terminal, and a control terminal.
[0085] The fourth transistor M73 has a first terminal, a second terminal, and a control terminal.
[0086] Fifth transistor MPH clmp It has a first terminal, a second terminal, and a control terminal.
[0087] The sixth transistor M27 has a first terminal, a second terminal, and a control terminal.
[0088] The seventh transistor M28 has a first terminal, a second terminal, and a control terminal.
[0089] The eighth transistor M37 has a first terminal, a second terminal, and a control terminal.
[0090] The ninth transistor M394 has a first terminal, a second terminal, and a control terminal.
[0091] The tenth transistor M173 has a first terminal, a second terminal, and a control terminal.
[0092] The eleventh transistor M395 has a first terminal, a second terminal, and a control terminal.
[0093] The twelfth transistor M184 has a first terminal, a second terminal, and a control terminal.
[0094] The thirteenth transistor M38 has a first terminal, a second terminal, and a control terminal.
[0095] The first source follower transistor M128 has a first terminal, a second terminal, and a control terminal.
[0096] The second source follower transistor M33 has a first terminal, a second terminal, and a control terminal.
[0097] The first current source M218 has a first terminal and a second terminal.
[0098] The second current source M36 has a first terminal and a second terminal.
[0099] The bridging resistor R has a first terminal and a second terminal.
[0100] The first resistor R7V has a first terminal and a second terminal.
[0101] The following section will explain the interconnections of the previously defined functional elements, which are configured with performance characteristics. This will be explained in words. Figure 1 The circuit topology shown is different from the one described above. Different topologies can be used if the functionality described above is to be retained. For example, lead resistors could be considered.
[0102] The connections are listed below.
[0103] The switching transistor MPO is connected to the first voltage power supply line VbatH through its first terminal.
[0104] The switching transistor MPO is connected to the output terminal Out via its second terminal.
[0105] The switching transistor MPO is connected to the sixth node K6 via its control terminal.
[0106] Model transistor MPO ref It is connected to the first voltage power supply line VbatH through its first terminal.
[0107] Model transistor MPO ref It is connected to the eleventh node K11 via its second terminal.
[0108] Model transistor MPO ref It is connected to the sixth node K6 via its control terminal.
[0109] The third transistor M66 is connected to the first voltage power supply line VbatH via its first terminal.
[0110] The third transistor M66 is connected to the eighth node K8 via its second terminal.
[0111] The third transistor M66 is connected to the fifth node K5 via its control terminal.
[0112] The fourth transistor M73 is connected to the eighth node K8 via its first terminal.
[0113] The fourth transistor M73 is connected to the sixth node K6 via its second terminal.
[0114] The fourth transistor M73 is connected to the sixth node K6 via its control terminal.
[0115] Fifth transistor MPH clmp It is connected to the first voltage power supply line VbatH through its first terminal.
[0116] Fifth transistor MPH clmp It is connected to the fifth node K5 via its second terminal.
[0117] Fifth transistor MPH clmp It is connected to the fifth node K5 via its control terminal.
[0118] The sixth transistor M27 is connected to the output terminal Out via its first terminal.
[0119] The sixth transistor M27 is connected to the seventh node K7 via its second terminal.
[0120] The sixth transistor M27 is connected to the seventh node K7 via its control terminal.
[0121] The seventh transistor M28 is connected to the eleventh node K11 via its first terminal.
[0122] The seventh transistor M28 is connected to the thirteenth node K13 via its second terminal. If the eighth transistor M37 is not used, the second terminal of the seventh transistor M28 is directly connected to the fourth node K4, instead of being indirectly connected via the eighth transistor M37.
[0123] The seventh transistor M28 is connected to the seventh node K7 via its control terminal.
[0124] The eighth transistor M37 is connected to the fourth node K4 via its first terminal.
[0125] The eighth transistor M37 is connected to the thirteenth node K13 via its second terminal.
[0126] The eighth transistor M37 is connected to the second voltage power supply line VbatL via its control terminal.
[0127] The ninth transistor M394 is connected to the second node K2 via its first terminal.
[0128] The ninth transistor M394 is connected to the first node K1 via its second terminal.
[0129] The ninth transistor M394 is connected to the first node K1 via its control terminal.
[0130] The tenth transistor M173 is connected to the reference potential line GND through its first terminal.
[0131] The tenth transistor M173 is connected to the second node K2 via its second terminal.
[0132] The tenth transistor M173 is connected to the second node K2 via its control terminal.
[0133] The eleventh transistor M395 is connected to the third node K3 via its first terminal.
[0134] The eleventh transistor M395 is connected to the sixth node K6 via its second terminal.
[0135] The eleventh transistor M395 is connected to the first node K1 via its control terminal.
[0136] The twelfth transistor M184 is connected to the reference potential line GND through its first terminal.
[0137] The twelfth transistor M184 is connected to the third node K3 via its second terminal.
[0138] The twelfth transistor M184 is connected to the second node K2 via its control terminal.
[0139] The thirteenth transistor M38 is connected to the twelfth node K12 via its first terminal.
[0140] The thirteenth transistor M38 is connected to the seventh node K7 via its second terminal.
[0141] The thirteenth transistor M38 is connected to the second voltage power supply line VbatL via its control terminal.
[0142] The first source follower transistor M128 is connected to the third node K3 via its first terminal.
[0143] The first source follower transistor M128 is connected to the fifth node K5 via its second terminal.
[0144] The first source follower transistor M128 is connected to the input signal IN via its control terminal.
[0145] The second source follower transistor M33 is connected to the third node K3 through its first terminal.
[0146] The second source follower transistor M33 is connected to the second voltage power supply line VbatL via its second terminal.
[0147] The second source follower transistor M33 is connected to the fourth node K4 via its control terminal.
[0148] The first terminal of the first current source M218 is connected to the twelfth node K12. If the thirteenth transistor M38 is not used, the first terminal of the first current source M218 is directly connected to the seventh node K7, instead of being indirectly connected through the thirteenth transistor M38.
[0149] The second terminal of the first current source M218 is connected to the reference potential line GND.
[0150] The first terminal of the second current source M36 is connected to the fourth node K4.
[0151] The second terminal of the second current source M36 is connected to the reference potential line GND.
[0152] The first terminal of the bridging resistor R is connected to the fifth node K5.
[0153] The second terminal of the bridging resistor R is connected to the output terminal Out.
[0154] The first terminal of the first resistor R7V is connected to the sixth node K6.
[0155] The second terminal of the first resistor R7V is connected to the first voltage power supply line VbatH.
[0156] The reference current Iref from the exemplary bandgap circuit BG is fed to the first node K1.
[0157] refer to Figure 1 The exemplary bandgap circuit BG is described below.
[0158] The differential amplifier OP is connected to the tenth node K10 via its positive input terminal. The tenth node K10 is held at the reference potential Vref by a reference voltage source. The differential amplifier OP is connected to the control terminal of the third bandgap transistor Q3 via its output terminal. A second voltage supply line VbatL supplies power to the differential amplifier OP, and the potential of this second voltage supply line VbatL is typically significantly lower than the potential of the first voltage supply line VbatH.
[0159] The first terminal of the third bandgap transistor Q3 is connected to the ninth node K9. The second terminal of the third bandgap transistor Q3 is connected to the fourteenth node K14.
[0160] The switching resistor RS converts the voltage at node 9 K9 into current. Here, the differential amplifier OP and the source follower (in the form of the third bandgap transistor Q3) adjust the voltage at node 9 K9 via node 15 based on the potential at node 10 K10. Therefore, the control terminal of the third bandgap transistor Q3 is connected to node 15 K15.
[0161] The current mirror, composed of the first bandgap transistor Q1 and the second bandgap transistor Q2, reflects the reference current Iref of the drive circuit TR through the second bandgap transistor Q2, which flows from the second voltage power line VbatL into the switching resistor RS via the first bandgap transistor Q1.
[0162] An equivalent bandgap circuit can be used.
[0163] Figure 2 A circuit according to the present invention without the common-source cascode transistors M37 and M38 is shown. This corresponds to the requirement.
[0164] The following explains the reference numerals in the attached figures.
[0165] BG represents a bandgap circuit;
[0166] GND represents the reference potential line;
[0167] Iref represents the reference current;
[0168] IN represents the input signal;
[0169] K1 represents the first node;
[0170] K2 represents the second node;
[0171] K3 represents the third node;
[0172] K4 represents the fourth node;
[0173] K5 represents the fifth node;
[0174] K6 represents the sixth node;
[0175] K7 represents the seventh node;
[0176] K8 represents the eighth node;
[0177] K9 represents the ninth node;
[0178] K10 represents the tenth node;
[0179] K11 represents the eleventh node;
[0180] K12 represents the twelfth node;
[0181] K13 represents the thirteenth node;
[0182] K14 represents the fourteenth node;
[0183] K15 represents the fifteenth node;
[0184] M27 indicates the sixth transistor. The sixth transistor, for example, is a P-channel transistor;
[0185] M28 indicates the seventh transistor. The seventh transistor, for example, is a P-channel transistor;
[0186] M33 indicates a second source follower transistor, which is, for example, an N-channel transistor;
[0187] M36 indicates the second current source;
[0188] M37 indicates the eighth transistor. The eighth transistor, for example, is an N-channel transistor;
[0189] M38 indicates the thirteenth transistor. The thirteenth transistor, for example, is an N-channel transistor;
[0190] M66 indicates a third transistor. The third transistor, for example, is a P-channel transistor.
[0191] M73 indicates the fourth transistor. The fourth transistor, for example, is a P-channel transistor;
[0192] M128 represents the first source follower transistor, which is, for example, an N-channel transistor;
[0193] M173 indicates the tenth transistor. The tenth transistor, for example, is an N-channel transistor;
[0194] M184 indicates the twelfth transistor. The twelfth transistor, for example, is an N-channel transistor;
[0195] M218 indicates the first current source;
[0196] M394 indicates the ninth transistor. The ninth transistor, for example, is an N-channel transistor;
[0197] M395 indicates the eleventh transistor. The eleventh transistor, for example, is an N-channel transistor;
[0198] MPH clmp This indicates the fifth transistor. The fifth transistor, for example, is a P-channel transistor;
[0199] MPO stands for switching transistor, which is, for example, a P-channel field-effect transistor used to drive the DSI3 data bus at the output terminal Out.
[0200] MPO ref This represents a model transistor. For example, a P-channel transistor;
[0201] OP stands for differential amplifier;
[0202] Out represents the output terminal of the drive circuit TR;
[0203] Q1 represents the first transistor in the bandgap circuit BG. The first transistor in the bandgap circuit BG is, for example, a P-channel transistor.
[0204] Q2 represents the second transistor in the bandgap circuit BG. The second transistor in the bandgap circuit BG is, for example, a P-channel transistor.
[0205] Q3 represents the third transistor in the bandgap circuit BG. The third transistor in the bandgap circuit BG can be, for example, an N-channel transistor.
[0206] R represents the bridging resistor;
[0207] R7V represents the first resistor;
[0208] RS represents the switching resistor in the bandgap circuit BG;
[0209] TR represents the drive circuit;
[0210] VbatH represents the first voltage power supply line of the drive circuit TR, which is used to supply power to the drive circuit TR. Compared with the second voltage power supply line VbatL, which is used to supply power to the bandgap circuit BG, the first voltage power supply line typically has a significantly increased potential (e.g., 30V) relative to the reference potential line GND.
[0211] VbatL represents the second voltage power supply line of the drive circuit TR, which is used to power the bandgap circuit BG. Compared with the first voltage power supply line VbatH used to power the drive circuit TR, the second voltage power supply line typically has a significantly reduced potential (e.g., 5V) relative to the reference potential of the reference potential line GND;
[0212] VR represents the potential defined according to the potential of the first voltage power supply line VbatH;
[0213] Vref represents the reference voltage.
Claims
1. A drive circuit (TR) for a data bus at its output (Out), comprising: Switching transistor (MPO); First current limiting device (M27, M28, M218, M36, M33, MPO) ref ); First voltage power supply line (VbatH); and Reference potential line (GND), The switching transistor (MPO) is configured and / or set to pull the data bus at the output terminal (Out) to the potential of the first voltage power line (VbatH) according to the input signal (IN). Among them, the first current limiting device (M27, M28, M218, M36, M33, MPO) ref Limit the current flowing through the switching transistor (MPO), and The first current limiting device includes a sixth transistor (M27), a seventh transistor (M28), a first current source (M218), a second current source (M36), a second source follower transistor (M33), and a model transistor (MPO). ref ), The switching transistor (MPO), the sixth transistor (M27), and the first current source (M218) are sequentially connected between the first voltage power supply line (VbatH) and the reference potential line (GND), and the model transistor (MPO) ref The seventh transistor (M28) and the second current source (M36) are sequentially connected between the first voltage power supply line (VbatH) and the reference potential line (GND), and the control terminal of the switching transistor (MPO) and the model transistor (MPO) ref The control terminal of ) is connected to the sixth node (K6). The potential of the fourth node (K4) between the seventh transistor (M28) and the second current source (M36) drives the second source follower transistor (M33) so that the second source follower transistor (M33) draws current from the first resistor (R7V) connected between the sixth node (K6) and the first voltage power line (VbatH), thereby limiting the current flowing through the switching transistor (MPO).
2. The driving circuit (TR) according to claim 1, in, The drive circuit also includes a second current limiting device (M66, M73, MPH). clmp ), In the event of a short circuit between the reference potential line (GND) and the output terminal (Out) of the drive circuit (TR), the second current limiting device (M66, M73, MPH) clmp The current flowing through the switching transistor (MPO) is limited and regulated to a value different from 0A.
3. The driving circuit (TR) according to claim 2, in, The second current limiting device includes a third transistor (M66) and a fifth transistor (MPH). clmp ) and bridging resistor (R), Among them, the fifth transistor (MPH) clmp The third transistor (M66) and the third transistor (M66) feed the resistive current across the bridging resistor (R) to the control terminal of the switching transistor (MPO), and The current limit value for the current flowing through the switching transistor (MPO) is set by the resistance value of the bridging resistor (R).
4. The driving circuit (TR) according to claim 3, in, The second current limiting device also includes a fourth transistor (M73) connected to the third transistor (M66) and the sixth node (K6).
5. A driving circuit, comprising: Reference potential line (GND); First voltage power supply line (VbatH); Second voltage power supply line (VbatL); Input signal (IN); First node (K1); Second node (K2); The third node (K3); Fourth node (K4); Fifth node (K5); The sixth node (K6); Node 7 (K7); Eighth node (K8); Eleventh node (K11); The thirteenth node (K13); Switching transistor (MPO); Model transistor (MPO) ref ); The third transistor (M66); Fourth transistor (M73); Fifth transistor (MPH) clmp ); The sixth transistor (M27); The seventh transistor (M28); Ninth transistor (M394); The tenth transistor (M173); Eleventh transistor (M395); The twelfth transistor (M184); First source follower transistor (M128); Second source follower transistor (M33); First current source (M218); Second current source (M36); Output terminal (Out); bridging resistor (R); First resistor (R7V); The switching transistor (MPO) has a first terminal, a second terminal, and a control terminal. Among them, the model transistor (MPO) ref It has a first terminal, a second terminal, and a control terminal. The third transistor (M66) has a first terminal, a second terminal, and a control terminal. The fourth transistor (M73) has a first terminal, a second terminal, and a control terminal. Among them, the fifth transistor (MPH) clmp It has a first terminal, a second terminal, and a control terminal. The sixth transistor (M27) has a first terminal, a second terminal, and a control terminal. The seventh transistor (M28) has a first terminal, a second terminal, and a control terminal. The ninth transistor (M394) has a first terminal, a second terminal, and a control terminal. The tenth transistor (M173) has a first terminal, a second terminal, and a control terminal. The eleventh transistor (M395) has a first terminal, a second terminal, and a control terminal. The twelfth transistor (M184) has a first terminal, a second terminal, and a control terminal. The first source follower transistor (M128) has a first terminal, a second terminal, and a control terminal. The second source follower transistor (M33) has a first terminal, a second terminal, and a control terminal. The first current source (M218) has a first terminal and a second terminal. The second current source (M36) has a first terminal and a second terminal. The bridging resistor (R) has a first terminal and a second terminal. The first resistor (R7V) has a first terminal and a second terminal. The first terminal of the switching transistor (MPO) is connected to the first voltage power supply line (VbatH). The second terminal of the switching transistor (MPO) is connected to the output terminal (Out). The control terminal of the switching transistor (MPO) is connected to the sixth node (K6). Among them, the model transistor (MPO) ref The first terminal of the device is connected to the first voltage power supply line (VbatH). Among them, the model transistor (MPO) ref The second terminal of the ) is connected to the eleventh node (K11). Among them, the model transistor (MPO) ref The control terminal of the device is connected to the sixth node (K6). The first terminal of the third transistor (M66) is connected to the first voltage power supply line (VbatH). The second terminal of the third transistor (M66) is connected to the eighth node (K8). The control terminal of the third transistor (M66) is connected to the fifth node (K5). The first terminal of the fourth transistor (M73) is connected to the eighth node (K8). The second terminal of the fourth transistor (M73) is connected to the sixth node (K6). The control terminal of the fourth transistor (M73) is connected to the sixth node (K6). Among them, the fifth transistor (MPH) clmp The first terminal of the device is connected to the first voltage power supply line (VbatH). Among them, the fifth transistor (MPH) clmp The second terminal of the connector is connected to the fifth node (K5). Among them, the fifth transistor (MPH) clmp The control terminal of the device is connected to the fifth node (K5). The first terminal of the sixth transistor (M27) is connected to the output terminal (Out). The second terminal of the sixth transistor (M27) is connected to the seventh node (K7). The control terminal of the sixth transistor (M27) is connected to the seventh node (K7). The first terminal of the seventh transistor (M28) is connected to the eleventh node (K11). The second terminal of the seventh transistor (M28) is directly or indirectly connected to the fourth node (K4). The control terminal of the seventh transistor (M28) is connected to the seventh node (K7). The first terminal of the ninth transistor (M394) is connected to the second node (K2). The second terminal of the ninth transistor (M394) is connected to the first node (K1). The control terminal of the ninth transistor (M394) is connected to the first node (K1). The first terminal of the tenth transistor (M173) is connected to the reference potential line (GND). The second terminal of the tenth transistor (M173) is connected to the second node (K2). The control terminal of the tenth transistor (M173) is connected to the second node (K2). The first terminal of the eleventh transistor (M395) is connected to the third node (K3). The second terminal of the eleventh transistor (M395) is connected to the sixth node (K6). The control terminal of the eleventh transistor (M395) is connected to the first node (K1). The first terminal of the twelfth transistor (M184) is connected to the reference potential line (GND). The second terminal of the twelfth transistor (M184) is connected to the third node (K3). The control terminal of the twelfth transistor (M184) is connected to the second node (K2). The first terminal of the first source follower transistor (M128) is connected to the third node (K3). The second terminal of the first source follower transistor (M128) is connected to the fifth node (K5). The control terminal of the first source follower transistor (M128) is connected to the input signal (IN). The first terminal of the second source follower transistor (M33) is connected to the third node (K3). The second terminal of the second source follower transistor (M33) is connected to the second voltage power supply line (VbatL). The control terminal of the second source follower transistor (M33) is connected to the fourth node (K4). The first terminal of the first current source (M218) is directly or indirectly connected to the seventh node (K7). The second terminal of the first current source (M218) is connected to the reference potential line (GND). The first terminal of the second current source (M36) is connected to the fourth node (K4). The second terminal of the second current source (M36) is connected to the reference potential line (GND). The first terminal of the bridging resistor (R) is connected to the fifth node (K5). The second terminal of the bridging resistor (R) is connected to the output terminal (Out). The first terminal of the first resistor (R7V) is connected to the sixth node (K6). Wherein, the second terminal of the first resistor (R7V) is connected to the first voltage power supply line (VbatH), and The reference current (Iref) is fed to the first node (K1).
6. The driving circuit according to claim 5, in, The first current limiting device includes the sixth transistor (M27), the seventh transistor (M28), the first current source (M218), the second current source (M36), the second source follower transistor (M33), and the model transistor (MPO). ref ), The second current limiting device includes the third transistor (M66), the fourth transistor (M73), and the fifth transistor (MPH). clmp ) and the bridging resistor (R), The switching transistor (MPO) is configured and / or set to pull the data bus at the output terminal (Out) to the potential of the first voltage power line (VbatH) according to the input signal (IN). Among them, the first current limiting device (M27, M28, M218, M36, M33, MPO) ref Limit the current flowing through the switching transistor (MPO), and In the event of a short circuit between the reference potential line (GND) and the output terminal (Out) of the drive circuit (TR), the second current limiting device (M66, M73, MPH) clmp The current flowing through the switching transistor (MPO) is limited and regulated to a value different from 0A.