Display device

Abstract

A display device is provided, the display device including: a substrate including a first display area and a second display area, wherein the first display area includes a first pixel area, a second pixel area, and a transmissive area; a first pixel disposed in the first pixel area and including a first pixel electrode, a first counter electrode, and a first intermediate layer between the first pixel electrode and the first counter electrode; and a second pixel disposed in the second pixel area, the second pixel including a second pixel electrode, a second counter electrode, and a second intermediate layer between the second pixel electrode and the second counter electrode. The first counter electrode and the second counter electrode are disposed in the first pixel area and the second pixel area, and the first counter electrode and the second counter electrode include a first contact area at which the first pixel area and the second pixel area are adjacent to each other.

Description

[0001] This application claims priority and benefit to Korean Patent Application No. 10-2019-0090490, filed on July 25, 2019, with the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0002] The disclosure relates to an apparatus, and to a display apparatus. Background Technology

[0003] Display devices are being used for a variety of purposes. As the thickness and weight of display devices have been reduced, the range and number of applications in which they are used have increased.

[0004] With the widespread use of display devices, there are various ways to design the shape of display devices, and various functions linked to or associated with display devices have been added.

[0005] It will be understood that the background art in the technical section is partly intended to provide useful background information for understanding the technology. However, the background art in the technical section may also include a portion of the ideas, concepts, or knowledge of the subject matter disclosed herein that were not known or understood by a person skilled in the art prior to the corresponding valid application date. Summary of the Invention

[0006] To add functionality linked to or associated with a display device (such as improved visibility), one or more of the disclosed embodiments may provide a display device including a sensor area, such as a sensor, that can be located or disposed inside the display area, as well as apparatus and methods for manufacturing said display device. However, the above-described problems are examples and therefore do not limit the scope of the disclosure.

[0007] Other aspects will be set forth in part in the description which follows, and will be apparent in part from the description, or may be learned by practice of the embodiments.

[0008] According to one or more embodiments, a display device may include: a substrate including a first display area and a second display area, the first display area including a first pixel area, a second pixel area, and a transmissive area; a first pixel disposed in the first pixel area and including a first pixel electrode, a first pair of electrodes, and a first intermediate layer disposed between the first pixel electrode and the first pair of electrodes; and a second pixel disposed in the second pixel area and including a second pixel electrode, a second pair of electrodes, and a second intermediate layer disposed between the second pixel electrode and the second pair of electrodes, wherein the first pair of electrodes may be disposed in the first pixel area, the second pair of electrodes may be disposed in the second pixel area, and the first pair of electrodes and the second pair of electrodes may include a first contact area therebetween where the first pixel area and the second pixel area are adjacent to each other. The first pair of electrodes and the second pair of electrodes may be electrically connected to each other through the first contact area.

[0009] The first pixel region, the second pixel region, and the transmission region can be arranged alternately in a grid shape.

[0010] The transmission region can be defined by a first pixel region and a second pixel region that are adjacent to each other.

[0011] The first contact area can be the area where the surfaces of the first pair of electrodes and the second pair of electrodes are in contact with each other.

[0012] In the first contact area, the second pair of electrodes can be disposed on the first pair of electrodes.

[0013] The display device may include a pixel defining layer disposed on a first pixel electrode and a second pixel electrode and including a first opening and a second opening, wherein portions of the first pixel electrode and the second pixel electrode are exposed through the first opening and the second opening, respectively, and a first contact area may be disposed on the pixel defining layer.

[0014] The transmittance of the first display area and the transmittance of the second display area can be different from each other.

[0015] The resolution of the image provided in the first display area may be smaller than the resolution of the image provided in the second display area.

[0016] The second display area may include a third pixel area and a fourth pixel area adjacent to each other. The display device includes: a third pixel disposed in the third pixel area and including a third pixel electrode, a third pair of electrodes, and a third intermediate layer disposed between the third pixel electrode and the third pair of electrodes; and a fourth pixel disposed in the fourth pixel area and including a fourth pixel electrode, a fourth pair of electrodes, and a fourth intermediate layer disposed between the fourth pixel electrode and the fourth pair of electrodes. The third pair of electrodes and the fourth pair of electrodes may include a second contact area where the third pixel area and the fourth pixel area are adjacent to each other. The third pair of electrodes and the fourth pair of electrodes are electrically connected to each other through the second contact area.

[0017] The third or fourth pair of electrodes may protrude toward the first display area. The third pair of electrodes may be electrically connected to the second pair of electrodes, or the fourth pair of electrodes may be electrically connected to the first pair of electrodes, to form a third contact area.

[0018] The fourth pair of electrodes can be disposed on the first pair of electrodes in the third contact area.

[0019] The display device may include a pixel defining layer disposed on a third pixel electrode and a fourth pixel electrode, wherein at least one of the second contact region and the third contact region may be disposed on the pixel defining layer.

[0020] The fourth pair of electrodes can be disposed on the third pair of electrodes in the second contact area.

[0021] The third pair of electrodes, the fourth pair of electrodes, and the second contact area can be configured to cover the entire surface of the second display area.

[0022] Each of the third and fourth electrode pairs can have a strip shape.

[0023] The first and third pairs of electrodes can be aligned with each other, and the second and fourth pairs of electrodes can be aligned with each other.

[0024] The substrate may include a non-display area surrounding at least a portion of the second display area, wherein at least one of the third pair of electrodes and the fourth pair of electrodes may protrude from the second display area toward the non-display area.

[0025] According to one or more embodiments, a display device includes: a substrate including a first display area and a second display area, the first display area including a first pixel area, a second pixel area and a transmissive area; a first pixel disposed in the first pixel area and including a first pixel electrode, a first pair of electrodes and a first intermediate layer disposed between the first pixel electrode and the first pair of electrodes; a second pixel disposed in the second pixel area and including a second pixel electrode, a second pair of electrodes and a second intermediate layer disposed between the second pixel electrode and the second pair of electrodes; and an assembly disposed on a surface of the substrate to correspond to the first display area and including electronic elements for emitting or receiving light, wherein the first pair of electrodes may be disposed in the first pixel area spaced apart from each other, the second pair of electrodes may be disposed in the second pixel area spaced apart from each other, and the first pair of electrodes and the second pair of electrodes may include a first contact area thereon where the first pixel area and the second pixel area may be adjacent to each other.

[0026] The component can emit or receive light through the transmission area, and the transmittance of the second display area can be less than that of the first display area.

[0027] According to one or more embodiments, an apparatus for manufacturing a display device includes: a chamber having a selectively openable or closed portion; a first support disposed inside the chamber and supporting a substrate; a mask assembly disposed inside the chamber facing the substrate; a second support disposed inside the chamber and supporting the mask assembly; and a deposition source disposed in the chamber and supplying deposition material to the substrate, wherein the mask assembly includes a mask frame and a mask sheet disposed on the mask frame, wherein the mask sheet includes a first opening and a second opening disposed in a portion of the mask sheet different from the first opening, the first opening and the second opening being aligned with each other, and the width of the mask sheet between adjacent first openings and second openings being greater than the width of the mask sheet between adjacent second openings and another second opening.

[0028] In an embodiment, the shapes of the first opening and the second opening may be different from each other.

[0029] The deposition source can be located on the edge of the chamber.

[0030] The first opening can be substantially square in shape, and the second opening can be substantially rectangular in shape.

[0031] At least one of the first support member and the second support member can adjust the relative position of the base and the mask assembly.

[0032] According to one or more embodiments, a method of manufacturing a display device includes the following steps: disposing a substrate and a mask assembly inside a cavity; passing a deposition material supplied by a deposition source through the mask assembly to form a first pair of electrodes and a third pair of electrodes in a first display region and a second display region of the substrate, respectively; changing the position of at least one of the substrate and the mask assembly; and passing a deposition material supplied by a deposition source through the mask assembly to form a second pair of electrodes in the first display region that at least partially overlaps with the first pair of electrodes and a fourth pair of electrodes in the second display region that at least partially overlaps with the third pair of electrodes.

[0033] The embodiment may include: a first contact region in which a first pair of electrodes and a second pair of electrodes overlap each other; and a second contact region in which a third pair of electrodes and a fourth pair of electrodes overlap each other. The first and second contact regions may be formed on a pixel defining layer.

[0034] The steps of setting the substrate may include: setting a non-display area surrounding at least a portion of the second display area; and setting a portion of at least one of the third pair of electrodes and the fourth pair of electrodes to protrude from the second display area toward the non-display area.

[0035] An embodiment may include positioning the transmission region between the first pair of electrodes and the second pair of electrodes.

[0036] The embodiment may include forming a third pair of electrodes, a fourth pair of electrodes, and a second contact area where the third pair of electrodes and the fourth pair of electrodes overlap each other to cover the entire surface of the second display area.

[0037] An embodiment may include a first contact region in which a first pair of electrodes and a second pair of electrodes can be stacked on top of each other and can be in surface contact with each other.

[0038] An embodiment may include a second contact region in which a third pair of electrodes and a fourth pair of electrodes can be stacked on top of each other and can be in surface contact with each other.

[0039] The transmittance of the first display area and the transmittance of the second display area can be different from each other.

[0040] An embodiment may include a third contact region formed thereon, at least one of a third pair of electrodes and a fourth pair of electrodes, which may protrude toward the first display area. The third contact region may be electrically connected to at least one of the first pair of electrodes and the second pair of electrodes.

[0041] The embodiments may include forming a first pair of electrodes comprising a plurality of first pairs of electrodes, wherein at least one of the plurality of first pairs of electrodes and a third pair of electrodes may be arranged in a first direction, and the others of the plurality of first pairs of electrodes may be arranged in a second direction different from the first direction.

[0042] The embodiment may include forming a first pair of electrodes and a second pair of electrodes to be connected in a third direction different from the first direction and the second direction.

[0043] Other aspects, features, and advantages will become apparent and more readily understood from the claims, the accompanying drawings, and the following description of embodiments.

[0044] These general embodiments can be implemented using systems, methods, computer programs or combinations thereof, computers, processors or other hardware within the scope of the disclosure. Attached Figure Description

[0045] The above and other aspects, features and advantages disclosed will become more apparent from the following description taken in conjunction with the accompanying drawings, in which:

[0046] Figure 1 This is a perspective view of a display device according to an embodiment;

[0047] Figure 2 This is a schematic cross-sectional view of a display device according to an embodiment;

[0048] Figure 3 This is a plan view of the display panel according to an embodiment;

[0049] Figure 4 This illustrates an embodiment. Figure 3 A magnified plan view of the first display area;

[0050] Figure 5 and Figure 6 This is a schematic diagram of the equivalent circuit of the pixels of the display panel according to an embodiment;

[0051] Figure 7 This is a diagram of the pixel circuitry of the pixel according to an embodiment;

[0052] Figure 8 It is along Figure 7 A schematic cross-sectional view taken by lines I-I' and II-II';

[0053] Figure 9 and Figure 10 This is a plan view showing a portion of the first display area according to an embodiment;

[0054] Figure 11 and Figure 12 It is along Figure 9 A schematic cross-sectional view taken along line B-B' to illustrate a portion of the process for manufacturing a display panel according to an embodiment;

[0055] Figure 13 It is along Figure 9 A schematic cross-sectional view taken by line B-B';

[0056] Figure 14 This is a plan view showing the arrangement of the counter electrodes of the display panel according to an embodiment;

[0057] Figure 15 It is along Figure 14 A schematic cross-sectional view taken by line C-C';

[0058] Figure 16 It is along Figure 14 A schematic cross-sectional view taken by line D-D';

[0059] Figure 17 It is along Figure 14 A schematic cross-sectional view taken by line E-E';

[0060] Figure 18 This is a perspective view of a display device according to an embodiment;

[0061] Figure 19 This is a plan view showing the display area and non-display area of ​​the display panel according to an embodiment;

[0062] Figure 20 This is a schematic cross-sectional view of an apparatus for manufacturing a display device according to an embodiment;

[0063] Figure 21 This is a plan view showing a portion of the mask sheet according to an embodiment;

[0064] Figure 22 This is a plan view showing the display area and non-display area of ​​the display panel according to an embodiment;

[0065] Figure 23 This is a plan view showing a portion of the mask sheet according to an embodiment;

[0066] Figure 24 This is a plan view showing the display area and non-display area of ​​the display panel according to an embodiment;

[0067] Figure 25 This is a plan view showing a portion of the mask sheet according to an embodiment;

[0068] Figure 26 This is a plan view showing the display area and non-display area of ​​the display panel according to an embodiment;

[0069] Figure 27 This is a plan view showing the display area and non-display area of ​​the display panel according to an embodiment;

[0070] Figure 28 This is a plan view showing the display area and non-display area of ​​the display panel according to an embodiment; and

[0071] Figure 29 This is a plan view showing the display area and non-display area of ​​the display panel according to an embodiment. Detailed Implementation

[0072] Reference will now be made in detail to embodiments, examples of which are illustrated in the accompanying drawings, wherein the same reference numerals always indicate the same elements. In this regard, embodiments may take different forms and should not be construed as limited to the description set forth herein. Therefore, the embodiments are described below only by reference to the accompanying drawings to explain the aspects described. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. Throughout the disclosure, the expression “at least one of a, b, and c” means only a, only b, only c, both a and b, both a and c, both b and c, all or variations thereof.

[0073] Reference will now be made in detail to the embodiments, examples of which are shown in the accompanying drawings, in which the same elements are indicated by the same reference numerals and their descriptions will not be repeated.

[0074] It will be understood that although the terms “first,” “second,” etc., may be used here to describe various elements, these elements should not be limited by these terms, and these terms are only used to distinguish one element from another.

[0075] As used herein, unless the context clearly indicates otherwise, the singular forms “a (kind)” and “the” are also intended to include the plural forms.

[0076] It will also be understood that the terms “comprising,” “including,” and / or variations thereof, as used herein, indicate the presence of the stated feature or component, but do not preclude the presence or addition of one or more other features or components.

[0077] It will be understood that when a layer, region, or element is referred to as being "formed" "on" another layer, region, or element, that layer, region, or element may be formed directly on said other layer, region, or element, or there may be intermediate layers, intermediate regions, or intermediate elements between them. Furthermore, when a layer, film, region, substrate, or area is referred to as being "below" another layer, film, region, substrate, or area, that layer, film, region, substrate, or area may be directly below said other layer, film, region, substrate, or area, or there may be intermediate layers, intermediate films, intermediate regions, intermediate substrates, or intermediate areas between them. Conversely, when a layer, film, region, substrate, or area is referred to as being "directly below" another layer, film, region, substrate, or area, there may be no intermediate layers, intermediate films, intermediate regions, intermediate substrates, or intermediate areas between them. Moreover, "on" or "above" can include positioning on or below an object and does not necessarily imply a direction based on gravity.

[0078] For ease of illustration, the dimensions of the components may be exaggerated. For example, since the dimensions and thicknesses of the components in the accompanying drawings may be arbitrarily shown for ease of illustration, the following embodiments are not limited thereto.

[0079] Furthermore, in the specification, the phrase "in a plan view" means when viewing a portion of the object from above, and the phrase "in a schematic sectional view" means when viewing a schematic section taken by vertically cutting the portion of the object from the side. Additionally, the terms "overlapping" or "overlapping" mean that the first object may be above or below the second object, or vice versa. Furthermore, the term "overlapping" can include layer, stack, facing or oriented, extending over, covering or partially covering, or any other suitable term as will be understood and appreciated by one of ordinary skill in the art. The terms "facing" and "oriented" mean that the first element may be directly or indirectly opposite the second element. Where a third element is located between the first and second elements, the first and second elements can be understood as being indirectly opposite each other, although still facing each other. When an element is described as "not" or "not overlapping" with another element, this can include elements spaced apart from each other, offset from each other, or separated from each other, or any other suitable term as will be understood and appreciated by one of ordinary skill in the art.

[0080] Throughout the specification, when a component is referred to as being “connected” to another component, the component may be “directly connected” to another component, or “electrically connected” to another component with one or more intermediate components inserted between them.

[0081] In the following examples, the x-axis, y-axis, and z-axis are not limited to the three axes of a Cartesian coordinate system and can be interpreted in a broader sense. For example, the x-axis, y-axis, and z-axis can be perpendicular to each other, or they can represent different directions that are not perpendicular to each other.

[0082] When embodiments can be implemented differently, the specific process sequence may differ from the described sequence. For example, two consecutively described processes may be performed substantially simultaneously or in a sequence that is the reverse of or different from the described sequence.

[0083] Figure 1 This is a perspective view of a display device according to an embodiment.

[0084] Reference Figure 1 The display device 1 includes a display area DA where an image can be formed and a non-display area NDA where no image can be formed. The display area DA may include a second display area DA2 and a first display area DA1 located or disposed in the second display area DA2. The display device 1 can provide a main image by using light emitted by a main pixel (or referred to as a second display area pixel) PXm located or disposed in the second display area DA2.

[0085] The first display area DA1 can be an area where components (e.g., sensors using infrared, visible light, and / or sound) can be located or positioned below. (See below for reference.) Figure 2 An embodiment thereof is described. A first display area DA1 may include a transmissive area TA through which light and / or sound traveling from the component to the outside or from the outside toward the component can be transmitted. According to an embodiment, when, for example, infrared light is transmitted through the first display area DA1, the transmittance of the first display area DA1 may be equal to or greater than about 10%, or for example, equal to or greater than about 20%, about 25%, about 50%, about 85%, or about 90%. The transmittance of the first display area DA1 may differ from the transmittance of the second display area DA2. For example, the transmittance of the first display area DA1 may be greater than the transmittance of the second display area DA2.

[0086] In an embodiment, an auxiliary pixel (or referred to as a first display area pixel) PXa may be located or disposed in the first display area DA1, and an image may be provided by using light emitted by the auxiliary pixel PXa. The image provided in the first display area DA1 may be an auxiliary image and may have a lower resolution than the image provided in the second display area DA2. For example, because the first display area DA1 includes a transmission area TA through which light and / or sound can be transmitted, the number of auxiliary pixels PXa that can be located or disposed per unit area may be less than the number of main pixels PXm that are located or disposed per unit area in the second display area DA2.

[0087] The first display area DA1 may be at least partially surrounded by the second display area DA2. In other embodiments, the first display area DA1 may be completely surrounded by the second display area DA2. Figure 1 The second display area DA2 is surrounded.

[0088] Although the organic light-emitting display device will be described as display device 1 according to the embodiment, display device 1 is not limited thereto. In other embodiments, display device 1 may be any of a variety of display devices, such as an inorganic electroluminescent (EL) display or a quantum dot light-emitting display.

[0089] Although the first display area DA1 is located or positioned on one side (e.g., the upper right side) of the second display area DA2, which has a quadrilateral shape, the disclosure is not limited thereto. The shape of the second display area DA2 may be circular, elliptical, or polygonal, such as triangular or pentagonal, and the position and number of the first display areas DA1 may be changed or arranged in various ways.

[0090] Figure 2 This is a schematic cross-sectional view of a display device according to an embodiment. Figure 2 It can be along Figure 1 A schematic cross-sectional view taken by line A-A'.

[0091] Reference Figure 2 The display device 1 may include a display panel 10 containing display elements and a component 20 that may be located or disposed below the display panel 10. The component 20 may be disposed in or correspond to the first display area DA1.

[0092] The display panel 10 may include a substrate 100, a display element layer 200 located on or disposed on the substrate 100, and a thin film encapsulation layer 300, which may be a sealing member for sealing the display element layer 200. The display panel 10 may include a lower protective film 175 located or disposed below the substrate 100.

[0093] The substrate 100 may comprise glass or a polymeric resin. The polymeric resin may include, for example, polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, cellulose acetate propionate, or combinations thereof. The substrate 100 comprising the polymeric resin may be flexible, rollable, or bendable. The substrate 100 may have a multilayer structure (not shown) comprising a layer containing the polymeric resin and an inorganic layer.

[0094] The display element layer 200 may include a circuit layer containing a thin-film transistor (TFT), an organic light-emitting diode (also known as an organic light-emitting display device) (OLED) as a display element, and an insulating layer IL between the circuit layer and the OLED.

[0095] The main pixel PXm, including the TFT and the OLED connected to the TFT, can be located or disposed in the second display area DA2. The auxiliary pixel PXa, including the TFT and the OLED connected to the TFT, can be located or disposed in the first display area DA1. Wiring (not shown) electrically connected to the main pixel PXm and the auxiliary pixel PXa can be located or disposed in the display device 1.

[0096] The transmissive region TA, where no TFTs or pixels are positioned or disposed, may be located or disposed within the first display region DA1. The transmissive region TA may be an area through which light or signals emitted from component 20 or incident on component 20 can be transmitted.

[0097] Component 20 may be located or disposed in the first display area DA1. Component 20 may be an electronic component that uses light or sound. Examples of component 20 may include sensors (such as infrared sensors) for receiving and using light, sensors for outputting and detecting light or sound to measure distance or identify fingerprints, a small lamp for outputting light, and a speaker for outputting sound. When component 20 is an electronic component that uses light, component 20 may use light of various wavelengths, such as visible light, infrared light, or ultraviolet light. In other embodiments, multiple components 20 may be disposed in the first display area DA1. For example, a light-emitting element and a light-receiving element may be disposed as separate components in a single first display area DA1. As another example, a light emitter and a light receiver may be disposed simultaneously in a single component.

[0098] The thin-film encapsulation layer 300 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. In this regard, Figure 2 A first inorganic encapsulation layer 310 and a second inorganic encapsulation layer 330 are shown, as well as an organic encapsulation layer 320 located or disposed between the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330.

[0099] Each of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may include at least one inorganic insulating material selected from (but not limited to) alumina, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, silicon oxynitride, and combinations thereof. The organic encapsulation layer 320 may include polymeric materials. Polymeric materials may include, but are not limited to, polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyimide, polyethylene sulfonate, polyoxymethylene, polyarylate, hexamethyldisiloxane (HMDSO), acrylic resins (e.g., polymethyl methacrylate (PMMA) or polyacrylic acid), or combinations thereof.

[0100] The lower protective film 175 can be attached to the bottom of the substrate 100 and can support and protect the substrate 100. The lower protective film 175 may include an opening 175OP located or disposed in the first display area DA1. Because the opening 175OP can be formed in the lower protective film 175, the light transmittance of the first display area DA1 can be improved. The lower protective film 175 may include polyethylene terephthalate or polyimide.

[0101] The area of ​​the first display area DA1 can be larger than the area where the component 20 is located or disposed. Although in Figure 2 In this embodiment, the area of ​​the first display area DA1 and the area of ​​the opening 175OP are substantially the same, but the area of ​​the opening 175OP of the lower protective film 175 may be different from the area of ​​the first display area DA1. For example, the area of ​​the opening 175OP may be smaller than the area of ​​the first display area DA1.

[0102] Despite Figure 2 Although not shown, input sensing elements for sensing input (e.g., touch input), anti-reflective elements including polarizers, delayers, color filters or black matrices, and transparent windows may be further located or disposed on the display panel 10.

[0103] Although the thin-film encapsulation layer 300 can be used as a sealing member for sealing the display element layer 200 in the embodiments, the disclosure is not limited thereto. For example, a sealing substrate attached to the substrate 100 by using a sealant or glass frit can be used as a member for sealing the display element layer 200.

[0104] Figure 3 This is a plan view of the display panel according to an embodiment. Figure 4 According to the embodiments Figure 3 A magnified plan view of the first display area.

[0105] Reference Figure 3 and Figure 4 Various elements of the display panel 10 may be located or disposed on the substrate 100. The substrate 100 may include a display area DA and a non-display area NDA surrounding the display area DA. The display area DA may include a second display area DA2 where a main image can be displayed and a first display area DA1 where an auxiliary image can be displayed and includes a transmission area TA.

[0106] The main pixel PXm can be located or disposed in the second display area DA2. Each of the main pixels PXm can include a display element, such as an organic light-emitting diode (OLED). Each main pixel PXm can emit light, such as red, green, blue, or white light from the OLED. The main pixel PXm used herein can refer to a pixel that emits light of one color from red, green, blue, and white light. The second display area DA2 can be referenced. Figure 2 The described sealing member covers and protects the second display area DA2 from external air or moisture.

[0107] A first display area DA1 may be located or disposed inside a second display area DA2, and auxiliary pixels PXa may be located or disposed within the first display area DA1. Each of the auxiliary pixels PXa may include a display element, such as an OLED. Each auxiliary pixel PXa may emit light (e.g., red, green, blue, or white light) from the OLED. The auxiliary pixel PXa used herein may refer to a pixel that emits light of one color from red, green, blue, and white light as described above. A transmissive region TA located or disposed between the auxiliary pixels PXa may be disposed within the first display area DA1.

[0108] Because the first display area DA1 includes the transmission area TA, the resolution of the first display area DA1 can be smaller than the resolution of the second display area DA2. For example, the resolution of the first display area DA1 can be about half the resolution of the second display area DA2. In some embodiments, the resolution of the second display area DA2 can be equal to or greater than about 400 ppi, and the resolution of the first display area DA1 can be about 200 ppi.

[0109] Reference Figure 4 An embodiment of the first display area DA1 is described.

[0110] The first display area DA1 may include a transmissive area TA and an auxiliary pixel area PA1 containing at least one auxiliary pixel PXa. The auxiliary pixel area PA1 and the transmissive area TA may be arranged alternately in a lattice (also referred to as a grid) shape along a first direction DR1 and a second direction DR2. In an exemplary embodiment, when a region is described as including an element / component, it means that the element / component is located in the region. Similarly, when a region is described as not including an element / component, it means that the element / component is not arranged in the region. Likewise, when a region is described as including an element / component, it means that a portion of the element / component is located in the region.

[0111] The auxiliary pixel region PA1 may include an auxiliary pixel Pr that emits red light, an auxiliary pixel Pg that emits green light, and an auxiliary pixel Pb that emits blue light. The auxiliary pixel PXa may be as follows: Figure 4 The arrangement shown is in a pentile shape, but the embodiment is not limited to this. In other embodiments, the auxiliary pixels PXa can be arranged in a strip (also known as a bar) shape or any of the various shapes that can be understood and appreciated by those skilled in the art. Although in Figure 4 Eight auxiliary pixels PXa are set in the auxiliary pixel area PA1, but the number of auxiliary pixels PXa can vary depending on the resolution of the first display area DA1, so the number of auxiliary pixels PXa is not limited to this.

[0112] In an embodiment, a main pixel PXm and an auxiliary pixel PXa may include the same or similar pixel circuitry. However, the disclosure is not limited thereto. The pixel circuitry included in the main pixel PXm and the pixel circuitry included in the auxiliary pixel PXa may be different from each other.

[0113] The auxiliary pixel PXa may not be located or disposed within the transmissive region TA. For example, when the auxiliary pixel PXa is not located or disposed within the transmissive region TA, it may mean that the transmissive region TA does not include display elements such as OLEDs. For example, when the auxiliary pixel PXa is not located or disposed within the transmissive region TA, it may mean that the pixel electrodes, intermediate layers, and counter electrodes constituting the OLED, as well as the pixel circuitry electrically connected to the pixel electrodes, intermediate layers, and counter electrodes, are not located or disposed within the transmissive region TA. A portion of the signal lines (e.g., drive voltage line PL, data line DL, scan line SL, and emission control line EL) connected to apply signals to the auxiliary pixel PXa located or disposed within the auxiliary pixel region PA1 may pass through the transmissive region TA. However, even in this case, to improve the transmittance of the transmissive region TA, the signal lines (e.g., drive voltage line PL, data line DL, scan line SL, and emission control line EL) may bypass the central portion of the transmissive region TA.

[0114] A conductive layer (not shown) may be located or disposed on the substrate 100 to correspond to the auxiliary pixel region PA1 of the first display region DA1. The conductive layer may be located or disposed below the auxiliary pixel PXa, for example, between the TFT of the auxiliary pixel PXa and the substrate 100. The conductive layer can prevent external light emitted from component 20 from incident on the pixel circuit PC (see [link to component 20]) of the auxiliary pixel PXa. Figure 5 As a result, the pixel circuit PC is unaffected by external light. A constant voltage or signal can be applied to the conductive layer, thereby preventing damage to the pixel circuit PC that would otherwise have been caused by electrostatic discharge. The conductive layer can be disposed in the first display area DA1, and the conductive layer can receive different voltages.

[0115] Return to reference Figure 3The main pixel PXm and the auxiliary pixel PXa can be electrically connected to an external circuit. The first scan drive circuit 110, the second scan drive circuit 120, the terminal 140, the data drive circuit 150, the first power supply wiring 160, and the second power supply wiring 170 can be located or disposed in the non-display area NDA.

[0116] The first scan driving circuit 110 can apply a scan signal to each of the main pixel PXm and the auxiliary pixel PXa via the scan line SL. The first scan driving circuit 110 can also apply an emission control signal to each pixel via the emission control line EL. The second scan driving circuit 120 can be parallel to the first scan driving circuit 110 with a display area DA between them. Some pixels located in or disposed in the display area DA, including the main pixel PXm and the auxiliary pixel PXa, can be electrically connected to the first scan driving circuit 110, and other pixels can be connected to the second scan driving circuit 120. In this embodiment, the second scan driving circuit 120 can be omitted.

[0117] Terminal 140 may be located or disposed on one side of substrate 100. Terminal 140 may be exposed without being covered by an insulating layer and may be electrically connected to a printed circuit board (PCB). Terminal PCB-P of the PCB may be electrically connected to terminal 140 of display panel 10. The PCB transmits signals or power from a controller (not shown) to display panel 10. Control signals generated by the controller may be transmitted via the PCB to the first scan drive circuit 110 and the second scan drive circuit 120. The controller may transmit first power ELVDD and second power ELVSS (see...) Figure 5 and Figure 6 The first power supply ELVDD can be supplied to the first power supply wiring 160 and the second power supply wiring 170 respectively. The first power supply ELVDD can be supplied to each of the main pixel PXm and the auxiliary pixel PXa through the drive voltage line PL connected to the first power supply wiring 160, and the second power supply ELVSS can be supplied to the counter electrode of each of the main pixel PXm and the auxiliary pixel PXa connected to the second power supply wiring 170.

[0118] The data driving circuit 150 is electrically connected to the data line DL. The data signal from the data driving circuit 150 can be applied to each of the main pixel PXm and the auxiliary pixel PXa via the connection wiring 151 connected to terminal 140 and the data line DL connected to the connection wiring 151. Although in Figure 3 The data driving circuit 150 is located on or disposed on the PCB, but in this embodiment, the data driving circuit 150 may be located on or disposed on the substrate 100. For example, the data driving circuit 150 may be located or disposed between the terminal 140 and the first power supply wiring 160.

[0119] The first power supply wiring 160 may be located or disposed between the second display area DA2 and the terminal 140, and may include a first sub-wiring 162 and a second sub-wiring 163 extending parallel to each other in the x-direction. The second power supply wiring 170 may partially surround the display area DA in an annular shape having an open side.

[0120] Figure 5 and Figure 6 This is a schematic diagram of the equivalent circuit of the pixels of the display panel according to an embodiment.

[0121] Reference Figure 5 and Figure 6 Each of the main pixel PXm and the auxiliary pixel PXa may include a pixel circuit PC connected to the scan line SL and the data line DL, as well as an OLED connected to the pixel circuit PC.

[0122] The pixel circuit PC may include a driving TFT T1, a switching TFT T2, and a storage capacitor Cst. The switching TFT T2 may be connected to the scan line SL and the data line DL, and may transmit the data signal Dm input through the data line DL to the driving TFT T1 according to the scan signal Sn input through the scan line SL.

[0123] The storage capacitor Cst can be connected to the switch TFT T2 and the drive voltage line PL, and can store a voltage corresponding to the voltage received from the switch TFT T2 and the first power ELVDD (or drive voltage) supplied to the drive voltage line PL.

[0124] The driving TFT T1 can be connected to the driving voltage line PL and the storage capacitor Cst, and the driving current flowing through the OLED from the driving voltage line PL can be controlled in response to the value of the voltage stored in the storage capacitor Cst. The OLED can emit light with a brightness that varies according to the driving current.

[0125] Despite Figure 5 In one embodiment, the pixel circuit PC includes two TFTs and a storage capacitor, but the disclosure is not limited thereto. Figure 6 As shown, the pixel circuit PC may include, for example, seven TFTs and a storage capacitor. Although in Figure 6 The pixel circuit PC includes one storage capacitor, but the pixel circuit PC may include two or more storage capacitors. Therefore, the number of TFTs and storage capacitors is not limited to this and can be varied depending on the embodiment.

[0126] Reference Figure 6Each of the main pixel PXm and auxiliary pixel PXa may include a pixel circuit PC and an OLED connected to the pixel circuit PC. The pixel circuit PC may include TFTs 1 to TFT 7 and a storage capacitor Cst. The TFTs and the storage capacitor Cst may be connected to signal lines (e.g., scan line SL, previous scan line SL-1, emit control line EL, and data line DL), initialization voltage line VL, and drive voltage line PL.

[0127] Although the main pixel PXm and the auxiliary pixel PXa are connected to signal lines (e.g., scan line SL, previous scan line SL-1, transmit control line EL, and data line DL), initialization voltage line VL, and drive voltage line PL, the disclosure is not limited thereto. In other embodiments, at least one of the signal lines (e.g., scan line SL, previous scan line SL-1, transmit control line EL, and data line DL), initialization voltage line VL, and drive voltage line PL may be shared by adjacent pixels.

[0128] The signal lines may include a scan line SL for transmitting the scan signal Sn, a previous scan line SL-1 for transmitting the previous scan signal Sn-1 to the first initialization TFT T4 and the second initialization TFT T7, an emission control line EL for transmitting the emission control signal En to the operation control TFT T5 and the emission control TFT T6, and a data line DL that intersects with the scan line SL and transmits the data signal Dm. The driving voltage line PL can transmit the driving voltage ELVDD to the driving TFT T1, and the initialization voltage line VL can transmit the initialization voltage Vint that initializes the pixel electrode and the driving TFT T1. The first initialization TFT T4, the second initialization TFT T7, the operation control TFT T5, and the emission control TFT T6 are not limited to the embodiments described above.

[0129] The driving gate electrode G1 of driving TFT T1 can be connected to the lower electrode CE1 of the storage capacitor Cst. The driving source electrode S1 of driving TFT T1 can be connected to the driving voltage line PL via the operation control TFT T5. The driving drain electrode D1 of driving TFT T1 can be electrically connected to the pixel electrode of the OLED via the emission control TFT T6. Driving TFT T1 can receive the data signal Dm according to the switching operation of switching TFT T2 and supply driving current I to the OLED according to the emission control operation of emission control TFT T6. OLED .

[0130] The gate electrode G2 of the switching TFT T2 can be connected to the scan line SL. The source electrode S2 of the switching TFT T2 can be connected to the data line DL. The drain electrode D2 of the switching TFT T2 can be connected to the driving source electrode S1 of the driving TFT T1, and can be connected to the driving voltage line PL via the operation control TFT T5. The switching TFT T2 can be turned on according to the scan signal Sn received through the scan line SL and can perform a switching operation to transmit the data signal Dm through the data line DL to the driving source electrode S1 of the driving TFT T1.

[0131] The compensation gate electrode G3 of the compensation TFT T3 can be connected to the scan line SL. The compensation source electrode S3 of the compensation TFT T3 can be connected to the driving drain electrode D1 of the driving TFT T1, and can be connected to the pixel electrode of the OLED via the emission control TFT T6. The compensation drain electrode D3 of the compensation TFT T3 can be connected to the lower electrode CE1 of the storage capacitor Cst, the first initialization drain electrode D4 of the first initialization TFT T4, and the driving gate electrode G1 of the driving TFT T1. The compensation TFT T3 can be turned on according to the scan signal Sn received through the scan line SL, and the driving TFT T1 diode can be connected by electrically connecting the driving gate electrode G1 of the driving TFT T1 to the driving drain electrode D1.

[0132] The first initialization gate electrode G4 of the first initialization TFT T4 can be connected to the previous scan line SL-1. The first initialization source electrode S4 of the first initialization TFT T4 can be connected to the second initialization drain electrode D7 and the initialization voltage line VL of the second initialization TFT T7. The first initialization drain electrode D4 of the first initialization TFT T4 can be connected to the lower electrode CE1 of the storage capacitor Cst, the compensation drain electrode D3 of the compensation TFT T3, and the driving gate electrode G1 of the driving TFT T1. The first initialization TFT T4 can be turned on according to the previous scan signal Sn-1 received through the previous scan line SL-1, and can perform an initialization operation to initialize the voltage of the driving gate electrode G1 of the driving TFT T1 by transmitting the initialization voltage Vint to the driving gate electrode G1 of the driving TFT T1.

[0133] The operation control gate electrode G5 of the operation control TFT T5 can be connected to the emitter control line EL. The operation control source electrode S5 of the operation control TFT T5 can be connected to the drive voltage line PL. The operation control drain electrode D5 of the operation control TFT T5 can be connected to the drive source electrode S1 of the driving TFT T1 and the switch drain electrode D2 of the switching TFT T2.

[0134] The emission control gate electrode G6 of the emission control TFT T6 can be connected to the emission control line EL. The emission control source electrode S6 of the emission control TFT T6 can be connected to the driving drain electrode D1 of the driving TFT T1 and the compensation source electrode S3 of the compensation TFT T3. The emission control drain electrode D6 of the emission control TFT T6 can be electrically connected to the second initialization source electrode S7 of the second initialization TFT T7 and the pixel electrode of the OLED.

[0135] The operation control TFT T5 and the emission control TFT T6 can be simultaneously turned on according to the emission control signal En received through the emission control line EL, and can transmit the driving voltage ELVDD to the OLED and enable the driving current I. OLED It flows through the OLED.

[0136] The second initialization gate electrode G7 of the second initialization TFT T7 can be connected to the previous scan line SL-1. The second initialization source electrode S7 of the second initialization TFT T7 can be connected to the emission control drain electrode D6 of the emission control TFT T6 and the pixel electrode of the OLED. The second initialization drain electrode D7 of the second initialization TFT T7 can be connected to the first initialization source electrode S4 of the first initialization TFT T4 and the initialization voltage line VL. The second initialization TFT T7 can be turned on according to the previous scan signal Sn-1 received through the previous scan line SL-1 and can initialize the pixel electrode of the OLED.

[0137] Despite Figure 6 In one embodiment, the first initialization TFT T4 and the second initialization TFT T7 are connected to the previous scan line SL-1, but the disclosure is not limited thereto. In other embodiments, the first initialization TFT T4 may be connected to the previous scan line SL-1 and can be operated according to the previous scan signal Sn-1, and the second initialization TFT T7 may be connected to a separate signal line (e.g., the next scan line) and can be operated according to the signal transmitted through that signal line.

[0138] The upper electrode CE2 of the storage capacitor Cst can be connected to the driving voltage line PL. The counter electrode of the OLED can be connected to the common voltage (also known as the second power) ELVSS. Therefore, the OLED can receive a driving current I from the driving TFT T1. OLED It emits light and displays images.

[0139] Despite Figure 6 In the embodiments described, the compensation TFT T3 and the first initialization TFT T4 have dual gate electrodes, but the disclosure is not limited thereto. In other embodiments, the compensation TFT T3 and the first initialization TFT T4 may include a single gate electrode.

[0140] Figure 7 This is a diagram of the pixel circuit of the pixel according to an embodiment. Figure 8 It is along Figure 7 The sectional view taken by lines I-I' and II-II'.

[0141] Reference Figure 7 and Figure 8 The driving TFT T1, the switching TFT T2, the compensation TFT T3, the first initialization TFT T4, the operation control TFT T5, the emission control TFT T6, and the second initialization TFT T7 can be arranged along the semiconductor layer 1130.

[0142] The semiconductor layer 1130 may be located on or disposed on a substrate on which a buffer layer including an inorganic insulating material may be formed. In an embodiment, the semiconductor layer 1130 may comprise low-temperature polycrystalline silicon (LTPS). This is because polycrystalline silicon has a high electron mobility (equal to or greater than about 100 cm⁻¹). 2 Polycrystalline silicon (PS) has low power consumption and high reliability, so it can be used as the semiconductor layer 1130 of the TFT in the display device 1. However, the disclosure is not limited thereto, and in other embodiments, the semiconductor layer 1130 may be formed of amorphous silicon (a-Si) and / or oxide semiconductor, and some semiconductor layers from the TFT may be formed of LTPS while some other semiconductor layers may be formed of amorphous silicon and / or oxide semiconductor.

[0143] Some portions of semiconductor layer 1130 may correspond to the semiconductor layers of driving TFT T1, switching TFT T2, compensation TFT T3, first initialization TFT T4, operation control TFT T5, emission control TFT T6, and second initialization TFT T7. In other words, the semiconductor layers of driving TFT T1, switching TFT T2, compensation TFT T3, first initialization TFT T4, operation control TFT T5, emission control TFT T6, and second initialization TFT T7 may be interconnected in various curved or other shapes as will be understood and appreciated by those skilled in the art.

[0144] The semiconductor layer 1130 may include a channel region and source and drain regions on both sides of the channel region. The source and drain regions may be the source electrode and drain electrode of the corresponding TFT, respectively. For ease of explanation, the source and drain regions may be referred to as the source electrode and drain electrode, respectively.

[0145] The driving TFT T1 may include a driving gate electrode G1 stacked with the driving channel region, and driving source electrodes S1 and driving drain electrodes D1 on both sides of the driving channel region. The driving channel region stacked with the driving gate electrode G1 may have a curved shape, such as a substantially omega (Ω) shape, to form a long driving channel in a narrow space. When the length of the driving channel region is large, the driving range of the gate voltage can be increased, and the gray level of the light emitted by the OLED can be controlled more precisely, thereby improving the display quality.

[0146] The switching TFT T2 may include a switching gate electrode G2 stacked with the switching channel region, and a switching source electrode S2 and a switching drain electrode D2 on both sides of the switching channel region. The switching drain electrode D2 may be connected to the driving source electrode S1.

[0147] The compensation TFT T3, which may be a dual-TFT, may include a compensation gate electrode G3 stacked with two compensation channel regions, and may include a compensation source electrode S3 and a compensation drain electrode D3 on both sides of the compensation gate electrode G3. The compensation TFT T3 can be connected to the driving gate electrode G1 of the driving TFT T1 via the node connection line 1174 described below.

[0148] The first initialization TFT T4, which can be a dual TFT, may include a first initialization gate electrode G4 stacked with two first initialization channel regions, and may include a first initialization source electrode S4 and a first initialization drain electrode D4 on both sides of the first initialization gate electrode G4.

[0149] The operation control TFT T5 may include an operation control gate electrode G5 stacked with the operation control channel region, and operation control source electrodes S5 and operation control drain electrodes D5 on both sides of the operation control gate electrode G5. The operation control drain electrode D5 may be connected to the drive source electrode S1.

[0150] The emission control TFT T6 may include an emission control gate electrode G6 stacked with the emission control channel region, and emission control source electrodes S6 and emission control drain electrodes D6 on both sides of the emission control gate electrode G6. The emission control source electrode S6 may be connected to the driving drain electrode D1.

[0151] The second initialization TFT T7 may include a second initialization gate electrode G7 superimposed on the second initialization channel region, and a second initialization source electrode S7 and a second initialization drain electrode D7 on both sides of the second initialization gate electrode G7.

[0152] The TFT above can be connected to signal lines (e.g., scan line SL, previous scan line SL-1, transmit control line EL, and data line DL), initialization voltage line VL, and drive voltage line PL.

[0153] The scan line SL, the previous scan line SL-1, the emission control line EL, and the drive gate electrode G1 can be located or disposed on the semiconductor layer 1130, and there are (some) insulating layers between the scan line SL, the previous scan line SL-1, the emission control line EL, and the drive gate electrode G1 and the semiconductor layer 1130.

[0154] The scan line SL can extend along the first direction DR1. Some portions of the scan line SL can correspond to the switching gate electrode G2 and the compensation gate electrode G3. For example, the portions of the scan line SL that overlap with the channel regions of the switching TFT T2 and the compensation TFT T3 can be the switching gate electrode G2 and the compensation gate electrode G3, respectively.

[0155] The previous scan line SL-1 can extend along the first direction DR1, and some portions of the previous scan line SL-1 can correspond to the first initialization gate electrode G4 and the second initialization gate electrode G7, respectively. For example, the portions of the previous scan line SL-1 that overlap with the channel regions of the first initialization TFT T4 and the second initialization TFT T7 can be the first initialization gate electrode G4 and the second initialization gate electrode G7, respectively.

[0156] The emission control line EL extends along the first direction DR1. Some portions of the emission control line EL may correspond to the operation control gate electrode G5 and the emission control gate electrode G6, respectively. For example, portions of the emission control line EL that are superimposed on the channel regions of the operation control TFT T5 and the emission control TFT T6 may correspond to the operation control gate electrode G5 and the emission control gate electrode G6, respectively.

[0157] The driving gate electrode G1, which can be a floating electrode, can be connected to the compensation TFT T3 via node connection line 1174.

[0158] The electrode voltage line HL can be located on or set on the scan line SL, the previous scan line SL-1, the emission control line EL, and the drive gate electrode G1, and there are (some) insulating layers between the scan line SL, the previous scan line SL-1, the emission control line EL, the drive gate electrode G1 and the electrode voltage line HL.

[0159] The electrode voltage line HL may extend in the first direction DR1 to intersect the data line DL and the drive voltage line PL. A portion of the electrode voltage line HL may cover at least a portion of the drive gate electrode G1 and may form a storage capacitor Cst together with the drive gate electrode G1. For example, the drive gate electrode G1 may be the lower electrode CE1 of the storage capacitor Cst, and a portion of the electrode voltage line HL may be the upper electrode CE2 of the storage capacitor Cst. However, the embodiments are not limited thereto. For example, the drive gate electrode G1 may be the upper electrode CE2 of the storage capacitor Cst, and a portion of the electrode voltage line HL may be the lower electrode CE1 of the storage capacitor Cst.

[0160] The upper electrode CE2 of the storage capacitor Cst can be electrically connected to the drive voltage line PL. In this regard, the electrode voltage line HL can be connected to the drive voltage line PL located on or situated on the electrode voltage line HL via the contact hole CNT. Therefore, the electrode voltage line HL can have the same voltage level (or constant voltage) as the drive voltage line PL. For example, the electrode voltage line HL can have a constant voltage of approximately +5V. The electrode voltage line HL can be a horizontal drive voltage line.

[0161] Because the driving voltage line PL extends in the second direction DR2 and the electrode voltage line HL, which is electrically connected to the driving voltage line PL, extends in the first direction DR1, which intersects the second direction DR2, the driving voltage line PL and the electrode voltage line HL can form a mesh structure in the display area DA.

[0162] The data line DL, drive voltage line PL, initialization connection line 1173 and node connection line 1174 may be located on or disposed on the electrode voltage line HL, and there are (some) insulating layers between the data line DL, drive voltage line PL, initialization connection line 1173 and node connection line 1174 and the electrode voltage line HL.

[0163] The data line DL can extend along the second direction DR2 and can be connected to the switching source electrode S2 of the switch TFTT2 through the contact hole 1154. A portion of the data line DL can be the switching source electrode S2.

[0164] The driving voltage line PL can extend in the second direction DR2 and can be connected to the electrode voltage line HL through the contact hole CNT as described above. As an example, the driving voltage line PL can be connected to the operation control TFT T5 through the contact hole 1155. The driving voltage line PL can also be connected to the operation control source electrode S5 through the contact hole 1155.

[0165] One end of the initialization connection line 1173 can be connected to the first initialization TFT T4 and the second initialization TFT T7 through the contact hole 1152, and the other end of the initialization connection line 1173 can be connected to the initialization voltage line VL through the contact hole 1151 described below.

[0166] One end of the node connection line 1174 can be connected to the compensation drain electrode D3 through the contact hole 1156, and the other end of the node connection line 1174 can be connected to the drive gate electrode G1 through the contact hole 1157.

[0167] The initialization voltage line VL can be located on or set on the data line DL, the drive voltage line PL, the initialization connection line 1173 and the node connection line 1174, and there are (some) insulating layers between the data line DL, the drive voltage line PL, the initialization connection line 1173 and the node connection line 1174 and the initialization voltage line VL.

[0168] The initialization voltage line VL can extend along the first direction DR1. The initialization voltage line VL can be connected to the first initialization TFT T4 and the second initialization TFT T7 via the initialization connection line 1173. The initialization voltage line VL can have a constant voltage, for example, approximately -2V.

[0169] The initialization voltage line VL can be used with the OLED (see...) Figure 8 The pixel electrode 210 is located on or disposed on the same layer and may include the same material as the pixel electrode 210. The pixel electrode 210 can be connected to the emission control TFT T6. The pixel electrode 210 can be connected to the connection metal 1175 through the contact hole 1163, and the connection metal 1175 can be connected to the emission control drain electrode D6 through the contact hole 1153.

[0170] Despite Figure 7 In one embodiment, the initialization voltage line VL is located or disposed on the same layer as the pixel electrode 210, but in other embodiments, the initialization voltage line VL may be located or disposed on the same layer as the electrode voltage line HL.

[0171] Now refer to Figure 8 The description describes a structure in which elements included in the display panel 10 may be stacked, according to the disclosed embodiments.

[0172] The substrate 100 may comprise glass or a polymeric resin. The polymeric resin may comprise polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, cellulose acetate propionate, or combinations thereof. The substrate 100 comprising the polymeric resin may be flexible, rollable, or bendable. The substrate 100 may have a multilayer structure comprising a layer containing the polymeric resin and an inorganic layer (not shown).

[0173] A buffer layer 111 may be located on or disposed on the substrate 100, and may reduce or prevent the penetration of foreign matter, moisture, or outside air from the bottom of the substrate 100, and may planarize the substrate 100. The buffer layer 111 may comprise inorganic materials such as oxides or nitrides, organic materials, or a combination of organic and inorganic materials, and may have a single-layer or multi-layer structure comprising inorganic and organic materials. A barrier layer (not shown) for preventing the penetration of outside air may be further disposed between the substrate 100 and the buffer layer 111.

[0174] The driving gate electrode G1 and the emitter control gate electrode G6 may be located on or disposed on semiconductor layers A1 and A6, respectively, and a first gate insulating layer 112 is provided between the driving gate electrode G1 and the emitter control gate electrode G6 and the semiconductor layers A1 and A6. Each of the driving gate electrode G1 and the emitter control gate electrode G6 may include molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), and / or combinations thereof, and may have a single-layer structure or a multi-layer structure. For example, each of the driving gate electrode G1 and the emitter control gate electrode G6 may have a single-layer structure formed of Mo. Scan line SL (see...) Figure 7 The preceding scan line SL-1 and the emission control line EL can be formed on the same layer as the drive gate electrode G1 and the emission control gate electrode G6. For example, the drive gate electrode G1 and the emission control gate electrode G6, and the scan line SL (see...) Figure 7 The previous scan line SL-1 and the emission control line EL can be located or disposed on the first gate insulating layer 112.

[0175] The first gate insulating layer 112 may include silicon oxide (SiO2) or silicon nitride (SiN). x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), zinc peroxide (ZnO2), or combinations thereof.

[0176] The second gate insulating layer 113 can be configured to cover the driving gate electrode G1 and the emitter control gate electrode G6. The second gate insulating layer 113 may include SiO2, SiN x SiON, Al2O3, TiO2, Ta2O5, HfO2, ZnO2 or combinations thereof.

[0177] The lower electrode CE1 of the storage capacitor Cst can be integrally formed with the driving gate electrode G1 of the driving TFT T1. For example, the driving gate electrode G1 of the driving TFT T1 can be used as the lower electrode CE1 of the storage capacitor Cst.

[0178] The upper electrode CE2 of the storage capacitor Cst can be stacked with the lower electrode CE1, and a second gate insulating layer 113 is provided between the upper electrode CE2 and the lower electrode CE1. For example, the second gate insulating layer 113 can be used as the dielectric layer of the storage capacitor Cst. The upper electrode CE2 can include a conductive material comprising Mo, Al, Cu, Ti or combinations thereof, and can have a single-layer structure or a multilayer structure comprising the conductive material. For example, the upper electrode CE2 can have a single-layer structure formed of Mo or a multilayer structure formed of Mo / Al / Mo.

[0179] Despite Figure 8 The storage capacitor Cst is stacked with the driving TFT T1, but the disclosure is not limited thereto. Various modifications can be made. For example, the storage capacitor Cst may not be stacked with the driving TFT T1.

[0180] The upper electrode CE2 can be used as the electrode voltage line HL. For example, a portion of the electrode voltage line HL can be the upper electrode CE2 of the storage capacitor Cst.

[0181] The interlayer insulating layer 115 can be configured to cover the upper electrode CE2. The interlayer insulating layer 115 may include SiO2, SiN x SiON, Al2O3, TiO2, Ta2O5, HfO2, ZnO2, or combinations thereof. Although in Figure 8 In one embodiment, the interlayer insulation layer 115 has a single-layer structure, but in another embodiment, the interlayer insulation layer 115 may have a multi-layer structure.

[0182] The data line DL, the drive voltage line PL, and the connecting metal 1175 may be located on or disposed on the interlayer insulating layer 115. Each of the data line DL, the drive voltage line PL, and the connecting metal 1175 may include a conductive material comprising Mo, Al, Cu, Ti, or combinations thereof, and may have a single-layer structure or a multi-layer structure comprising the conductive material. For example, each of the data line DL, the drive voltage line PL, and the connecting metal 1175 may have a multi-layer structure formed of Ti / Al / Ti.

[0183] The upper electrode CE2 of the storage capacitor Cst can be connected to the driving voltage line PL through a contact hole CNT defined in the interlayer insulating layer 115. Therefore, the electrode voltage line HL can be connected to the driving voltage line PL through the contact hole CNT. Thus, the electrode voltage line HL can have the same voltage level (or constant voltage) as the driving voltage line PL.

[0184] The connecting metal 1175 can be connected to the semiconductor layer A6 of the emission control TFT T6 through contact holes 1153 passing through the interlayer insulating layer 115, the second gate insulating layer 113, and the first gate insulating layer 112. The emission control TFT T6 can be electrically connected to the pixel electrode 210 of the OLED through the connecting metal 1175.

[0185] The planarization layer 117 can be located or disposed on the data line DL, the drive voltage line PL and the connection metal 1175, and the OLED can be located or disposed on the planarization layer 117.

[0186] The planarization layer 117 may have a substantially flat surface, such that the pixel electrode 210 may be substantially flat. The planarization layer 117 may have a single-layer or multi-layer structure formed of organic materials. The planarization layer 117 may include benzocyclobutene (BCB), PI, HMDSO, general polymers such as PMMA or polystyrene (PS), polymer derivatives having phenolic groups, acrylic polymers, imide polymers, aryl ether polymers, amide polymers, fluorinated polymers, p-xylene polymers, vinyl alcohol polymers, or blends thereof. The planarization layer 117 may include inorganic materials. The planarization layer 117 may include SiO2, SiN... x The materials used are SiON, Al2O3, TiO2, Ta2O5, HfO2, ZnO2, or combinations thereof. When the planarization layer 117 is formed of an inorganic material, chemical mechanical polishing can be performed. The planarization layer 117 may include both organic and inorganic materials.

[0187] Pixel electrode 210 may be a (semi-)transmissive electrode or a reflective electrode. In some embodiments, pixel electrode 210 may include a reflective film formed of silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or mixtures thereof, and a transparent electrode layer or a semi-transparent electrode layer formed on the reflective film. The transparent electrode layer or the semi-transparent electrode layer may include at least one selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), aluminum zinc oxide (AZO), and combinations thereof. In some embodiments, pixel electrode 210 may have a stacked structure including ITO / Ag / ITO.

[0188] The pixel defining layer 119 may be located on or disposed on the planarization layer 117, and may have an opening 119OP through which the central portion of the pixel electrode 210 is exposed to define the emission region of the pixel. The pixel defining layer 119 may increase the distance between the edge of the pixel electrode 210 and the counter electrode 230 located on or disposed above the pixel electrode 210, thereby preventing arcing or the like from occurring at the edge of the pixel electrode 210. The pixel defining layer 119 may be formed by spin coating or the like from an organic insulating material such as PI, polyamide, acrylic resin, BCB, HMDSO, or phenolic resin.

[0189] The intermediate layer 220 of the OLED may include an organic emitting layer. The organic emitting layer may include an organic material comprising a fluorescent or phosphorescent material emitting red, green, blue, or white light. The organic emitting layer may be formed of a low-molecular-weight organic material or a high-molecular-weight organic material, and functional layers such as a hole transport layer (HTL), a hole injection layer (HIL), an electron transport layer (ETL), and an electron injection layer (EIL) may be selectively located or disposed below and above the organic emitting layer. The intermediate layer 220 may be located or configured to correspond to each of the pixel electrodes 210, respectively. However, the disclosure is not limited thereto. Various modifications can be made; for example, the intermediate layer 220 may be integrally formed on all the pixel electrodes 210.

[0190] The counter electrode 230 can be a transmission electrode or a reflection electrode. In some embodiments, the counter electrode 230 can be a transparent electrode or a translucent electrode, and can be formed of a metal thin film with low work function, including lithium (Li), calcium (Ca), LiF / Ca, LiF / Al, Al, Ag, Mg, or mixtures thereof. A transparent conductive oxide (TCO) film (e.g., ITO, IZO, ZnO, In2O3, or combinations thereof) can be located on or disposed on the metal thin film.

[0191] When the pixel electrode 210 is a reflective electrode and the counter electrode 230 is a transmissive electrode, the display device 1 can be a top-emitting type display device in which light is emitted from the intermediate layer 220 to the counter electrode 230. When the pixel electrode 210 is a transparent electrode or a translucent electrode and the counter electrode 230 is a reflective electrode, the display device 1 can be a bottom-emitting type display device in which light is emitted from the intermediate layer 220 to the substrate 100. However, the disclosure is not limited thereto. The display device 1 of the embodiment can be a dual-emitting type display device in which light is emitted to both the front surface and the rear surface.

[0192] In an embodiment, the counter electrode 230 may be located or disposed over the entire surface of the second display area DA2, and a portion of its edge may be located or disposed in the non-display area NDA. For a main pixel PXm (e.g., OLED) located or disposed in the second display area DA2, the counter electrode 230 may be integrally formed to correspond to the pixel electrode 210.

[0193] The counter electrode 230 may also be disposed on an auxiliary pixel PXa located or arranged in the first display area DA1. However, since the first display area DA1 may include a transmissive area TA and an auxiliary pixel area PA1 in which the auxiliary pixel PXa is positioned or disposed, a portion of the counter electrode 230 may not be disposed in the portion corresponding to the transmissive area TA. Although light can be emitted to the counter electrode 230 when the display device 1 is a top-emitting display device, the transmittance is partially reduced due to the counter electrode 230. Therefore, the transmittance of the transmissive area TA can be improved by not disposing of the counter electrode 230 in the portion corresponding to the transmissive area TA.

[0194] Therefore, the counter electrode 230 located or disposed in the first display area DA1 can be patterned to correspond to each auxiliary pixel area PA1 respectively. The counter electrode 230 located or disposed in the first display area DA1 can be formed by removing the portion corresponding to the transmission area TA through laser ablation or fine metal mask (FMM) patterning. This disclosure includes embodiments in which the counter electrode 230 can be formed in the first display area DA1 by patterning using an FMM mask.

[0195] Figure 9 and Figure 10 This is a plan view showing a portion of the first display area according to an embodiment.

[0196] Reference Figure 9 and Figure 10 As described above, the first display area DA1 may include an auxiliary pixel area PA1 and a transmissive area TA, and the auxiliary pixel PXa may be located or disposed in the auxiliary pixel area PA1. The auxiliary pixel area PA1 may include, for example, Figure 9 The embodiments illustrate a first pixel region PA1-1 and a second pixel region PA1-2. A first pixel PXa1 may be located in or disposed within the first pixel region PA1-1. A second pixel PXa2 may be located in or disposed within the second pixel region PA1-2.

[0197] In an embodiment, the first pair of electrodes 230a may be disposed in the first pixel region PA1-1, and the second pair of electrodes 230b may be disposed in the second pixel region PA1-2. The first pair of electrodes 230a may be located or configured to correspond to the first pixel region PA1-1, and the second pair of electrodes 230b may be located or configured to correspond to the second pixel region PA1-2. Some portions of the first pair of electrodes 230a and the second pair of electrodes 230b may be in contact with each other. In this case, the shape of the first pair of electrodes 230a and the shape of the second pair of electrodes 230b may be the same or similar.

[0198] Reference Figure 10 The first pixel PXa1 may be located or disposed within the first pixel region PA1-1. Each of the first pixels PXa1 may include a scan line SL for receiving scan signals and a data line DL for receiving data signals. The scan line may extend in a first direction DR1, and the data line DL may extend in a second direction DR2 that intersects (e.g., orthogonally intersects) the first direction DR1. For example, other signal lines (e.g., drive voltage line PL, transmit control line EL, previous scan line SL-1, and initialization voltage line VL) (see...) Figure 7 It can be set in the first pixel area PA1-1.

[0199] A portion of the data line DL and a portion of the scan line SL can be located or positioned within the transmission region TA. Even in this case, for example, the scan line SL can have a bypass portion that wraps around the edge of the transmission region TA to improve the transmittance of the transmission region TA. The bypass portion can also be applied to other signal lines (e.g., drive voltage line PL, transmit control line EL, previous scan line SL-1, and initialization voltage line VL) (see...). Figure 7 )).

[0200] The first pixel PXa1 located or disposed in the first pixel region PA1-1 may include a first pair of electrodes 230a integrally formed in the first pixel region PA1-1.

[0201] The second pixel PXa2 located or disposed in the second pixel region PA1-2 may include a second pair of electrodes 230b integrally formed in the second pixel region PA1-2.

[0202] The first pixel region PA1-1 and the second pixel region PA1-2 can be arranged in different rows or directions. For example, the first pixel region PA1-1 and the second pixel region PA1-2 can be arranged around the transmission region TA. For example, the first pixel region PA1-1 and the second pixel region PA1-2 can be arranged in a zigzag shape or other shapes that can be understood and appreciated by those skilled in the art. For example, as Figure 9 and Figure 10As shown, the first pixel region PA1-1 and the second pixel region PA1-2 can be alternately arranged on the third direction DR3 and / or the fourth direction DR4 that intersect the first direction DR1 and the second direction DR2.

[0203] The first pair of electrodes 230a and the second pair of electrodes 230b may be located or configured to correspond to the first pixel region PA1-1 and the second pixel region PA1-2, respectively. Some portions of the first pair of electrodes 230a and some portions of the second pair of electrodes 230b may be in contact with each other. The first pair of electrodes 230a and the second pair of electrodes 230b may include a first contact region CTA1, at which the first pair of electrodes 230a and the second pair of electrodes 230b are in contact with each other in adjacent first pixel regions PA1-1 and second pixel regions PA1-2. The phrase "adjacent first pixel regions PA1-1 and second pixel regions PA1-2" and similar descriptions indicate that the first pixel region PA1-1 and the second pixel region PA1-2 are adjacent to each other. The first pair of electrodes 230a and the second pair of electrodes 230b may be electrically connected to each other through the first contact region CTA1.

[0204] For example, since the first pair of electrodes 230a and the second pair of electrodes 230b are connected to each other through the first contact area CTA1, it is possible to prevent an increase in the resistance of the first pair of electrodes 230a and the second pair of electrodes 230b located or disposed in the first display area DA1.

[0205] Figure 11 and Figure 12 It is along Figure 9 The schematic cross-sectional view taken along line B-B' is used to illustrate a portion of the process for manufacturing a display panel according to an embodiment. Figure 13 It is along Figure 9 A schematic cross-sectional view taken by line B-B'.

[0206] Reference Figures 11 to 13 An insulating layer IL is formed on the substrate 100, in which a pixel circuit PC may be positioned or disposed. A first pixel electrode 210a and a second pixel electrode 210b electrically connected to the pixel circuit PC may be formed. The first pixel electrode 210a may be located or disposed in a first pixel region PA1-1. The second pixel electrode 210b may be located or disposed in a second pixel region PA1-2.

[0207] A pixel defining layer 119 with an opening can be formed on the first pixel electrode 210a and the second pixel electrode 210b, through which portions (e.g., central portions) of the first pixel electrode 210a and the second pixel electrode 210b can be exposed. A first intermediate layer 220a can be formed on the first pixel electrode 210a exposed through the opening of the pixel defining layer 119. A second intermediate layer 220b can be formed on the second pixel electrode 210b exposed through the opening of the pixel defining layer 119. The first intermediate layer 220a and the second intermediate layer 220b can be formed by... Figure 8 The intermediate layer 220 in the embodiments is formed of the same or similar material.

[0208] A first pair of electrodes 230a and a second pair of electrodes 230b can be formed on the first intermediate layer 220a and the second intermediate layer 220b, respectively. In embodiments, the first pair of electrodes 230a and the second pair of electrodes 230b can be formed using different processes. For example, the first pair of electrodes 230a and the second pair of electrodes 230b can be formed using a mask sheet 422 of the same mask assembly. For example, the first pair of electrodes 230a can be formed, and then the second pair of electrodes 230b can be formed on the substrate 100 by moving at least one of the mask assembly and the substrate 100 to a position different from its initial position. In another embodiment, the second pair of electrodes 230b can be formed, and then the first pair of electrodes 230a can be formed on the substrate 100 by moving at least one of the mask assembly and the substrate 100 to a position different from its initial position. For ease of explanation, the following description will be based on forming the first pair of electrodes 230a and then forming the second pair of electrodes 230b by changing the position of the substrate 100.

[0209] like Figure 11 As shown, a first pair of electrodes 230a can be formed on the first intermediate layer 220a. The first pair of electrodes 230a can be formed by depositing deposition material through the first opening 422a of the mask 422 onto the substrate 100. Figure 12 As shown, it can be done by in Figure 11 The substrate 100 is moved to the left to form a second pair of electrodes 230b on the second intermediate layer 220b. The second pair of electrodes 230b can be fabricated through the first opening 422a of the mask sheet 422.

[0210] Reference Figure 13 The first pair of electrodes 230a and the second pair of electrodes 230b can be in surface contact with each other in the first contact area CTA1. When the first pair of electrodes 230a and the second pair of electrodes 230b are in surface contact with each other, it can mean that no layer is located or disposed between the first pair of electrodes 230a and the second pair of electrodes 230b, and the second pair of electrodes 230b is stacked on the first pair of electrodes 230a and in contact with or directly stacked with the first pair of electrodes 230a.

[0211] The second pair of electrodes 230b can be located or disposed on the first pair of electrodes 230a within the first contact area CTA1. Therefore, the second pair of electrodes 230b can be formed by processes following the first pair of electrodes 230a. In an embodiment, when the second pair of electrodes 230b is formed by processes following the first pair of electrodes 230a, the second pair of electrodes 230b can be located or disposed on the first pair of electrodes 230a within the first contact area CTA1. Because the first pair of electrodes 230a and the second pair of electrodes 230b are in surface contact with each other within the first contact area CTA1, the thickness of the first contact area CTA1 can be approximately equal to or less than twice the thickness of the area where only the first pair of electrodes 230a or the second pair of electrodes 230b is positioned or disposed. As an example, the first contact area CTA1 is not located or disposed within the emission areas of the first pixel PXa1 and the second pixel PXa2. For example, the emission region can be formed in the pixel defining layer 119 and can be defined as a first opening OP1 and a second opening OP2, with portions (e.g., central portions) of the first pixel electrode 210a and the second pixel electrode 210b exposed through the first opening OP1 and the second opening OP2. For example, the first contact region CTA1 can be configured not to overlap with the first opening OP1 and the second opening OP2 formed in the pixel defining layer 119.

[0212] As the area of ​​the first contact region CTA1 increases, the resistance of the first pair of electrodes 230a and the second pair of electrodes 230b can be reduced more effectively. However, as described above, when the area of ​​the first contact region CTA1 exceeds a predetermined value, the first contact region CTA1 will overlap with the emission regions of the first pixel PXa1 and the second pixel PXa2, thereby reducing the emission quality of the first pixel PXa1 and the second pixel PXa2.

[0213] Therefore, the first contact area CTA1 can be formed such that the area of ​​the first contact area CTA1 does not obstruct the first opening OP1 and the second opening OP2.

[0214] Reference Figure 11 and Figure 13 The first pixel region PA1-1 may include an organic light-emitting display device such as an OLED and pixel circuitry PC electrically connected to the OLED. However, the transmissive region TA may not include an organic light-emitting display device such as an OLED and pixel circuitry PC electrically connected to the OLED. The transmissive region TA may be defined as a region in which some layers located on or disposed on the substrate 100 are removed or otherwise excluded.

[0215] Figure 14 This is a plan view showing the arrangement of the counter electrodes of the display panel according to an embodiment. Figure 15 It is along Figure 14 A schematic cross-sectional view taken by line C-C'. Figure 16 It is along Figure 14 A schematic cross-sectional view taken by line D-D'. Figure 17 It is along Figure 14 A schematic cross-sectional view taken from line E-E'.

[0216] Reference Figures 14 to 17 The first display area DA1 may include the first pixel area PA1-1, the second pixel area PA1-2, and the transmissive area TA as described above. For example, the first pair of electrodes 230a may be located or disposed in the first pixel area PA1-1, and the second pair of electrodes 230b may be located or disposed in the second pixel area PA1-2. For example, the first display area DA1 may be as described with reference to Figure 10 It forms as described.

[0217] The second display area DA2 may include a main pixel area PA2, and the main pixel area PA2 may include a third pixel area PA2-1 and a fourth pixel area PA2-2 that may be adjacent to each other. For example, the third pair of electrodes 230c and the fourth pair of electrodes 230d may be located or disposed in the third pixel area PA2-1 and the fourth pixel area PA2-2, respectively.

[0218] For example, the third pair of electrodes 230c and the first pair of electrodes 230a can be formed simultaneously, and the fourth pair of electrodes 230d and the second pair of electrodes 230b can be formed simultaneously. For example, because the third pair of electrodes 230c and the fourth pair of electrodes 230d are formed using the same mask assembly, the third pair of electrodes 230c and the fourth pair of electrodes 230d can have the same shape.

[0219] Each of the third pair of electrodes 230c and the fourth pair of electrodes 230d can be formed in a strip shape, and one or more third pair of electrodes 230c and one or more fourth pair of electrodes 230d can be provided. The shape of the electrodes is not limited thereto and can include an island shape or any other shape within the spirit and scope of the disclosure. When each of the third pair of electrodes 230c and the fourth pair of electrodes 230d is formed in a strip shape, the third pair of electrodes 230c can be aligned with the first pair of electrodes 230a, and the fourth pair of electrodes 230d can be aligned with the second pair of electrodes 230b. The third pair of electrodes 230c and the fourth pair of electrodes 230d can be arranged alternately in a direction different from the direction along which the first pair of electrodes 230a and the third pair of electrodes 230c are aligned with each other. For example, adjacent third pair of electrodes 230c and the fourth pair of electrodes 230d can include overlapping portions, and the third pair of electrodes 230c and the fourth pair of electrodes 230d can be in surface contact with each other in the overlapping portions. For example, the third pair of electrodes 230c and the fourth pair of electrodes 230d can be connected to each other to completely cover the second display area DA2.

[0220] In an embodiment, a third pair of electrodes 230c and a fourth pair of electrodes 230d may be provided. When the third pair of electrodes 230c and the fourth pair of electrodes 230d are provided, the third pair of electrodes 230c may be aligned with the first pair of electrodes 230a in the second direction DR2, and the fourth pair of electrodes 230d may be aligned with the second pair of electrodes 230b in the second direction DR2. The third pair of electrodes 230c and the fourth pair of electrodes 230d may be alternately arranged in a first direction DR1 that intersects the second direction DR2, such that the third pair of electrodes 230c and the fourth pair of electrodes 230d are at least partially superimposed on each other. For example, the third pair of electrodes 230c and the fourth pair of electrodes 230d that are adjacent to each other in the first direction DR1 may be connected to each other. For example, the third pair of electrodes 230c that are aligned with each other in the second direction DR2 may be connected to each other in the arrangement direction or a predetermined direction (e.g., the second direction DR2). In an embodiment, the third pair of electrodes 230c may be spaced apart from each other in the arrangement direction or a predetermined direction (e.g., the second direction DR2), and the third pair of electrodes 230c that are aligned and adjacent to each other in the second direction DR2 may be connected by a fourth pair of electrodes 230d (e.g., as shown in the figure). Figure 24(As shown in the diagram). For example, similar to the third pair of electrodes 230c, the fourth pair of electrodes 230d aligned with each other in the second direction DR2 can be connected to each other, and the fourth pair of electrodes 230d adjacent to each other in the second direction DR2 can be connected through the third pair of electrodes 230c; or the fourth pair of electrodes 230d aligned with each other in the second direction DR2 can be not connected to each other, and the fourth pair of electrodes 230d adjacent to each other in the second direction DR2 can be connected through the third pair of electrodes 230c. For ease of explanation, the following description is based on the following: the third pair of electrodes 230c and the fourth pair of electrodes 230d can be provided, and the third pair of electrodes 230c aligned with each other and adjacent to each other, the third pair of electrodes 230c and the fourth pair of electrodes 230d adjacent to each other, and the fourth pair of electrodes 230d aligned with each other and adjacent to each other can be connected to each other.

[0221] For example, the third pair of electrodes 230c and the fourth pair of electrodes 230d connected to each other may include a second contact region CTA2 in which the third pair of electrodes 230c and the fourth pair of electrodes 230d are stacked on top of each other. For example, the thickness of the second contact region CTA2 may be greater than one of the thicknesses of the third pair of electrodes 230c and the fourth pair of electrodes 230d as described above. For example, in the second contact region CTA2, one of the third pair of electrodes 230c and the fourth pair of electrodes 230d may directly contact the top surface of the other of the third pair of electrodes 230c and the fourth pair of electrodes 230d, depending on the order in which the third pair of electrodes 230c and the fourth pair of electrodes 230d are formed. For example, the third pair of electrodes 230c and the fourth pair of electrodes 230d may be in surface contact with each other. For ease of explanation, the following will be based on... Figure 15 The fourth pair of electrodes 230d shown in the embodiment can be described as being located on or disposed on the third pair of electrodes 230c.

[0222] Within the spirit and scope of the disclosure, a sixth contact region CTA6 may be formed within a second contact region CTA2. For example, in the sixth contact region CTA6, two third pairs of electrodes 230c aligned and adjacent to each other may be positioned or disposed, and one or two fourth pairs of electrodes 230d may be located or disposed on the third pairs of electrodes 230c. In an embodiment, in the sixth contact region CTA6, two fourth pairs of electrodes 230d aligned and overlapping each other may be positioned or disposed, and one or two third pairs of electrodes 230c may be located or disposed on the fourth pairs of electrodes 230d. For example, all pairs of electrodes located or disposed in the sixth contact region CTA6 may be in surface contact with each other. The total thickness of the pairs of electrodes located or disposed in the sixth contact region CTA6 may be greater than the thickness of either the third pair of electrodes 230c or the fourth pair of electrodes 230d.

[0223] One of the third pair of electrodes 230c and the fourth pair of electrodes 230d may protrude toward the first display area DA1. For example, a portion of the third pair of electrodes 230c closest to the first display area DA1 may protrude toward the first display area DA1 and may be located or disposed within the first display area DA1. In an embodiment, a portion of the fourth pair of electrodes 230d closest to the first display area DA1 may protrude toward the first display area DA1 and may be located or disposed within the first display area DA1. For ease of explanation, the following description will be based on the premise that a portion of the fourth pair of electrodes 230d closest to the first display area DA1 is located or disposed within the first display area DA1.

[0224] The portion of the fourth pair of electrodes 230d located or disposed in the first display area DA1 may include a third contact area CTA3 superimposed on the first pair of electrodes 230a. For example, in the third contact area CTA3, according to... Figure 16 In the manufacturing sequence shown, one of the first pair of electrodes 230a and the fourth pair of electrodes 230d can contact the other surface of the first pair of electrodes 230a and the fourth pair of electrodes 230d. Although in Figure 14 Not shown, but similar to the arrangement of the first pair of electrodes 230a and the fourth pair of electrodes 230d, the second pair of electrodes 230b and the third pair of electrodes 230c can be stacked on top of each other in the third contact region CTA3.

[0225] A third pair of electrodes 230c, aligned and adjacent to each other, can form a fourth contact region CTA4, where the third pair of electrodes 230c are aligned and adjacent to each other and overlapped therein. A fourth pair of electrodes 230d, aligned and adjacent to each other, can form a fifth contact region CTA5, where the fourth pair of electrodes 230d are aligned and adjacent to each other and overlapped therein. The thickness of the fourth contact region CTA4 and the thickness of the fifth contact region CTA5 can be approximately the same as the thickness of one of the third pair of electrodes 230c and the fourth pair of electrodes 230d. As an example, when forming the third pair of electrodes 230c, the portion of the deposited material passing through the opening of the mask (not shown) can be deposited on the portion of the substrate 100 located or disposed on the rear surface of the mask located or disposed between the openings of the mask. For example, when a deposition material is deposited on a substrate 100 located on or disposed on the rear surface of the mask between the openings to form a portion of the third pair of electrodes 230c, the thickness of said portion of the third pair of electrodes 230c may be smaller than the thickness of the other portions of the third pair of electrodes 230c. Similarly, when forming the fourth pair of electrodes 230d, as with the third pair of electrodes 230c, the thickness of a portion of the fourth pair of electrodes 230d may differ from the thickness of the other portions of the fourth pair of electrodes 230d.

[0226] Therefore, since the thickness of each of the third pair of electrodes 230c stacked on top of each other in the fourth contact region CTA4 is smaller than the thickness of the other portions of the third pair of electrodes 230c, the thickness of the third pair of electrodes 230c stacked on top of each other can be substantially similar to the thickness of the other portions of the third pair of electrodes 230c. As another example, the fifth contact region CTA5 where the fourth pair of electrodes 230d stacks on top of each other can have a structure similar to that of the fourth contact region CTA4.

[0227] At least one pixel may be located or disposed in each of the first pixel region PA1-1, the second pixel region PA1-2, the third pixel region PA2-1, and the fourth pixel region PA2-2. For example, the first pixel PXa1 may be located or disposed in the first pixel region PA1-1, and the second pixel PXa2 may be located or disposed in the second pixel region PA1-2. The third pixel PXm1 may be located or disposed in the third pixel region PA2-1, and the fourth pixel PXm2 may be located or disposed in the fourth pixel region PA2-2. For example, the third pixel PXm1 and the fourth pixel PXm2 may respectively include the following: Figures 15 to 17 The third intermediate layer 220c and the fourth intermediate layer 220d are shown in the diagram. Pixels can be the same as or similar to those mentioned above.

[0228] Figure 18 This is a perspective view of a display device according to an embodiment. Figure 19 This is a plan view showing the display area and non-display area of ​​the display panel according to an embodiment.

[0229] Reference Figure 18 and Figure 19 Display device 1 can be with Figure 1 The embodiments are similar. As an example, the display device 1 may include a first display area DA1, a second display area DA2, and a non-display area NDA.

[0230] and Figure 1In different embodiments, the first display area DA1 may be a separate area of ​​the display device 1, or it may not be included in the second display area DA2. For example, the shape of the first display area DA1 may be similar to the shape of the second display area DA2. For example, the first display area DA1 may be formed longitudinally along the x-axis. The light transmittance of the first display area DA1 may be greater than that of the second display area DA2, and the resolution of the first display area DA1 may be smaller than that of the second display area DA2. For example, as described above, the first display area pixel PXa may be located or disposed in the first display area DA1, and the second display area pixel PXm may be located or disposed in the second display area DA2. The first display area DA1 may include a transmissive area TA where the first display area pixel PXa is not located or disposed.

[0231] The component can be located or positioned at any of the various locations within the first display area DA1. For example, at least one component can be located or positioned within the first display area DA1.

[0232] The first display area DA1 may include a first pixel area PA1-1, a second pixel area PA1-2, and a transmissive area TA. For example, the first pixel area PA1-1 and the second pixel area PA1-2 may be arranged alternately, and the transmissive area TA may be defined, for example, by the first pixel areas PA1-1 and PA1-2 that are adjacent to each other. The transmissive area TA may be shielded by or partially surrounded by the first pixel areas PA1-1 and PA1-2 that are connected to each other. A first pair of electrodes 230a and a second pair of electrodes 230b may be located or disposed in the first pixel areas PA1-1 and PA1-2, respectively. The first pair of electrodes 230a and the second pair of electrodes 230b may be connected to each other by being stacked in the first contact area CTA1. A first pixel PXa1 and a second pixel PXa2 may be located or disposed in the first pixel areas PA1-1 and PA1-2, respectively. One of the third pair of electrodes 230c and the fourth pair of electrodes 230d may protrude into the first display area DA1. For example, one of the third pair of electrodes 230c and the fourth pair of electrodes 230d may be stacked with the first pair of electrodes 230a or the second pair of electrodes 230b in the first display area DA1. For ease of explanation, the following description will be based on a configuration in which the first pair of electrodes 230a and the fourth pair of electrodes 230d may be stacked with each other. For example, the first pair of electrodes 230a and the fourth pair of electrodes 230d may include a third contact area CTA3 in which the first pair of electrodes 230a and the fourth pair of electrodes 230d are stacked with each other.

[0233] The second display area DA2 may include a third pixel area PA2-1 and a fourth pixel area PA2-2. For example, the third pixel area PA2-1 and the fourth pixel area PA2-2 may be arranged alternately and may have substantially the same or similar shapes. The third pair of electrodes 230c and the fourth pair of electrodes 230d may be located or disposed in the third pixel area PA2-1 and the fourth pixel area PA2-2, respectively. The third pixel PXm1 and the fourth pixel PXm2 may be located or disposed in the third pixel area PA2-1 and the fourth pixel area PA2-2, respectively.

[0234] The first pair of electrodes 230a located or disposed in the first display area DA1 and the third pair of electrodes 230c located or disposed in the second display area DA2 can be aligned with each other, and the second pair of electrodes 230b and the fourth pair of electrodes 230d can be aligned with each other. For example, the first pair of electrodes 230a and the third pair of electrodes 230c can be arranged to form a line, and the second pair of electrodes 230b and the fourth pair of electrodes 230d can be arranged to form a line.

[0235] A third pair of electrodes 230c may be provided, and the aligned third pair of electrodes 230c may at least partially overlap each other. A fourth pair of electrodes 230d may be provided, and the aligned fourth pair of electrodes 230d may at least partially overlap each other. Adjacent third pairs of electrodes 230c and fourth pairs of electrodes 230d may at least partially overlap each other. For example, the overlapping third pairs of electrodes 230c and fourth pairs of electrodes 230d may include a second contact region CTA2, the overlapping third pairs of electrodes 230c may include a fourth contact region CTA4, and the overlapping fourth pairs of electrodes 230d may include a fifth contact region CTA5. A sixth contact region CTA6, where the third pairs of electrodes 230c and fourth pairs of electrodes 230d overlap each other, may be located in or provided in at least one of the fourth contact region CTA4 and the fifth contact region CTA5.

[0236] First contact area CTA1 to sixth contact area CTA6 and reference Figures 9 to 17 The described contact areas are the same or similar, so their detailed descriptions will not be given.

[0237] When the first pair of electrodes 230a to the fourth pair of electrodes 230d are positioned or set, the first pair of electrodes 230a and the fourth pair of electrodes 230d can be connected to each other. For example, as described above, the transmission region TA can be located or set between the first pair of electrodes 230a and the second pair of electrodes 230b, and the light generated by the component located or set in the first display region DA1 or the light incident on the component can be unobstructed.

[0238] In the contact area where the counter electrodes overlap, the overlapping counter electrodes are in surface contact with each other, which reduces the resistance of the counter electrodes, thereby enabling the display device 1 to operate stably.

[0239] Figure 20 This is a schematic cross-sectional view of an apparatus for manufacturing a display device according to an embodiment. Figure 21 This is a plan view showing a portion of the mask sheet according to an embodiment.

[0240] Reference Figure 20 and Figure 21 The apparatus 400 for manufacturing a display device can manufacture a display panel for a display device (e.g., such as the display device 1 described above).

[0241] The device 400 may include a chamber 410, a mask assembly 420, a first support 430, a second support 440, a deposition source 450, a magnetic generator 460, a vision unit 470, and a pressure regulator 480.

[0242] The chamber 410 may have an internal space, and the chamber 410 may be configured such that a portion of the chamber 410 is open. In this case, the gate valve 411 may be located or disposed in the open portion of the chamber 410 to be opened / closed.

[0243] Mask assembly 420 may be selectively located or disposed inside chamber 410. For example, mask assembly 420 may include mask frame 421 and mask sheet 422. Mask frame 421 may be formed by connecting frames and may include openings formed inside mask frame 421. For example, mask frame 421 may include one opening or multiple openings separated from each other. For example, mask frame 421 may be formed in a grid shape such as a window frame shape. Mask sheet 422 may be elongated and may be fixed to mask frame 421. For example, mask sheet 422 may include openings through which deposited material passes.

[0244] Mask 422 may include a first opening 422a through which deposited material passes to form a first pair of electrodes 230a (not shown) or a second pair of electrodes 230b (not shown). Mask 422 may include a second opening 422b for forming a third pair of electrodes 230c (not shown) or a fourth pair of electrodes 230d (not shown). However, embodiments are not limited thereto. The first opening 422a and the second opening 422b of mask 422 may form any one of the first to fourth pairs of electrodes 230a, 230b, 230c, and 230d. Each of the first opening 422a and the second opening 422b may have any shape of various shapes. For example, the shape of the first opening 422a and the shape of the second opening 422b may be the same. In embodiments, the shapes of the first opening 422a and the second opening 422b may be different from each other. For ease of illustration, the following will describe the case where the shapes of the first opening 422a and the second opening 422b are different from each other.

[0245] The first opening 422a can be formed such that its shape corresponds to the first pixel region PA1-1 or the second pixel region PA1-2. Examples of the shape of the first opening 422a can include a substantially rectangular shape, a substantially square shape, and a rhomboid shape. For example, deposited material passing through the first opening 422a can be deposited on the substrate 100 to form a first pair of electrodes 230a or a second pair of electrodes 230b. In this case, when the first opening 422a is provided, the first openings 422a can be sufficiently spaced apart from each other so that the deposited material passing through the first opening 422a does not connect to each other after being deposited on the substrate 100.

[0246] The second opening 422b can be formed such that its shape differs from that of the first opening 422a. For example, the size of the second opening 422b can be larger than that of the first opening 422a. The second distance WI2 between adjacent first openings 422a and second openings 422b can be approximately the same as the first distance WI1 between adjacent first openings 422a. However, the third distance WI3 between adjacent second openings 422b can differ from the first distance WI1 and the second distance WI2. For example, the third distance WI3 can be smaller than the first distance WI1 and the second distance WI2. For example, the third distance WI3 can be small enough that the deposited material passing through adjacent second openings 422b in the length direction of the second openings 422b is stacked on top of each other and deposited on the substrate 100. For example, the deposited material passing through the second openings 422b can form a third pair of electrodes 230c or a fourth pair of electrodes 230d aligned and connected to each other on the substrate 100.

[0247] The substrate 100 can be mounted on the first support 430. For example, the first support 430 can adjust the position of the substrate 100. For example, the first support 430 may include a UVW stage.

[0248] The mask assembly 420 can be mounted on the second support 440. For example, similar to the first support 430, the second support 440 can adjust the position of the mask assembly 420.

[0249] The deposition source 450 can contain deposition material and can supply the deposition material to the chamber 410 by evaporation or sublimation. For example, the deposition source 450 may include a heater inside the deposition source 450, and the deposition source 450 can melt or sublimate the deposition material inside the deposition source 450 by heating it with the heater. For example, the deposition source 450 may be located or disposed at the center or edge of the chamber 410. For ease of explanation, the following description will be based on the premise that the deposition source 450 may be located or disposed at the edge of the chamber 410.

[0250] The magnetic generator 460 may be located or disposed in the chamber 410 and may be attached to the substrate 100 and the mask assembly 420. For example, the magnetic generator 460 may include an electromagnet or a permanent magnet that generates magnetic force.

[0251] The vision unit 470 may be located or disposed at the chamber 410 and may capture images of the positions of the mask assembly 420 and the substrate 100. For example, the vision unit 470 may capture images of alignment marks of at least one of the mask assembly 420 and the substrate 100. The vision unit 470 may be any device or apparatus for capturing images and may be, for example, a camera.

[0252] The pressure regulator 480 can be connected to the chamber 410 and can regulate the pressure inside the chamber 410. For example, the pressure regulator 480 may include a connecting pipe 481 connected to the chamber 410 and a pump 482 located on or disposed on the connecting pipe 481.

[0253] Display device 1 can be manufactured using device 400. In this case, device 400 can manufacture display device 1 according to the following embodiments and the embodiments described above. However, for ease of explanation, the following will be based on the fact that it can be manufactured by device 400. Figure 19 Described by the pixel area of ​​the display panel (not shown). Figure 19 The same reference numerals in the accompanying drawings indicate the same components.

[0254] The mask assembly 420 and the substrate 100 on which an insulating layer (not shown) is formed can be located or disposed inside the chamber 410. In this case, pixel electrodes (not shown) for TFTs (not shown), OLEDs (not shown), and organic emitter layers (not shown) can be formed.

[0255] The substrate 100 and the mask assembly 420 can be placed on the first support 430 and the second support 440 respectively, and images of the substrate 100 and the mask assembly 420 can be captured by the vision unit 470. The substrate 100 and the mask assembly 420 can be aligned with each other.

[0256] When the deposition source 450 operates to supply deposition material, the deposition material can pass through the first opening 422a and the second opening 422b of the mask 422 and can be deposited on the organic emission layer and pixel defining layer of the substrate 100. For example, as described above, the deposition material passing through the first opening 422a can be used to form the first pair of electrodes 230a, and the deposition material passing through the second opening 422b can be used to form the third pair of electrodes 230c and the fourth contact region CTA4.

[0257] For example, the first pair of electrodes 230a and the third pair of electrodes 230c can be aligned with each other. The first pair of electrodes 230a and the third pair of electrodes 230c can be configured to be spaced apart from each other.

[0258] When the above process is completed, the position of at least one of the substrate 100 and the mask assembly 420 can be changed. For example, after the position of the mask assembly 420 is fixed, the position of the substrate 100 can be changed. In an embodiment, after the position of the substrate 100 is fixed, the position of the mask assembly 420 can be changed. In an embodiment, both the position of the substrate 100 and the position of the mask assembly 420 can be changed. For ease of explanation, the following description will be based on the premise that the position of the mask assembly 420 can be fixed and the position of the substrate 100 can be changed.

[0259] When the position of the substrate 100 changes, the first opening 422a and the second opening 422b can be positioned or configured to correspond to portions of the substrate 100 where the first pair of electrodes 230a and the third pair of electrodes 230c are not formed. For example, the first opening 422a can be located or disposed between adjacent first pairs of electrodes 230a, and the second opening 422b can be located or disposed between adjacent third pairs of electrodes 230c.

[0260] When the position of the substrate 100 changes and deposition material is supplied by the deposition source 450, the deposition material can pass through the first opening 422a and the second opening 422b and can be deposited on the substrate 100. For example, deposition material passing through the first opening 422a can be deposited on the substrate 100 to form a second pair of electrodes 230b, and deposition material passing through the second opening 422b can be deposited on the substrate 100 to form a fourth pair of electrodes 230d. When the fourth pair of electrodes 230d is formed, a second contact region CTA2, a third contact region CTA3, a fifth contact region CTA5, and a sixth contact region CTA6 can be formed. As an example, the second pair of electrodes 230b can be located or disposed between the first pair of electrodes 230a and can be connected to the first pair of electrodes 230a through the first contact region CTA1. The fourth pair of electrodes 230d can be located or disposed between the third pair of electrodes 230c, and the fourth pair of electrodes 230d can be connected to the first pair of electrodes 230a through the third contact area CTA3, and can be connected to the third pair of electrodes 230c through the second contact area CTA2 and the sixth contact area CTA6.

[0261] At least one of the third pair of electrodes 230c and the fourth pair of electrodes 230d may protrude from the edge of the second display area DA2 toward the non-display area NDA. For example, the third pair of electrodes 230c and the fourth pair of electrodes 230d may be connected to each other in the second display area DA2 to cover the second display area DA2.

[0262] Therefore, the counter electrodes located on or disposed on the substrate 100 can be connected to each other through the contact area.

[0263] Figure 22 This is a plan view showing the display area and non-display area of ​​the display panel according to an embodiment. Figure 23 This is a plan view showing a portion of the mask sheet according to an embodiment.

[0264] Reference Figure 22 and Figure 23 ,and Figure 20 The embodiments similar to or different from those for manufacturing display devices can be applied to the following description.

[0265] The mask 422 may include a first opening 422a and a second opening 422b. For example, the first opening 422a may have a substantially square shape, and the second opening 422b may have a substantially rectangular shape. For example, the second opening 422b may be formed longitudinally in the longitudinal direction of the mask 422. As an example, the second opening 422b may be formed such that the third pair of electrodes 230c covers the second display area DA2 of the substrate 100.

[0266] The method for forming counter electrodes using devices for manufacturing display devices can be similar to that described in the reference. Figure 20 and Figure 21 The method described. A first pair of electrodes 230a may be formed in a first display area DA1, and a third pair of electrodes 230c may be formed in a second display area DA2. The third pair of electrodes 230c may be formed simultaneously with the formation of the first pair of electrodes 230a. For example, at least a portion of the third pair of electrodes 230c may protrude from the second display area DA2 toward the non-display area NDA. At least a portion of the third pair of electrodes 230c may protrude from the second display area DA2 toward the first display area DA1.

[0267] The second pair of electrodes 230b and the fourth pair of electrodes 230d can be formed by changing the position of the substrate (not shown). For example, a portion of the second pair of electrodes 230b can be stacked with the first pair of electrodes 230a, and another portion of the second pair of electrodes 230b can be stacked with the third pair of electrodes 230c. For example, the first contact region CTA1 and the third contact region CTA3 can be formed in the stacked portions, respectively. A portion of the fourth pair of electrodes 230d can be stacked with the third pair of electrodes 230c, and the fourth pair of electrodes 230d and the third pair of electrodes 230c can be stacked on top of each other to form the second contact region CTA2. For example, a portion of the fourth pair of electrodes 230d can protrude from the second display region DA2 toward the non-display region NDA.

[0268] Therefore, the counter electrodes located or disposed in each display area can be connected to each other. As an example, all the counter electrodes located or disposed on the substrate 100 can be connected to each other. Because the connected counter electrodes are in surface contact with each other, the surface resistance of the counter electrodes can be minimized.

[0269] Because the display device 1 ensures the transmission area TA, the function of the components located or disposed in the first display area DA1 will not be degraded.

[0270] Figure 24 This is a plan view showing the display area and non-display area of ​​the display panel according to an embodiment. Figure 25 This is a plan view showing a portion of the mask sheet according to an embodiment.

[0271] Reference Figure 24 and Figure 25 ,and Figure 20 The apparatus for manufacturing a display device that is similar to or different from the embodiments described below can be applied.

[0272] The mask 422 may include a first opening 422a and a second opening 422b. For example, the first opening 422a may have a substantially square shape, and the second opening 422b may have a shape substantially the same as that of the first opening 422a. For example, a first distance WI1 between adjacent first openings 422a of the aligned first openings 422a and second opening 422b may be different from a third distance WI3 between adjacent second openings 422b. For example, the third distance WI3 may be smaller than the first distance WI1. The third distance WI3 may be smaller than a second distance WI2 between adjacent first openings 422a and second openings 422b. For example, the second distance WI2 may be substantially the same as the first distance WI1.

[0273] The method for forming counter electrodes using devices for manufacturing display devices can be similar to that described in the reference. Figure 20 and Figure 21 The method described herein allows for the formation of a first pair of electrodes 230a in a first display area DA1, and the simultaneous formation of a third pair of electrodes 230c in a second display area DA2. For example, at least a portion of the third pair of electrodes 230c may protrude from the second display area DA2 toward the non-display area NDA. At least a portion of the third pair of electrodes 230c may protrude from the second display area DA2 toward the first display area DA1. The third pair of electrodes 230c located or disposed in the second display area DA2 may be spaced apart from each other.

[0274] The second pair of electrodes 230b and the fourth pair of electrodes 230d can be formed by changing the position of the substrate (not shown). For example, a portion of the second pair of electrodes 230b can be stacked with the first pair of electrodes 230a, and another portion of the second pair of electrodes 230b can be stacked with the third pair of electrodes 230c. The first contact region CTA1 and the third contact region CTA3 can be formed in the stacked portions, respectively. A portion of the fourth pair of electrodes 230d can be stacked with the third pair of electrodes 230c, and the fourth pair of electrodes 230d and the third pair of electrodes 230c can be stacked on top of each other to form the second contact region CTA2. For example, a portion of the fourth pair of electrodes 230d can protrude from the second display region DA2 toward the non-display region NDA.

[0275] For example, the first pair of electrodes 230a and the second pair of electrodes 230b can be connected to each other in a zigzag pattern or zigzag arrangement, and the third pair of electrodes 230c and the fourth pair of electrodes 230d can be connected to each other in a zigzag pattern or zigzag arrangement. At least one of the first pair of electrodes 230a and at least one of the second pair of electrodes 230b can be connected to each other, and at least one of the fourth pair of electrodes 230d and at least one of the first pair of electrodes 230a can be connected to each other.

[0276] Therefore, for example, the counter electrodes located or disposed in each display area can be connected to each other. As an example, all the counter electrodes located or disposed on the substrate 100 can be connected to each other. Because the connected counter electrodes are in surface contact with each other, the surface resistance of the counter electrodes can be minimized.

[0277] Because the display device (not shown) ensures the transmission area TA, the function of the components located or disposed in the first display area DA1 will not be degraded.

[0278] Figure 26 This is a plan view showing the display area and non-display area of ​​the display panel according to an embodiment.

[0279] Reference Figure 26 The display panel (not shown) may include a first display area DA1, a second display area DA2, and a non-display area NDA. For example, the first display area DA1 may include a transmissive area TA, a first pixel area PA1-1, and a second pixel area PA1-2. The second display area DA2 may include a third pixel area PA2-1 and a fourth pixel area PA2-2. Pixels may be located or disposed in each of the first pixel areas PA1-1 to the fourth pixel areas PA2-2. For example, four first pixels PXa1 may be located or disposed in the first pixel area PA1-1, and four second pixels PXa2 may be located or disposed in the second pixel area PA1-2. Four third pixels PXm1 and four fourth pixels PXm2 may be located or disposed in the third pixel area PA2-1 and the fourth pixel area PA2-2, respectively. For example, each pixel may have a substantially rectangular shape, and two pixels from the four pixels located or disposed in one pixel area may emit light of the same color.

[0280] The first pair of electrodes 230a may be located or disposed in the first pixel region PA1-1, the second pair of electrodes 230b may be located or disposed in the second pixel region PA1-2, the third pair of electrodes 230c may be located or disposed in the third pixel region PA2-1, and the fourth pair of electrodes 230d may be located or disposed in the fourth pixel region PA2-2. For example, some portions of the first pair of electrodes 230a to the fourth pair of electrodes 230d may be stacked on top of each other to form a contact region. For example, the first contact region CTA1 may be formed such that the first pair of electrodes 230a and the second pair of electrodes 230b are stacked on top of each other, and the second contact region CTA2 may be formed such that the third pair of electrodes 230c and the fourth pair of electrodes 230d are stacked on top of each other. The third contact region CTA3 may be formed such that the first pair of electrodes 230a and the fourth pair of electrodes 230d are stacked on top of each other. The fourth contact region CTA4 may be formed such that adjacent third pairs of electrodes 230c are stacked on top of each other, and the fifth contact region CTA5 may be formed such that adjacent fourth pairs of electrodes 230d are stacked on top of each other. The sixth contact region CTA6 can be formed such that the third pair of electrodes 230c, the second contact region CTA2, and the fourth pair of electrodes 230d, which are adjacent to each other, are stacked on top of each other.

[0281] Therefore, for example, the counter electrodes located or disposed in each display area can be connected to each other. As an example, all the counter electrodes located or disposed on the substrate 100 can be connected to each other. Because the connected counter electrodes are in surface contact with each other, the surface resistance of the counter electrodes can be minimized.

[0282] Because the display device 1 ensures the transmission area TA, the function of the components located or disposed in the first display area DA1 will not be degraded.

[0283] Figure 27 This is a plan view showing the display area and non-display area of ​​the display panel according to an embodiment.

[0284] Reference Figure 27 Three pixels can be located or set in each pixel region. The size of one of the three pixels in a pixel region can be larger than the size of the other two pixels. For example, one of the three pixels can have a substantially rectangular shape, and the remaining two pixels can each have a substantially square shape.

[0285] Figure 28 This is a plan view showing the display area and non-display area of ​​the display panel according to an embodiment.

[0286] Reference Figure 28Four pixels can be located or set in each pixel region. For example, four pixels located or set in a pixel region can have essentially the same size.

[0287] Figure 29 This is a plan view showing the display area and non-display area of ​​the display panel according to an embodiment.

[0288] Reference Figure 29 The pixels can be arranged in a diamond shape. For example, each of the first pair of electrodes 230a and the second pair of electrodes 230b located or disposed in the first display area DA1 can cover four pixels, and each of the third pair of electrodes 230c and the fourth pair of electrodes 230d located or disposed in the second display area DA2 can cover nine pixels. However, the embodiments are not limited to this, and any number of pixels can be covered by the electrodes.

[0289] As described above, according to embodiments, a display panel and a display device including said display panel can be provided, wherein the display area extends to display images even in areas where components are positioned or disposed. However, the scope of disclosure is not limited by its effects.

[0290] It should be understood that the embodiments described herein are to be considered in a descriptive sense only and not for limiting purposes. The description of features or aspects within each embodiment should generally be considered applicable to other similar features or aspects in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope as defined by the claims.

Claims

1. A display device, the display device comprising: The substrate includes a first display area and a second display area surrounding the first display area. The first display area includes auxiliary pixel areas and transmissive areas arranged alternately in a grid pattern in a first direction and a second direction intersecting the first direction. The auxiliary pixel areas include first pixel areas and second pixel areas arranged alternately in a third direction and a fourth direction intersecting the first direction and the second direction. A first pixel is disposed in the first pixel region, and the first pixel includes a first pixel electrode, a first pair of electrodes, and a first intermediate layer disposed between the first pixel electrode and the first pair of electrodes; as well as A second pixel is disposed in the second pixel region. The second pixel includes a second pixel electrode, a second pair of electrodes, and a second intermediate layer disposed between the second pixel electrode and the second pair of electrodes. The first pair of electrodes is disposed in the first pixel region. The second pair of electrodes is disposed in the second pixel region, and The first pair of electrodes and the second pair of electrodes include a first contact region thereon where the first pixel region and the second pixel region are adjacent to each other, and the first contact region is the area where the first pair of electrodes and the second pair of electrodes are in surface contact with each other.

2. The display device according to claim 1, wherein, The first pair of electrodes and the second pair of electrodes are electrically connected to each other through the first contact area.

3. The display device according to claim 1, wherein, The transmission region is defined by the first pixel region and the second pixel region that are adjacent to each other.

4. The display device according to claim 1, wherein, The second pair of electrodes is disposed on the first pair of electrodes in the first contact area.

5. The display device according to claim 1, further comprising: A pixel defining layer is disposed on the first pixel electrode and the second pixel electrode, the pixel defining layer including a first opening and a second opening, wherein portions of the first pixel electrode and portions of the second pixel electrode are exposed through the first opening and the second opening, respectively. The first contact area is disposed on the pixel defining layer.

6. The display device according to claim 1, wherein, The transmittance of the first display area and the transmittance of the second display area are different from each other.

7. The display device according to claim 1, wherein, The resolution of the image provided in the first display area is less than the resolution of the image provided in the second display area.

8. The display device according to claim 1, wherein, The second display area includes a third pixel area and a fourth pixel area that are adjacent to each other. The display device further includes: A third pixel is disposed in the third pixel region, the third pixel including a third pixel electrode, a third pair of electrodes, and a third intermediate layer disposed between the third pixel electrode and the third pair of electrodes; and A fourth pixel is disposed in the fourth pixel region, the fourth pixel including a fourth pixel electrode, a fourth pair of electrodes, and a fourth intermediate layer disposed between the fourth pixel electrode and the fourth pair of electrodes. The third pair of electrodes and the fourth pair of electrodes include a second contact region in which the third pixel region and the fourth pixel region are adjacent to each other.

9. The display device according to claim 8, wherein, The third pair of electrodes and the fourth pair of electrodes are electrically connected to each other through the second contact area.

10. The display device according to claim 8, wherein, The third pair of electrodes or the fourth pair of electrodes protrudes toward the first display area, and The third pair of electrodes is electrically connected to the second pair of electrodes, or the fourth pair of electrodes is electrically connected to the first pair of electrodes, to form a third contact area.

11. The display device according to claim 10, wherein, The fourth pair of electrodes is disposed on the first pair of electrodes in the third contact region.

12. The display device according to claim 10, further comprising a pixel defining layer disposed on the third pixel electrode and the fourth pixel electrode. in, At least one of the second contact area and the third contact area is disposed on the pixel defining layer.

13. The display device according to claim 8, wherein, The fourth pair of electrodes is disposed on the third pair of electrodes in the second contact area.

14. The display device according to claim 8, wherein, The third pair of electrodes, the fourth pair of electrodes, and the second contact area are configured to cover the entire surface of the second display area.

15. The display device according to claim 8, wherein, Each of the third pair of electrodes and the fourth pair of electrodes has a strip shape.

16. The display device according to claim 8, wherein, The first pair of electrodes and the third pair of electrodes are aligned with each other, and The second pair of electrodes and the fourth pair of electrodes are aligned with each other.

17. The display device according to claim 8, wherein, The substrate includes a non-display area surrounding at least a portion of the second display area. At least one of the third pair of electrodes and the fourth pair of electrodes protrudes from the second display area toward the non-display area.

Images