Display device

Abstract

A display device is provided. The display device includes a substrate including a display area including a plurality of first pixels and a sensor area including a plurality of second pixels and a plurality of transmission portions, a plurality of first electrodes respectively disposed corresponding to the plurality of first pixels, a plurality of second electrodes respectively disposed corresponding to the plurality of second pixels, and a spacer disposed to overlap at least a portion of a boundary area between a transmission portion of the plurality of transmission portions and a second electrode of the plurality of second electrodes, the transmission portion of the plurality of transmission portions and the second electrode of the plurality of second electrodes being adjacent to each other.

Description

[0001] This application claims priority to and all benefits arising therefrom of Korean Patent Application No. 10-2019-0093678, filed on August 1, 2019, the entire contents of which are incorporated herein by reference. Technical Field

[0002] The disclosure involves display devices. Background Technology

[0003] With the development of the information society, the demand for display devices for displaying images has increased and diversified. For example, display devices are used in various electronic devices, such as smartphones, tablet PCs (“PCs”), digital cameras, laptop computers, navigation devices, monitors, and televisions (“TVs”). Display devices can be flat panel display devices, such as liquid crystal displays, field emission displays, organic light-emitting displays, and quantum dot displays.

[0004] Recently, various methods for minimizing the non-display area and maximizing the display area of ​​a display device have been studied. One such method is known to arrange various sensors included in the display device below the display panel, rather than arranging the sensors by forming holes in the display panel. The display device with sensors located below the display panel may include a pixel area for realizing an image and a sensor area with a transmissive portion, in which sensors, etc., can be disposed. Summary of the Invention

[0005] The disclosed embodiments relate to a display device that, when depositing a cathode electrode using a mask such as a fine metal mask (“FMM”), maximizes the transmission portion by preventing shading through the use of spacers.

[0006] According to an embodiment of the invention, a display device includes: a substrate including a display area and a sensor area, the display area including a plurality of first pixels, the sensor area including a plurality of second pixels and a plurality of transmissive portions; a plurality of first pairs of electrodes respectively disposed corresponding to the plurality of first pixels; a plurality of second pairs of electrodes respectively disposed corresponding to the plurality of second pixels; and a spacer configured to overlap with at least a portion of the boundary region between the transmissive portions of the plurality of transmissive portions and the second pairs of electrodes of the plurality of second pairs of electrodes, wherein the transmissive portions of the plurality of transmissive portions and the second pairs of electrodes of the plurality of second pairs of electrodes are adjacent to each other.

[0007] In the embodiments, the spacer may include at least one organic material selected from benzocyclobutene, polyimide, polyamide, acrylic resin and phenolic resin.

[0008] In an embodiment, the display device may further include a component disposed below one of the plurality of transmissive portions, the component including a sensor for sensing infrared light, visible light or sound.

[0009] In an embodiment, the area of ​​each of the plurality of transmissive portions may be larger than the area of ​​the emission region of one of the plurality of second pixels or the total area of ​​the emission regions of at least two of the plurality of second pixels.

[0010] In an embodiment, the number of second pixels per unit area may be smaller than the number of first pixels per unit area.

[0011] In an embodiment, the plurality of first pairs of electrodes and the plurality of second pairs of electrodes may be electrically connected to each other.

[0012] In an embodiment, each of the plurality of first pairs of electrodes may have a first rectangular shape, the first rectangular shape having a first width in a first direction and a first height in a second direction intersecting the first direction, and each of the plurality of second pairs of electrodes may have a second rectangular shape, the second rectangular shape having protrusions extending from the four vertices of the second rectangular shape in a first direction, wherein the second rectangular shape may have a second width in the first direction and a second height in the second direction.

[0013] In an embodiment, the first width may be larger than the second width, and the first height may be smaller than the second height.

[0014] In an embodiment, each of the plurality of transmissive portions may have a third rectangular shape surrounded by a corresponding second pair of electrodes among the plurality of second pairs of electrodes.

[0015] In an embodiment, the third rectangular shape may have a third width in the first direction and a third height in the second direction.

[0016] In an embodiment, the third width may be larger than the first width and the second width.

[0017] In an embodiment, the spacer may have a predetermined width and may be configured to at least partially overlap with the boundary region along the first direction between the protrusion of the transmissive portion and the second pair of electrodes and the boundary region along the second direction between the second rectangular shape of the transmissive portion and the second pair of electrodes.

[0018] In one embodiment, the spacer may have a predetermined width and may be positioned along the perimeter of a third rectangular shape.

[0019] In an embodiment, each of the plurality of second pairs of electrodes may further include a bend located at the intersection of the region of the protrusion extending in the first direction and the region of the second rectangular shape extending in the second direction.

[0020] In an embodiment, the spacer may have a triangular shape and may be configured to at least partially overlap with the curved portion.

[0021] In an embodiment, the first pairs of electrodes that are adjacent in a first direction among the plurality of first pairs of electrodes may be stacked on each other at the edge of the first rectangular shape, and the second pairs of electrodes that are adjacent along the edge of the transmission portion among the plurality of second pairs of electrodes may be stacked on each other at the protrusion.

[0022] In an embodiment, the second pairs of electrodes that are adjacent in the second direction among the plurality of second pairs of electrodes may be spaced apart from each other.

[0023] In an embodiment, the substrate may further include a non-display area, which is configured to surround the display area and the sensor area.

[0024] In one embodiment, the power supply wiring extending in the second direction may be disposed on a non-display area of ​​the substrate.

[0025] In one embodiment, the plurality of second pairs of electrodes may be electrically connected to power supply wiring.

[0026] According to the disclosed embodiments, when a cathode electrode is deposited using a mask such as an FMM, the transmissive portion of the display device is effectively secured by using spacers to prevent shading. Attached Figure Description

[0027] The above and other features will become more apparent from the detailed description of the disclosed exemplary embodiments with reference to the accompanying drawings, in which:

[0028] Figure 1 This is a perspective view schematically illustrating a display device according to the disclosed exemplary embodiments;

[0029] Figure 2 This is a schematic cross-sectional view of a display device according to the disclosed exemplary embodiments;

[0030] Figure 3 This is a schematic plan view of a display panel according to the disclosed exemplary embodiments;

[0031] Figure 4 This is an equivalent circuit diagram of pixels that can be disposed in the display area of ​​a display device for performing active matrix driving, according to the disclosed exemplary embodiments.

[0032] Figure 5 This is an equivalent circuit diagram of pixels that can be disposed in the display area of ​​a display device for performing active matrix driving, according to another exemplary embodiment disclosed.

[0033] Figure 6 An example of a mask for forming electrodes according to a disclosed exemplary embodiment is shown;

[0034] Figure 7 A method for depositing electrodes using a mask is shown;

[0035] Figure 8 and Figure 9 This is a schematic diagram illustrating the shadowing phenomenon that occurs when a fine metal mask (“FMM”) is used to deposit a counter electrode;

[0036] Figure 10 It is shown Figure 6 A diagram showing the planar arrangement of the second mask opening;

[0037] Figure 11 Is with Figure 3 A schematic plan view corresponding to region B, showing a portion of the boundary between the display area and the sensor area;

[0038] Figure 12 It is along Figure 11 A schematic cross-sectional view taken by line I-I';

[0039] Figure 13 It is along Figure 11 Schematic cross-sectional view taken from lines II-II' and III-III';

[0040] Figure 14 It is based on an optional exemplary embodiment and Figure 3 A schematic plan view corresponding to region B, showing a portion of the boundary between the display area and the sensor area;

[0041] Figure 15 A mask for forming counter electrodes is shown according to another optional exemplary embodiment;

[0042] Figure 16 It is shown Figure 15 A diagram showing the planar arrangement of the second mask opening; and

[0043] Figure 17 It is according to another optional exemplary embodiment and Figure 3 A schematic plan view corresponding to region B is shown, and a portion of the boundary between the display area and the sensor area is also shown. Detailed Implementation

[0044] The invention will now be described more fully below with reference to the accompanying drawings, in which various embodiments are illustrated. However, the invention may be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

[0045] As used herein, "embodiment" and "implementation" are interchangeable terms as non-limiting examples of devices or methods employing one or more inventive concepts disclosed herein. However, it will be apparent that various exemplary embodiments may be implemented without these specific details or with one or more equivalent arrangements. In other instances, well-known structures and apparatus are shown in block diagram form to avoid unnecessarily obscuring the various exemplary embodiments. Furthermore, the various exemplary embodiments may be different, but not necessarily exclusive. For example, a particular shape, construction, and characteristic of an exemplary embodiment may be used or implemented in another exemplary embodiment without departing from the inventive concept.

[0046] Unless otherwise stated, the exemplary embodiments shown are to be understood as providing exemplary features detailing variations in some ways in which the inventive concept can be implemented in practice. Therefore, unless otherwise stated, features, components, modules, layers, films, panels, regions and / or aspects, etc. (hereinafter individually or collectively referred to as “elements”) of various embodiments can be further combined, separated, interchanged and / or rearranged without departing from the inventive concept.

[0047] Cross-hatching and / or shading are typically used in accompanying drawings to clearly define the boundaries between adjacent elements. Thus, unless otherwise stated, the presence or absence of cross-hatching or shading does not express or indicate any preference or requirement for the specific material, material properties, dimensions, scale, commonalities between elements, or any other characteristics, properties, etc. Furthermore, in the drawings, the dimensions and relative dimensions of elements may be exaggerated for clarity and / or descriptive purposes. When exemplary embodiments can be implemented differently, a particular process sequence may be performed in a sequence different from that described. For example, two consecutively described processes may be performed substantially simultaneously or in the reverse order of their description. Moreover, the same reference numerals denote the same elements.

[0048] When a component or layer is referred to as being "on," "connected to," or "bonded to" another component or layer, the component or layer may be directly on, directly connected to, or directly bonded to the other component or layer, or there may be intermediate components or intermediate layers present. However, when a component or layer is referred to as being "directly on," "directly connected to," or "directly bonded to" another component or layer, there are no intermediate components or intermediate layers present. Therefore, the term "connection" can refer to a physical connection, electrical connection, and / or fluid connection, with or without intermediate components. Furthermore, the X-axis, Y-axis, and Z-axis are not limited to the three axes of a Cartesian coordinate system such as the x-axis, y-axis, and z-axis, and can be interpreted in a broader sense. For example, the X-axis, Y-axis, and Z-axis can be perpendicular to each other, or can represent different directions that are not perpendicular to each other. For the purposes of this disclosure, "at least one of X, Y, and Z" and "at least one selected from X, Y, and Z" can be understood as any combination of only X, only Y, only Z, or two or more of X, Y, and Z, such as XYZ, XYY, YZ, and ZZ. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0049] Although the terms “first,” “second,” etc., may be used here to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another. Therefore, without departing from the publicly stated teachings, the first element discussed below may be referred to as the second element.

[0050] For descriptive purposes, spatial relative terms such as “below,” “under,” “below,” “down,” “above,” “above,” “higher,” and “side” (e.g., as in a “sidewall”) may be used herein to describe the relationship of one element to another (other) element as shown in the accompanying drawings. Spatial relative terms are intended to include different orientations of the device in use, operation, and / or manufacture other than those depicted in the drawings. For example, if the device in the drawings is flipped, an element described as “below” or “under” another element or feature would subsequently be positioned “above” said other element or feature. Thus, the exemplary term “below” can include both above and below orientations. Furthermore, the device may be otherwise positioned (e.g., rotated 90 degrees or in other orientations), thus interpreting the spatial relative descriptive terms used herein accordingly.

[0051] The terminology used herein is for the purpose of describing particular embodiments and is not intended to be limiting. As used herein, unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well. As used herein, unless the content clearly indicates otherwise, the singular forms “a,” “an,” and “the” are intended to include the plural forms that include “at least one of…”. “Or” means “and / or.” Furthermore, the terms “comprising” and / or “including,” and variations thereof, when used in this specification, indicate the presence of the stated features, integrals, steps, operations, elements, components, and / or groups thereof, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof.

[0052] As used herein, “approximately” or “about” includes the stated value and means within an acceptable range of deviation from the particular value as determined by a person of ordinary skill in the art, taking into account the measurements discussed and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system).

[0053] Various exemplary embodiments are described herein with reference to cross-sectional views and / or exploded views that are schematic diagrams of idealized exemplary embodiments and / or intermediate structures. Thus, variations in the shapes of the figures will be anticipated, for example, due to manufacturing techniques and / or tolerances. Therefore, the exemplary embodiments disclosed herein should not necessarily be interpreted as limited to the specific shapes shown for the regions, but will include, for example, shape deviations caused by manufacturing processes. In this way, the regions shown in the figures can be schematic in nature, and the shapes of these regions may not reflect the actual shapes of the regions of the device, thus not necessarily intended to be limiting.

[0054] As is customary in the art, exemplary embodiments are described and illustrated in the accompanying drawings according to functional blocks, units, and / or modules. Those skilled in the art will understand that these functional blocks, units, and / or modules are physically implemented by electronic (or optical) circuitry such as logic circuitry, discrete components, microprocessors, hardwired circuitry, memory elements, wiring connections, etc., which can be formed using semiconductor-based manufacturing techniques or other manufacturing techniques. In the case of functional blocks, units, and / or modules implemented by microprocessors or other similar hardware, they can be programmed and controlled using software (e.g., microcode) to perform the various functions discussed herein, and can optionally be driven by firmware and / or software. It is also contemplated that each functional block, unit, and / or module can be implemented by dedicated hardware, or as a combination of dedicated hardware performing some functions and processors performing other functions (e.g., one or more programmed microprocessors and associated circuitry). Furthermore, without departing from the scope of the inventive concept, each functional block, unit, and / or module of some exemplary embodiments can be physically separated into two or more interactive and discrete functional blocks, units, and / or modules. Furthermore, without departing from the scope of the inventive concept, functional blocks, units and / or modules of some exemplary embodiments may be physically combined into more complex functional blocks, units and / or modules.

[0055] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure is a part. Terms (such as those defined in a general dictionary) shall be interpreted as having a meaning consistent with their meaning in the context of the relevant field, and shall not be interpreted in an idealized or overly formal sense, unless expressly defined herein.

[0056] Exemplary embodiments are described herein with reference to cross-sectional views, which are schematic representations of idealized embodiments. Thus, variations in the shapes illustrated will be anticipated, for example, due to manufacturing techniques and / or tolerances. Therefore, the embodiments described herein should not be construed as limited to the specific shapes of the areas shown herein, but will include, for example, shape deviations caused by manufacturing processes. For example, areas shown or described as flat may generally have rough and / or non-linear characteristics. Furthermore, acute angles (or “sharp angles”) shown may be rounded (rounded). Therefore, the areas shown in the figures are schematic in nature, and their shapes are not intended to show the precise shapes of the areas, nor are they intended to limit the scope of the claims.

[0057] In the following description, exemplary embodiments of the invention will be described in detail with reference to the accompanying drawings.

[0058] Figure 1This is a perspective view schematically showing a display device 1 according to the disclosed exemplary embodiments.

[0059] Reference Figure 1 An exemplary embodiment of the display device 1 includes a display area DA on which an image is displayed and a non-display area NDA on which no image is displayed. The display device 1 can provide a main image by utilizing light emitted from a plurality of first pixels Pm disposed in the display area DA.

[0060] Display device 1 may include sensor area SA. See the following reference... Figure 2 The sensor region SA can be a region in which a component is provided with a sensor such as one using infrared light, visible light, or sound. The sensor region SA may include a transmissive portion TA that allows light and / or sound traveling from the component to the outside or from the outside toward the component to pass through it.

[0061] Multiple second pixels Pa can be disposed in the sensor region SA, and a predetermined image can be provided using light emitted from the multiple second pixels Pa. The image provided from the sensor region SA can be an auxiliary image and can have a lower resolution compared to the image provided from the display region DA. In an exemplary embodiment, because the sensor region SA includes a transmissive portion TA through which light and / or sound can be transmitted, the number of second pixels Pa disposed per unit area can be smaller than the number of first pixels Pm disposed per unit area in the display region DA.

[0062] The sensor area SA can be located on one side of the display area DA. Figure 1 An exemplary embodiment is shown in which the sensor region SA is disposed above the display region DA, but is not limited thereto. Optionally, the sensor region SA is disposed between the non-display region NDA and the display region DA.

[0063] In the following description, for ease of description, an exemplary embodiment of the display device 1 as an organic light-emitting display device will be described in detail, but the disclosed display device 1 is not limited thereto. In an alternative exemplary embodiment, another type of display device (such as an inorganic electroluminescent (“EL”) display device or a quantum dot light-emitting display device) may be used as the display device 1.

[0064] Figure 1 An exemplary embodiment is shown in which the sensor region SA is disposed on the upper side of the rectangular display region DA, but the disclosure is not limited thereto. Optionally, the shape of the display region DA may be circular, elliptical, or polygonal (such as triangular or pentagonal), and the position and number of sensor regions SA may be modified in various ways.

[0065] Figure 2This schematically illustrates the display device 1 according to the disclosed exemplary embodiments and its alignment with... Figure 1 The sectional view corresponding to the section cut by line A-A'.

[0066] Reference Figure 2 An exemplary embodiment of the display device 1 may include a display panel 10 containing display elements and a component 20 corresponding to the sensor region SA.

[0067] The display panel 10 may include a substrate 100, a display element layer 200 disposed on the substrate 100, and a thin film encapsulation layer 300 serving as a sealing member for sealing the display element layer 200. In an exemplary embodiment, the display panel 10 may further include a cover pad 175 disposed beneath the substrate 100.

[0068] The substrate 100 may comprise glass or a polymeric resin. In one exemplary embodiment, the polymeric resin may comprise polyethersulfone (“PES”), polyacrylate (“PA”), polyetherimide (“PEI”), polyethylene naphthalate (“PEN”), polyethylene terephthalate (“PET”), polyphenylene sulfide (“PPS”), polyarylate (“PAR”), polyimide (“PI”), polycarbonate (“PC”), cellulose acetate propionate (“CAP”), etc. The substrate 100 comprising the polymeric resin may have flexible, rollable, or bendable properties. The substrate 100 may have a multilayer structure comprising a layer containing the aforementioned polymeric resin and an inorganic layer (not shown).

[0069] The display element layer 200 may include a circuit layer containing thin-film transistors (TFTs) and TFT', organic light-emitting diodes (OLEDs) and OLED' as display elements, and insulating layers IL and IL', with the thin-film transistors (TFTs) and TFT' and the organic light-emitting diodes (OLEDs) and OLED' disposed between the insulating layers IL and IL'.

[0070] In an exemplary embodiment, a first pixel Pm, including a main thin-film transistor TFT and a main organic light-emitting diode OLED connected to the main thin-film transistor TFT, can be disposed in the display area DA, and a second pixel Pa, including an auxiliary thin-film transistor TFT' and an auxiliary organic light-emitting diode OLED' connected to the auxiliary thin-film transistor TFT', can be disposed in the sensor area SA.

[0071] In this embodiment, the transmissive portion TA, excluding the display element and auxiliary thin-film transistor TFT', can be defined within the sensor region SA. The transmissive portion TA can be understood as the area through which light / signals emitted from component 20 or external light / signals to be incident on component 20 are transmitted.

[0072] Component 20 may be located in sensor region SA. Component 20 may be an electronic component that uses light or sound. For example, in one exemplary embodiment, component 20 may be a sensor that receives or uses light (such as an infrared sensor), a sensor that measures distance or identifies fingerprints by outputting and detecting light or sound, a small lamp that outputs light, a speaker that outputs sound, a camera that captures images, etc. In one exemplary embodiment, when component 20 is an electronic component that uses light, various wavelengths of light (such as visible light, infrared light, and ultraviolet light) may be used. Multiple components 20 may be disposed in sensor region SA. For example, in one exemplary embodiment, a light-emitting element and a light-receiving element may be disposed together in one sensor region SA as component 20. Alternatively, both the light-emitting part and the light-receiving part may be disposed in component 20. Figure 2 In this illustration, for ease of depiction and description, a component 20 is shown corresponding to a second pixel Pa and a transmissive portion TA, but is not limited thereto. Optionally, a component 20 may be configured to correspond to multiple second pixels Pa and multiple transmissive portions TA.

[0073] A lower metal layer (BSM) can be disposed in the sensor region (SA). The lower metal layer (BSM) can be configured to correspond to the lower portion of the auxiliary thin-film transistor (TFT) '. The lower metal layer (BSM) can prevent light from reaching the second pixel (Pa), including the auxiliary thin-film transistor ', etc. For example, in an exemplary embodiment, the lower metal layer (BSM) can block light emitted from component 20 from reaching the second pixel (Pa).

[0074] In an exemplary embodiment, a constant voltage or signal may be applied to the lower metal layer BSM to prevent damage to the pixel circuitry due to electrostatic discharge.

[0075] The thin-film encapsulation layer 300 may include an inorganic encapsulation layer and an organic encapsulation layer. In an exemplary embodiment, as shown... Figure 2 As shown, the thin-film encapsulation layer 300 includes a first inorganic encapsulation layer 310, a second inorganic encapsulation layer 330, and an organic encapsulation layer 320 located between the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330.

[0076] The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may include at least one inorganic insulating material selected from alumina, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and silicon oxynitride. The organic encapsulation layer 320 may include polymeric materials. For example, in an exemplary embodiment, the polymeric material may include acrylic resin, epoxy resin, polyimide, polyethylene, etc.

[0077] The cover pad 175 can be attached to the bottom of the substrate 100. The opening 175OP corresponding to the sensor area SA is defined by the cover pad 175. By providing or forming the opening 175OP in the cover pad 175, the light transmittance of the sensor area SA can be improved.

[0078] Although not shown, cover pad 175 may include a protective layer and a padding layer.

[0079] The protective layer can protect the substrate 100 from external impacts to the bottom of the substrate 100. For example, in an exemplary embodiment, the protective layer can protect the substrate 100 from contamination, scratches, and impacts that may occur during the manufacturing process of the display device. The protective layer may include components such as fine silica powder, silicone defoamers, additives, antistatic agents, naphtha solvents, or diethylene glycol monoethyl ether acetate.

[0080] A liner layer can be disposed on the lower surface of the protective layer. The liner layer may have an adhesive layer on its surface, so that it can be attached to the lower surface of the protective layer.

[0081] The padding layer may include a cushioning member capable of absorbing external impacts. The cushioning member may include a material capable of absorbing impacts. For example, in an exemplary embodiment, the cushioning member may include a sponge formed by foaming an elastic polymer resin, rubber solution, urethane material, or acrylic material, or is formed from a sponge formed by foaming an elastic polymer resin, rubber solution, urethane material, or acrylic material.

[0082] In addition to the aforementioned buffering components, the padding layer may also include a light-blocking component to prevent light emitted onto the substrate 100 from leaking through the substrate 100 and / or a heat dissipation component to dissipate heat generated by the display device 1. The heat dissipation component may include a metal with excellent thermal conductivity (such as copper (Cu), silver (Ag), copper alloys, and aluminum (Al)) or a carbon-based material (such as graphite and graphene). The aforementioned buffering components, light-blocking components, and heat dissipation components may be stacked on top of each other along the thickness direction (Z-direction).

[0083] Although not shown, a lower protective film may be further included between the substrate 100 and the cover pad 175 to support and protect the substrate 100. The lower protective film may be configured to overlap the entire area of ​​the sensor region SA, and may include PET or PI.

[0084] The area of ​​the sensor region SA can be larger than the area where component 20 is disposed. Therefore, the area of ​​the opening 175OP disposed in the cover pad 175 may not coincide with the area of ​​the sensor region SA. For example, in an exemplary embodiment, the area (or region) of the opening 175OP may be smaller than the area (or region) of the sensor region SA.

[0085] In an exemplary embodiment, multiple components 20 may be disposed in the sensor region SA. The multiple components 20 may have different functions from each other.

[0086] Although not shown, components such as input sensing elements, polarizers and delay elements (or anti-reflective elements including color filters and black matrices) and transparent windows may be further disposed on the display panel 10, with the input sensing elements used to sense touch input.

[0087] In an exemplary embodiment, as described above, the thin-film encapsulation layer 300 serves as an encapsulation component for sealing the display element layer 200, but the disclosure is not limited thereto. For example, in one exemplary embodiment, a sealing substrate bonded to the substrate 100 by a sealant or glass frit can be used as a component for sealing the display element layer 200.

[0088] Figure 3 This is a schematic plan view of a display panel 10 according to the disclosed exemplary embodiments.

[0089] Reference Figure 3 In an exemplary embodiment, the display panel 10 includes a display area DA, and the display area DA includes a plurality of first pixels Pm. Each first pixel Pm may include a display element such as an organic light-emitting diode (OLED). Each first pixel Pm may emit, for example, red, green, blue, or white light via the organic light-emitting diode. Here, the first pixel Pm can be understood as a sub-pixel that emits light of any one of the colors red, green, blue, and white as described above. The display area DA may cover the above-mentioned references. Figure 2 The encapsulation component described is designed to protect the display area DA from external air or moisture.

[0090] A sensor region SA can be defined on the side of a display region DA, and a plurality of second pixels Pa can be disposed in the sensor region SA. Each second pixel Pa can include a display element such as an organic light-emitting diode (OLED). Each second pixel Pa can emit, for example, red, green, blue, or white light through the organic light-emitting diode. Here, a second pixel Pa can be understood as a sub-pixel that emits light of any one of the colors red, green, blue, and white as described above. In an exemplary embodiment, the sensor region SA can be provided with a transmissive portion TA, and the transmissive portion TA is disposed between the second pixels Pa. Component 20 can be configured to correspond to the lower part of the sensor region SA of the display panel 10.

[0091] In an exemplary embodiment, each first pixel Pm and each second pixel Pa may include the same pixel circuitry. However, the disclosure is not limited thereto. Optionally, the pixel circuitry included in the first pixel Pm and the pixel circuitry included in the second pixel Pa may be different from each other.

[0092] Because the sensor region SA includes the transmissive portion TA, the resolution of the sensor region SA can be smaller than the resolution of the display region DA. For example, in an exemplary embodiment, the resolution of the sensor region SA can be approximately half the resolution of the display region DA.

[0093] Each of pixels Pm and Pa can be electrically connected to an external circuit located in the non-display area NDA. In the non-display area NDA, a first scan drive circuit 110, a second scan drive circuit 120, a terminal 140, a data drive circuit 150, a first power supply wiring 160, and a second power supply wiring 170 can be provided.

[0094] The first scan driving circuit 110 can provide a scan signal to each of pixels Pm and Pa via a scan line SL. The first scan driving circuit 110 can also provide a transmission control signal to each pixel Pm and Pa via a transmission control line EL. The second scan driving circuit 120 can be disposed opposite to the first scan driving circuit 110, and the display area DA and the sensor area SA are located between the second scan driving circuit 120 and the first scan driving circuit 110. Some pixels of pixels Pm and Pa disposed in the display area DA and the sensor area SA can be electrically connected to the first scan driving circuit 110, and the remaining pixels can be connected to the second scan driving circuit 120. In an optional exemplary embodiment, the second scan driving circuit 120 can be omitted.

[0095] Terminal 140 may be disposed on the side of substrate 100. Terminal 140 may be exposed without being covered by an insulating layer and is electrically connected to a printed circuit board (PCB). Terminal PCB-P of the PCB may be electrically connected to terminal 140 of display panel 10. The PCB transmits signals or power from a controller (not shown) to display panel 10. Control signals generated by the controller may be transmitted via the PCB to each of the first scan drive circuit 110 and the second scan drive circuit 120. The controller may transmit the first power supply voltage ELVDD and the second power supply voltage ELVSS (see description below) via first connection wiring 161 and second connection wiring 171, respectively. Figure 4 and Figure 5The first power supply voltage ELVDD can be provided to the first power supply wiring 160 and the second power supply wiring 170 via the drive voltage line PL connected to the first power supply wiring 160. The second power supply voltage ELVSS (or common voltage) can be provided to the counter electrode of each pixel Pm, Pa connected to the second power supply wiring 170.

[0096] The data driving circuit 150 is electrically connected to the data line DL. Data signals from the data driving circuit 150 can be provided to each pixel Pm, Pa via the connection wiring 151 connected to terminal 140 and the data line DL connected to the connection wiring 151. In an exemplary embodiment, as... Figure 3 As shown, the data driving circuit 150 can be disposed on a printed circuit board (PCB), but is not limited thereto. Optionally, the data driving circuit 150 can be disposed on the substrate 100. For example, in an exemplary embodiment, the data driving circuit 150 can be disposed between the terminal 140 and the first power supply wiring 160.

[0097] The first power supply wiring 160 may include a first sub-wiring 162 and a second sub-wiring 163 extending parallel to a first direction (X direction), with the display area DA and the sensor area SA located between the first sub-wiring 162 and the second sub-wiring 163. The second power supply wiring 170 may partially surround the display area DA and the sensor area SA in an annular shape with an opening on one side.

[0098] Figure 4 and Figure 5 This is an equivalent circuit diagram of the first pixel Pm and / or the second pixel Pa in the display panel 10 according to the disclosed exemplary embodiments.

[0099] Reference Figure 4 In an exemplary embodiment, each pixel Pm, Pa may include a pixel circuit PC connected to a scan line SL and a data line DL, and an organic light-emitting diode (OLED) connected to the pixel circuit PC.

[0100] The pixel circuit PC includes a driving thin-film transistor T1, a switching thin-film transistor T2, and a storage capacitor Cst. The switching thin-film transistor T2 is connected to the scan line SL and the data line DL. The data signal Dm input through the data line DL is transmitted to the driving thin-film transistor T1 according to the scan signal Sn input through the scan line SL.

[0101] Storage capacitor Cst is connected to switching thin-film transistor T2 and drive voltage line PL. Storage capacitor Cst stores a voltage corresponding to the difference between the voltage received from switching thin-film transistor T2 and the first power supply voltage ELVDD (or drive voltage) supplied to drive voltage line PL.

[0102] A driving thin-film transistor T1 is connected to a driving voltage line PL and a storage capacitor Cst. The driving thin-film transistor T1 can control the driving current flowing from the driving voltage line PL through the organic light-emitting diode (OLED) in response to the voltage value stored in the storage capacitor Cst. The OLED can emit light with a predetermined brightness through the driving current.

[0103] In an exemplary embodiment, such as Figure 4 As shown, the pixel circuit PC may include two thin-film transistors and a single storage capacitor, but the disclosure is not limited thereto. Alternatively, as... Figure 5 As shown, the pixel circuit PC may include seven thin-film transistors and a storage capacitor.

[0104] Reference Figure 5 In an exemplary embodiment, each pixel Pm, Pa includes a pixel circuit PC and an organic light-emitting diode (OLED) connected to the pixel circuit PC. The pixel circuit PC may include a plurality of thin-film transistors and a storage capacitor Cst. The plurality of thin-film transistors and the storage capacitor Cst may be connected to signal lines SL, SL-1, EL and DL, an initialization voltage line VL, and a drive voltage line PL.

[0105] In an exemplary embodiment, such as Figure 5 As shown, each pixel Pm, Pa is connected to signal lines SL, SL-1, EL and DL, initialization voltage line VL, and drive voltage line PL, but the disclosure is not limited thereto. In an optional exemplary embodiment, at least one of the signal lines SL, SL-1, EL and DL, initialization voltage line VL, drive voltage line PL, etc., may be shared by adjacent pixels.

[0106] The multiple thin-film transistors may include a driving thin-film transistor T1, a switching thin-film transistor T2, a compensation thin-film transistor T3, a first initialization thin-film transistor T4, an operation control thin-film transistor T5, an emission control thin-film transistor T6, and a second initialization thin-film transistor T7.

[0107] The signal lines may include a scan line SL that transmits the scan signal Sn to the switching thin-film transistor T2 and the compensation thin-film transistor T3, a previous scan line SL-1 that transmits the previous scan signal Sn-1 to the first initialization thin-film transistor T4 and the second initialization thin-film transistor T7, an emission control line EL that transmits the emission control signal En to the operation control thin-film transistor T5 and the emission control thin-film transistor T6, and a data line DL that intersects with the scan line SL and transmits the data signal Dm. The drive voltage line PL transmits the drive voltage ELVDD to the drive thin-film transistor T1, and the initialization voltage line VL transmits the initialization voltage Vint used to initialize the drive thin-film transistor T1 and the pixel electrode.

[0108] The driving gate electrode G1 of the driving thin-film transistor T1 is connected to the first storage capacitor plate Cst1 of the storage capacitor Cst. The driving source electrode S1 of the driving thin-film transistor T1 is connected to the driving voltage line PL via the operation control thin-film transistor T5. The driving drain electrode D1 of the driving thin-film transistor T1 is electrically connected to the pixel electrode of the organic light-emitting diode (OLED) via the emission control thin-film transistor T6. The driving thin-film transistor T1 receives the data signal Dm in response to the switching operation of the switching thin-film transistor T2 and drives the driving current I. OLED Supply to organic light-emitting diodes (OLEDs).

[0109] The switching gate electrode G2 of the switching thin-film transistor T2 is connected to the scan line SL. The switching source electrode S2 of the switching thin-film transistor T2 is connected to the data line DL. The switching drain electrode D2 of the switching thin-film transistor T2 is connected to the driving source electrode S1 of the driving thin-film transistor T1, and is also connected to the driving voltage line PL via the operation control thin-film transistor T5. The switching thin-film transistor T2 is turned on in response to the scan signal Sn transmitted through the scan line SL to perform a switching operation that transmits the data signal Dm transmitted to the data line DL to the driving source electrode S1 of the driving thin-film transistor T1.

[0110] The compensation gate electrode G3 of the compensation thin-film transistor T3 is connected to the scan line SL. The compensation source electrode S3 of the compensation thin-film transistor T3 is connected to the driving drain electrode D1 of the driving thin-film transistor T1, and is also connected to the pixel electrode of the organic light-emitting diode (OLED) via the emission control thin-film transistor T6. The compensation drain electrode D3 of the compensation thin-film transistor T3 is connected to the first storage capacitor plate Cst1 of the storage capacitor Cst, the first initialization drain electrode D4 of the first initialization thin-film transistor T4, and the driving gate electrode G1 of the driving thin-film transistor T1. The compensation thin-film transistor T3 is turned on in response to the scan signal Sn transmitted through the scan line SL, so as to electrically connect the driving gate electrode G1 and the driving drain electrode D1 of the driving thin-film transistor T1, thereby connecting the driving thin-film transistor T1 diode.

[0111] The first initialization gate electrode G4 of the first initialization thin-film transistor T4 is connected to the previous scan line SL-1. The first initialization source electrode S4 of the first initialization thin-film transistor T4 is connected to the initialization voltage line VL and the second initialization drain electrode D7 of the second initialization thin-film transistor T7. The first initialization drain electrode D4 of the first initialization thin-film transistor T4 is connected to the first storage capacitor plate Cst1 of the storage capacitor Cst, the compensation drain electrode D3 of the compensation thin-film transistor T3, and the driving gate electrode G1 of the driving thin-film transistor T1. The first initialization thin-film transistor T4 is turned on in response to the previous scan signal Sn-1 transmitted through the previous scan line SL-1 to perform an initialization operation that initializes the voltage of the driving gate electrode G1 of the driving thin-film transistor T1 by transmitting the initialization voltage Vint to the driving gate electrode G1 of the driving thin-film transistor T1.

[0112] The operation control gate electrode G5 of the thin-film transistor T5 is connected to the emitter control line EL. The operation control source electrode S5 of the thin-film transistor T5 is connected to the drive voltage line PL. The operation control drain electrode D5 of the thin-film transistor T5 is connected to the drive source electrode S1 of the driving thin-film transistor T1 and the switch drain electrode D2 of the switching thin-film transistor T2.

[0113] The emission control gate electrode G6 of the emission control thin-film transistor T6 is connected to the emission control line EL. The emission control source electrode S6 of the emission control thin-film transistor T6 is connected to the driving drain electrode D1 of the driving thin-film transistor T1 and the compensation source electrode S3 of the compensation thin-film transistor T3. The emission control drain electrode D6 of the emission control thin-film transistor T6 is electrically connected to the second initialization source electrode S7 of the second initialization thin-film transistor T7 and the pixel electrode of the organic light-emitting diode (OLED).

[0114] The operation control thin-film transistor T5 and the emission control thin-film transistor T6 are simultaneously turned on in response to the emission control signal En transmitted through the emission control line EL, causing the driving voltage ELVDD to be transmitted to the organic light-emitting diode OLED, thereby driving the driving current I. OLED It flows through an organic light-emitting diode (OLED).

[0115] The second initialization gate electrode G7 of the second initialization thin-film transistor T7 is connected to the previous scan line SL-1. The second initialization source electrode S7 of the second initialization thin-film transistor T7 is connected to the emission control drain electrode D6 of the emission control thin-film transistor T6 and the pixel electrode of the organic light-emitting diode (OLED). The second initialization drain electrode D7 of the second initialization thin-film transistor T7 is connected to the first initialization source electrode S4 of the first initialization thin-film transistor T4 and the initialization voltage line VL. The second initialization thin-film transistor T7 is turned on in response to the previous scan signal Sn-1 transmitted through the previous scan line SL-1 to initialize the pixel electrode of the organic light-emitting diode (OLED).

[0116] although Figure 5 An embodiment is shown in which a first initialization thin-film transistor T4 and a second initialization thin-film transistor T7 are connected to a previous scan line SL-1, but the disclosure is not limited thereto. In an alternative exemplary embodiment, the first initialization thin-film transistor T4 may be connected to the previous scan line SL-1 and driven based on a previous scan signal Sn-1, and the second initialization thin-film transistor T7 may be connected to a separate signal line (e.g., a subsequent scan line) and driven based on a signal transmitted to that signal line.

[0117] The second storage capacitor plate Cst2 of the storage capacitor Cst is connected to the driving voltage line PL, and the counter electrode of the organic light-emitting diode (OLED) can be supplied with a common voltage ELVSS. Therefore, the OLED receives a driving current I from the driving thin-film transistor T1. OLED It emits light, thereby displaying an image.

[0118] although Figure 5 An exemplary embodiment of a compensation thin-film transistor T3 and a first initialization thin-film transistor T4 having dual gate electrodes is shown, but the embodiment is not limited thereto. Optionally, the compensation thin-film transistor T3 and the first initialization thin-film transistor T4 may have a single gate electrode.

[0119] In an exemplary embodiment, the first pixel Pm and the second pixel Pa may include pixel circuits PC that are identical to each other. However, the disclosure is not limited thereto. The first pixel Pm and the second pixel Pa may include pixel circuits PC that have different structures from each other. For example, in an exemplary embodiment, the first pixel Pm may employ... Figure 5 The pixel circuit PC, the second pixel Pa can be adopted Figure 4 The pixel circuit PC can be modified in various ways.

[0120] Figure 6 A mask M1 for forming a counter electrode 223 is shown according to a disclosed exemplary embodiment.

[0121] Reference Figure 6In an exemplary embodiment, a first mask opening 510A and a second mask opening 510B having different shapes from each other are defined or formed to pass through a mask M1 for forming a counter electrode.

[0122] The first mask opening 510A can be formed as a rectangle having a first mask width MW1 in the first direction (X direction) and a first mask length ML1 in the second direction (Y direction).

[0123] The second mask opening 510B may include a rectangular opening having a second mask width MW2 in the first direction (X direction) and a second mask length ML2 in the second direction (Y direction), and may also include an expansion hole EH extending from the apex of the opening along the first direction (X direction).

[0124] The expansion aperture EH can have a rectangular shape. The second mask width MW2 can mean the width passing through the center of the second mask opening 510B in the first direction (X direction). In this embodiment, the first mask width MW1 can be larger than the second mask width MW2.

[0125] The first mask opening 510A and the second mask opening 510B can be arranged sequentially along the second direction (Y direction). Figure 6 For simplicity of illustration and description, the first mask opening 510A and the second mask opening 510B are shown arranged in two rows. In an optional exemplary embodiment, the first mask opening 510A and the second mask opening 510B may also be arranged along a second direction (Y direction) at a predetermined interval. In this embodiment, the distance d1 between adjacent first mask openings 510A in the second direction (Y direction) may be greater than the first mask length ML1, and the distance d2 between adjacent second mask openings 510B in the second direction (Y direction) may be smaller than the second mask length ML2.

[0126] In an exemplary embodiment, the first mask opening 510A or the second mask opening 510B may be arranged in rows along a first direction (X direction) at predetermined intervals. In such an embodiment, as Figure 6 As shown, the distance d3 between adjacent first mask openings 510A in the first direction (X direction) can be smaller than the first mask width MW1, and the distance d4 between the expansion holes EH of adjacent second mask openings 510B in the first direction (X direction) can be smaller than the width MW2' between the expansion hole EH provided at the end of the second mask opening 510B and the expansion hole EH provided at the opposite end of the second mask opening 510B.

[0127] In an exemplary embodiment, the mask M1 may be used for depositing the counter electrode 223 (see Figure 11The mask can be a fine metal mask (“FMM”). An FMM can be manufactured by forming holes in a metal sheet and then stretching the metal sheet. Thus, the first mask opening 510A and the second mask opening 510B can be formed symmetrically with respect to an axis passing through the center of the mask opening in a first direction (X direction) or an axis passing through the center of the mask opening in a second direction (Y direction).

[0128] Used to form the first pair of electrodes 223A (see...) Figure 11 The first mask opening 510A can have a size less than or equal to that of the first pair of electrodes 223A. This is used to form the second pair of electrodes 223B (see...). Figure 11 The second mask opening 510B may have a size less than or equal to that of the second pair of electrodes 223B.

[0129] In an exemplary embodiment, deposition can be performed using a single mask M1 to form the counter electrode 223. Figure 7 An exemplary embodiment of a method for depositing electrode 223 using mask M1 is shown.

[0130] Reference Figure 7 , Figure 11 and Figure 13 After setting or forming the second functional layer 222c on the substrate 100, the first mask opening 510A and the second mask opening 510B can be set to correspond to some pixel groups Pg.

[0131] Then, by using a deposition source (not shown), the deposition material to form the counter electrode 223 is released to initially deposit some counter electrodes 223 on the second functional layer 222c. In this embodiment, only a portion of the first counter electrode 223A and the second counter electrode 223B are formed to correspond to the arrangement of the first mask opening 510A and the second mask opening 510B of the mask M1.

[0132] Then, after moving the mask M1 along the first direction (X direction) and the second direction (Y direction), the remaining pair electrodes 223 are deposited a second time. Some regions of the first pair electrodes 223A and the second pair electrodes 223B formed during the second deposition can overlap and contact the first pair electrodes 223A and the second pair electrodes 223B formed during the initial deposition.

[0133] like Figure 7 As shown, after the initial deposition on the counter electrode 223, the mask M1 is moved to the left and upward in a direction 45 degrees relative to the first direction (X direction), and a second deposition is performed. However, the disclosure is not limited thereto.

[0134] In an exemplary embodiment, as described above, when using mask M1, because the electrode 223 is deposited twice using a single mask M1, the process time and process cost can be reduced compared to a process using two masks.

[0135] However, processes using a single mask can cause process problems due to a phenomenon known as shading, which hinders precise patterning when depositing the material. Figure 8 and Figure 9 This is a schematic diagram explaining the shadowing phenomenon that occurs when using FMM to deposit the electrode.

[0136] Reference Figure 6 , Figure 8 and Figure 12 With the first light-emitting layer 222b formed in the opening of the pixel defining layer 119, the mask openings (e.g., 510A and 510B) can be configured to correspond to some pixel groups Pg. Subsequently, when the deposited material formed as the counter electrode is released, due to the shading phenomenon (shading effect), the deposited material will not only be deposited in the mask openings, but also in the peripheral region of the mask openings.

[0137] like Figure 9 As shown, the peripheral region of the mask opening can be a transmissive portion (TA). Components such as sensors using infrared light, visible light, or sound can be positioned below the transmissive portion (TA). That is, because light and / or sound traveling from the component to the outside or from the outside toward the component can be transmitted through the transmissive portion (TA), it is desirable to prevent the deposition of deposited material, including opaque material, to achieve high transmittance of the transmissive portion (TA). According to an exemplary embodiment, when deposited material is deposited on the transmissive portion (TA), the transmittance decreases by approximately 30% or more.

[0138] In an exemplary embodiment, the spacer SPC may be disposed around the opening of the mask M1 to prevent shading. The spacer SPC may be formed to protrude from the pixel defining layer 119 along the thickness direction (Z direction). In this embodiment, the height of the spacer SPC in the thickness direction (Z direction) may be equal to the distance from the upper surface of the pixel defining layer 119 to a surface (e.g., the bottom surface) of the mask M1. In an exemplary embodiment, although in Figure 9 Not shown in the diagram, but the second functional layer 222c (see...) Figure 12 The spacer SPC can be disposed on the pixel defining layer 119. In this embodiment, the height of the spacer SPC in the thickness direction (Z direction) can be equal to the distance from the upper surface of the second functional layer 222c to a surface (e.g., the bottom surface) of the mask M1.

[0139] The pixel defining layer 119 may include at least one organic material selected from benzocyclobutene (“BCB”), PI, polyamide (“PA”), acrylic resin and phenolic resin.

[0140] In an exemplary embodiment, the pixel defining layer 119 and the spacer SPC can be integrally formed using a photosensitive material via a photolithography process. In this embodiment, the pixel defining layer 119 and the spacer SPC can be made of the same material. In this embodiment, the pixel defining layer 119 and the spacer SPC can be formed together by adjusting the exposure amount via a transmissive exposure process (using, for example, a halftone mask or a slit mask). However, the disclosure is not limited thereto; alternatively, the pixel defining layer 119 and the spacer SPC can be formed sequentially or separately. In this embodiment, the pixel defining layer 119 and the spacer SPC can be made of different materials.

[0141] When the spacer SPC is formed of the same material as the pixel defining layer 119, the transmittance can be reduced by only about 2% to about 3%, even if the spacer SPC is deposited in the transmissive portion TA.

[0142] Figure 10 It is shown Figure 6 A diagram showing the planar arrangement of the second mask opening 510B.

[0143] Reference Figure 10 The second mask opening 510B can completely expose the pixel group Pg, which includes multiple second pixels Pa. In this embodiment, the second pair of electrodes 223B formed using the second mask opening 510B can be formed to completely cover the pixel group Pg.

[0144] If the second pair of electrodes 223B is not formed to completely cover the pixel group Pg, the emission state of the pixel group Pg will be unstable or poor. Therefore, for process margin, the second mask opening 510B can be designed to have a size larger than the size of the pixel group Pg. In an exemplary embodiment, it is desirable to minimize the stacking arrangement of the second pair of electrodes 223B and the transmissive portion TA to improve the transmittance of the transmissive portion TA. Therefore, the spacer SPC can be provided at least a portion of the edge of the second pair of electrodes 223B.

[0145] In the following text, reference will be made to Figures 11 to 13 The arrangement relationship between the transmission section TA and the spacer SPC, which are set in the sensor area SA, is described in detail.

[0146] Figure 11 Is with Figure 3 A schematic plan view corresponding to region B is shown, and a portion of the boundary between display region DA and sensor region SA is shown. Figure 12 It is along Figure 11 A schematic cross-sectional view taken from line I-I'. Figure 13 It is along Figure 11 A schematic cross-sectional view taken from lines II-II' and III-III'.

[0147] In an exemplary embodiment, reference is made to... Figure 11 The display device 1 includes a display area DA containing a plurality of first pixels Pm and a sensor area SA containing a plurality of second pixels Pa and a transmissive portion TA. The display device 1 includes a plurality of counter electrodes 223. The counter electrodes 223 may include a plurality of first counter electrodes 223A corresponding to the display area DA and a plurality of second counter electrodes 223B corresponding to the sensor area SA. The shapes of the plurality of first counter electrodes 223A are different from the shapes of the plurality of second counter electrodes 223B. The counter electrodes 223 can be connected to each other, and the thickness of the counter electrodes 223 at the connection portion can be relatively large.

[0148] Each of the first pair of electrodes 223A and the second pair of electrodes 223B can correspond to a pixel group Pg setting.

[0149] A pixel group Pg may include at least one pixel Pa or Pm. Figure 11 An exemplary embodiment of a pixel group Pg comprising four pixels Pa or Pm arranged in two rows is shown. However, the disclosure is not limited thereto. In this embodiment, the number and arrangement of pixels Pa or Pm included in a pixel group Pg can be modified in various ways. For example, in one exemplary embodiment, a pixel group Pg may include three pixels Pa or Pm arranged side by side in a row or eight pixels Pa or Pm arranged in four rows. Here, pixels Pa and Pm may mean sub-pixels that emit red, green, blue, or white light.

[0150] The transmissive portion TA is a region with high light transmittance due to the absence of a display element, and multiple transmissive portions can be configured within the sensor region SA. The transmissive portion TA can be alternately configured with pixel group Pg along a first direction (X direction) and / or a second direction (Y direction). Optionally, the transmissive portion TA can be configured to surround pixel group Pg. Optionally, a second pixel Pa can be configured to surround the transmissive portion TA. In an exemplary embodiment, the transmissive portion TA is a region where the first pair of electrodes 223A and the second pair of electrodes 223B are not configured, and can refer to the region corresponding to the opening 223OP of the pair of electrodes 223 in the sensor region SA.

[0151] The size of the transmissive portion TA can be larger than the size of the emission region of at least one pixel Pa or Pm. For example, the area of ​​each of the plurality of transmissive portions TA can be larger than the area of ​​the emission region of one of the plurality of second pixels Pa or the total area of ​​the emission regions of at least two of the plurality of second pixels Pa. In an exemplary embodiment, the size of the transmissive portion TA can be greater than or equal to the size of a pixel group Pg.

[0152] The first pair of electrodes 223A and the second pair of electrodes 223B can be electrically connected to each other.

[0153] In the first pair of electrodes 223A, the first pair of electrodes 223A that are adjacent to each other in the first direction (X direction) and the second direction (Y direction) can overlap and contact each other at their edges. (Refer to...) Figure 6 The first mask openings 510A are spaced apart by a predetermined distance d3 along the first direction (X direction) and by a predetermined distance d1 along the second direction (Y direction). However, when the deposition material is deposited, due to shading phenomena, the deposition materials can be stacked on top of each other. Therefore, the first pair of electrodes 223A can contact each other in the first direction (X direction) and the second direction (Y direction) and can be electrically connected to the second power supply wiring 170 of the non-display area NDA (see...). Figure 3 ).

[0154] The second pair of electrodes 223B is configured to surround the transmissive portion TA. Among the second pair of electrodes 223B surrounding the transmissive portion TA, the second pair of electrodes 223B arranged adjacent to each other along the edge of the transmissive portion TA can be constructed such that protrusions PT extending from their apex along the first direction (X direction) are stacked and in contact with each other. The interconnected second pair of electrodes 223B can be electrically connected to the second power supply wiring 170 of the non-display area NDA (see...). Figure 3 ).

[0155] In an exemplary embodiment, it is understood that the second pair of electrodes 223B arranged along the first direction (X direction) are spaced apart from each other by a transmission portion TA placed therebetween, and the second pair of electrodes 223B arranged along the second direction (Y direction) are also spaced apart from each other by a transmission portion TA placed therebetween. In this embodiment, it is understood that the second pair of electrodes 223B arranged adjacent to each other in the second direction (Y direction) overlap and contact each other at the protrusion PT.

[0156] In an exemplary embodiment, the first width W1 of the first pair of electrodes 223A disposed in the display area DA in the first direction (X direction) can be larger than the second width W2 of the second pair of electrodes 223B disposed in the sensor area SA in the first direction (X direction). In this embodiment, because the second width W2 is smaller than the first width W1, the separation distance between the second pair of electrodes 223B disposed by means of the transmissive portion TA between the second pair of electrodes 223B can be large. That is, the width Wt of the transmissive portion TA in the first direction (X direction) is larger than the first width W1. Therefore, the area through which light can pass through the transmissive portion TA can be large, and the following inequality can be satisfied: Wt>W1>W2. In an exemplary embodiment, the first length L1 of the first pair of electrodes 223A disposed in the display area DA in the second direction (Y direction) can be smaller than the second length L2 of the second pair of electrodes 223B disposed in the sensor area SA in the second direction (Y direction).

[0157] In an exemplary embodiment, the distance between adjacent first pair of electrodes 223A in the second direction (Y direction) can be significantly smaller than the length dt of the transmission portion TA in the second direction (Y direction).

[0158] To simplify the illustrations and descriptions, Figure 11 An exemplary embodiment is shown in which the first pixel Pm and the second pixel Pa have different sizes or shapes from each other, but the disclosure is not limited thereto. Optionally, the first pixel Pm and the second pixel Pa may have the same size as each other. The spacer SPC may be configured to overlap with at least a portion of the boundary region between the transmissive portion TA and the second pair of electrodes 223B.

[0159] The spacer SPC has a predetermined width and can be configured to at least partially overlap with the boundary region along the first direction (X direction) between the transmission portion TA and the protrusion PT and the boundary region along the second direction (Y direction) between the transmission portion TA and the second pair of electrodes 223B.

[0160] In the following text, reference will be made to Figure 12 and Figure 13 The stacking structure of the display device 1 according to the disclosed exemplary embodiments is described. Figure 12 It is along Figure 11 The schematic cross-sectional view shown by line I-I' is a partial cross-section of the display area DA. Figure 13 It is along Figure 11 The schematic cross-sectional view showing a partial cross-section of the sensor region SA is taken by lines II-II' and III-III'.

[0161] Reference Figure 12 and Figure 13 An exemplary embodiment of the display device 1 includes a display area DA and a sensor area SA. A first pixel Pm is disposed in the display area DA, and a second pixel Pa and a transmissive portion TA are disposed in the sensor area SA.

[0162] In this embodiment, such as Figure 12 As shown, the first pixel Pm may include a main thin-film transistor (TFT), a main storage capacitor (Cst), and a main organic light-emitting diode (OLED). In this embodiment, as... Figure 13 As shown, the second pixel Pa may include an auxiliary thin-film transistor (TFT), an auxiliary storage capacitor (CST), and an auxiliary organic light-emitting diode (OLED). The transmissive portion TA may be included in the second pair of electrodes 223B as a transmissive aperture TAH corresponding to the transmissive portion TA.

[0163] Hereinafter, a structure in which components including those in an exemplary embodiment of the display device 1 are stacked will be described.

[0164] The substrate 100 may include glass or a polymer resin. For example, in an exemplary embodiment, the polymer resin may include PES, PA, PEI, PEN, PET, PPS, PAR, PI, PC, CAP, etc. The substrate 100 including the polymer resin may have flexible, rollable, or bendable properties. The substrate 100 may have a multilayer structure including a layer containing the aforementioned polymer resin and an inorganic layer (not shown).

[0165] A buffer layer 111 may be located on the substrate 100 to reduce or prevent the penetration of foreign substances, moisture, or outside air from the lower part of the substrate 100, and may provide a flat surface on the substrate 100. The buffer layer 111 may comprise inorganic materials (such as oxides or nitrides), organic materials, or inorganic-organic composite materials, and may have a single-layer or multi-layer structure of inorganic and / or organic materials. A barrier layer (not shown) may be further included between the substrate 100 and the buffer layer 111 to prevent the penetration of outside air. In an exemplary embodiment, the buffer layer 111 may comprise silicon oxide (SiO2) or silicon nitride (SiN). x ), or made of silicon oxide (SiO2) or silicon nitride (SiN). x The buffer layer 111 may have a structure in which a first buffer layer 111a and a second buffer layer 111b are stacked.

[0166] In the sensor region SA, a lower metal layer BSM may be disposed between the first buffer layer 111a and the second buffer layer 111b. In an optional exemplary embodiment, the lower metal layer BSM may be disposed between the substrate 100 and the first buffer layer 111a. The lower metal layer BSM may be disposed below the auxiliary thin-film transistor TFT' to prevent the characteristics of the auxiliary thin-film transistor TFT' from being degraded by light emitted from the component 20, etc.

[0167] In an exemplary embodiment, the lower metal layer (BSM) can be connected to the wiring GCL disposed on another layer via contact holes. The lower metal layer (BSM) can receive a constant voltage or signal from the wiring GCL. For example, in an exemplary embodiment, the lower metal layer (BSM) can receive a drive voltage ELVDD or a scan signal. In an exemplary embodiment, the lower metal layer (BSM) can receive a constant voltage or signal, thereby significantly reducing the possibility of electrostatic discharge. The lower metal layer (BSM) may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and / or copper (Cu). The lower metal layer (BSM) can be a single layer or multiple layers of the above materials.

[0168] The main thin-film transistor (TFT) and the auxiliary thin-film transistor (TFT') can be disposed on the buffer layer 111. The main thin-film transistor (TFT) includes a first semiconductor layer A1, a first gate electrode G1, a first source electrode S1, and a first drain electrode D1. The auxiliary thin-film transistor (TFT') includes a second semiconductor layer A2, a second gate electrode G2, a second source electrode S2, and a second drain electrode D2. The main thin-film transistor (TFT) can be connected to the main organic light-emitting diode (OLED) in the display area DA to drive the main OLED. The auxiliary thin-film transistor (TFT') can be connected to the auxiliary OLED' in the sensor area SA to drive the auxiliary OLED'.

[0169] A first semiconductor layer A1 and a second semiconductor layer A2 are disposed on the buffer layer 111 and may include polycrystalline silicon. In an optional exemplary embodiment, the first semiconductor layer A1 and the second semiconductor layer A2 may include amorphous silicon. In another optional exemplary embodiment, the first semiconductor layer A1 and the second semiconductor layer A2 may include an oxide of at least one material selected from indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (Ti), and zinc (Zn). The first semiconductor layer A1 and the second semiconductor layer A2 may include a channel region and source and drain regions doped with impurities.

[0170] The second semiconductor layer A2 may be stacked with the lower metal layer BSM, and the second buffer layer 111b is disposed between the second semiconductor layer A2 and the lower metal layer BSM. In an exemplary embodiment, the width of the second semiconductor layer A2 may be smaller than the width of the lower metal layer BSM. Therefore, when viewed in plan view along the thickness direction (Z direction) of the substrate 100, the second semiconductor layer A2 may generally be stacked with the lower metal layer BSM.

[0171] The first gate insulating layer 112 may be configured to cover the first semiconductor layer A1 and the second semiconductor layer A2. The first gate insulating layer 112 may include an inorganic insulating material, such as silicon oxide (SiO2) or silicon nitride (SiN). x The inorganic insulating layer 112 may be a single layer or multiple layers comprising the aforementioned inorganic insulating materials, such as silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), or zinc oxide (ZnO2).

[0172] The first gate electrode G1 and the second gate electrode G2 are disposed on the first gate insulating layer 112 and are stacked with the first semiconductor layer A1 and the second semiconductor layer A2, respectively. The first gate electrode G1 and the second gate electrode G2 may be a single layer or multiple layers including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc. For example, in an exemplary embodiment, the first gate electrode G1 and the second gate electrode G2 may be a single layer of Mo.

[0173] The second gate insulating layer 113 may be configured to cover the first gate electrode G1 and the second gate electrode G2. The second gate insulating layer 113 may include an inorganic insulating material, such as silicon oxide (SiO2) or silicon nitride (SiN). x The inorganic insulating layer 113 may be a single layer or multiple layers comprising the aforementioned inorganic insulating materials, such as silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), or zinc oxide (ZnO2).

[0174] The first upper electrode CE2 of the main storage capacitor Cst and the second upper electrode CE2' of the auxiliary storage capacitor Cst' can be disposed on the second gate insulating layer 113.

[0175] In the display area DA, the first upper electrode CE2 can be stacked with the first gate electrode G1 below it. The stacked first gate electrode G1 and first upper electrode CE2, along with the second gate insulating layer 113 placed between the first gate electrode G1 and the first upper electrode CE2, can constitute the main storage capacitor Cst. That is, the first gate electrode G1 can be used as the first lower electrode CE1 of the main storage capacitor Cst.

[0176] In the sensor region SA, the second upper electrode CE2' can be stacked with the second gate electrode G2 below it. The stacked second gate electrode G2 and the second upper electrode CE2', along with the second gate insulating layer 113 placed between the second gate electrode G2 and the second upper electrode CE2', can constitute an auxiliary storage capacitor Cst'. The second gate electrode G2 can serve as the second lower electrode CE1' of the auxiliary storage capacitor Cst'.

[0177] The first upper electrode CE2 and the second upper electrode CE2' may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W) and / or copper (Cu), and may be a single layer or multiple layers of the above materials.

[0178] The interlayer insulating layer 115 can be configured to cover the first upper electrode CE2 and the second upper electrode CE2'. The interlayer insulating layer 115 may include silicon oxide (SiO2) or silicon nitride (SiN). x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), zinc oxide (ZnO2), etc.

[0179] Source electrodes S1 and S2, and drain electrodes D1 and D2 can be disposed on the interlayer insulating layer 115. Source electrodes S1 and S2, and drain electrodes D1 and D2 can comprise conductive materials including molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and can be formed as a multilayer or a single layer comprising the aforementioned materials. For example, in an exemplary embodiment, source electrodes S1 and S2, and drain electrodes D1 and D2 can have a Ti / Al / Ti multilayer structure.

[0180] The planarization layer 117 can be configured to cover the source electrodes S1 and S2 and the drain electrodes D1 and D2. The planarization layer 117 can have a flat upper surface, so that the first pixel electrode 221 and the second pixel electrode 221' disposed thereon can be formed flatly.

[0181] The planarization layer 117 can be formed as a single layer or multiple layers made of organic or inorganic materials. In an exemplary embodiment, the planarization layer 117 may include general polymers such as BCB, PI, hexamethyldisiloxane (“HMDSO”), polymethyl methacrylate (“PMMA”), or polystyrene (“PS”), polymer derivatives having phenolic groups, acrylic polymers, imide polymers, aromatic ether polymers, amide polymers, fluorinated polymers, p-xylene polymers, vinyl alcohol polymers, or blends thereof. In an exemplary embodiment, the planarization layer 117 may include silicon oxide (SiO2), silicon nitride (SiN) x Materials such as silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), and zinc oxide (ZnO2) can be used. After forming the planarization layer 117, chemical mechanical polishing can be performed to provide a flat upper surface.

[0182] The opening is defined to extend through the planarization layer 117 to expose one of the first source electrode S1 and the first drain electrode D1 of the main thin-film transistor TFT. The first pixel electrode 221 can be electrically connected to the main thin-film transistor TFT by contacting the first source electrode S1 or the first drain electrode D1 via the opening.

[0183] In an exemplary embodiment, the opening is defined to extend through the planarization layer 117 to expose either the second source electrode S2 or the second drain electrode D2 of the auxiliary thin-film transistor TFT'. Therefore, the second pixel electrode 221' can be electrically connected to the auxiliary thin-film transistor TFT' by contacting either the second source electrode S2 or the second drain electrode D2 via the opening.

[0184] In an exemplary embodiment, the first pixel electrode 221 and the second pixel electrode 221' may include conductive oxides, such as indium tin oxide (“ITO”), indium zinc oxide (“IZO”), zinc oxide (“ZnO”), indium oxide (In2O3), indium gallium oxide (“IGO”), or aluminum zinc oxide (“AZO”). In an optional exemplary embodiment, the first pixel electrode 221 and the second pixel electrode 221' may include a reflective layer comprising silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or combinations thereof. In another optional exemplary embodiment, the first pixel electrode 221 and the second pixel electrode 221' may also include a layer formed of ITO, IZO, ZnO, or In2O3 above / below the reflective layer. For example, in one exemplary embodiment, the first pixel electrode 221 and the second pixel electrode 221' may have an ITO / Ag / ITO stacked structure.

[0185] The pixel defining layer 119 may cover the edges of each of the first pixel electrode 221 and the second pixel electrode 221'. In an exemplary embodiment, the first opening OP1 and the second opening OP2 are defined to extend through the pixel defining layer 119 to overlap with the first pixel electrode 221 and the second pixel electrode 221', respectively, thereby defining the emission regions of pixels Pm and Pa. The pixel defining layer 119 may be used to prevent arcing or the like at the edges of pixel electrodes 221 and 221' by increasing the distance between the edges of pixel electrodes 221 and 221' and the counter electrode 223 on pixel electrodes 221 and 221'. The pixel defining layer 119 may include at least one organic material selected from BCB, PI, PA, acrylic resin, and phenolic resin.

[0186] The first functional layer 222a may be disposed on the pixel electrodes 221 and 221' exposed by the openings OP1 and OP2 of the pixel defining layer 119. The first functional layer 222a may be configured to extend to the upper surface of the pixel defining layer 119. The first functional layer 222a may be a single layer or multiple layers. The first functional layer 222a may be a hole transport layer (“HTL”) with a single-layer structure. Optionally, the first functional layer 222a may include a hole injection layer (“HIL”) and an HTL. The first functional layer 222a may be integrally formed to correspond to the first pixel Pm and the second pixel Pa respectively included in the display area DA and the sensor area SA.

[0187] The first light-emitting layer 222b and the second light-emitting layer 222b' are disposed on the first functional layer 222a, corresponding to the first pixel electrode 221 and the second pixel electrode 221', respectively. The first light-emitting layer 222b and the second light-emitting layer 222b' may include polymer materials or low molecular weight materials, and may emit red light, green light, blue light or white light.

[0188] The second functional layer 222c may be disposed on the first light-emitting layer 222b and the second light-emitting layer 222b'. The second functional layer 222c may be a single layer or multiple layers. The second functional layer 222c may include an electron transport layer (“ETL”) and / or an electron injection layer (“EIL”). The second functional layer 222c may be integrally formed to correspond to the first pixel Pm and the second pixel Pa respectively included in the display area DA and the sensor area SA. Optionally, the first functional layer 222a and / or the second functional layer 222c may be omitted.

[0189] In an exemplary embodiment, the spacer SPC may be disposed on the second functional layer 222c. In an exemplary embodiment, the spacer SPC may comprise or be made of the same material as the pixel defining layer 119. In this embodiment, the spacer SPC may comprise at least one organic material selected from BCB, PI, PA, acrylic resin, and phenolic resin.

[0190] According to an exemplary embodiment, the spacer SPC can be disposed between the transmissive portion TA and the second opening OP2, and can be configured to overlap with at least a portion of the transmissive portion TA. When the spacer SPC is formed of the same material as the pixel defining layer 119, even if the spacer SPC is deposited on the transmissive portion TA, the transmittance can be reduced by only about 2% to about 3%.

[0191] Counter electrode 223 may be disposed on a portion of the second functional layer 222c and the spacer SPC. Counter electrode 223 may include a conductive material having a low work function. For example, in an exemplary embodiment, counter electrode 223 may include a (semi-)transparent layer comprising silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), alloys thereof, etc. Optionally, counter electrode 223 may also include a layer such as ITO, IZO, ZnO, or In2O3 on the (semi-)transparent layer comprising the aforementioned materials.

[0192] In an exemplary embodiment, as described above, the counter electrode 223 includes a first pair of electrodes 223A disposed in the display area DA and a second pair of electrodes 223B disposed in the sensor area SA.

[0193] In the first pair of electrodes 223A, the first pair of electrodes 223A adjacent to each other can be at their edges ( Figure 12 The electrodes are stacked and in contact with each other in region R1. The stacked portion can be formed between the first pixels Pm. In the second pair of electrodes 223B, the second pair of electrodes 223B adjacent to each other can be formed in the protrusion PT ( Figure 13 The electrodes 223 are stacked and in contact with each other in region R2). It is understood that the thickness of the counter electrode 223 in the stacked region is greater than the thickness of the central region of each of the first pair of electrodes 223A and the second pair of electrodes 223B.

[0194] In an exemplary embodiment, some of the second pairs of electrodes 223B may be separated from each other in the sensor region SA, and the transmission portion TA is located between the second pairs of electrodes 223B. According to an exemplary embodiment, at least a portion of the second pairs of electrodes 223B may be configured to be stacked with the spacer SPC, and may not be disposed on the transmission portion TA.

[0195] In this embodiment, the separation space between the second pair of electrodes 223B can be understood as an opening 223OP of the electrode 223, which can be a transmission aperture TAH through which light is transmitted. The width Wt of the transmission aperture TAH can be larger than the width Wa of the emission region defined by the second opening OP2 of the pixel defining layer 119.

[0196] In this embodiment, the transmittance at the transmission portion TA can be substantially increased due to the formation of the transmission hole TAH that passes through the counter electrode 223 corresponding to the transmission portion TA.

[0197] Although not shown, a capping layer may be disposed on the counter electrode 223 to improve light extraction efficiency while protecting the counter electrode 223. The capping layer may include LiF. Optionally, the capping layer may include an inorganic insulating material such as silicon nitride, and / or may include an organic insulating material. Optionally, the capping layer may be omitted.

[0198] Optional exemplary embodiments will be described below. In the embodiments below, any repeated detailed descriptions of components that are the same as or similar to those in the above embodiments will be omitted or simplified, and the differences will be mainly described.

[0199] Figure 14 It is based on an optional exemplary embodiment and Figure 3 A schematic plan view corresponding to region B is shown, and a portion of the boundary between display region DA and sensor region SA is shown.

[0200] Reference Figure 14 In an exemplary embodiment, with Figure 11 Unlike the embodiment where the spacer SPC is only disposed in a portion of the opening 223OP of the second pair of electrodes 223B, the spacer SPC_1 is disposed entirely along the boundary of the opening 223OP of the second pair of electrodes 223B.

[0201] In this embodiment, each of the plurality of second pairs of electrodes 223B has a rectangular shape including a protrusion PT projecting from its four vertices along a first direction (X direction). The transmission portion TA surrounded by the plurality of second pairs of electrodes 223B may also have a rectangular shape. In this embodiment, the spacer SPC_1 may have a predetermined width and may be disposed entirely along the perimeter of the rectangular shape of the transmission portion TA.

[0202] Therefore, when using mask M1 to deposit the material, the likelihood of depositing the material onto the transmission portion TA can be further reduced. In this embodiment, the likelihood of the second pair of electrodes 223B being disposed in the transmission portion TA can be further reduced.

[0203] Figure 15 A mask M2 for forming counter electrode 223_1 is shown according to another optional exemplary embodiment. Figure 16 It is shown Figure 15 A diagram showing the planar arrangement of the second mask opening 510B_1. Figure 17 It is according to another optional exemplary embodiment and Figure 3 A schematic plan view corresponding to region B is shown, and a portion of the boundary between display region DA and sensor region SA is shown.

[0204] Reference Figures 15 to 17 The shape of the second mask opening 510B_1 is similar to... Figure 6 The illustrated embodiment differs from the actual embodiment; therefore, the shape of the spacer SPC_2 is also altered, and it is similar to... Figure 10 and Figure 11 The embodiments shown are different.

[0205] In this embodiment, reference is made to... Figure 15 A first mask opening 510A and a second mask opening 510B_1, which have different shapes from each other, are defined in the mask M2.

[0206] The first mask opening 510A may be a rectangular shape having a first mask width MW1 in the first direction (X direction) and a first mask length ML1 in the second direction (Y direction).

[0207] The second mask opening 510B_1 may include a rectangular opening having a second mask width MW2_1 in a first direction (X direction) and a second mask length ML2_1 in a second direction (Y direction), and may also include an expansion aperture EH extending from the apex of the rectangular opening along the first direction (X direction). The second mask width MW2_1 may mean the width passing through the center of the second mask opening 510B_1 in the first direction (X direction). In this embodiment, the first mask width MW1 may be larger than the second mask width MW2_1.

[0208] In this embodiment, the second mask opening 510B_1 may further include a bend RD located at the intersection of the region of the expansion hole EH extending in the first direction (X direction) and the region of the rectangular opening extending in the second direction (Y direction).

[0209] The first mask opening 510A and the second mask opening 510B_1 can be arranged sequentially along the second direction (Y direction). Figure 15For simplicity, the first mask opening 510A and the second mask opening 510B_1 are shown arranged in two rows. However, the first mask opening 510A and the second mask opening 510B_1 can also be arranged along the second direction (Y direction) at a predetermined interval. In this embodiment, the distance d1 between adjacent first mask openings 510A in the second direction (Y direction) can be greater than the first mask length ML1, and the distance d2 between adjacent second mask openings 510B_1 in the second direction (Y direction) can be smaller than the second mask length ML2_1.

[0210] A plurality of first mask openings 510A and a plurality of second mask openings 510B_1 can be provided, and each of the first mask openings 510A and the second mask openings 510B_1 can be arranged in a row along a first direction (X direction) at predetermined intervals. In an exemplary embodiment, the distance d3 between adjacent first mask openings 510A in the first direction (X direction) can be smaller than the first mask width MW1, and the distance d4 between the expansion holes EH of adjacent second mask openings 510B_1 in the first direction (X direction) can be smaller than the width MW2' between the expansion hole EH provided at one end of the second mask opening 510B_1 and the expansion hole EH provided at the other end of the second mask opening 510B_1.

[0211] In this embodiment, mask M2 can be used for depositing counter electrode 223_1 (see...). Figure 17 The mask can be an FMM (fiber-coated metal sheet). An FMM can be manufactured by forming holes in a metal sheet and then stretching the metal sheet. Therefore, the first mask opening 510A and the second mask opening 510B_1 can be formed symmetrically with respect to an axis passing through the center of the mask opening in a first direction (X direction) or an axis passing through the center of the mask opening in a second direction (Y direction).

[0212] The first mask opening 510A for forming the first pair of electrodes 223A may have a size less than or equal to the size of the first pair of electrodes 223A. The second mask opening 510B_1 for forming the second pair of electrodes 223B_1 may have a size less than or equal to the size of the second pair of electrodes 223B_1.

[0213] Figure 16 It is shown Figure 15 A diagram showing the planar arrangement of the second mask opening 510B_1.

[0214] Reference Figure 15 and Figure 16The second mask opening 510B_1 can completely expose the pixel group Pg, which includes a plurality of second pixels Pa. In this embodiment, the second pair of electrodes 223B_1 formed using the second mask opening 510B_1 can be formed to completely cover the pixel group Pg.

[0215] If the second pair of electrodes 223B_1 is not formed to completely cover the pixel group Pg, the emission state of the pixel group Pg will be unstable or poor. Therefore, in an exemplary embodiment, for process margin, the second mask opening 510B_1 can be designed to have a size larger than the size of the pixel group Pg. In an exemplary embodiment, the second mask opening 510B_1 may also include a bend RD located at the intersection of the region of the expansion aperture EH extending in the first direction (X direction) and the region of the rectangular opening extending in the second direction (Y direction). When forming patterns on an FMM, it is a process of forming patterns with very small dimensions. Therefore, it is difficult to form the designed pattern. The bend RD may be an error occurring at a corner.

[0216] In this embodiment, it is desirable to minimize the stacking arrangement of the second pair of electrodes 223B_1 and the transmission portion TA_1 to improve the transmittance of the transmission portion TA_1. Therefore, the spacer SPC_2 can be configured to correspond to the bend RD, which is an error occurring at the corner portion.

[0217] Figure 17 It is according to another optional exemplary embodiment and Figure 3 A schematic plan view corresponding to region B is shown, and a portion of the boundary between display region DA and sensor region SA is shown.

[0218] In an exemplary embodiment, reference is made to... Figure 17 The display device 1 includes a display area DA containing a plurality of first pixels Pm and a sensor area SA containing a plurality of second pixels Pa and a transmissive portion TA_1, and includes a plurality of counter electrodes 223_1. The counter electrodes 223_1 may include a plurality of first counter electrodes 223A corresponding to the display area DA and a plurality of second counter electrodes 223B_1 corresponding to the sensor area SA. The shapes of the plurality of first counter electrodes 223A may differ from the shapes of the plurality of second counter electrodes 223B_1. The counter electrodes 223_1 may be connected to each other, and the thickness of the counter electrodes 223_1 at the connection points may be greater.

[0219] Each of the first pair of electrodes 223A and the second pair of electrodes 223B_1 can correspond to a pixel group Pg setting.

[0220] A pixel group Pg may include at least one pixel Pa or Pm. Figure 17A pixel group Pg is shown comprising four pixels Pa or Pm arranged in two rows. However, the disclosure is not limited thereto. In this embodiment, the number and arrangement of pixels Pa or Pm included in a pixel group Pg can be modified in various ways. For example, in an exemplary embodiment, a pixel group Pg may include three pixels Pa or Pm arranged side by side in a row or eight pixels Pa or Pm arranged in four rows. Here, pixels Pa and Pm may mean sub-pixels that emit red, green, blue, or white light.

[0221] The transmissive portion TA_1 is a region with high light transmittance due to the absence of a display element, and multiple transmissive portions can be configured within the sensor region SA. The transmissive portion TA_1 can be alternately configured with pixel group Pg along a first direction (X direction) and / or a second direction (Y direction). Optionally, the transmissive portion TA_1 can be configured to surround pixel group Pg. Optionally, a second pixel Pa can be configured to surround the transmissive portion TA_1. In this embodiment, the transmissive portion TA_1 is a region where the first pair of electrodes 223A and the second pair of electrodes 223B_1 are not configured, and can refer to the region corresponding to the opening 223OP_1 of the electrode 223_1 in the sensor region SA.

[0222] The size of the transmissive portion TA_1 can be larger than the size of the emission region of at least one pixel Pa or Pm. In an exemplary embodiment, the size of the transmissive portion TA_1 can be greater than or equal to the size of a pixel group Pg.

[0223] The first pair of electrodes 223A and the second pair of electrodes 223B_1 can be electrically connected to each other.

[0224] In the first pair of electrodes 223A, the first pair of electrodes 223A that are adjacent to each other in the first direction (X direction) and the second direction (Y direction) can overlap and contact each other at their edges. (Refer to...) Figure 15 The first mask openings 510A are spaced apart by a predetermined distance d3 along the first direction (X direction) and by a predetermined distance d1 along the second direction (Y direction). However, when the deposition material is deposited, due to shading phenomena, the deposition materials can be stacked on top of each other. Therefore, the first pair of electrodes 223A can contact each other in the first direction (X direction) and the second direction (Y direction) and can be electrically connected to the second power supply wiring 170 of the non-display area NDA (see...). Figure 3The second pair of electrodes 223B_1 is configured to surround the transmissive portion TA_1. Among the second pair of electrodes 223B_1 surrounding the transmissive portion TA_1, the second pair of electrodes 223B_1 arranged adjacent to each other along the edge of the transmissive portion TA_1 can be constructed such that protrusions PT extending from the apex along the first direction (X direction) are stacked and in contact with each other. The interconnected second pair of electrodes 223B_1 can be electrically connected to the second power supply wiring 170 of the non-display area NDA (see...). Figure 3 ).

[0225] In an exemplary embodiment, the second pair of electrodes 223B_1 may further include a bend RD located at the intersection of the region of the protrusion PT extending in the first direction (X direction) and the region of the rectangular shape of the second pair of electrodes 223B_1 extending in the second direction (Y direction). The spacer SPC_2 may have a triangular shape and may be configured to at least partially overlap with the bend RD.

[0226] In this embodiment, it is understood that the second pair of electrodes 223B_1 arranged along the first direction (X direction) are spaced apart from each other by a transmission portion TA_1 placed therebetween, and the second pair of electrodes 223B_1 arranged along the second direction (Y direction) are also spaced apart from each other by a transmission portion TA_1 placed therebetween. In this case, it is understood that the second pair of electrodes 223B_1 arranged adjacent to each other in the second direction (Y direction) overlap and contact each other at the protrusion PT.

[0227] The invention should not be construed as limited to the exemplary embodiments set forth herein. Rather, these exemplary embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the inventive concept to those skilled in the art.

[0228] Although the invention has been specifically shown and described with reference to exemplary embodiments thereof, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit or scope of the invention as defined by the claims.

Claims

1. A display device, the display device comprising: The substrate includes a display area and a sensor area, the display area including a plurality of first pixels, and the sensor area including a plurality of second pixels and a plurality of transmissive portions; Multiple first pairs of electrodes are respectively configured for the multiple first pixels; Multiple pairs of electrodes are respectively configured for the multiple second pixels; as well as A spacer is configured to overlap at least a portion of the boundary region between a transmissive portion of the plurality of transmissive portions and a second pair of electrodes of the plurality of second pairs of electrodes, wherein the transmissive portions of the plurality of transmissive portions and the second pairs of electrodes of the plurality of second pairs of electrodes are adjacent to each other. The second pair of electrodes is disposed on the upper surface of the spacer at the edge of the transmission portion.

2. The display device according to claim 1, wherein, The spacer comprises at least one organic material selected from benzocyclobutene, polyimide, polyamide, acrylic resin and phenolic resin.

3. The display device according to claim 1, further comprising: A component is disposed below one of the plurality of transmissive portions. The components include sensors for sensing infrared light, visible light, or sound.

4. The display device according to claim 1, wherein, The area of ​​each of the plurality of transmissive portions is larger than the area of ​​the emission region of one of the plurality of second pixels or the total area of ​​the emission regions of at least two of the plurality of second pixels.

5. The display device according to claim 1, wherein, The number of second pixels per unit area is smaller than the number of first pixels per unit area.

6. The display device according to claim 1, wherein, The plurality of first pairs of electrodes and the plurality of second pairs of electrodes are electrically connected to each other.

7. The display device according to claim 1, wherein, Each of the plurality of first pairs of electrodes has a first rectangular shape, the first rectangular shape having a first width in a first direction and a first height in a second direction intersecting the first direction, and Each of the plurality of second pairs of electrodes has a second rectangular shape, the second rectangular shape having protrusions extending from the four vertices of the second rectangular shape in the first direction, and The second rectangular shape has a second width in the first direction and a second height in the second direction.

8. The display device according to claim 7, wherein, The first width is larger than the second width, and The first height is smaller than the second height.

9. The display device according to claim 8, wherein, Each of the plurality of transmissive portions has a third rectangular shape surrounded by a corresponding second pair of electrodes among the plurality of second pairs of electrodes.

10. The display device according to claim 9, wherein, The third rectangular shape has a third width in the first direction and a third height in the second direction.

11. The display device according to claim 10, wherein, The third width is larger than the first width and the second width.

12. The display device according to claim 9, wherein, The spacer has a predetermined width, and The spacer is configured to at least partially overlap with the boundary region along the first direction between the transmissive portion and the protrusion of the second pair of electrodes, and the boundary region along the second direction between the transmissive portion and the second rectangular shape of the second pair of electrodes.

13. The display device according to claim 9, wherein, The spacer has a predetermined width, and The spacer is positioned along the perimeter of the third rectangular shape.

14. The display device according to claim 7, wherein, Each of the plurality of second pairs of electrodes further includes a bend located at the intersection of the region of the protrusion extending in the first direction and the region of the second rectangular shape extending in the second direction.

15. The display device according to claim 14, wherein, The spacer has a triangular shape, and The spacer is configured to overlap at least partially with the curved portion.

16. The display device according to claim 7, wherein, Of the plurality of first pairs of electrodes, the first pairs of electrodes adjacent in the first direction overlap each other at the edge of the first rectangular shape, and Of the plurality of second pairs of electrodes, the second pairs of electrodes adjacent to each other along the edge of the transmission portion are stacked on top of each other at the protrusion.

17. The display device according to claim 7, wherein, Of the plurality of second pairs of electrodes, the second pairs of electrodes that are adjacent in the second direction are spaced apart from each other.

18. The display device according to claim 7, wherein, The substrate also includes a non-display area, which is configured to surround the display area and the sensor area.

19. The display device according to claim 18, wherein, Power wiring extending in the second direction is disposed on the non-display area of ​​the substrate.

20. The display device according to claim 19, wherein, The plurality of second pairs of electrodes are electrically connected to the power supply wiring.

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