Device and method for load detection

Abstract

The present disclosure relates to a device and method for load detection. A device for load detection includes: a current comparison circuit for: detecting a current at a port for connecting a load; determining a change in the current at the port based on the detected current; and generating a current comparison output signal based on the change; and a detection signal generation circuit for generating a detection signal based on the current comparison output signal, the detection signal indicating whether a new load is connected to the port.

Description

Technical Field

[0001] The present disclosure relates to the field of load detection, and more particularly, to a device and method for load detection. Background Art

[0002] Before a charging device such as a charger for a mobile device enters a charging mode (i.e., charging a load to be charged), it is first necessary to detect whether a load to be charged is connected to the charging device, i.e., whether the load to be charged is in a connected state. The conventional method for detecting the connection state of a load is to determine whether a load to be charged is connected to the charging device by detecting a change in a certain voltage or current of the charging device (e.g., a voltage or current at a port of the charging device for connecting to a load) relative to a reference voltage or current. However, this detection method cannot obtain a correct detection result in some cases. For example, when one end of a charging cable is connected to a charging device and the other end of the charging cable is not connected to a load to be charged, since the charging cable itself has a circuit (e.g., a protocol circuit, etc.), the charging device will regard the charging cable as a load to be charged in a connected state. Since the average current of the load of the charging cable is very small (generally less than 2 mA), the charging device will then determine that the load has been fully charged and thus terminate the charging mode, and will determine that the load has not been disconnected from the charging device (i.e., still in a connected state, but not in a disconnected state), which will result in the charging device being unable to identify the load to be charged when the other end of the charging cable is connected to the load to be charged. Summary of the invention

[0003] In view of the above problems, the present disclosure provides a novel device and method for load detection.

[0004] According to one aspect of an embodiment of the present disclosure, there is provided a device for load detection, comprising: a current comparison circuit, for: detecting a current at a port for connecting a load; determining a change in the current at the port based on the detected current; and generating a current comparison output signal based on the change; and a detection signal generating circuit, for generating a detection signal based on the current comparison output signal, the detection signal indicating whether a new load is connected to the port.

[0005] In an example embodiment, the current comparison circuit is further configured to: compare the change with a predetermined current change threshold; and generate the current comparison output signal based on a result of the comparison.

[0006] In an example embodiment, the detection signal generating circuit includes: a timing module, a reset terminal of the timing module is connected to the output terminal of the current comparison circuit via a delay module to receive a delayed current comparison output signal; a logic gate, an input terminal of the logic gate is connected to the output terminal of the current comparison circuit and the output terminal of the timing module, and the logic gate is used to: generate an output signal of the logic gate based on the current comparison output signal and a signal from the output terminal of the timing module; and a detection signal generating module, which is used to generate the detection signal based on the output signal of the logic gate.

[0007] In an example embodiment, the timing module includes a timer, the logic gate includes an AND gate, and the detection signal generating module includes a D flip-flop.

[0008] In an example embodiment, the apparatus further includes a filtering circuit connected between the current comparison circuit and the detection signal generation circuit, for filtering the current comparison output signal.

[0009] In an example embodiment, the filter circuit includes a filter resistor and a filter capacitor.

[0010] According to another aspect of an embodiment of the present disclosure, a method for load detection is provided, comprising: detecting a current at a port for connecting a load; determining a change in the current at the port based on the detected current; generating a current comparison output signal based on the change; and generating a detection signal based on the current comparison output signal, the detection signal indicating whether a new load is connected to the port.

[0011] In an example embodiment, generating a current comparison output signal based on the change includes: comparing the change with a predetermined current change threshold; and generating the current comparison output signal based on a result of the comparison.

[0012] In an example embodiment, generating a detection signal based on the current comparison output signal includes: inputting the current comparison output signal to a reset terminal of a timing module via a delay module; inputting the current comparison output signal and a signal from an output terminal of the timing module to a logic gate; and generating the detection signal based on an output signal of the logic gate.

[0013] In an example embodiment, the timing module includes a timer, the logic gate includes an AND gate, and the detection signal is generated by a D flip-flop based on an output signal of the logic gate.

[0014] In an example embodiment, the method further includes filtering the current comparison output signal, wherein generating the detection signal based on the current comparison output signal includes generating the detection signal based on the filtered current comparison output signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The present disclosure may be better understood from the following description of specific embodiments of the present disclosure in conjunction with the accompanying drawings, in which:

[0016] Figure 1 A schematic structural diagram of a device for load detection according to an embodiment of the present disclosure is shown;

[0017] Figure 2 A schematic structural diagram of a device for load detection according to another embodiment of the present disclosure is shown;

[0018] Figure 3 A schematic diagram showing the state switching of a load according to an embodiment of the present disclosure; and

[0019] Figure 4 A flow chart of a method for load detection according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0020] The features and exemplary embodiments of various aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. Example implementations can be implemented in a variety of forms and should not be construed as limited to the implementations set forth herein; rather, these implementations are provided to make the present disclosure more comprehensive and complete and to fully convey the concepts of the example implementations to those skilled in the art. In the accompanying drawings, the sizes of regions and components may be exaggerated for clarity. In addition, in the accompanying drawings, the same reference numerals represent the same or similar structures, and their detailed descriptions will be omitted.

[0021] In addition, the described features, structures, or characteristics may be combined in one or more embodiments in any suitable manner. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present disclosure. However, those skilled in the art will appreciate that the technical solutions of the present disclosure may be implemented without one or more of the specific details, or other methods, components, materials, etc. may be adopted. In other cases, well-known structures, materials, or operations are not shown or described in detail to avoid blurring the main technical ideas of the present disclosure.

[0022] Exemplary embodiments of the present disclosure are described in detail below with reference to the accompanying drawings.

[0023] Figure 1FIG. 1 is a schematic diagram of a structure of a device 100 for load detection according to an embodiment of the present disclosure. The device 100 can be applied to a charging device (e.g., a charger for a mobile device), a read / write device (e.g., a read / write device for reading / writing from / to a mobile device), etc., and the present disclosure does not limit this. Figure 1 As shown, a device 100 for load detection according to an embodiment of the present disclosure may include a current comparison circuit 101 and a detection signal generation circuit 102 .

[0024] The current comparison circuit 101 can be used to detect the current at a port (e.g., a charging port in a charger of a mobile device) for connecting a load (e.g., a mobile device), determine the change of the current at the port based on the detected current, and generate a current comparison output signal based on the determined change of the current. In an example embodiment, the current comparison circuit 101 can also be used to compare the determined change of the current with a predetermined current change threshold, and generate a current comparison output signal based on the comparison result.

[0025] The detection signal generating circuit 102 can be used to generate a detection signal based on the current comparison output signal generated by the current comparison circuit 101, and the detection signal indicates whether a new load is connected to the port. In an example embodiment, the detection signal generating circuit 102 may include a timing module, a logic gate, and a detection signal generating module. The reset terminal of the timing module can be connected to the output terminal of the current comparison circuit 101 via a delay module to receive the delayed current comparison output signal. The input terminal of the logic gate can be connected to the output terminal of the current comparison circuit 101 and the output terminal of the timing module, and the logic gate can be used to: generate the output signal of the logic gate based on the current comparison output signal and the signal from the output terminal of the timing module. The detection signal generating module can be used to generate a detection signal based on the output signal of the logic gate. As an example, the timing module may include a timer, the logic gate may include an AND gate, and the detection signal generating module may include a D flip-flop.

[0026] In an example embodiment, the device 100 for load detection may further include a filter circuit (not shown in the figure), connected between the current comparison circuit 101 and the detection signal generation circuit 102, for filtering the current comparison output signal to filter out the change in the current at the port caused by interference. As an example, the filter circuit may include a filter resistor and a filter capacitor.

[0027] Figure 2FIG. 2 is a schematic diagram of a structure of a device 200 for load detection according to another embodiment of the present disclosure. The device 200 can be applied to a charging device (e.g., a charger for a mobile device), a read / write device (e.g., a read / write device for reading / writing from / to a mobile device), etc., and the present disclosure does not limit this. Figure 2 As shown, a device 200 for load detection according to an embodiment of the present disclosure may include a current comparison circuit 201 and a detection signal generation circuit 202 .

[0028] The current comparison circuit 201 can be used to detect the current at a port (e.g., a charging port in a charger of a mobile device) for connecting a load (e.g., a mobile device), determine a change in the current at the port based on the detected current, and generate a current comparison output signal based on the determined change in the current. In an example embodiment, the current comparison circuit 201 can also be used to compare the determined change in the current with a predetermined current change threshold, and generate a current comparison output signal based on the comparison result. As an example, Figure 2 As shown, the current comparison circuit 201 may include P-channel metal oxide semiconductor field effect (PMOS) transistors M2 - M5 , NMOS transistors M6 - M9 , a resistor R1 , and a capacitor C1 .

[0029] The detection signal generating circuit 202 can be used to generate a detection signal based on the current comparison output signal generated by the current comparison circuit 201, and the detection signal indicates whether a new load is connected to the port. In an exemplary embodiment, the detection signal generating circuit 202 may include a timing module, a logic gate, and a detection signal generating module. The reset terminal of the timing module may be connected to the output terminal of the current comparison circuit 201 via a delay module to receive the delayed current comparison output signal. The input terminal of the logic gate may be connected to the output terminal of the current comparison circuit 201 and the output terminal of the timing module, and the logic gate may be used to generate an output signal of the logic gate based on the current comparison output signal and a signal from the output terminal of the timing module. The detection signal generating module may be used to generate a detection signal based on the output signal of the logic gate. As an example, the timing module may include: Figure 2 As shown in the timer, the logic gates may include Figure 2 The AND gate shown in FIG. 1 may include a detection signal generating module as shown in FIG. Figure 2 The D flip-flop shown.

[0030] In an exemplary embodiment, the apparatus 200 for load detection may further include a filter circuit 203 connected between the current comparison circuit 201 and the detection signal generation circuit 202, and configured to filter the current comparison output signal to filter out the change in the current at the port caused by interference. Figure 2 As shown, the filter circuit 203 may include a filter resistor R2 and a filter capacitor C2.

[0031] In an exemplary embodiment, the apparatus 200 for load detection may further include a floating voltage generating circuit 204 connected to the current comparison circuit 201 and the port, for generating a floating voltage and sensing a load current. Figure 2 As shown, the floating voltage generating circuit 204 may include an amplifier A0, a PMOS transistor M1, a resistor R0, and a constant current source with a current of I0. The floating voltage V generated by the floating voltage generating circuit 204 flt It can be obtained by the following formula:

[0032] V flt =V ref +I 0 ×R 0

[0033] Among them, V ref Represents the reference voltage input to amplifier A0.

[0034] Combine the following Figure 3 The schematic diagram of the load state switching is shown in FIG. Figure 2 The device 200 for load detection shown is described in further detail.

[0035] When the load is not connected to the port (for example, the port is not plugged in), the switches SW1 and SW2 are turned off, and the voltage at the port is equal to the floating voltage. The current generated by the PMOS transistors M3 and M5 of the current comparison circuit 201 is equal to the current generated by the NMOS transistors M7 and M9. Due to the existence of the constant current source with the current Iref, the current comparison output signal Comp_out of the current comparison circuit 201 is 0 (because the difference between the current generated by M3 and M5 and the current generated by M7 and M9 is less than Iref), so the timer starts timing until it is full and paused. When the timer is full, the output Det_en of the timer module is 1, and the current comparison output signal Comp_out is allowed to be transmitted to the D flip-flop via the logic AND gate. Otherwise, if Det_en=0, the current comparison output signal Comp_out is blocked from being transmitted to the D flip-flop. Figure 2The initial value of the output signal of the D flip-flop in the detection signal generation circuit 202, that is, the detection signal Det_out generated by the detection signal generation circuit 202 is 0, that is, Det_out=0, indicating that no load is detected to be connected to the device 200. Therefore, when Det_en=1, it means that the device 200 is ready to detect the connection of the load (for example, detect the insertion action of the load), and the state of the load at this time can be called the "unplugged state". It should be noted that the "unplugged state" here does not necessarily mean that the load is physically disconnected from the port.

[0036] When a load is connected to a port (e.g., an insertion port), the equivalent resistance of the load will draw load current from the PMOS transistor M1 of the floating voltage generating circuit 204. This current is transmitted to M2 and M3 through M1, and the current change on M2 generates a voltage rise at the gate of M8. This voltage rise is then transmitted to M9 through R1 and C1, and then causes a current change on M9. Due to the existence of the time constant Tau1=R1xC1, the current change on M9 is smaller than the current change on M3 within a period of time (e.g., 1 to 2 Tau1s). If the difference between the current change on M3 and the current change on M9 is greater than Iref, the current comparison output signal Comp_out will change from the previous logic 0 to logic 1, that is, Comp_out=1. Since Det_en=1, the current comparison output signal Comp_out=1 (i.e., the rising edge of Comp_out) can be detected by Figure 2 The logic AND gate in the D flip-flop reaches the D flip-flop, and triggers the D flip-flop to latch the state Det_out=1, which indicates that the device 200 detects that a load is connected to the device 200 (for example, the insertion action of the load is detected). In addition, the current comparison output signal Comp_out=1 can be input to the reset terminal of the timer through the logic OR gate after passing through the delay module to reset the timer, so as to ensure that the current comparison output signal Comp_out=1 passes Figure 2 After the logic AND gate in the D flip-flop reaches the D flip-flop, the current comparison output signal Comp_out is blocked from passing through this logic AND gate.

[0037] like Figure 2 As shown, Isense may represent the detected average current of the load, and when the average current of the load is greater than the exit current detection threshold Iexit (e.g., 10 mA), the state of the load may be referred to as a "connected state". For example, in the context of the device 200 being applied to a charging device (e.g., a charger for a mobile device), when it is detected that the load is in a "connected state", the charging device may charge the load, and the voltage at the port will be determined by the charging device.

[0038] It should be noted that, as described above, the filter circuit 203 may include a filter resistor R2 and a filter capacitor C2 for filtering out current changes at the port caused by interference, wherein the time constant Tau2=R2xC2 needs to be much smaller than the time constant Tau1 so that the current comparison output signal Comp_out reflecting the current change can pass through the filter circuit 203.

[0039] As mentioned above, the current comparison circuit 201 can be used to detect the change of the current at the port, compare the change of the current with a predetermined current change threshold, and generate a current comparison output signal based on the comparison result, wherein the predetermined current change threshold can be expressed as Figure 3 The minimum detectable current change ΔI shown in min , which satisfies the following formula:

[0040] ΔI min =k1×I ref +k2×ΔI min

[0041] therefore, Among them, k1 can represent the gain brought by the current mirror composed of M1~M9, It should be noted that in Figure 2 In the illustrated embodiment, since the change of the current at the port will cause the current change on M3 and M9, the current comparison circuit 201 generates a current comparison output signal based on the change of the current at the port. This can be achieved by generating a current comparison output signal based on the current change on M3 and M9.

[0042] When the average load current gradually decreases until it is less than or equal to Iexit, the current detection module in the device 200 can generate a positive pulse, which can generate a low-level wide pulse signal clr (for example, a pulse width of 100ms) after passing through the shielding pulse generator to reset the D flip-flop, so that the detection signal Det_out becomes logic 0, that is, Det_out = 0. For example, in a scenario where the device 200 is applied to a charging device (for example, a charger for a mobile device), Det_out = 0 can indicate that the load is fully charged. In addition, the low-level wide pulse signal clr can also be input to the reset end of the timer through a logic OR gate after passing through an inverter to reset the timer, so that Det_en = 0. In addition, the inverted signal of the low-level wide pulse signal clr and the inverted signal of the current comparison output signal Comp_out can generate a signal Vpdwn through a logic AND gate. When Vpdwn is logic 1, the switch SW2 is turned on. As Figure 2As shown, the switch SW2 and the resistor R4 can form a pull-down path to discharge the capacitor outside the port during the shielding time (i.e., clr=0) until the voltage at the port reaches near the floating voltage. At this time, the floating voltage generating circuit 204 can stabilize the voltage at the port at the following voltage value: the difference between the floating voltage and the voltage on R3 and M10. During this period, the switch SW1 is also turned on, thereby grounding the gate of M9, so that M9 will not affect the port during this shielding time. After the low-level wide pulse signal clr=0 ends, the timer starts timing. This timing time is the time to determine that the voltage at the port stably reaches the floating voltage. During this period, the state of the load can be called the "exit state". When the timer is full, Det_en=1, indicating that the device 200 is ready to detect the connection of the load again (for example, detect the next insertion action of the load), that is, the load returns to the "unplugged state".

[0043] For example, in a situation where the device for load detection according to an embodiment of the present disclosure is applied to a charging device (e.g., a charger for a mobile device), when one end of a charging cable is connected to the charging device and the other end of the charging cable is not connected to a load to be charged, the device for load detection according to an embodiment of the present disclosure first detects the charging cable in an "unplugged state" (before being connected to the charging device) as a load to be charged in a "connected state" (because the current change of the port caused by the connection of the charging cable to the charging device is greater than or equal to a predetermined current change threshold, i.e., the minimum detectable current change amount ΔI min ), and then the load is judged to be in the "exit state" when the load average current Isense is less than or equal to the exit current detection threshold Iexit, and the load is judged to be in the "unplugged state" after the timer ends (the "unplugged state" here does not mean that the load is physically disconnected from the port).

[0044] Subsequently, if the other end of the charging cable is connected to a load to be charged, the device for load detection according to an embodiment of the present disclosure can determine that a new load to be charged is connected to the charging device by determining that a certain voltage or current of the charging device (for example, the voltage or current at the port of the charging device for connecting the load) relative to the voltage or current in the previous state (that is, relative to the voltage or current in the state where only the charging cable is connected to the charging device, rather than relative to a fixed reference voltage or current) changes by more than a predetermined current change threshold, that is, it determines that the load has changed from the "unplugged state" to the "connected state", thereby starting the charging mode. Similarly, the device for load detection according to an embodiment of the present disclosure can then determine that the load is in the "exit state" when the load average current Isense is less than or equal to the exit current detection threshold Iexit, and will determine that the load is in the "unplugged state" after the timer ends.

[0045] The device for load detection according to the embodiment of the present disclosure can repeat the load detection process as described above. The schematic diagram of the load state switching is as shown in FIG. Figure 3 shown.

[0046] Figure 4 FIG. 1 is a flow chart of a method for load detection according to an embodiment of the present disclosure. Figure 4 As shown, in step 401, the current at the port for connecting the load is detected. In step 402, the change of the current at the port is determined based on the detected current. In step 403, a current comparison output signal is generated based on the change. In an example implementation, generating the current comparison output signal based on the change includes: comparing the change with a predetermined current change threshold; and generating the current comparison output signal based on the comparison result. In step 404, a detection signal is generated based on the current comparison output signal, and the detection signal indicates whether a new load is connected to the port. In an example implementation, generating the detection signal based on the current comparison output signal includes: inputting the current comparison output signal to the reset terminal of the timing module via a delay module; inputting the current comparison output signal and the signal from the output terminal of the timing module to a logic gate; and generating the detection signal based on the output signal of the logic gate. In an example implementation, the timing module includes a timer, the logic gate includes an AND gate, and the detection signal is generated by a D flip-flop based on the output signal of the logic gate. In an example implementation, as Figure 4 The method for load detection shown further includes: filtering the current comparison output signal, wherein generating the detection signal based on the current comparison output signal in step 404 includes: generating the detection signal based on the filtered current comparison output signal.

[0047] The method for load detection according to one embodiment of the present disclosure corresponds to the above-mentioned method in combination with Figure 1-Figure 3 The device for load detection according to the embodiment of the present disclosure is described in detail, and certain details will not be repeated for the sake of brevity.

[0048] Therefore, according to an embodiment of the present disclosure, a device and method for load detection can determine whether a new load to be charged is connected to the charging device based on the change in the voltage or current at the port for connecting the load relative to the voltage or current in the previous state, thereby enabling accurate load detection.

[0049] The present disclosure may be implemented in other specific forms without departing from its spirit and essential characteristics. Therefore, the current embodiments are considered to be illustrative and not restrictive in all aspects, the scope of the present disclosure is defined by the appended claims rather than the above description, and all changes falling within the meaning and equivalent scope of the claims are thus included in the scope of the present disclosure.

Claims

1. A device for load detection, include: a floating voltage generating circuit connected to a port for connecting a load, for generating a floating voltage and sensing a load current, wherein the floating voltage generating circuit comprises a P-channel metal oxide semiconductor (PMOS) transistor, wherein when a load is not connected to the port, a voltage at the port is equal to the floating voltage; A current comparison circuit, comprising a plurality of PMOS transistors and a plurality of N-channel metal oxide semiconductor (NMOS) transistors, wherein a portion of the plurality of PMOS transistors are connected to the PMOS transistor in the floating voltage generating circuit, and the current comparison circuit is used to: Determine the change of the current at the port based on the difference between the current changes in one of the plurality of PMOS transistors and one of the plurality of NMOS transistors using the PMOS transistor in the floating voltage generating circuit and the plurality of PMOS transistors and the plurality of NMOS transistors in the current comparison circuit; and generating a current comparison output signal based on the change; and The detection signal generating circuit is used to generate a detection signal based on the current comparison output signal, wherein the detection signal indicates whether a new load is connected to the port.

2. The device according to claim 1, in, The current comparison circuit is also used for: comparing the change to a predetermined current change threshold; and The current comparison output signal is generated based on a result of the comparison.

3. The device according to claim 1, in, The detection signal generating circuit comprises: A timing module, wherein a reset terminal of the timing module is connected to an output terminal of the current comparison circuit via a delay module to receive a delayed current comparison output signal; a logic gate, the input of the logic gate being connected to the output of the current comparison circuit and the output of the timing module, the logic gate being configured to generate an output signal of the logic gate based on the current comparison output signal and a signal from the output of the timing module; and A detection signal generating module is used to generate the detection signal based on the output signal of the logic gate.

4. The device according to claim 3, in, The timing module includes a timer, the logic gate includes an AND gate, and the detection signal generating module includes a D flip-flop.

5. The device according to claim 1, further comprising: include: The filter circuit is connected between the current comparison circuit and the detection signal generation circuit, and is used for filtering the current comparison output signal.

6. The device according to claim 5, in, The filter circuit includes a filter resistor and a filter capacitor.

7. A method for load detection, include: Determine the change of current at the port based on the difference between the current change on one of the plurality of PMOS transistors and one of the plurality of NMOS transistors by using a P-channel metal oxide semiconductor (PMOS) transistor in a floating voltage generating circuit connected to a port for connecting a load and a plurality of PMOS transistors and a plurality of N-channel metal oxide semiconductor (NMOS) transistors in a current comparison circuit connected to the floating voltage generating circuit, wherein the floating voltage generating circuit is used to generate a floating voltage and sense a load current, and when a load is not connected to the port, the voltage at the port is equal to the floating voltage, and a part of the plurality of PMOS transistors are connected to the PMOS transistors in the floating voltage generating circuit; generating a current comparison output signal based on the change; and A detection signal is generated based on the current comparison output signal, the detection signal indicating whether a new load is connected to the port.

8. The method according to claim 7, in, Generating a current comparison output signal based on the change includes: comparing the change to a predetermined current change threshold; and The current comparison output signal is generated based on a result of the comparison.

9. The method according to claim 7, in, Generating a detection signal based on the current comparison output signal comprises: Inputting the current comparison output signal to the reset terminal of the timing module via the delay module; inputting the current comparison output signal and the signal from the output terminal of the timing module into a logic gate; and The detection signal is generated based on an output signal of the logic gate.

10. The method according to claim 9, in, The timing module includes a timer, the logic gate includes an AND gate, and the detection signal is generated by a D flip-flop based on an output signal of the logic gate.

11. The method according to claim 7, further comprising: include: filtering the current comparison output signal, Wherein, generating a detection signal based on the current comparison output signal includes: generating a detection signal based on a filtered current comparison output signal.

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