Semiconductor device package and method of manufacturing the same

Abstract

A semiconductor device package includes a substrate, a first antenna, and a second antenna. The substrate has a first surface and a second surface opposite the first surface. A first antenna radiation pattern is disposed over the first surface of the substrate. The first antenna radiation pattern has a first bandwidth. The first antenna radiation pattern has a first port configured to produce a magnetic field. A second antenna radiation pattern is disposed over the first surface of the substrate. The second antenna radiation pattern has a second bandwidth different from the first bandwidth. An extension of an edge of the first antenna radiation pattern parallel to the magnetic field produced by the first port of the first antenna radiation pattern is spaced apart from the second antenna radiation pattern.

Description

Technical Field

[0001] This disclosure relates to a semiconductor device package and a method of manufacturing the same, and to a semiconductor device package including an antenna and a method of manufacturing the same. Background Technology

[0002] For example, mobile phones and other wireless communication devices typically contain antennas for transmitting and receiving radio frequency (RF) signals. In recent years, with the development of mobile communications and the urgent need for high data rates and stable communication quality, relatively high-frequency wireless transmission (e.g., 28 GHz or 60 GHz) has become one of the most important issues in the mobile communications industry. However, signal attenuation and interference are among the problems associated with relatively high-frequency (or relatively short-wavelength) wireless transmission. Summary of the Invention

[0003] According to some embodiments of this disclosure, a semiconductor device package includes a substrate, a first antenna, and a second antenna. The substrate has a first surface and a second surface opposite to the first surface. A first antenna pattern is disposed above the first surface of the substrate. The first antenna pattern has a first bandwidth. The first antenna pattern has a first port configured to generate a magnetic field. A second antenna pattern is disposed above the first surface of the substrate. The second antenna pattern has a second bandwidth different from the first bandwidth. An extension line of the edge of the first antenna pattern, parallel to the magnetic field generated by the first port of the first antenna pattern, is spaced apart from the second antenna pattern.

[0004] According to some embodiments of this disclosure, a semiconductor device package includes a substrate, a first antenna, and a second antenna. The substrate has a first surface and a second surface opposite to the first surface. A first antenna pattern is disposed above the first surface of the substrate. The first antenna pattern has a first port configured to generate a magnetic field. A second antenna pattern is disposed above the first surface of the substrate. The first antenna pattern and the second antenna pattern are arranged in the same plane. A protrusion of the side surface of the first antenna pattern adjacent to the first port is spaced apart from the second antenna pattern. Attached Figure Description

[0005] Figure 1A A cross-sectional view of a semiconductor device package according to some embodiments of the present disclosure is shown.

[0006] Figure 1B A top view illustrating a semiconductor device package according to some embodiments of the present disclosure.

[0007] Figure 2A A cross-sectional view of a semiconductor device package according to some embodiments of the present disclosure is shown.

[0008] Figure 2B A top view illustrating a semiconductor device package according to some embodiments of the present disclosure.

[0009] Figure 2C A top view illustrating a semiconductor device package according to some embodiments of the present disclosure.

[0010] Figure 3 A top view illustrating a semiconductor device package according to some embodiments of the present disclosure.

[0011] Figure 4 A top view illustrating a semiconductor device package according to some embodiments of the present disclosure.

[0012] Figure 5 A top view illustrating a semiconductor device package according to some embodiments of the present disclosure.

[0013] Common reference numerals are used throughout the drawings and detailed description to indicate the same or similar components. This disclosure will be readily understood from the following detailed description taken in conjunction with the accompanying drawings. Detailed Implementation

[0014] Figure 1A A cross-sectional view of a semiconductor device package 1 according to some embodiments of the present disclosure is shown. Figure 1B Description of some embodiments according to this disclosure Figure 1A The top view of semiconductor device package 1 described in the figure (for clarity, in...) Figure 1B omitted in Figure 1A (Some components in the package). The semiconductor device package 1 includes a substrate 10, a conductive layer 11, a dielectric layer 12, and antenna patterns 13 and 14.

[0015] Substrate 10 may be, for example, a printed circuit board, such as a paper-based copper foil laminate, a composite copper foil laminate, or a polymer-impregnated glass fiber-based copper foil laminate. Substrate 10 may include interconnect structures (or electrical connections), such as a redistribution layer (RDL) or a grounding element. Substrate 10 has a surface 101 and a surface 102 opposite to surface 101. In some embodiments, one or more electronic components (not shown in the figures) are disposed on surface 102 of substrate 10 and electrically connected to substrate 10. In some embodiments, the electronic components may be active electronic components, such as integrated circuit (IC) chips or dies. The electronic components may be electrically connected to substrate 10 (e.g., electrically connected to the RDL) by means of flip-chip or wire bonding techniques.

[0016] A conductive layer 11 is disposed on the surface 101 of the substrate 10. In some embodiments, the conductive layer 11 is formed of or contains gold (Au), silver (Ag), aluminum (Al), copper (Cu), or an alloy thereof. In some embodiments, the conductive layer 11 serves as a ground layer or RF layer of the antenna pattern 13 or 14.

[0017] A dielectric layer 12 is disposed on the conductive layer 11. In some embodiments, the dielectric layer 12 is used to increase the distance (e.g., a gap region) between the antenna pattern 13 or 14 and the conductive layer 10a (e.g., a ground plane or RF layer), which improves the performance of the antenna pattern 13 or 14. In some embodiments, any number of dielectric layers may be present depending on different specifications. The dielectric layer 12 has a surface 121 and a surface 122 opposite to the surface 121.

[0018] In some embodiments, dielectric layer 12 may comprise molding material, prepreg composite fibers (e.g., a prepreg), borosilicate glass (BPSG), silicon oxide, silicon nitride, silicon oxynitride, undoped silicate glass (USG), or any combination thereof. Examples of molding material may include, but are not limited to, epoxy resin containing fillers dispersed therein. Examples of prepreg may include, but are not limited to, a multilayer structure formed by stacking or laminating several prepreg materials / sheets. In some embodiments, the dielectric constant (Dk) of dielectric layer 12 is about 3.63.

[0019] Antenna patterns 13 and 14 are disposed on surface 121 of dielectric layer 12. In some embodiments, such as Figure 1A As shown, antenna pattern 13 includes a feed port 13f electrically connected to conductive layer 11 to transmit or receive signals from conductive layer 11. Antenna pattern 14 includes a feed port 14f electrically connected to conductive layer 11 to transmit or receive signals from conductive layer 11. In other embodiments, signal transmission between antenna pattern 13 (or antenna pattern 14) and conductive layer 11 can be achieved through coupling. In some embodiments, antenna pattern 13 or 14 is or comprises a conductive material such as a metal or metal alloy. Examples of conductive materials include Au, Ag, Al, Cu, or alloys thereof.

[0020] In some embodiments, antenna pattern 13 or 14 may comprise a single antenna element. In some embodiments, antenna pattern 13 or 14 may comprise multiple antenna elements. For example, antenna pattern 13 or 14 may comprise an array with patch antennas. In some embodiments, antenna pattern 13 or 14 may comprise an M×N array of antenna elements, where M or N is an integer greater than 1. In some embodiments, M may be the same as or different from N depending on design specifications. For example, such as Figure 1BAs shown, antenna pattern 13 may comprise a 1×2 array of antenna elements, and antenna pattern 14 may comprise a 1×2 array of antenna elements. Antenna patterns 13 and 14 are arranged alternately. For example, one antenna element of antenna pattern 13 may be located between two adjacent antenna elements of antenna pattern 14, and vice versa. In some embodiments, antenna pattern 13 is or includes a patch antenna or patch antenna array operating at a frequency of 38 GHz. For example, the bandwidth of antenna pattern 13 is in the range of about 37 GHz to about 42.5 GHz. In some embodiments, antenna pattern 14 is or includes a patch antenna or patch antenna array operating at a frequency of 28 GHz. For example, the bandwidth of antenna pattern 14 is in the range of about 24.75 GHz to about 27.5 GHz.

[0021] according to Figure 1A and 1B In one embodiment, the semiconductor device package 1 is a dual-band antenna module having two antenna patterns (e.g., antenna patterns 13 and 14) with different operating bandwidths, which increases the stability of the bandwidth and transmission rate of the semiconductor device package 1.

[0022] Figure 2A A cross-sectional view of a semiconductor device package 2 according to some embodiments of the present disclosure is shown. Figure 2B Description of some embodiments according to this disclosure Figure 2A The top view of semiconductor device package 2 described in the figure (for clarity, in...) Figure 2B Some components of the aforementioned components (e.g., dielectric layers 12, 22 and antenna patterns 23 and 24) are omitted. The semiconductor device package 2 is similar to... Figure 1A The semiconductor device package 1 shown is described below, and the differences therebetween are described in detail below.

[0023] Each antenna element of antenna patterns 13 and 14 in semiconductor device package 1 is single-polarized, while each antenna element of antenna patterns 13 and 14 in semiconductor device package 2 is dual-polarized. For example, as Figure 1B As shown, each antenna element of antenna pattern 13 has a polarization port (e.g., p2 or p4), and each antenna element of antenna pattern 14 has a polarization port (e.g., p1 or p3). Figure 2B As shown, each antenna element of antenna pattern 13 has a pair of polarization ports (e.g., "p2 and p6" or "p4 and p8"), and each antenna element of antenna pattern 14 has a pair of polarization ports (e.g., "p1 and p5" or "p3 and p7"). In some embodiments, such as Figure 2AAs shown, antenna pattern 13 includes feed ports 13f and 13f1 electrically connected to conductive layer 11 to transmit or receive signals from conductive layer 11. Antenna pattern 14 includes feed ports 14f and 14f1 electrically connected to conductive layer 11 to transmit or receive signals from conductive layer 11. In other embodiments, signal transmission between antenna pattern 13 (or antenna pattern 14) and conductive layer 11 can be achieved through coupling. In other embodiments, each antenna element of antenna patterns 13 and 14 of semiconductor device package 2 may have single polarization.

[0024] The semiconductor device package 2 further includes stacked antenna patterns 23 and 24 on antenna patterns 13 and 14. For example, such as Figure 2A As shown, the semiconductor device package 2 includes a dielectric layer 22 disposed on antenna patterns 13 and 14. In some embodiments, dielectric layer 22 is the same as or similar to dielectric layer 12, and the properties and description of dielectric layer 12 may be applied to dielectric layer 22. Antenna patterns 23 and 24 are disposed on dielectric layer 22. Antenna pattern 23 is arranged to correspond to antenna pattern 13. For example, antenna pattern 23 is substantially aligned with antenna pattern 13. For example, antenna patterns 13 and 23 substantially completely overlap in a direction perpendicular to surface 121 of dielectric layer 12. Antenna pattern 23 is magnetically coupled to antenna pattern 13 for signal transmission. Antenna pattern 24 is arranged to correspond to antenna pattern 14. For example, antenna pattern 24 is substantially aligned with antenna pattern 14. For example, antenna patterns 14 and 24 substantially completely overlap in a direction perpendicular to surface 121 of dielectric layer 12. Antenna pattern 24 is magnetically coupled to antenna pattern 14 for signal transmission. In some embodiments, antenna patterns 23 and 24 are the same as or similar to antenna patterns 13 and 14, and the properties and descriptions of antenna patterns 13 and 14 apply to antenna patterns 23 and 24.

[0025] Compared to the antenna pattern 13 or 14 with a single polarization port in semiconductor device package 1, the antenna pattern 13 or 14 with a dual polarization port in semiconductor device package 2 has a wider bandwidth and a more stable transmission rate. Furthermore, stacking two sets of antenna patterns with the same or similar bandwidth (e.g., stacking antenna patterns 23 and 24 on top of antenna patterns 13 and 14) can further increase the bandwidth of semiconductor device package 2.

[0026] like Figure 2BAs shown, port p2 of the antenna element of antenna pattern 13 will generate two polarized radiations / waves, such as magnetic field M2 and electric field E2 (magnetic field M2 and electric field E2 are orthogonal), and port p6 of the antenna element of antenna pattern 13 will generate two polarized radiations / waves, such as magnetic field M6 and electric field E6 (magnetic field M6 and electric field E6 are orthogonal). The polarized waves / radiations emitted by antenna pattern 13 (e.g., magnetic field M6 and / or electric field E2) will pass through antenna pattern 14, which will adversely affect the performance of antenna pattern 13, and vice versa.

[0027] Figure 2C Description of some embodiments according to this disclosure, such as Figure 2A The top view of semiconductor device package 2 shown (for clarity, in...) Figure 2C Some components of the aforementioned components (e.g., dielectric layers 12, 22 and antenna patterns 23, 24) are omitted. In other embodiments, Figure 2C The structure described herein can be as follows: Figure 1A The top view of semiconductor device package 1 shown. Figure 2C The structure described in the text is similar to Figure 2B The structure in is different in Figure 2C In this configuration, each antenna element of antenna patterns 13 and 14 (and antenna patterns 23 and 24) is rotated 45° counterclockwise. For example, the extension of any edge of the antenna element of antenna patterns 13 and 14 will not be perpendicular to or parallel to the extension of any edge of the surface 101 of substrate 10 (or the surface 121 of dielectric layer 12). For example, the extension of the edge of antenna pattern 13 parallel to the magnetic field M2 (or M6) generated by port p2 (or p6) of antenna pattern 13 is spaced apart from antenna pattern 14. For example, the extension of the edge of antenna pattern 13 parallel to the magnetic field M2 (or M6) generated by port p2 (or p6) of antenna pattern 13 does not pass through antenna pattern 14. For example, the protrusions of the side surface of antenna pattern 13 adjacent to port p2 (or p6) are spaced apart from antenna pattern 14. For example, the protrusions of the side surface of antenna pattern 13 adjacent to port p2 (or p6) do not pass through antenna pattern 14.

[0028] like Figure 2C As shown, all polarized radiations E2, E6, M2, and M6 generated by the antenna elements of antenna pattern 13 will not pass through antenna patterns with different bandwidths (e.g., antenna pattern 14) or antenna patterns with the same bandwidth (e.g., other antenna elements of antenna pattern 13), thus eliminating or reducing interference between antenna patterns 13 and 14. This will increase the gain of antenna patterns 13 and 14 and improve their performance.

[0029] In some embodiments, antenna patterns 13 and 14 have different phases. For example, antenna pattern 13 may delay (or lead) antenna pattern 14 by a phase φ, where φ is greater than 0° and less than 180°. In some embodiments, antenna pattern 14 leads antenna pattern 13 by 60°. Due to the phase difference between antenna patterns 13 and 14, interference between antenna patterns 13 and 14 can be further reduced, which can increase the gain of antenna patterns 13 and 14.

[0030] In some embodiments, antenna patterns 13 or 14 may have different shapes. For example, such as Figure 1B and 2B As shown, each antenna element in antenna pattern 13 or 14 is rectangular. For example, as... Figure 2C and 5 As shown, each antenna element in antenna pattern 13 or 14 can be shaped into a rhombus. For example, as... Figure 3 As shown, each antenna element in antenna pattern 13 or 14 can be shaped into a cross. For example, as... Figure 4 As shown, each antenna element of antenna pattern 13 or 14 can be shaped into an "X". The shapes of antenna patterns 13 and 14 can be changed or adjusted depending on different design requirements. For example, antenna patterns 13 and 14 can be shaped into polygons with N edges (or sides), where N is an integer equal to or greater than 3.

[0031] In some embodiments, antenna patterns 13 or 14 (and antenna patterns 23 or 24) may comprise any number of alternately arranged antenna elements. For example, antenna pattern 13 or 14 may comprise an M×N array of antenna elements, where M or N is an integer greater than 1. In some embodiments, M may be the same as or different from N depending on design specifications. For example, such as Figure 2B , 2C As shown in Figures 3 or 4, antenna pattern 13 may include a 1×2 array of antenna elements, and antenna pattern 14 may include a 1×2 array of antenna elements. For example, as... Figure 5 As shown, antenna pattern 13 may include a 3×4 array of antenna elements, and antenna pattern 14 may include a 3×4 array of antenna elements.

[0032] As used herein, the terms “approximately,” “substantially,” “about,” and “approximately” are used to indicate and explain small variations. For example, when used in conjunction with numerical values, the terms may refer to a range of variation less than or equal to ±10% of the stated value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. As another example, “substantially uniform” film or layer thickness may refer to a standard deviation of less than or equal to ±10% of the average thickness of the film or layer, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. The term "substantially coplanar" can refer to two surfaces extending along the same plane within a few micrometers, such as within 40 μm, 30 μm, 20 μm, 10 μm, or 1 μm. If the angle between two surfaces or components is, for example, 90° ± 10°, or ± 5°, ± 4°, ± 3°, ± 2°, ± 1°, ± 0.5°, ± 0.1°, or ± 0.05°, then the two surfaces or components can be considered "substantially perpendicular." When used in conjunction with an event or situation, the terms "substantially," "basically," "approximately," and "about" can refer to examples where the event or situation occurs precisely, and examples where the event or situation occurs very approximately.

[0033] As used herein, unless the context clearly indicates otherwise, the singular terms “a / an” and “the” may include multiple indicators. In the description of some embodiments, the description of a component being disposed “on” or “above” another component may cover the case where the preceding component is directly on the following component (e.g., in physical contact with the following component), and the case where one or more intermediate components are located between the preceding and following components.

[0034] As used herein, the terms “conductivity,” “electricity,” and “conductivity” refer to the ability to conduct electric current. Conductive materials typically indicate those that exhibit very little or no resistance to current flow. One measure of conductivity is Siemens per meter (S / m). Generally, conductive materials have a conductivity greater than approximately 10. 4 S / m (e.g., at least 10) 5 S / m or at least 10 6 A material with conductivity of S / m. The conductivity of a material can sometimes vary with temperature. Unless otherwise specified, the conductivity of the material is measured at room temperature.

[0035] Additionally, quantities, ratios, and other values ​​are sometimes presented in range format in this document. It should be understood that such range format is for convenience and brevity and should be interpreted flexibly, including not only values ​​explicitly specified as range limits, but also all individual values ​​or subranges covered within the range, as if each value and subrange were explicitly specified.

[0036] Although this disclosure has been described and illustrated with reference to specific embodiments thereof, such descriptions and illustrations are not limiting of this disclosure. It will be readily understood by those skilled in the art that various changes can be made and equivalent elements can be substituted within embodiments without departing from the true spirit and scope of this disclosure as defined by the appended claims. The illustrations may not be drawn to scale. Differences may exist between the technical representation in this disclosure and actual equipment due to variables in the manufacturing process, etc. Other embodiments of this disclosure may exist that are not specifically described. The description and drawings should be considered illustrative rather than restrictive. Modifications may be made to adapt particular circumstances, materials, composition, methods, or processes to the objectives, spirit, and scope of this disclosure. All such modifications are intended to be within the scope of the appended claims. While the methods disclosed herein have been described with reference to specific operations performed in a particular order, it should be understood that these operations may be combined, subdivided, or reordered to form equivalent methods without departing from the teachings of this disclosure. Therefore, the order and grouping of operations are not limited by this disclosure unless specifically indicated herein.

Claims

1. A semiconductor device package comprising: A substrate having a first surface and a second surface opposite to the first surface; A first antenna pattern is disposed above the first surface of the substrate, the first antenna pattern having a first bandwidth, and the first antenna pattern having a first port configured to generate a magnetic field. and A second antenna pattern is disposed above the first surface of the substrate, and the second antenna pattern has a second bandwidth different from the first bandwidth. The first antenna pattern and the second antenna pattern are arranged on the same plane, and The extension line of the edge of the first antenna pattern, which is parallel to the magnetic field generated by the first port of the first antenna pattern, is spaced apart from the second antenna pattern.

2. The semiconductor device package according to claim 1, wherein the first antenna pattern and the second antenna pattern are arranged alternately.

3. The semiconductor device package according to claim 1, wherein... The first surface of the substrate has an edge; The extension line of the edge of the first antenna pattern defines an angle with the extension line of the edge of the first surface of the substrate; and The angle is greater than 0° and less than 90°.

4. The semiconductor device package according to claim 1, wherein The second antenna pattern has a first port configured to generate a magnetic field; and The extension line of the edge of the second antenna pattern, which is parallel to the magnetic field generated by the first port of the second antenna pattern, is parallel to the extension line of the edge of the first antenna pattern.

5. The semiconductor device package of claim 1, further comprising a conductive layer disposed on the first surface of the substrate and electrically connected to the first antenna pattern and the second antenna pattern.

6. The semiconductor device package of claim 5, wherein the conductive layer is a ground layer or a radio frequency layer.

7. The semiconductor device package of claim 5, further comprising a first dielectric layer disposed on the conductive layer and a conductive via within the first dielectric layer, wherein the conductive via electrically connects the first antenna pattern or the second antenna pattern to the conductive layer.

8. The semiconductor device package according to claim 1, further comprising: A second dielectric layer is disposed on the first antenna pattern and the second antenna pattern; The third antenna pattern is disposed on the second dielectric layer; and The fourth antenna pattern is disposed on the second dielectric layer. The third antenna pattern has the first bandwidth, and the fourth antenna pattern has the second bandwidth.

9. The semiconductor device package according to claim 8, wherein The third antenna pattern is aligned with the first antenna pattern in a direction perpendicular to the first surface of the substrate; and The fourth antenna pattern is aligned with the second antenna pattern in a direction perpendicular to the first surface of the substrate.

10. The semiconductor device package of claim 1, wherein each of the first antenna pattern and the second antenna pattern comprises an M×N array of antenna elements, wherein M or N is an integer greater than 1.

11. The semiconductor device package of claim 10, wherein each antenna element of the first antenna pattern and the second antenna pattern is shaped as a rectangle, a rhombus, or a cross.

12. The semiconductor device package of claim 1, further comprising an electronic component disposed on the second surface of the substrate and electrically connected to the first antenna pattern and / or the second antenna pattern.

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