Intelligent semiconductor switch

Abstract

This document describes an integrated circuit that can be used as a smart semiconductor switch. According to one embodiment, the integrated circuit includes a first power transistor coupled between a power supply pin and a first output pin, and a second power transistor coupled between a power supply pin and a second output pin. Both the first and second power transistors have intrinsic body diodes that allow reverse conduction. The integrated circuit also includes control circuitry configured to trigger the first and second power transistors to turn on and off based on a first input signal and a second input signal, respectively. Furthermore, the integrated circuit includes protection circuitry configured to detect a transition from a reverse conduction state to a forward conduction state or from a forward conduction state to a reverse conduction state for both the first and second power transistors, and to generate an error signal upon detecting a transition from a reverse conduction state to a forward conduction state for the second power transistor and a transition from a forward conduction state to a reverse conduction state for the first power transistor.

Description

Technical Field

[0001] This invention relates to the field of intelligent semiconductor switches. Background Technology

[0002] In many applications, semiconductor switches are used to turn electrical loads on and off. Semiconductor switches that include supplementary circuitry in addition to electronic switches (such as power transistors) are often referred to as smart electronic switches or simply smart switches. Examples of supplementary circuitry include temperature sensors for detecting over-temperature, load current sensors for measuring the load current through the switch, control logic that generates control signals to trigger on / off switching based on input signals and measured parameters (such as measured current and temperature), and interface circuitry for outputting the measured parameters.

[0003] In various applications, smart switches are increasingly being used to replace traditional fuses. Smart switches that can be used as fuse replacements may be referred to as smart fuses or electronic fuses. Such smart switches may include circuitry configured to monitor measured load current and trigger a switch that depends on the load current and a characteristic curve representing the wire characteristics connecting the smart switch and the electrical load. The wire characteristics determine when the control circuitry should disconnect the load from the power supply if the estimated wire temperature (relative to ambient temperature) exceeds a specified limit. Additionally, the aforementioned supplementary circuitry included in the smart switch can provide load current limiting functionality.

[0004] A smart switch with two or more output channels may include two or more power transistors, which may cause problems in some applications, such as when the voltage at the output node of one of the channels increases (e.g., due to a short circuit or any other fault) to a voltage higher than the nominal operating voltage of the connected load. Summary of the Invention

[0005] This document describes an integrated circuit that can be used as a smart switch. According to one embodiment, the integrated circuit includes a first power transistor coupled between a power supply pin and a first output pin, and a second power transistor coupled between a power supply pin and a second output pin. Each of the first and second power transistors has an intrinsic body diode that allows reverse conduction. The integrated circuit also includes control circuitry configured to trigger the first and second power transistors to turn on and off based on a first input signal and a second input signal, respectively. Furthermore, the integrated circuit includes protection circuitry configured to detect a transition from a reverse conduction state to a forward conduction state or from a forward conduction state to a reverse conduction state for both the first and second power transistors, and to generate an error signal upon detecting a transition from a reverse conduction state to a forward conduction state for the second power transistor and a transition from a forward conduction state to a reverse conduction state for the first power transistor.

[0006] Furthermore, this document describes a method for switching loads. According to one embodiment, the method includes turning on a first power transistor and a second power transistor connected back-to-back based on an input signal. Each of the first and second power transistors has an intrinsic body diode that allows reverse conduction. The method also includes providing a load current to a load connected to the second power transistor. When a transition from a reverse conduction state to a forward conduction state in the second power transistor and a transition from a forward conduction state to a reverse conduction state in the first power transistor are detected, an error signal for transmitting error information is generated. Attached Figure Description

[0007] The invention can be better understood by referring to the following figures and description. The components in the figures are not necessarily scaled; rather, the focus is on illustrating the principles of the invention. Furthermore, in the figures, similar reference numerals denote corresponding parts. In the figures:

[0008] Figure 1 A general example of a smart switch is shown.

[0009] Figure 2 An example of a circuit arrangement is shown where a DC / DC converter provides multiple loads via multiple smart switches.

[0010] Figure 3 A smart switch with two output channels is shown, in which the output of one output channel is boosted to a high voltage (above the power supply voltage of the smart switch), thereby causing reverse conduction.

[0011] Figure 4 A novel configuration is shown. Figure 3 A smart switch in which no power pin is connected, the power supply voltage is applied to the output of one output channel, and the load is connected to the output of another output channel.

[0012] Figure 5 It shows Figure 4 The smart switch is in a reverse conduction state.

[0013] Figure 6 It shows Figure 4 and Figure 5 Timing diagram of the behavior of the smart switch during reverse conduction and detection of reverse output current.

[0014] Figure 7 An example of a current sensing circuit that can be used to sense the load current through a transistor is shown.

[0015] Figure 8 An example of detecting the reverse conduction of a transistor using a corresponding current sensing signal is shown.

[0016] Figure 9 An example of detecting reverse conduction in a transistor by monitoring the corresponding drain-source voltage is shown.

[0017] Figure 10 More details are shown Figure 4 Examples.

[0018] Figure 11 This is a flowchart illustrating an example of a method for detecting reverse conduction in a smart switch. Detailed Implementation

[0019] In the following detailed description, reference is made to the accompanying drawings. The drawings form part of the specification and, for illustrative purposes, illustrate examples of how the invention can be used and practiced. Figure 1 A general example of an integrated smart switch circuit (hereinafter referred to as smart switch 1) is shown. Smart switch 1 may be integrated into a single semiconductor die arranged in a chip package. However, in some embodiments, smart switch 1 may include two or more semiconductor dies arranged in a chip package.

[0020] according to Figure 1 The smart switch 1 includes an electronic switch 2, which can be a power transistor, such as a MOS transistor. A DMOS transistor can be used as a power transistor. Although the example discussed herein uses a MOS transistor as the power transistor 2, it should be understood that a bipolar transistor can be used instead. Those skilled in the art will not find it problematic to apply the concepts described herein to bipolar transistors. The power transistor 2 is coupled between the power supply pin SUP and the output pin OUT of the smart switch 1. Therefore, the power transistor 2 can connect the output pin OUT to the power supply pin SUP when it is turned on. Similarly, the power transistor 2 can disconnect the output pin OUT from the power supply pin SUP when it is turned off. In other words, the power transistor 2 can be activated according to the gate signal V applied to the gate electrode of the transistor. G This enables and disables the load current path between the power supply pin SUP and the output pin OUT. It's understood that if a bipolar transistor is used as a power transistor, the transistor turns on and off based on the base current, not the gate voltage.

[0021] exist Figure 1 In the example, the gate signal V G Provided by gate drive circuit 5, the gate drive circuit is configured to respond to control signal S ON Output gate signal V G This control signal is a binary signal, which can only be assumed to be high (e.g., indicating ON) and low (e.g., indicating OFF). Control signal S ONProvided by logic circuitry (also known as control logic 3). Control logic 3 may include combinational and sequential logic circuitry, as well as synchronous and asynchronous circuitry. Control logic 3 is configured to operate based on the input signal S received at the input pin IN of the smart switch. IN And other parameters to trigger the switching on and off of transistor 2 (by generating a control signal S with an appropriate logic level). ON Input signal S IN It can be supplied by an external (separate from smart switch 1) circuit (e.g., in...) Figure 1 The example shows a microcontroller labeled μC.

[0022] It should be noted that it is not necessary to receive the input signal S at the input pin of the smart switch. IN In some embodiments, the smart switch may have a digital communication interface, such as a Serial Peripheral Interface (SPI), which allows receiving data including on and off commands (e.g., from a microcontroller). In these embodiments, the smart switch may include generating an input signal S. IN The input signal S is set according to the on and off commands received via the digital communication interface. IN A circuit device with logic levels.

[0023] For example, in generating a control signal S with a specific logic level ON Other parameters that can be processed by control logic 3 may include measured values ​​representing chip temperature, measured values ​​representing load current, configurable thresholds (e.g., over-temperature thresholds), etc. The load current i output to load Z at the output pin OUT can be measured by current sensing circuit 20. L For example, the current sensing circuit 20 may include a sensing transistor coupled to the power transistor 2 and operating at the same operating point. Current sensing using a sensing transistor is known to those skilled in the art and therefore will not be discussed in detail herein. For example, the power transistor may consist of a cell array of multiple transistor cells, wherein one or more transistor cells in the cell array may be used to form the sensing transistor. In a simple embodiment, the current sensing circuit may include a current sensing resistor connected between the load terminal (e.g., the source terminal) and the output pin OUT of the transistor 2. In this case, the voltage drop across the current sensing resistor represents the load current and can be used as the current sensing signal. Another example of the parameters mentioned above is a current threshold that can be used to implement an overcurrent shutdown function. For example, when the current sensing signal CS provided by the current sensing circuit 20 reaches or exceeds the threshold V... TRIP When the indicated critical current value is reached, control logic 3 triggers transistor 2 to turn off, until the input signal S... IN Until conduction is triggered again.

[0024] exist Figure 1In the example, smart switch 1 is configured as a high-side switch, that is, smart switch 1 is connected to the power supply voltage V. B The power supply line (at the power supply pin SUP) is connected between the power supply line and the load Z connected to the output pin OUT. Smart switch 1 also has a ground pin GND to receive a reference potential V. GND The reference potential can be defined as zero volts and used as a constant reference potential for the circuit devices included in the smart switch 1.

[0025] A smart switch may include more than one output channel to switch / protect two or more loads. Figure 2 An example circuit topology that can be used, for example, in a modern automotive system is shown, where many subsystems (represented by loads Z1-Z4) need to operate under a defined and stable supply voltage. According to Figure 2 For example, DC / DC converter 8 provides a power supply voltage V. S The pre-regulation can be significantly lower than the battery voltage V. B For example, battery voltage can vary between 12 and 14 volts, while the power supply voltage V... S It is adjustable to match the 6-volt setting. The intelligent switch connecting the output of DC / DC converter 8 to subsystems / loads Z1-Z4 provides protection features such as overcurrent protection and diagnostic functions.

[0026] exist Figure 2 In the example, a power supply voltage V is provided to subsystems / loads Z1 and Z2 via a dual-channel smart switch 1. S Similarly, subsystems / loads Z3 and Z4 are powered via dual-channel smart switch 1'. The power supply pin SUP of the smart switch (see...) Figure 1 The outputs of the smart switches 1 and 1' are connected to the output of the DC / DC converter 8, and the outputs of the smart switches 1 and 1' are connected to the subsystems / loads Z1-Z4 via corresponding cables. The smart switches can be, for example, manufactured by a microcontroller (see reference...). Figure 1 Alternatively, it may be controlled by a similar device configured to generate input signals SIN1-SIN4 to control the switching state of the output channel of the smart switch. The protection functions mentioned above may also include so-called electronic fuse functions, which are essentially “smart” overcurrent cut-off functions that do not use a fixed current threshold but take into account the energy dissipated in the cable between the smart switch and the load.

[0027] Figure 2 The circuit topology shown has some issues because commonly used smart switches do not provide reverse current protection. Generally, the term "reverse current" refers to the current that occurs when the voltage at one output pin of the smart switch exceeds the supply voltage V applied to the power supply pin SUP. S The negative load current that may occur at that time. (Through...) Figure 3The example shown further illustrates the problem of reverse current.

[0028] Figure 3 This is a simplified block diagram of an integrated dual-channel smart switch 1, which has a power supply pin SUP (which can be connected to the output of a DC / DC converter 8) for receiving input signal S. IN1 and S IN2 The integrated circuit has two input pins, IN1 and IN2 (one pin per channel) and two corresponding output pins, OUT1 and OUT2 (connected to loads Z1 and Z2 respectively (e.g., via cables and connectors)). The integrated circuit includes two transistors, 2.1 and 2.2, coupled between the power node and the corresponding output pins OUT1 and OUT2. In this example, transistors 2.1 and 2.2 are MOS transistors, each having an intrinsic body diode D. 2.1 and D 2.2 .from Figure 3 It can be seen that transistors 2.1 and 2.2 have a common drain connected to the power supply pin SUP.

[0029] The integrated dual-channel smart switch 1 also includes a control circuit 3, also referred to as control logic, and may include, among other things, combinational and sequential logic circuits, as well as synchronous and asynchronous circuits. Control logic 3 is configured to be based on the corresponding input signals S received at input pins IN1 and IN2, respectively. IN1 and S IN2 And other parameters to trigger the switching on and off of transistors 2.1 and 2.2 (by generating control signals, see...) Figure 1 Control signal S in ON As mentioned earlier, the input signal S IN1 and S IN2 It can be made by, for example, a microcontroller (see reference) Figure 1 The microcontroller (μC) is generated by an external (independent of smart switch 1) circuit. Control signals generated by control logic 3 are provided to gate drivers 5.1 and 5.2, which generate transistors 2.1 and 2.2 adapted to turn on and off according to the corresponding control signals. The above has already been combined with... Figure 1 The function of the gate driver has been discussed, with reference to the corresponding description above. It should be understood that, for the sake of clarity and simplicity, [further details are omitted]. Figure 3 Circuits that are not needed for further discussion have been omitted. However, Figure 3 A smart switch may include all the circuitry typically implemented in a smart switch, such as current sensing circuitry, temperature sensors, etc.

[0030] Figure 3 This shows the voltage at the output pin OUT1 towards voltage V. B In the case of an increase, where the voltage VB It can be significantly higher than the power supply voltage V. S (V B >>V S This situation can be caused by a short circuit in the cable connecting output pin OUT1 and subsystem / load Z1, or a fault in subsystem / load Z1. Figure 3 It can be seen that the reverse current i R (with load current i) L1 (With opposite signs) The body diode D (now forward biased) of transistor 2.1 can flow through it. 2.1 Therefore, the voltage at the power supply pin SUP also rises to V. B And all subsystems / loads connected to the output of DC / DC converter 8 (see...) Figure 2 The loads Z1-Z4 will "see" up to the battery voltage V. B Subtract the diode D 2.1 Overvoltage across the voltage drop across the terminals. Needless to say, in the worst-case scenario, this could cause all loads / subsystems powered via the DC / DC converter 8 to fail. This problem is not limited to dual-channel smart switches, but can also occur when various loads are connected to the output of the DC / DC converter 8 using single-channel smart switches.

[0031] One approach to mitigate these issues and protect the individual subsystems is to connect a diode between each smart switch and the output of the DC / DC converter 8. However, this would require additional components (thus increasing the overall system cost), and more critically, it would result in significant power loss from the additional diodes. Furthermore, this method does not allow for the detection of reverse current conditions or the identification of defective loads or cables.

[0032] Figure 4 The example illustrates an innovative approach using smart switches with two or more output channels that allows for the identification of reverse current conditions and the blocking of reverse current without incurring significant additional losses. Figure 4 Smart switch 1 and Figure 3 The smart switches are basically the same. However, the power supply pin SUP is not connected, and the power supply voltage V... S Instead, a load is applied to one output pin (output pin OUT1 in this example). Load Z2 is connected to the other output pin OUT2. Since the power supply pin SUP is not connected, the two transistors 2.1 and 2.2 are connected "back to back" (i.e., at the common circuit node, the drain electrodes of the transistors are connected in series with each other).

[0033] from Figure 4It can be seen that both transistors 2.1 and 2.2 must be turned on to supply power to load Z2. For this purpose, the same input signal S can be applied to input pins IN1 and IN2. IN2 This allows transistors 2.1 and 2.2 to be turned on simultaneously. During normal operation (i.e., when transistors 2.1 and 2.2 are on to supply power to load Z2 and there is no short circuit), transistor 2.1 operates in a reverse conduction state, meaning that the drain-source voltage V at transistor 2.1 is... DS2.1 =i L2 ·R ON It is negative because the load current i L2 A negative representation of transistor 2.1 (R) ON This is the on-resistance of the transistor. Generally, the load current flowing from the drain to the source is defined as positive (…). Figure 4 (In the case of transistor 2.2), while the flow from the source to the drain is negative ( Figure 4 (The case of transistor 2.1); a negative load current means a negative drain-source voltage. Transistor 2.2 operates in a forward conduction state.

[0034] Figure 5 It shows the relationship with Figure 4 The same circuit layout is shown (smart switch 1 connects the output of DC / DC converter 8 to load Z2). However, Figure 5 This shows that the output pin OUT2 is pulled to a higher voltage (above the supply voltage V). S This situation leads to reverse current. (See the reference above.) Figure 3 The reverse current situation discussed may occur due to a short circuit or fault in subsystem / load Z2.

[0035] In the case of reverse current, Figure 5 In the example, due to the output pin and battery voltage V B A short circuit between them injects current i at the output pin OUT2. R Transistor 2.2 operates in reverse conduction mode, while transistor 2.1 operates in forward conduction mode. Through Figure 6 The timing diagram illustrates an example of how a reverse current condition can be detected by control logic 3. A more detailed discussion follows. Figure 6 Previously, it should be noted that i S1 and i S2 This represents the current sensing signal, indicating the load current (drain-source current) passing through transistors 2.1 and 2.2 respectively (see...). Figure 6 (See the third and fourth charts). Furthermore, for this example, assume that the signal used to generate the current sensing signal i... S1 and i S2The current sensing circuit can only measure positive load current (i.e., when the transistor is in the forward conduction state), and when the corresponding transistors 2.1 and 2.2 are in the reverse conduction state, the current sensing signal i S1 and i S2 It is zero.

[0036] according to Figure 6 Example, input signal S IN2 At time t0, the signal is set high (e.g., via an external microcontroller) to indicate that smart switch 1 will be turned on (see [link]). Figure 6 (First / Top Diagram). Therefore, control logic 3 (see...) Figure 4 and Figure 5 Appropriate control signals will be generated, and gate drivers 5.1 and 5.2 will generate corresponding gate signals to turn on transistors 2.1 and 2.2. Therefore, starting from time t0, the output current i to the load is output at output pin OUT2. L2 A sharp increase. Note that the input signal S... IN2 The delay between the rising edge of the current sensing signal and the actual turn-on of transistors 2.1 and 2.2 is very small and therefore neglected in this discussion. S2 Follow the output current i L2 This is because the corresponding transistor 2.2 is in a forward conduction state. Current sensing signal i S1 It remains zero because shortly after time t0, the corresponding transistor 2.1 enters the reverse conduction state (see...). Figure 6 (See the third and fourth diagrams). Figure 6 The fifth and sixth diagrams illustrate logic states REV1 and REV2 (e.g., the values ​​of registers included in control logic 3) indicating whether the corresponding transistors 2.1 and 2.2 are in a reverse conduction state, where REV2 = 1 indicates that transistor 2.2 is in a reverse conduction state, and REV2 = 0 indicates that transistor 2.2 is in a forward conduction state. Similarly, REV1 indicates the state of transistor 2.1.

[0037] Logic circuit 3 can be configured to evaluate the current sensing signal i S1 and i S2 (For example, using a comparator), and when S IN2 =1 and the corresponding current sensing signal i S2 Approaching zero (i S2 When S ≈ 0A), REV2 is set high (indicating reverse conduction). Similarly, when S IN2 =1 and the corresponding current sensing signal i S2 positive (i) S1When the voltage is >0A, REV2 is set to low (indicating forward conduction). The same applies to REV1. Therefore, at time t0, logic state REV1 changes from low (logic 0) to high (logic 1), while state REV2 remains low (logic 0), which means that transistor 2.2 is in the forward conduction state while transistor 2.1 is in the reverse conduction state.

[0038] Later, at time t1, the output current i L2 The current begins to decrease, and the sign of the output current reverses at time t2. Therefore, the current sensing signal i S2 It drops to zero and remains zero after time t2. Starting from time t2, the current sensing signal i S1 It starts to rise because the current i L2 It decreases to a larger negative value. Therefore, the logical state REV1 changes to REV1 = 0 at time t2 (because i S2 (It starts to rise), and then at time t3, the logic state REV2 changes to REV2 = 1 (because i S1 (Reaching and remaining at zero). The protection circuit (which may be part of control logic 3) is configured to detect current reversal by actually detecting the 1-to-0 transition in REV1 and the 0-to-1 transition in REV2 simultaneously, and trigger the automatic cutoff of at least transistor 2.1 (preferably transistors 2.1 and 2.2) to prevent continued reverse conduction. The short delay between time t2 and time t3 illustrates the fact that the current through the transistors and the logic states REV1 and REV2 cannot change within zero time.

[0039] Figure 7 An example of how the aforementioned current sensing circuit can be implemented is shown (see [link]). Figure 1 (Current sensing circuit 20). In a smart switch with two or more channels, a current sensing circuit can be provided for each output channel. Alternatively, a current sensing circuit can be used to alternately sense the current through the transistor. Figure 7 For example, the so-called sensing transistor 2.10 is coupled to the power transistor 2.1, such that the power transistor 2.1 and the sensing transistor 2.10 "see" the same gate voltage V. G1 The power transistor 2.1 and the sensing transistor 2.10 have the same drain voltage. Therefore, the power transistor 2.1 and the sensing transistor 2.10 have a common drain electrode and a common gate electrode. The active region of the sensing transistor 2.10 is smaller than the active region of the power transistor 2.1. The ratio of the active regions is known. In one example, the power transistor 2.1 consists of multiple transistor cells in a cell array, one of which or a pair of transistor cells forms the sensing transistor 2.10. When both the power transistor 2.1 and the sensing transistor 2.10 operate at the same operating point, the source current i of the sensing transistor 2.10 is...S1 This is proportional to the load current through power transistor 2.1, which is the case where the drain-source voltage and gate-source voltage are equal. Figure 7 In the example, the source-drain current path of the p-channel MOS transistor 21 is coupled in series with the (n-channel) sensing transistor 2.10, and the gate of transistor 21 is driven such that the source potentials of the power transistor 2.10 and the sensing transistor 2.10 are equal (through the transconductance operational amplifier 22). Current i S1 Also known as the sensing current, it can be converted into the corresponding current sensing voltage V using a resistor R1 coupled between transistor 21 and ground potential GND. CS1 .

[0040] It should be noted that Figure 7 The circuit should be considered as an illustrative exemplary implementation of the current sensing circuit 20, which is known and therefore will not be discussed in further detail herein. It will be understood that various other known implementations may be used instead. Figure 7 An analog implementation of the current sensing circuit 20 is shown. It should be noted that digital implementations providing a digital value stream as the current sensing signal are also known. As described above, when the power transistor 2.1 is in the reverse conduction state, Figure 7 The current sensing circuit malfunctions, therefore, during the reverse conduction of power transistor 2.1, the current sensing signal V... CS1 (or i) S1 The result will be zero.

[0041] Figure 8 This demonstrates how the current sensing signal i, representing the current sensed through transistors 2.1 and 2.2, can be used as a basis. S1 and i S2 (see Figure 4 To generate logical states (Boolean values) REV1 and REV2 (see...) Figure 6 An example of ). Figure 8 This includes the generation of the logic state REV1. It can be understood that REV2 can be determined in a similar manner. According to the example shown, REV1 is the input signal S. IN Comparison result V CS1 ≤V GND (see Figure 8 The AND-conjunction of comparator 32 (see Comparator 32) Figure 8 AND gate 32). In other words, when the input signal S IN1 When the value is "1" (i.e., the transistor will be turned on) and the load current through the transistor is not positive, REV1 will indicate the reverse conduction of transistor 2.1.

[0042] Figure 9The example illustrates an alternative example of how reverse conduction of a transistor can be detected. Figure 9 It shows Figure 4 The intelligent switch comprises transistors 2.1 and 2.2, wherein the drain and source of transistor 2.1 are connected to the input of comparator 33. Similarly, the drain and source of transistor 2.2 are connected to the input of comparator 34. The output of comparator 33 represents the Boolean value REV1, when the drain-source voltage V... DS2.1 When it is negative, it will be "1", while when the drain-source voltage V DS2.1 When positive, it will be "0". Similarly, the output of comparator 34 represents the Boolean value REV2, when the drain-source voltage V... DS2.2 When it is negative, it will be "1", while when the drain-source voltage V DS2.2 When it is positive, it will be "0".

[0043] Figure 10 Showing more details Figure 4 The intelligent switch includes, in particular, a protection circuit configured to detect reverse output current. Specifically, the protection circuit 30 is configured to detect the transition from a reverse conduction state to a forward conduction state for power transistors 2.1 and 2.2, and vice versa. (Refer to the above.) Figure 9 The explanation refers to the implementation of detection under reverse conditions. Alternatively, the detection can be based on the above reference. Figure 7 and Figure 8 The current sensing signal under discussion. The actual reversal of the output current is detected by logic circuit 36, which is configured to combine logic states REV1 and REV2 and provide an output signal OFF indicating when a transition occurs between the two states REV1 and REV2 within a short period of time.

[0044] The OFF signal provided by the protection circuit is processed by control logic 3. When the OFF signal indicates that the output current is reversed, transistors 2.1 and 2.2 are triggered to turn off. Additionally, control logic 3 can control the current source Q to output a diagnostic current i at the dedicated diagnostic pin IS. D To indicate an error. By adjusting resistor R D Connected to the diagnostic pin IS, diagnostic current i D This can be converted to the corresponding voltage. (Transverse resistor R) D The voltage drop across the terminals is proportional to the diagnostic current and can be read, for example, by an analog-to-digital converter included in a microcontroller, which also provides the input signal S. IN2 (see Figure 2 The level of diagnostic current can indicate specific errors, such as reversed output current discussed in this paper.

[0045] Figure 11 This is a flowchart illustrating an example of a method for detecting reverse conduction in a smart switch. According to... Figure 11 The method includes: turning on a first power transistor (e.g., back-to-back connected) according to an input signal. Figure 10 Transistor 2.1) and second power transistor (e.g., Figure 10 Transistor 2.1 (see also) Figure 11 (Step S1). Both the first and second power transistors have intrinsic body diodes that allow reverse conduction of the respective transistors. Furthermore, the method includes: providing a load current (output current) to a load connected to the second power transistor (see...). Figure 11 (Step S2). The method further includes: detecting the transition of the second power transistor from a reverse conduction state to a forward conduction state (see...). Figure 11 (Step S3) and the transition of the first power transistor from the forward conduction state to the reverse conduction state (see...) Figure 11 (Step S4). It should be understood that steps S3 and S4 can be interchanged or performed simultaneously. Once a transition from the reverse conduction state to the forward conduction state of the second power transistor and a transition from the forward conduction state to the reverse conduction state of the first power transistor are detected, an error signal is generated (e.g., Figure 10 Error signal OFF).

[0046] Although the invention has been shown and described with respect to one or more embodiments, changes and / or modifications may be made to the illustrated examples without departing from the spirit and scope of the appended claims. For example, the logic level used to trigger a specific action may be reversed compared to the illustrated example. Logic gates may be replaced by other logic circuits that perform substantially the same function. In particular, with respect to the various functions performed by the aforementioned components or structures (units, components, devices, circuits, systems, etc.), unless otherwise stated, the terminology used to describe such components is intended to correspond to any component or structure (e.g., functionally equivalent) that performs the specific function of said component, even if structurally not equivalent to the disclosed structure, which performs the functions of the exemplary embodiments of the invention shown herein.

Claims

1. An integrated circuit, comprising: The first power transistor is coupled between the power supply pin and the first output pin; A second power transistor is coupled between the power supply pin and the second output pin, and both the first power transistor and the second power transistor have intrinsic body diodes that allow reverse conduction; The control circuit is configured to trigger the first power transistor and the second power transistor to turn on and off based on the first input signal and the second input signal, respectively. as well as The protection circuit is configured to detect a transition from a reverse conduction state to a forward conduction state or from a forward conduction state to a reverse conduction state for both the first power transistor and the second power transistor, and to generate an error signal when a transition from a reverse conduction state to a forward conduction state for the second power transistor and a transition from a forward conduction state to a reverse conduction state for the first power transistor are detected. The power supply voltage is not applied to the power supply pin, but to the first output pin, and the load is connected to the second output pin.

2. The integrated circuit according to claim 1, The protection circuit is configured to generate the error signal when it detects a transition of the second power transistor from a reverse conduction state to a forward conduction state, followed by a transition of the first power transistor from a forward conduction state to a reverse conduction state.

3. The integrated circuit according to claim 1, further comprising: A current sensing circuit is configured to generate a first current sensing signal and a second current sensing signal, the first current sensing signal representing the load current through the first power transistor in a forward conduction state, and the second current sensing signal representing the load current through the second power transistor in a forward conduction state.

4. The integrated circuit according to claim 3, When the first power transistor and the second power transistor are in reverse conduction state, the first current sensing signal and the second current sensing signal are zero.

5. The integrated circuit according to claim 3, The protection circuit is configured to detect, based on the first current sensing signal and the second current sensing signal, the transition from the reverse conduction state to the forward conduction state and the transition from the forward conduction state to the reverse conduction state for the first power transistor and the second power transistor, respectively.

6. The integrated circuit according to claim 1, The protection circuit is configured to detect transitions from the reverse conduction state to the forward conduction state and from the forward conduction state to the reverse conduction state for the first power transistor and the second power transistor, respectively, based on the voltage drop across the load current path of the first power transistor and the second power transistor.

7. The integrated circuit according to claim 1, The control circuit is configured to trigger the second power transistor or both the first power transistor and the second power transistor to turn off in response to the error signal.

8. A method for switching loads, comprising: Based on the input signal conduction, a first power transistor and a second power transistor are connected back to back. Both the first power transistor and the second power transistor have intrinsic body diodes that allow reverse conduction. The first power transistor is coupled between a power supply pin and a first output pin, and the second power transistor is coupled between the power supply pin and the second output pin. Provide load current to the load connected to the second power transistor; An error signal is generated when a transition from the reverse conduction state to the forward conduction state of the second power transistor and a transition from the forward conduction state to the reverse conduction state of the first power transistor are detected. The power supply voltage is not applied to the power supply pin, but to the first output pin, and the load is connected to the second output pin.

9. The method according to claim 8, The error signal is generated when the transition of the second power transistor from the reverse conduction state to the forward conduction state is detected, followed by the transition of the first power transistor from the forward conduction state to the reverse conduction state.

10. The method of claim 8, further comprising: A first current sensing signal and a second current sensing signal are generated. The first current sensing signal represents the load current through the first power transistor in the forward conduction state, and the second current sensing signal represents the load current through the second power transistor in the forward conduction state.

11. The method according to claim 10, When the first power transistor and the second power transistor are in reverse conduction state, the first current sensing signal and the second current sensing signal are zero.

12. The method of claim 10, wherein generating the error signal comprises: Based on the first current sensing signal and the second current sensing signal, respectively, the transition from the reverse conduction state to the forward conduction state and the transition from the forward conduction state to the reverse conduction state are detected for the first power transistor and the second power transistor.

13. The method of claim 8, wherein generating the error signal comprises: Based on the voltage drop across the load current path of the first power transistor and the second power transistor, respectively, the transition from the reverse conduction state to the forward conduction state and the transition from the forward conduction state to the reverse conduction state are detected for the first power transistor and the second power transistor.

14. The method of claim 8, further comprising: In response to the error signal, the second power transistor or both the first power transistor and the second power transistor are turned off.

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