Semiconductor device package and method of manufacturing the same

Abstract

A semiconductor device package includes a display device, an electronic module, and a conductive adhesive layer. The display device includes a first substrate and a thin film transistor (TFT) layer. The first substrate has a first surface and a second surface opposite the first surface. The TFT layer is disposed on the first surface of the first substrate. The electronic module includes a second substrate and an electronic component. The second substrate has a first surface facing the second surface of the first substrate and a second surface opposite the first surface. The electronic component is disposed on the second surface of the second substrate. The conductive adhesive layer is disposed between the first substrate and the second substrate.

Description

Technical Field

[0001] This disclosure generally relates to a semiconductor device package and a method for manufacturing the same, and more particularly to a semiconductor device package and a method for manufacturing the same that includes a display device. Background Technology

[0002] Wearable electronic components (e.g., watches, wristbands, etc.) typically have a strap that connects to a housing that contains some of the electronic components. It may be necessary to integrate one or more additional functions into the watch (geographic information collection or determination; biometric information collection or determination, etc.), which means that more components (such as a GPS module, heart rate sensor module, etc.) should be housed in the housing. Therefore, the size and weight of the housing may inevitably increase, which could negatively impact the user experience. Summary of the Invention

[0003] According to one aspect of this disclosure, a semiconductor device package includes a display device, an electronic module, and a conductive adhesion layer. The display device includes a first substrate and a TFT layer. The first substrate has a first surface and a second surface opposite to the first surface. The TFT layer is disposed on the first surface of the first substrate. The electronic module includes a second substrate and electronic components. The second substrate has a first surface facing the second surface of the first substrate and a second surface opposite to the first surface. The electronic components are disposed on the second surface of the second substrate. The conductive adhesion layer is disposed between the first substrate and the second substrate.

[0004] According to another aspect of this disclosure, a method of manufacturing a semiconductor device package includes: (a) providing a display device having a first substrate and a TFT layer on a first surface of the first substrate; (b) providing an electronic module having a second substrate and electronic components disposed on a first surface of the second substrate remote from the first substrate; and (c) applying a conductive adhesion layer between the first substrate and the second substrate to connect a second surface of the first substrate opposite to the first surface of the first substrate to a second surface of the second substrate opposite to the first surface of the second substrate. Attached Figure Description

[0005] Figure 1A A cross-sectional view of a semiconductor device package according to some embodiments of the present disclosure is shown;

[0006] Figure 1B Examples of embodiments according to this disclosure are shown. Figure 1A An enlarged view of a portion of the semiconductor device package shown;

[0007] Figure 1CExamples of embodiments according to this disclosure are shown. Figure 1A An enlarged view of a portion of the semiconductor device package shown;

[0008] Figure 1D A cross-sectional view of an electronic module according to some embodiments of the present disclosure is shown;

[0009] Figure 1E A cross-sectional view of an electronic module according to some embodiments of the present disclosure is shown;

[0010] Figure 1F A cross-sectional view of an electronic module according to some embodiments of the present disclosure is shown;

[0011] Figure 2 A cross-sectional view of a semiconductor device package according to some embodiments of the present disclosure is shown;

[0012] Figure 3A and Figure 3B Methods for manufacturing electronic modules according to some embodiments of the present disclosure are shown;

[0013] Figure 4A , Figure 4A '、 Figure 4A "and Figure 4B Methods for manufacturing a display device according to some embodiments of the present disclosure are illustrated;

[0014] Figure 5A and Figure 5B Methods for manufacturing semiconductor device packages according to some embodiments of the present disclosure are illustrated;

[0015] Figure 6A and Figure 6B A method for manufacturing a portion of a semiconductor device package according to some embodiments of the present disclosure is shown; and

[0016] Figure 7A and Figure 7B Methods for manufacturing semiconductor device packages according to some embodiments of the present disclosure are illustrated.

[0017] Throughout the accompanying drawings and detailed description, the same reference numerals are used to indicate the same or similar parts. This disclosure will be readily understood from the following detailed description taken in conjunction with the accompanying drawings. Detailed Implementation

[0018] The following disclosure provides numerous different embodiments or instances for implementing various features of this subject matter. Specific examples of components and arrangements are described below. Of course, these are merely examples and are not intended to be limiting. In this disclosure, as described below, references to forming a first feature above or on a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which an additional feature may be formed between the first and second features such that the first and second features are not in direct contact. Furthermore, reference numerals and / or letters may be repeated in various instances in this disclosure. Such repetition is for simplicity and clarity and does not in itself specify a relationship between the various embodiments and / or configurations discussed.

[0019] Embodiments of this disclosure will now be discussed in detail. However, it should be understood that this disclosure provides many applicable inventive concepts that can be implemented in a wide variety of specific environments. The specific embodiments discussed are merely examples and are not intended to limit the scope of this disclosure.

[0020] Figure 1A A cross-sectional view of a semiconductor device package 1 according to some embodiments of the present disclosure is shown. The semiconductor device package 1 includes a display device 100, an electronic module 200, and a connection layer 10 (or bonding layer). In some embodiments, the semiconductor device package 1 may be used or implemented in flexible or bendable electronic components (e.g., electronic watches, electronic strips, etc.).

[0021] Display device 100 includes substrates 110 and 130, a thin-film transistor (TFT) layer 120, a light-emitting device 140, and an encapsulation 150. Substrate 110 may include, for example, a printed circuit board, such as a paper-based copper foil laminate, a composite copper foil laminate, or a polymer-impregnated glass fiber-based copper foil laminate. Substrate 110 may include interconnect structures, such as a redistribution layer (RDL) or a grounding element. Substrate 110 includes a surface 111 and a surface 112 opposite to surface 111. In some embodiments, substrate 110 is a flexible substrate.

[0022] The TFT layer 120 is disposed on the first surface 111 of the substrate 110. In some embodiments, such as Figure 1AAs shown, the TFT layer 120 may be or include a driving circuit electrically connected to the light-emitting device 140. For example, the driving circuit is configured to send a driving current (or voltage) to the light-emitting device 140, and the light-emitting device 140 is driven by the driving current to emit light having a brightness corresponding to the amplitude of the driving current. Various circuits can be used as driving circuits for driving the light-emitting device 140. For example, the driving circuit may include multiple transistors and at least one storage capacitor. For example, the driving circuit may include driving configurations indicated as 5T / IC type, 4T / IC type, 3T / IC type, and 2T / IC type, etc., where t represents a transistor and C represents a storage capacitor. In some embodiments, such as Figure 1A As shown, the transistor in the driving circuit may include a gate 121, a gate insulator (e.g., a dielectric material) 122, a semiconductor channel 123, a drain 124, a source 125, and a passivation layer 126. In some embodiments, the structure of the transistor in the driving circuit can be changed or adjusted according to different design requirements. In some embodiments, the TFT layer 120 and the substrate 110 may be collectively referred to as a backplane.

[0023] Substrate 130 is disposed on TFT layer 120. Substrate 130 may include, for example, a printed circuit board, such as a paper-based copper foil laminate, a composite copper foil laminate, or a polymer-impregnated glass fiber-based copper foil laminate. Substrate 130 may include interconnect structures, such as RDLs or grounding elements. Substrate 130 includes a cavity 130c for accommodating light-emitting device 140. In some embodiments, depending on different design requirements, the depth of cavity 130c may be greater than, equal to, or less than the thickness of light-emitting device 140.

[0024] The light-emitting device 140 is disposed within a cavity 130c of the substrate 130. The light-emitting device 140 is electrically connected to the TFT layer 120 via the substrate 130 (e.g., via the interconnect structure of the substrate 130). In some embodiments, the light-emitting device 140 may be or comprise a micro light-emitting diode (LED). In some embodiments, the light-emitting device 140 may be or comprise a liquid crystal display (LCD), an organic light-emitting diode (OLED), or any other suitable light-emitting unit. In some embodiments, the light-emitting device 140 and the substrate 130 may be collectively referred to as the front panel.

[0025] Encapsulation 150 is disposed on substrate 130 and within cavity 130c of substrate 130. Encapsulation 150 covers light-emitting device 140 to protect light-emitting device 140. In some embodiments, encapsulation 150 is formed of or contains light-transmitting material to allow light emitted by light-emitting device 140 to pass through.

[0026] Electronic module 220 includes substrate 210, electronic components 220, 221, and 222, and package 230. In some embodiments, electronic module 220 may be referred to as a system-in-package (SiP) module. Substrate 210 may include, for example, a printed circuit board, such as a paper-based copper foil laminate, a composite copper foil laminate, or a polymer-impregnated glass fiber-based copper foil laminate. Substrate 210 may include interconnect structures, such as RDLs or grounding elements. Substrate 210 includes a surface 211 facing substrate 110 and a surface 212 opposite to surface 211. In some embodiments, substrate 210 is a flexible substrate.

[0027] Electronic components 220, 221, and 222 are disposed on surface 212 of substrate 210. Electronic components 220, 221, and 222 may be or contain active components, passive components, and / or combinations thereof. For example, electronic component 220 may be a chip or die, comprising a semiconductor substrate, one or more integrated circuit devices, and one or more overlying interconnect structures thereon. For example, electronic component 221 may be a sensor or a microelectromechanical system (MEMS). For example, electronic component 222 may be a capacitor. Electronic components 220, 221, and 222 are electrically connected to each other or connected to display device 100 via substrate 210 (e.g., interconnect structures).

[0028] Encapsulation 230 is disposed on surface 212 of substrate 210 and covers electronic components 220, 221, and 222. In some embodiments, encapsulation 230 comprises epoxy resin having fillers dispersed therein.

[0029] A connection layer 10 (e.g., a conductive adhesion layer) is disposed between the display device 100 and the electronic module 200. For example, the connection layer 10 is disposed between substrate 110 and substrate 210. The connection layer 10 connects (or bonds) the display device 100 and the electronic module 200. The connection layer 10 provides an electrical connection between the display device 100 and the electronic module 200.

[0030] Figure 1B An enlarged view of a portion of a semiconductor device package 1 according to some embodiments of the present disclosure, enclosed by a dashed square 1A, is shown. Figure 1BAs shown, the bonding layer 10 comprises a plurality of conductive particles 11 and an adhesive 12 covering the conductive particles 11. After the bonding layer 10 is heated to a predetermined temperature and then cooled, the conductive particles 11 will move to or adjacent to conductive materials (e.g., conductive pads 110p1, 110p2, 210p1, 210p2, 210p3, and 210p4). In some embodiments, the predetermined temperature is about 140 degrees Celsius. In some embodiments, the conductive particles 11 comprise a thermally agglomerated material. In some embodiments, the conductive particles are solder particles (e.g., SnBi) or any other suitable conductive particles. In some embodiments, the adhesive 12 is a thermosetting resin (e.g., epoxy resin). In some embodiments, the adhesive layer 10 is a self-assembling agent (SAP).

[0031] like Figure 1B As shown, the bonding layer 10 includes regions 10A, 10B, and 10C. Region 10A is located between the conductive pad 110p1 of substrate 110 and the conductive pad 210p1 of substrate 210 electrically connected to the conductive pad 210p3 through the conductive via 210v. Region 10B does not overlap with any conductive pads of substrates 110 and 210. For example, region 10B is horizontally spaced from any conductive pads of substrates 110 and 210. Region 10C is located between the conductive pad 110p2 of substrate 110 and the conductive pad 210p2 of substrate 210 that is not directly connected to the conductive via. In some embodiments, the density of conductive particles 11 in regions 10A or 10C (e.g., the ratio of the volume of conductive particles 11 to the volume of adhesive 12 or the ratio of the number of conductive particles 11 to the number of adhesive 12) is greater than its density in region 10B. In some embodiments, the density of conductive particles 11 in region 10A is greater than its density in region 10C. For example, the resistivity between conductive pads 110p1 and 210p1 is less than the resistivity between conductive pads 110p2 and 210p2. For example, the conductivity between conductive pads 110p1 and 210p1 is better than the conductivity between conductive pads 110p2 and 210p2.

[0032] In some embodiments, Figure 1BThe adhesion layer 10 in the substrate 210 can be heated by providing heat from the surface 212 of the substrate 210. For example, a heat source (e.g., an oven) is located near the surface 212 of the substrate 210. Since conductive pad 210p1 is connected to conductive pad 210p3 disposed at or near the surface 212 of the substrate 210, heat can be transferred from conductive pad 210p3 to conductive pad 210p1 through conductive via 210v. However, since conductive pad 210p2 is not directly connected to conductive pad 210p4 through conductive via, the temperature of conductive pad 210p2 may be lower than the temperature of conductive pad 210p1. Therefore, the density of conductive particles 11 between conductive pads 110p1 and 210p1 (i.e., in region 10A) is greater than the density of conductive particles 11 between conductive pads 110p2 and 210p2 (i.e., in region 10C). These inconsistent conductivity (or resistivity) between the conductive pads will adversely affect the performance of the semiconductor device package 1.

[0033] Figure 1C An enlarged view of a portion of a semiconductor device package 1 according to some embodiments of the present disclosure, enclosed by a dashed square 1A, is shown. Except that the density of conductive particles 11 in region 10A is substantially the same as the density of conductive particles 11 in region 10C, Figure 1C The structure shown is similar to Figure 1B The structures shown are similar. For example, the resistivity between conductive pads 110p1 and 210p1 and the resistivity between conductive pads 110p2 and 210p2 are substantially the same. For example, the conductivity between conductive pads 110p1 and 210p1 and the conductivity between conductive pads 110p2 and 210p2 are substantially the same.

[0034] In some embodiments, heating is achieved by induction heating. Figure 1C The substrates 110, 210, and the interconnect layer 10 are configured as follows. For example, the substrates 110, 210, and the interconnect layer 10 are subjected to a rapidly alternating magnetic field, and eddy currents are generated by conductive pads (e.g., 110p1, 110p2, 210p1, 210p2, 210p3, and 210p4) to heat these conductive pads. Figure 1B Compared to the previous embodiment, regardless of whether any conductive pad (e.g., 210p1) is not connected via a conductive via to another conductive pad (e.g., 210p4) disposed on or near surface 212 of substrate 210, Figure 1CAll conductive pads in the substrate can be uniformly heated to the desired temperature. Therefore, all conductive pads disposed on or near surface 211 of substrate 210 and the corresponding conductive pads disposed on or near surface 112 of substrate 110 have substantially constant conductivity (or resistivity). This will provide a stable and better electrical connection between display device 100 and electronic module 200 (e.g., through substrate 110, interconnect layer 10, and substrate 210), thereby improving the electrical performance of semiconductor device package 1.

[0035] Furthermore, the display device 100 and the electronic module 200 are connected at a relatively low temperature (e.g., 140 degrees Celsius) without using SAP as the connection layer 10 to provide pressure, which will prevent the display device 100 from being damaged during the manufacturing process. In addition, using SAP as the connection layer 10 can provide precise alignment between the conductive pads of the substrate 110 and the corresponding conductive pads of the substrate 210.

[0036] Figure 1D Examples of embodiments according to this disclosure are shown. Figure 1A A cross-sectional view of the electronic module 200 shown. Figure 1D As shown, substrate 210 includes a conductive via 210v that gradually narrows from surface 211 toward surface 212. Furthermore, the back surface of electronic component 220 (e.g., a die or chip) and the back surface of electronic component 221 (e.g., a sensor or MEMS) are exposed from package 230. In some embodiments, Figure 1D The electronic module 200 can be formed by: (i) providing a carrier and placing the back surfaces of electronic components 220, 221 and 222 on the carrier; (ii) forming a package 230 to cover electronic components 220, 221 and 222; (iii) exposing the active surfaces of electronic components 220, 221 and 222; and (iv) forming a substrate 210 on the exposed surfaces of electronic components 220, 221 and 222.

[0037] Figure 1E Examples of embodiments according to this disclosure are shown. Figure 1A A cross-sectional view of the electronic module 200 shown. (Except for...) Figure 1E The electronic module also includes conductive vias 220V that connect electronic components 220, 221, and 222 to the substrate 210. Figure 1E The electronic module shown is Figure 1D The electronic modules in the same way. In some embodiments, the conductive via 220v can be formed by: (i) forming an opening through the package 230 to expose the active surfaces of the electronic components 220, 221 and 222 by, for example, a laser; and (ii) filling the opening with a conductive material.

[0038] Figure 1F Examples of embodiments according to this disclosure are shown. Figure 1A The cross-sectional view of the electronic module 200 shown. Figure 1F The electronic module shown is similar to Figure 1D The electronic modules in the document are described below, along with their differences.

[0039] The back surfaces of electronic components 220, 221, and 222 are covered by package 230. Conductive vias 210 disposed within substrate 210 gradually narrow from surface 212 toward surface 211. In some embodiments, Figure 1F The electronic module 200 can be formed by the following operations: (i) forming a substrate 210; (ii) placing electronic components 220, 221 and 222 on the substrate 210; and (iii) forming a package 230 on the substrate 210 to cover the electronic components 220, 221 and 222.

[0040] Figure 2 A cross-sectional view of a semiconductor device package 2 according to some embodiments of the present disclosure is shown. The semiconductor device package 2 is similar to... Figure 1A The semiconductor device package 1 is described below, and the differences therebetween are also described below.

[0041] The display device 100 and the electronic module 200 are connected via a connection layer 20. The connection layer 20 includes an adhesive layer 21 (e.g., an adhesive) and a plurality of conductive vias 22 that penetrate the adhesive layer 21 to electrically connect conductive pads disposed on or near a surface 112 of the substrate 110 to corresponding conductive pads disposed on or near a surface 211 of the substrate 210. In some embodiments, the adhesive layer 21 may comprise a flexible or elastic material to provide cushioning when the light-emitting device 140 is placed within a cavity 130c of the substrate 130.

[0042] Figure 3A and Figure 3B These are cross-sectional views of electronic modules at different manufacturing stages according to some embodiments of the present disclosure. At least some of these figures have been simplified to better understand aspects of the present disclosure. In some embodiments, Figure 3A and 3B The operations shown can be used to manufacture, for example Figure 1A or Figure 2 The electronic module 200 shown is shown.

[0043] refer to Figure 3AA carrier 39 is provided. A substrate 210 is formed on the carrier 39. In some embodiments, the substrate 210 may be a flexible substrate. The substrate 210 may include interconnect structures, such as RDLs or grounding elements. Electronic components 220, 221, and 222 are then disposed on and electrically connected to the substrate 210. In some embodiments, the electronic components 220, 221, and 222 may be formed using, for example, flip-chip technology, surface mount technology (SMT), wire bonding, or any other suitable process.

[0044] refer to Figure 3B A package 230 is formed on substrate 210 to cover electronic components 220, 221, and 222. In some embodiments, the package 230 is formed by molding techniques (e.g., compression molding, transfer molding, etc.) or any other suitable process.

[0045] Figure 4A and Figure 4B These are cross-sectional views of a display device at different manufacturing stages according to some embodiments of the present disclosure. At least some of these figures have been simplified to better understand aspects of the present disclosure. In some embodiments, Figure 4A and 4B The operations shown can be used to manufacture, for example Figure 1A or Figure 2 The display device 100 shown is shown.

[0046] refer to Figure 4A A carrier 49 is provided. A substrate 110 is formed on the carrier 49. In some embodiments, the substrate 110 may be a flexible substrate. The substrate 110 may include interconnect structures, such as RDLs or grounding elements. A TFT layer 120 is then formed on the substrate 110.

[0047] Figure 4A 'and Figure 4A "This illustrates some embodiments according to the present disclosure, such as..." Figure 4A An enlarged view of a portion of the substrate 110 and the TFT layer 120 (including the insulating layer 115).

[0048] like Figure 4A As shown, conductive via 110v is disposed within substrate 110 and gradually narrows towards the surface of insulating layer 115 away from TFT layer 120 on substrate 110. Conductive via 115v is disposed within insulating layer 115 and gradually narrows towards substrate 110. For example, conductive vias 110v and 115v gradually narrow in the same direction. Conductive via 110v is electrically connected to conductive via 115v.

[0049] like Figure 4AAs shown, conductive via 110v is disposed within substrate 110 and gradually narrows towards insulating layer 115. Conductive via 115v is disposed within insulating layer 115 and gradually narrows towards substrate 110. For example, conductive vias 110v and 115v gradually narrow in opposite directions. Conductive via 110v is electrically connected to conductive via 115v.

[0050] refer to Figure 4B A substrate 130 is formed on the TFT layer 120. The substrate 130 may include interconnect structures (such as RDLs or grounding elements) electrically connected to the TFT layer 120. A cavity 130c is formed on the substrate 130. A light-emitting device 140 is disposed within the cavity 130c by, for example, placement and selection techniques. An encapsulation 150 is then formed on the substrate 130 and within the cavity 130c to cover the light-emitting device 140.

[0051] Figure 5A and Figure 5B These are cross-sectional views of semiconductor device packages at different manufacturing stages according to some embodiments of the present disclosure. At least some of these figures have been simplified to better understand aspects of the present disclosure. In some embodiments, Figure 5A and 5B The operations shown can be used to manufacture, for example Figure 1A The semiconductor device package 1 shown.

[0052] refer to Figure 5A The system provides a display device 100 and an electronic module 200. In some embodiments, the display device 100 and the electronic module 200 can be... Figures 4A-4B and Figures 5A-5B The operations shown are used to manufacture it. For example, it will be like... Figure 3B The carrier 39 shown is removed, and the package 230 of the electronic module 200 is placed on the carrier 39'. For example, as shown... Figure 4B The carrier 49 shown is removed, and the encapsulant 150 is placed on the carrier 49'.

[0053] A bonding layer 10 (containing conductive particles and an adhesive) is applied between the substrate 110 of the display device 100 and the substrate 210 of the electronic module 200. The display device 100, the electronic module 200, and the bonding layer 10 are then heated by induction heating. For example, a rapidly alternating magnetic field is applied to the display device 100, the electronic module 200, and the bonding layer 10, and eddy currents are generated by the conductive pads of the substrates 110 and 210 to heat these conductive pads.

[0054] As described above, regardless of whether any conductive pad is connected via a conductive via to another conductive pad disposed on or near surface 212 of substrate 210, all conductive pads of substrate 210 can be uniformly heated to the desired temperature (e.g., 140 degrees Celsius). Therefore, all conductive pads disposed on or near surface 211 of substrate 210 and their respective conductive pads disposed on or near surface 112 of substrate 110 have substantially constant conductivity (or resistivity). This will provide a stable and better electrical connection between display device 100 and electronic module 200, thereby improving the electrical performance of semiconductor device package 1.

[0055] refer to Figure 5B Remove carriers 39' and 49' to form as shown Figure 1A The semiconductor device package 1 shown.

[0056] Figure 6A and Figure 6B These are cross-sectional views of semiconductor device packages at different manufacturing stages according to some embodiments of the present disclosure. At least some of these figures have been simplified to better understand aspects of the present disclosure. In some embodiments, Figure 6A and 6B The operations shown can be used to manufacture, for example Figure 2 A portion of the semiconductor device package 2 shown.

[0057] In some embodiments, Figure 6A The operations in can be performed Figure 3B Execute after the operations in [the previous section]. See reference. Figure 6A , will be Figure 3B The carrier 39 shown is removed, and the Figure 3B The encapsulation body 230 of the structure is placed on the carrier 69. Then, an adhesion layer 21 is formed on the surface 211 of the substrate 210.

[0058] refer to Figure 6B Multiple holes are formed to penetrate the adhesion layer 21, thereby exposing conductive pads disposed on or near the surface 211 of the substrate 210. In some embodiments, these holes are formed by, for example, laser drilling or any other suitable process. Conductive material is then filled into these holes to form conductive vias 22.

[0059] Figure 7A and Figure 7B These are cross-sectional views of semiconductor device packages at different manufacturing stages according to some embodiments of the present disclosure. At least some of these figures have been simplified to better understand aspects of the present disclosure. In some embodiments, Figure 7A and 7B The operations shown can be used to manufacture, for example Figure 2 Semiconductor device package 2 is shown.

[0060] refer to Figure 7A Provided Figure 6B The display device and structure are shown. Except that the light-emitting device 140 is not housed within the cavity 130c of the substrate 130, Figure 7A The display device in the middle can be used Figure 4A and Figure 4B The operation is formed in the middle. Then, the display device is connected to the bonding layer 20 (which includes the adhesion layer 21 and the conductive via 22) by connecting the substrate 110 of the display device to the bonding layer 20. Figure 6B The structure shown is illustrated. In some embodiments, due to the display device and Figure 6B Before the structural connection shown, the light-emitting device 140 is not placed in the cavity 130c of the substrate 130, so the connection between them can be achieved by lamination without damaging the light-emitting device 140.

[0061] refer to Figure 7B Carriers 39' and 49' are removed. The light-emitting device 140 is disposed within a cavity 130c of the substrate 130, and an encapsulation 150 is formed on the substrate 130 and within the cavity 130c to cover the light-emitting device 140. In some embodiments, the adhesion layer 21 may comprise a flexible or elastic material to provide cushioning when the light-emitting device 140 is placed within the cavity 130c of the substrate 130.

[0062] As used herein and unless otherwise defined, the terms “substantially,” “basically,” “approximately,” and “about” are used to describe and explain small variations. For example, when used in conjunction with numerical values, the terms may refer to a range of variation less than or equal to ±10% of the numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. As another example, the thickness of a film or layer “substantially consistent” may refer to a standard deviation less than or equal to ±10% of the average thickness of the film or layer, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. The term "substantially coplanar" can refer to two surfaces being within 50 μm of the same plane, such as within 40 μm, 30 μm, 20 μm, 10 μm, or 1 μm. For example, if two components overlap or are within 200 μm, 150 μm, 100 μm, 50 μm, 40 μm, 30 μm, 20 μm, 10 μm, or 1 μm, then the two components can be considered "substantially aligned." If the angle between two surfaces or components is, for example, 90° ± 10°, such as ± 5°, ± 4°, ± 3°, ± 2°, ± 1°, ± 0.5°, ± 0.1°, or ± 0.05°, then the two surfaces or components can be considered "substantially perpendicular." When used in conjunction with an event or situation, the terms "substantially," "basically," "approximately," and "about" can refer to instances where the event or situation occurs precisely or instances where the event or situation is close to occurring.

[0063] In the description of some embodiments, a component provided "on" another component can cover the case where the preceding component is directly on (e.g., in physical contact with) the following component, as well as the case where one or more intermediate components are located between the preceding and following components.

[0064] In addition, quantities, ratios, and other numerical values ​​are sometimes presented in range format in this document. It is understood that these range formats are used for convenience and brevity and should be flexibly interpreted to include not only the numerical values ​​that are explicitly specified as the limits of the range, but also all individual numerical values ​​or subranges covered within the range, as if each numerical value and subrange were explicitly specified.

[0065] While this disclosure has been described and illustrated with reference to specific embodiments thereof, such descriptions and illustrations are not limiting. Those skilled in the art will understand that various changes may be made and equivalents may be substituted without departing from the spirit and scope of this disclosure as defined by the claims. Illustrations may not necessarily be drawn to scale. There may be differences between artistic representations in this disclosure and actual installations due to variables such as manufacturing processes. Other embodiments of this disclosure may exist that are not specifically shown. The specification and drawings should be considered illustrative rather than limiting. Modifications may be made to suit particular circumstances, materials, composition, methods, or processes to the objectives, spirit, and scope of this disclosure. All such modifications are intended to be within the scope of the appended claims. While the methods disclosed herein have been described with reference to specific operations performed in a particular order, it should be understood that these operations may be combined, subdivided, or rearranged to form equivalent methods without departing from the teachings of this disclosure. Therefore, unless expressly indicated herein, the order and grouping of operations are not limitations of this disclosure.

Claims

1. A semiconductor device package comprising: A display device, the display device comprising: A first substrate, the first substrate having a first surface and a second surface opposite to the first surface; and A TFT layer, the TFT layer being disposed on the first surface of the first substrate; Electronic module, the electronic module comprising: A second substrate, the second substrate having a first surface facing the second surface of the first substrate and a second surface opposite to the first surface; and Electronic components, said electronic components being disposed on the second surface of the second substrate; and A conductive adhesion layer is disposed between the first substrate and the second substrate; The conductive adhesive layer comprises a plurality of conductive particles and an adhesive covering the conductive particles; and The conductive adhesive layer includes a first region located between a conductive pad disposed near the second surface of the first substrate and a conductive pad disposed near the first surface of the second substrate; the conductive adhesive layer includes a second region spaced apart from any conductive pad, the conductive pad being disposed horizontally near the first surface of the second substrate; and the ratio between the volume of the conductive particles and the volume of the adhesive in the first region is greater than the ratio between the volume of the conductive particles and the volume of the adhesive in the second region.

2. The semiconductor device package of claim 1, wherein the display device further comprises: A third substrate, disposed on the TFT layer, the third substrate having a cavity; as well as A light-emitting device, wherein the light-emitting device is disposed within the cavity of the third substrate and is electrically connected to the TFT layer.

3. The semiconductor device package according to claim 2, wherein the light-emitting device comprises a micro light-emitting diode (LED), a liquid crystal display (LCD), or an organic light-emitting diode (OLED).

4. The semiconductor device package of claim 1, wherein the electronic module further comprises a package body disposed on the second surface of the second substrate and covering the electronic component.

5. The semiconductor device package of claim 1, wherein the conductive particles comprise a thermally agglomerated material.

6. The semiconductor device package of claim 1, wherein the conductive particles comprise SnBi.

7. The semiconductor device package according to claim 1, wherein... The resistivity of the first region is less than that of the second region.

8. The semiconductor device package of claim 1, wherein the conductive adhesion layer is formed of a stress-absorbing material.

9. The semiconductor device package according to claim 1, wherein The TFT layer includes an insulating layer disposed on the first surface of the first substrate; The insulating layer has conductive vias that gradually narrow towards the first substrate; and The first substrate has a conductive via that gradually narrows toward the first surface of the first substrate and is electrically connected to the conductive via of the insulating layer.

10. The semiconductor device package of claim 1, wherein... The TFT layer includes an insulating layer disposed on the first surface of the first substrate; The insulating layer has conductive vias that gradually narrow towards the first substrate; and The first substrate has a conductive via that gradually narrows from the first surface of the first substrate toward the second surface of the first substrate, and is electrically connected to the conductive via of the insulating layer.

11. The semiconductor device package of claim 1, wherein... The first substrate has a first conductive pad and a second conductive pad spaced apart from the first conductive pad, the first conductive pad and the second conductive pad being disposed near the second surface of the first substrate; The second substrate has a third conductive pad and a fourth conductive pad spaced apart from the third conductive pad. The third conductive pad is disposed near the first surface of the second substrate and corresponds to the first conductive pad. The fourth conductive pad is disposed near the first surface of the second substrate and corresponds to the second conductive pad. The third conductive pad is electrically connected to a via, and the fourth conductive pad is isolated from any via. The resistivity between the first conductive pad and the third conductive pad is substantially the same as that between the second conductive pad and the fourth conductive pad.

12. The semiconductor device package of claim 11, wherein the ratio between the volume of the conductive particles and the volume of the adhesive between the first conductive pad and the third conductive pad is substantially the same as the ratio between the volume of the conductive particles and the volume of the adhesive between the second conductive pad and the fourth conductive pad.

13. A method for manufacturing a semiconductor device package, comprising: (a) A display device is provided, the display device having a first substrate and a TFT layer on a first surface of the first substrate; (b) Provide an electronic module having a second substrate and electronic components disposed on a first surface of the second substrate away from the first substrate; as well as (c) Applying a conductive adhesion layer between the first substrate and the second substrate to connect a second surface of the first substrate opposite to the first surface of the first substrate to a second surface of the second substrate opposite to the first surface of the second substrate; The conductive adhesive layer comprises a plurality of conductive particles and an adhesive covering the conductive particles; and The conductive adhesion layer includes a first region located between a conductive pad disposed near the second surface of the first substrate and a conductive pad disposed near the first surface of the second substrate; The conductive adhesive layer includes a second region spaced apart from any conductive pad, the conductive pad being disposed horizontally near the first surface of the second substrate; and the ratio between the volume of the conductive particles and the volume of the adhesive in the first region is greater than the ratio between the volume of the conductive particles and the volume of the adhesive in the second region.

14. The method of claim 13, wherein the conductive adhesive layer is heated by directly applying heat to the conductive adhesive layer.

15. The method of claim 14, wherein the conductive adhesive layer is heated by induction heating directly on the conductive adhesive layer.

16. The method of claim 13, further comprising applying an alternating magnetic field to the first substrate and the second substrate.

17. The method of claim 13, wherein during operation (c), the conductive pads disposed near the second surface of the second substrate have substantially the same temperature.

18. The method of claim 13, wherein the display device further comprises a light-emitting device disposed on the TFT layer and electrically connected to the TFT layer.

19. The method of claim 13, wherein operation (c) further comprises: An elastic adhesion layer is disposed on the second surface of the second substrate; Multiple openings are formed that penetrate the elastic adhesive layer to expose a portion of the second surface of the second substrate; as well as The opening is filled with a conductive material.

20. The method of claim 19, further comprising, after operation (c): The light-emitting device is placed on the TFT layer and electrically connected to the TFT layer.

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