Compensation circuit and chip, method, device, storage medium and electronic device

Abstract

The application provides a compensation circuit, a chip, a method, a device, a storage medium and an electronic device, and the compensation circuit comprises: an analog module comprising an input node and an output node; the input node is configured to receive an input signal, and the output node is configured to output an output signal; and a linearity compensation module comprising a plurality of transconductance units, wherein the plurality of transconductance units are configured to obtain a first configuration signal, and configure a combination of the plurality of transconductance units according to the first configuration signal, so as to provide the compensation signal to the output node; and the first configuration signal is used to indicate a signal at any position in the analog module. Through the application, the problem of large linearity compensation deviation caused by the fact that the nonlinearity source and influencing factors are not comprehensively considered in the linearity compensation process in the related art is solved, so as to improve the reliability of the linearity compensation technology.

Description

Technical Field

[0001] This invention relates to the field of electronics, and more specifically, to a compensation circuit and chip, method, apparatus, storage medium, and electronic device. Background Technology

[0002] With the development of wireless communication systems, the signal bandwidth of analog channels has increased significantly, posing a severe challenge to the design of broadband analog signal processing circuits, such as analog active resistor-capacitor (RC) filters, transimpedance amplifiers, and Delta-Sigma modulators. Among these, linearity, a crucial indicator in wireless communication systems, directly determines the overall performance of broadband analog signal processing circuits. Taking the design of an operational transconductance amplifier (OTA) as an example, to suppress nonlinearity, the OTA in an analog circuit needs to maintain sufficient open-loop gain over a wide frequency range. However, in analog integrated circuits using advanced CMOS technology, high-gain, large-bandwidth OTA designs typically rely on additional power consumption and chip area overhead, severely limiting the application of analog signal processing circuits in wireless communication systems. To reduce the design difficulty and cost of OTAs, appropriate linearity compensation schemes are needed to compensate for the linearity of OTAs, thereby improving the linearity performance of analog circuits. However, in related technologies, due to the incomplete consideration of the sources and influencing factors of nonlinearity during linearity compensation, only some nonlinear factors can be compensated, resulting in significant deviations in the actual linearity compensation effect and poor reliability and practicality.

[0003] In response to the problem of large deviations in linearity compensation caused by incomplete consideration of nonlinearity sources and influencing factors in the aforementioned related technologies, no effective solution has yet been proposed in these technologies. Summary of the Invention

[0004] This invention provides a compensation circuit and chip, method, apparatus, storage medium, and electronic device to at least solve the problem of large linearity compensation deviation caused by incomplete consideration of nonlinearity sources and influencing factors in the linearity compensation process in related technologies.

[0005] According to one embodiment of the present invention, a compensation circuit is provided, comprising:

[0006] The analog module includes an input node and an output node; wherein the input node is configured to receive an input signal, and the output node is configured to output an output signal;

[0007] A linearity compensation module includes multiple transconductance units, wherein the multiple transconductance units are configured to acquire a first configuration signal and configure a combination of the multiple transconductance units according to the first configuration signal to provide the compensation signal to the output node; the first configuration signal is used to indicate the signal at any position in the simulation module.

[0008] According to another embodiment of the present invention, a compensation chip is also provided, including the compensation circuit in the above embodiment.

[0009] According to another embodiment of the present invention, a compensation method is provided, applied to a simulation module, the simulation module including an input node and an output node; the method includes:

[0010] A first configuration signal is acquired, and a combination of multiple transconductance units is configured according to the first configuration signal to provide a compensation signal to the output node; wherein the first configuration signal is used to indicate the signal at any position in the analog module.

[0011] According to another embodiment of the present invention, a compensation circuit is also provided, comprising:

[0012] The analog module includes an input node and an output node, wherein the input node is configured to receive an input signal and the output node is configured to output an output signal;

[0013] The detection module is configured to detect the operating information of the simulation module and provide a second configuration signal based on the operating information;

[0014] A linearity compensation module is configured to acquire a first configuration signal and a second configuration signal, and provide a compensation signal to the output node according to the first configuration signal and / or the second configuration signal, wherein the first configuration signal is used to indicate the signal at any position in the simulation module.

[0015] According to another embodiment of the present invention, a compensation chip is also provided, including the compensation circuit in the above embodiment.

[0016] According to another embodiment of the present invention, a compensation method is also provided, applied to a simulation module, the simulation module including an input node and an output node; the method includes:

[0017] The operating information of the simulation module is detected, and a second configuration signal is provided based on the operating information;

[0018] Acquire a first configuration signal and a second configuration signal, and provide a compensation signal to the output node according to the first configuration signal and / or the second configuration signal, wherein the first configuration signal is used to indicate a signal at any position in the simulation module.

[0019] According to another embodiment of the present invention, a compensation device is also provided, applied to an analog module, the analog module including an input node and an output node; the device includes:

[0020] A first compensation module is configured to acquire a first configuration signal and configure a combination of multiple transconductance units according to the first configuration signal to provide a compensation signal to the output node; wherein the first configuration signal is used to indicate the signal at any position in the analog module.

[0021] According to another embodiment of the present invention, a compensation device is also provided, applied to an analog module, the analog module including an input node and an output node; the device includes:

[0022] A module is provided for detecting the operating information of the simulation module and providing a second configuration signal based on the operating information;

[0023] The second compensation module is used to acquire a first configuration signal and a second configuration signal, and to provide a compensation signal to the output node according to the first configuration signal and / or the second configuration signal, wherein the first configuration signal is used to indicate the signal at any position in the simulation module.

[0024] According to yet another embodiment of the present invention, a storage medium is also provided, wherein a computer program is stored therein, wherein the computer program is configured to execute the steps in any of the above method embodiments when running.

[0025] According to yet another embodiment of the present invention, an electronic device is also provided, including a memory and a processor, wherein the memory stores a computer program and the processor is configured to run the computer program to perform the steps in any of the above method embodiments.

[0026] Through this invention, since the linearity compensation module in the compensation circuit can configure the combination of the plurality of transconductance units according to the acquired first configuration signal to provide a compensation signal to the output node in the analog module; wherein, the first configuration signal is used to indicate the signal at any position in the analog module; therefore, this invention can solve the problem of large linearity compensation deviation caused by the incomplete consideration of nonlinearity sources and influencing factors in the linearity compensation process in related technologies, so as to improve the reliability of linearity compensation technology. Attached Figure Description

[0027] The accompanying drawings, which are included to provide a further understanding of the invention and form part of this application, illustrate exemplary embodiments of the invention and, together with their description, serve to explain the invention and do not constitute an undue limitation thereof. In the drawings:

[0028] Figure 1 This is a functional schematic diagram (I) of the compensation circuit provided according to an embodiment of the present invention;

[0029] Figure 2 This is a circuit diagram of an analog module provided according to an embodiment of the present invention;

[0030] Figure 3 This is a circuit diagram (a) of a linearity compensation module provided according to an embodiment of the present invention;

[0031] Figure 4 This is a circuit diagram (II) of the linearity compensation module provided according to an embodiment of the present invention;

[0032] Figure 5 This is an internal structure diagram (a) of a common-source, common-gate transconductance subcell provided according to an embodiment of the present invention;

[0033] Figure 6 This is a diagram (II) showing the internal structure of a common-source, common-gate transconductance subcell according to an embodiment of the present invention.

[0034] Figure 7 This is an internal structure diagram of a common-gate transconductance subcell provided according to an embodiment of the present invention;

[0035] Figure 8 This is a flowchart (a) of the compensation method provided according to an embodiment of the present invention;

[0036] Figure 9 This is a functional schematic diagram (II) of the compensation circuit provided according to an embodiment of the present invention;

[0037] Figure 10 This is a circuit diagram (III) of the linearity compensation module provided according to an embodiment of the present invention;

[0038] Figure 11 This is a circuit diagram (IV) of the linearity compensation module provided according to an embodiment of the present invention;

[0039] Figure 12 This is a flowchart (II) of the compensation method provided according to an embodiment of the present invention;

[0040] Figure 13 This is a structural block diagram (a) of the compensation device provided according to an embodiment of the present invention;

[0041] Figure 14 This is a structural block diagram (II) of the compensation device provided according to an embodiment of the present invention. Detailed Implementation

[0042] The present invention will be described in detail below with reference to the accompanying drawings and embodiments. It should be noted that, unless otherwise specified, the embodiments and features described in the present application can be combined with each other.

[0043] It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0044] Example 1

[0045] This embodiment provides a compensation circuit. Figure 1 This is a functional schematic diagram (I) of the compensation circuit provided according to an embodiment of the present invention, as shown below. Figure 1 As shown, the compensation circuit includes:

[0046] The analog module 102 includes an input node 1022 and an output node 1024; wherein the input node 1022 is configured to receive input signals and the output node 1024 is configured to output output signals.

[0047] The linearity compensation module 104 includes multiple transconductance units 1042, wherein the multiple transconductance units 1042 are configured to acquire a first configuration signal and configure a combination of multiple transconductance units 1042 according to the first configuration signal to provide a compensation signal to the output node 1024; the first configuration signal is used to indicate the signal at any position in the analog module 102.

[0048] It should be further noted that in the simulation module 102, there are often multiple input nodes 1022 and output nodes 1024, such as... Figure 1 As shown, the analog module 102 is configured with multiple input nodes 1022 and multiple output nodes 1024, and each input node 1022 is used to receive the corresponding input signals X1 to X24. n Each output node 1024 is used to output the corresponding output signal Y1 to Y2. m Correspondingly, the first configuration signal obtained in the linearity compensation module 104 is the signal at any position in the analog module 102, such as... Figure 1 As shown, the first configuration signal can indicate the input signals X1 to X2 of the analog module. n Or output signal Y1~Y m Or the process signals Z1 to Z2 between the input node and the output node. n Alternatively, it can be the above-mentioned input signals X1 to X... n Output signals Y1~Y m and process signals Z1~Z n The present invention does not limit the combination of these elements.

[0049] Depending on the design purpose or function of the aforementioned analog modules, different electronic devices, such as active RC filters, transimpedance amplifiers, and OTAs, can be configured or connected between the input and output nodes to form different broadband analog signal processing circuits. This embodiment takes an OTA-based broadband analog signal processing circuit as an example, where an OTA is set between the input and output nodes in the analog module. The input node provides the input signal to the OTA, and the output node outputs the OTA's output signal.

[0050] Figure 2 This is a circuit diagram of an analog module provided according to an embodiment of the present invention, such as... Figure 2 As shown, the analog module 102 includes multiple input nodes, and the input signals provided by the multiple input nodes 1022 are voltage signals V. i1 V i2 ...V in The aforementioned multiple input signals are respectively transmitted through the load G on the corresponding branch of the input node. 11 G 12 ...G 1n Access to OTA1026 (i.e.) Figure 2 G shown OTA The input terminal V x And after the OTA completes the conversion from voltage signal to current signal, the output terminal V of the OTA outputs the signal. o Thus, the output terminal of the OTA forms the output node 1024 of the analog module, and the output signal of the OTA is the output signal corresponding to the output node 1024. Meanwhile, in the analog module 102, the input terminal V of the OTA... x With output terminal V o A load G2 is connected between the two terminals, and an output load G3 is also connected between the output terminal of the OTA and the signal ground. It should be further noted that the OTA in this embodiment is a conventional OTA device in the art. Those skilled in the art can understand the internal circuit structure of the OTA and the signal processing method based on the known knowledge in the art, so this invention will not elaborate on it.

[0051] In this embodiment, the first configuration signal obtained by the linearity compensation module 104 is the signal at any position in the analog module 102. Figure 1 In this context, the first configuration signal can indicate the input signals X1 to X2 of the analog module. n Each output node 1024 is used to output the corresponding output signal Y1~Y2. m And the process signals Z1 to Z2 between the input and output nodes. n Alternatively, it can be the above-mentioned input signals X1 to X... n Output signals Y1~Y mProcess signals Z1~Z n The present invention does not limit the combination of these elements. As before... Figure 2 The following example illustrates a broadband analog signal processing circuit based on OTA (Over-The-Air) technology. The first configuration signal is used to indicate... Figure 2 The signal at any position in the analog module 102 shown, that is, the first configuration signal, can be the input signal V. i1 V i2 ...V in It can be the output signal V o It can also be a process signal at any position between the input node and the output node, such as the load G. 11 G 12 ...G 1n The signal corresponding to the position can also be a combination of the above-mentioned input signals, output signals, and process signals.

[0052] Figure 3 This is a circuit diagram (I) of a linearity compensation module provided according to an embodiment of the present invention, as shown below. Figure 3 As shown, the linearity compensation module 104 includes multiple transconductance units 1042, corresponding to G. c1 G c2 ...G cn G co The linearity compensation module configures combinations of multiple transconductance units based on different first configuration signals. Specifically, it configures the objects and number of transconductance units to be processed in the linearity compensation module. By combining different transconductance units, it performs transconductance processing on the input first configuration signal to output a compensation signal, which is then provided to the output node of the analog module to compensate the output signal. For example... Figure 3 In the linearity compensation module shown, when only the input signal of the input node in the analog module is used as the first configuration signal, only G in multiple transconductance units can be configured accordingly. c1 G c2 ...G cn To form a combination to participate in the transconductance processing of the signal, when only the output signal of the output node in the analog module is used as the first configuration signal, only G in multiple transconductance units can be configured accordingly. co To participate in the transconductance processing of the signal. In this embodiment, the linearity compensation module takes the combination of the input signal of the input node and the output signal of the output node as an example. Among multiple transconductance units, G... c1 G c2 ...G cn The input signals V corresponding to the input nodes are respectively i1 V i2 ...V in G coThe corresponding output signal V of the connected output node o .

[0053] In the linearity compensation module, multiple transconductance units can use devices of the same size or different sizes. When multiple transconductance units can use devices of the same size, the transconductance processing of the first configuration signal can be achieved by configuring the number of transconductance units to form corresponding combinations. When multiple transconductance units use devices of different sizes, the transconductance of the transconductance units differs due to the different device sizes. Therefore, in this case, based on configuring the number of transconductance units, transconductance unit objects of corresponding device sizes can be configured for signals of different branches in the first configuration signal to form corresponding combinations. To further increase the applicability of the linearity compensation module for configuring the first configuration signal, the linearity compensation module in this embodiment uses transconductance units of different device sizes to construct the linearity compensation module, that is, in Figure 3 In the linearity compensation module shown, different transconductance units G c1 G c2 ...G cn G co Different sizes of devices are used between them, namely transconductance unit G. c1 G c2 ...G cn G co There are at least two transconductance units that use devices of different sizes. Specifically, the device sizes of multiple transconductance units may be different from each other, or the device sizes of multiple transconductance units may be partially different. This invention does not limit this.

[0054] To further explain the process of configuring different transconductance units in the linearity compensation module, the following describes the compensation method of the transconductance units and the combination method of configuring the transconductance units.

[0055] In the compensation circuit of this embodiment, the output signal V of the output node in the analog module o The existence of linear and nonlinear components, and the process of using a linearity compensation module to provide a compensation signal to the output signal, is the process of compensating for the aforementioned nonlinear components. Typically, the aforementioned nonlinear components are related to the input signal V at the input terminal of the OTA. x The swing amplitudes are negatively correlated; therefore, the input signal V at the input terminal of the OTA can be used as a reference. x To obtain the compensation signal that needs to compensate for the nonlinear components. Figure 3 In the circuit diagram of the linearity compensation module shown, the input signal V at the input terminal of OTA is... x The input and output signals of the module have the following relationship:

[0056]

[0057] The above i c This refers to the compensation signal provided by the linearity compensation module; in this embodiment, it is the compensation current, i c Further satisfy:

[0058]

[0059] Formula 2 above can serve as the basis for the linearity compensation module to perform linearity compensation, that is, through the transconductance unit G in the linearity compensation module. c1 G c2 ...G cn The combination of these elements provides the compensation current G for the input section. 1j V ij This compensates for V in the input signal. i1 V i2 ...V in The corresponding nonlinear components, simultaneously through the transconductance unit G co To provide compensation current G3V for the output section o This compensates the output signal V o The corresponding nonlinear components. Therefore, the nonlinear components in the input and output signals of the analog module can be compensated by setting the linearity compensation module.

[0060] Specifically, after determining the compensation current according to the above method, the combination of transconductance units can be determined for configuration in this embodiment using the following method:

[0061] Enumeration method: Arrange the possible combinations of multiple transconductance units in the linearity compensation module in sequence, substitute the first configuration signal, i.e. the input signal and output signal of the module, into each of the above combinations of transconductance units, traverse all combinations, and try the compensation signal output under different combinations of transconductance units in turn, so as to obtain the combination of transconductance units with the best linearity compensation effect as the actual configuration of multiple transconductance unit combinations in the linearity compensation module.

[0062] Search method: Test different configuration signals corresponding to the analog module in advance to obtain the compensation signal required for each configuration signal, and confirm the combination of transconductance units corresponding to the compensation signal; In the actual compensation process of the analog circuit, after obtaining the first configuration signal, the linearity compensation module can determine the combination of transconductance units corresponding to the current configuration signal according to the correspondence between the above configuration signal and the combination of transconductance units, and configure accordingly.

[0063] It should be further noted that the above two methods are only optional configuration methods in the process of configuring multiple transconductance units in the linearity compensation module in this embodiment. Any method that can configure the combination of transconductance units according to the corresponding relationship of compensation current in this embodiment is within the protection scope of this invention, and this invention does not limit it.

[0064] Through the compensation circuit in this embodiment, the linearity compensation module in the compensation circuit can configure the combination of the plurality of transconductance units according to the acquired first configuration signal to provide a compensation signal to the output node in the analog module; wherein, the first configuration signal is used to indicate the signal at any position in the analog module; therefore, the above-mentioned compensation circuit can solve the problem of large linearity compensation deviation caused by the incomplete consideration of the source of linearity in the linearity compensation process in the related art, so as to improve the reliability of linearity.

[0065] It should be further explained that, in this embodiment, the linearity compensation module in the above-mentioned compensation circuit can absorb the input and output signals of the analog module and provide compensation current for the output signal of the OTA in the analog circuit accordingly, thereby reducing the swing of the OTA input terminal and improving the linearity of the output signal. Therefore, the analog circuit does not need to strictly consider the gain and bandwidth of the OTA during the design process, thus indirectly reducing the performance requirements and cost of the OTA design. On the other hand, the linearity compensation module in this embodiment is not limited to a fixed transconductance value. It can be configured with the corresponding transconductance unit combination according to the different configuration signals in the analog circuit. Therefore, the above-mentioned linearity compensation module can be applied to analog modules with different bandwidth modes and different frequency components, thus significantly improving the reliability of linearity compensation for analog modules with different bandwidth modes and frequency components. At the same time, it can also make the linearity compensation module configurable or adaptable.

[0066] In an optional embodiment, each transconductance unit 1042 in the linearity compensation module 104 includes a plurality of transconductance subunits 10422 connected in parallel with each other; wherein the plurality of transconductance units 1042 and the plurality of transconductance subunits 10422 are configured to acquire a first configuration signal and configure a combination of the plurality of transconductance units 1042 and a combination of the plurality of transconductance subunits 10422 in the transconductance unit 1042 according to the first configuration signal, so as to provide a compensation signal to the output node 1024.

[0067] Figure 4 This is a circuit diagram (II) of the linearity compensation module provided according to an embodiment of the present invention, as shown below. Figure 4 As shown, each transconductance unit 1042 is composed of multiple transconductance sub-units 10422 connected in parallel, with transconductance unit G... c1 For example, the transconductance unit Gc1 It includes multiple interconnected transconductance subunits G c1,1 G c1,2 ...G c1,m1 The linearity compensation module described above configures a combination of multiple transconductance units and a combination of multiple transconductance sub-units within the transconductance units according to the first configuration signal. This indicates that the linearity compensation module has two configuration dimensions during configuration. The first dimension indicates the configuration of the objects and number of transconductance units, and the second dimension indicates the configuration of the objects and number of transconductance sub-units within the transconductance units based on the configuration of the objects and number of transconductance units in the first dimension. When the transconductance units with different objects and numbers and the transconductance sub-units with different objects and numbers within each transconductance unit participate in the transconductance processing of the signal, different transconductance processing results for the signal can be formed.

[0068] For each transconductance unit, it is obvious that since the multiple transconductance sub-units within the transconductance unit are connected in parallel, the transconductance size of the transconductance unit can be adjusted by configuring different objects and numbers of transconductance sub-units within the same transconductance unit. Therefore, in the above embodiments, the situation where different transconductance units use devices of different sizes can also be achieved by configuring the objects and numbers of transconductance sub-units within each transconductance unit, that is, configuring the objects and numbers of transconductance sub-units within each transconductance unit according to the first configuration signal.

[0069] Correspondingly, different transconductance subunits within the same transconductance unit can use devices of the same size or different sizes. When multiple transconductance subunits use devices of the same size, corresponding combinations can be formed by configuring the number of transconductance subunits, thereby achieving transconductance processing of the first configuration signal. When multiple transconductance subunits use devices of different sizes, the transconductance of the transconductance subunits differs due to the different device sizes. Therefore, in this case, based on configuring the number of transconductance subunits, corresponding transconductance subunit objects of different device sizes can be configured for different first configuration signals to form corresponding combinations. To further increase the applicability of the linearity compensation module in configuring the first configuration signal, in this optional embodiment, multiple transconductance subunits within each transconductance unit of the linearity compensation module can use devices of different sizes. Figure 4 In the linearity compensation module shown, the transconductance unit G... c1 For example, the transconductance unit G c1 Multiple transconducting subunits G c1,1 G c1,2 ...G c1,m1 G c1,1There are at least two transconductance sub-units that use devices of different sizes. Specifically, the device sizes of multiple transconductance sub-units may be different from each other, or the device sizes of multiple transconductance sub-units may be partially different. This invention does not limit this.

[0070] It should be further explained that, regardless of whether the device sizes of the multiple transconductance sub-units are the same, different transconductance units can be connected in parallel with different numbers of transconductance sub-units to form transconductance units of different transconductance sizes. Therefore, the multiple configuration dimensions of the linearity compensation module in the above optional embodiments can significantly improve the applicability of the linearity compensation module.

[0071] In this optional embodiment, after introducing multiple configuration dimensions composed of different transconductance sub-units, the way to compensate the transconductance unit and the way to configure the combination of transconductance units are based on the configuration of the transconductance unit by the linearity compensation module in the above embodiment, and the multiple transconductance sub-units in each transconductance unit are configured again.

[0072] Specifically, during the configuration of the compensation current, Formula 2 above can still be used as the basis for linearity compensation by the linearity compensation module. This is achieved through the transconductance unit G in the linearity compensation module. c1 G c2 ...G cn G co The combination of these elements provides the compensation current G for the input section. 1j V ij This compensates for V in the input signal. i1 V i2 ...V in Based on the corresponding nonlinear components, the nonlinear components of the input signal corresponding to each transconductance unit can be more effectively compensated by configuring a combination of multiple transconductance sub-units in each transconductance unit. For example, transconductance unit G c1 Multiple transconducting subunits G in c1,1 G c1,2 ...G c1,m1 The interval can be determined based on the input signal V. i1 The numerical values ​​determine the corresponding combinations, thereby enabling the additional transconductance unit G. c1 This combination is used to form the corresponding transconductance value, so as to achieve the input signal V i1 Compensation. And so on, for each transconductance unit G c1 G c2 ...G cn G co Compensation can be achieved by configuring the combination of internal transconductance sub-units.

[0073] Accordingly, after determining the compensation current according to the above method, this optional embodiment can still adopt the method described in the above embodiment when determining the combination of transconductance units for configuration, for example:

[0074] Enumeration method: Arrange the possible combinations of multiple transconductance units and multiple transconductance subunits in the linearity compensation module in sequence. Substitute the first configuration signal, i.e. the input signal and output signal of the module, into each of the above combinations. Iterate through all combinations and try the compensation signals output under different combinations in turn. In this way, obtain the corresponding combination with the best linearity compensation effect as the actual configuration of the multiple transconductance units and multiple transconductance subunits in the linearity compensation module.

[0075] Search method: Test different configuration signals corresponding to the analog module in advance to obtain the compensation signal required for each configuration signal, and use this to confirm the multiple transconductance units and the combination of multiple transconductance sub-units in the transconductance units corresponding to the compensation signal; In the actual compensation process of the analog circuit, after obtaining the first configuration signal, the linearity compensation module can determine the multiple transconductance units and the combination of multiple transconductance sub-units in the current configuration signal according to the correspondence between the above configuration signal and multiple combinations, and configure accordingly.

[0076] It should be further explained that the configuration of the transconductance unit in the above optional embodiments can improve the configurability of the linearity compensation module during the configuration process according to the first configuration signal due to the setting of multiple configuration dimensions, thereby significantly increasing the effectiveness and reliability of the linearity compensation module for linearity compensation corresponding to different analog modules.

[0077] In an optional embodiment, the transconductance sub-unit 10422 includes a transconductance tube 108 and a bias tube 110, wherein the gate of the transconductance tube 108 is configured to acquire a first configuration signal, and the drain of the transconductance tube 108 is configured to provide a signal to the source of the bias tube 110; the gate of the bias tube 110 is configured to acquire a bias signal, and the drain of the bias tube 110 is configured to provide a compensation signal.

[0078] Both the transconductor 108 and the bias tube 110 are PMOS transistors, or both the transconductor 108 and the bias tube 110 are NOMS transistors.

[0079] It should be further explained that the aforementioned transconductor and bias tube constitute a common-source, common-gate transconductor subunit. Figure 5 This is an internal structure diagram (I) of a common-source, common-gate transconductance subcell provided according to an embodiment of the present invention, as shown below. Figure 5 As shown, both the transconductor Ma and the bias transistor Mb are NMOS transistors. The gate of the transconductor Ma serves as the input terminal of the transconductance sub-cell to obtain the first configuration signal V.i The drain of the transconductor Ma is configured to provide a signal to the source of the bias transistor Mb, and the source of the transconductor Ma is used to ground the signal; the gate of the bias transistor Mb is configured to acquire the bias signal V. B The drain of the bias transistor Mb is configured to provide a compensation signal; the bias signal V acquired by the gate of the bias transistor Mb is... B The bias signal can be provided by a DC bias module 112. This DC bias module can be provided by an analog module, that is, the process signal in the analog module is provided as a bias signal to the bias tube. Alternatively, an independently set DC bias module can be used, that is, a separate circuit module is provided for the bias signal of the bias tube. The present invention does not limit this. Figure 6 This is a diagram (II) showing the internal structure of a common-source, common-gate transconductance subcell according to an embodiment of the present invention. Figure 6 As shown, both the transconductor Ma and the bias transistor Mb are PMOS transistors. In this case, the connection method between the transconductor Ma and the bias transistor Mb is the same as that in the case where the transconductor Ma and the bias transistor Mb are NMOS transistors, and will not be repeated here.

[0080] To further illustrate the operation of the aforementioned cascode transconductance subcell, the working principle of this cascode transconductance subcell is further explained below:

[0081] The above Figure 5 or Figure 6 In the cascode transconductance subcell shown, the transconductor Ma operates in the linear region, and the bias transistor Mb operates in the saturation region. The transconductance of the transconductor is approximately linearly related to its drain-source voltage, i.e., g m ≈KV DS , where g m For the transconductance of Ma, V DS Let V be the drain-source voltage across the transconduit Ma, and K be the process and dimensional parameters of the transconduit Ma. From this, we can see that, with the transconduit and bias transistor dimensions unchanged, by connecting a bias signal (bias voltage) V to the gate of the bias transistor... B You can then use V B The corresponding change in the drain-source voltage and transconductance of the other transconductor generates a corresponding compensation current. In this embodiment, the bias voltage V B It can be set to an adjustable voltage or a fixed voltage. The dimensions of the transducer and bias tube can be pre-configured according to the actual analog circuit state, or it can be designed to be adjustable in size.

[0082] In an optional embodiment, the transconductance subunit includes an input terminal, an output terminal, and a current mirror 114 disposed between the input terminal and the output terminal, wherein the output terminal is configured to provide a compensation signal;

[0083] The input terminal includes a PMOS transistor 116 and an NMOS transistor 118. The source of the PMOS transistor 116 is connected to the source of the NMOS transistor 118. The sources of the PMOS transistor 116 and the NMOS transistor 118 are configured to acquire a first configuration signal. The gate of the PMOS transistor 116 is configured to acquire a first bias signal 118. The gate of the NMOS transistor 118 is configured to acquire a second bias signal. The drains of the PMOS transistor 116 and the NMOS transistor 118 are configured to provide a signal to the current mirror 114.

[0084] It should be further explained that the aforementioned transconductor and bias tube constitute a common-gate transconductor sub-unit. Figure 7 This is an internal structure diagram of a common-gate transconductance subcell provided according to an embodiment of the present invention, such as... Figure 7 As shown, the input terminal of the common-gate transconductance sub-unit includes two input transistors, Mp and Mn. Input transistor Mp is a PMOS transistor, and input transistor Mn is an NMOS transistor. The source of input transistor Mp is connected to the source of input transistor Mn and is used to receive the input signal, i.e., the first configuration signal in this embodiment. The gates of input transistors Mp and Mn are respectively used to connect to bias signals, wherein the gate of input transistor Mp is used to obtain the first bias signal V. bn The gate of the input transistor Mn is used to obtain the second bias signal V. bp The drains of input transistors Mp and Mn are connected to the corresponding current mirror modules, and the output is generated after passing through the current mirror modules.

[0085] To further illustrate the operation of the aforementioned common-source cascode transconductance sub-unit, the working principle of this common-source cascode transconductance sub-unit is further explained below:

[0086] Taking the input transistor Mn as an example, the transconductance of Mn is connected to the second bias voltage V at the gate and source. bp The relationship is roughly linear, i.e., g m ≈K(V GS -V TH ), where K represents the MOSFET's manufacturing process and dimensions, and V GS V is the gate-source voltage of the MOSFET. TH This is the threshold voltage of the MOSFET. After the input signal, i.e., the voltage connected to the source of Mn, changes, V... GS This will also cause changes, thus altering the transconductance and drain current provided by Mn. The compensation current is then mirrored to the output stage via the current mirror module to achieve the output. In this embodiment, the dimensions of the input transistors Mn and Mp, i.e., K, can be pre-configured according to the actual analog circuit state, or adjustable in size can be designed to increase the control capability of the compensation current.

[0087] In one optional embodiment, the first configuration signal includes: an input signal, an output signal, and a process signal at any position between the input node and the output node in the analog module.

[0088] It should be further explained that the first configuration signal can also be a combination of the above-mentioned input signal, output signal and process signal. In this embodiment, the input signal and output signal are used as the first configuration signal for illustration, and will not be described in detail here.

[0089] In an optional embodiment, when the first configuration signal is an input signal, the multiple transconductance units are configured such that each transconductance unit acquires the input signal of an input node.

[0090] It should be further explained that the number of transconductance units mentioned above corresponds to the number of the first configuration signals, so as to ensure that the transconductance units can compensate for the nonlinear components in each input signal.

[0091] Example 2

[0092] This embodiment also provides a compensation chip, including the compensation circuit in Embodiment 1 and the optional embodiments corresponding to Embodiment 1; the technical solution and technical effect of the compensation circuit in the compensation chip in this embodiment are the same as those in Embodiment 1, and will not be repeated here.

[0093] Example 3

[0094] This embodiment also provides a compensation method applied to a simulation module, which includes an input node and an output node. Figure 8 This is a flowchart (I) of the compensation method provided according to an embodiment of the present invention, as follows: Figure 8 As shown, the compensation method includes:

[0095] S301, the linearity compensation module acquires the first configuration signal and configures a combination of multiple transconductance units according to the first configuration signal to provide a compensation signal to the output node; wherein, the first configuration signal is used to indicate the signal at any position in the analog module.

[0096] The compensation method in this embodiment allows for the configuration of the combination of the plurality of transconductance units based on the acquired first configuration signal to provide a compensation signal to the output node in the analog module; wherein the first configuration signal is used to indicate the signal at any position in the analog module; therefore, the above compensation method can solve the problem of large linearity compensation deviation caused by incomplete consideration of nonlinearity sources and influencing factors in the linearity compensation process in related technologies, thereby improving the reliability of linearity compensation technology.

[0097] The remaining technical solutions and effects of the compensation method in this embodiment correspond to the technical solutions and effects of the compensation circuit in Embodiment 1 and the optional embodiments corresponding to Embodiment 1, so they will not be repeated here.

[0098] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of the present invention.

[0099] Example 4

[0100] This embodiment also provides a compensation circuit. Figure 9 This is a functional schematic diagram (II) of the compensation circuit provided according to an embodiment of the present invention, as shown below. Figure 9 As shown, the compensation circuit includes:

[0101] The analog module 402 includes an input node 4022 and an output node 4024, wherein the input node is configured to receive input signals and the output node is configured to output output signals;

[0102] The detection module 404 is configured to detect the working information of the simulation module 402 and provide a second configuration signal based on the working information;

[0103] The linearity compensation module 406 is configured to acquire a first configuration signal and a second configuration signal, and provide a compensation signal to the output node according to the first configuration signal and / or the second configuration signal, wherein the first configuration signal is used to indicate the signal at any position in the analog module.

[0104] It should be further noted that in the simulation module 402, there are often multiple input nodes 4022 and output nodes 4024, such as... Figure 9 As shown, the analog module 402 is configured with multiple input nodes 4022 and multiple output nodes 4024, and each input node 4022 is used to receive the corresponding input signals X1 to X24. n Each output node 4024 is used to output the corresponding output signal Y1 to Y2. mDepending on the design purpose or function of the aforementioned analog modules, different electronic devices, such as active RC filters, transimpedance amplifiers, and OTAs, can be configured or connected between the input and output nodes to form different broadband analog signal processing circuits. This invention does not limit this approach. This embodiment takes an OTA-based broadband analog signal processing circuit as an example, where an OTA is set between the input and output nodes in the analog module. The input node provides the input signal to the OTA, and the output node outputs the OTA's output signal.

[0105] The aforementioned detection module 404 is used to detect the operating information of the simulation module 402 during operation. In an optional embodiment, the operating information of the simulation module 402 includes one of the following: process information, voltage information, temperature information, and frequency information. The process information indicates the process corner information of the MOS transistor in the compensation circuit of this embodiment; the voltage information indicates the power supply voltage information of the compensation circuit in this embodiment; the temperature information indicates the operating temperature or ambient temperature information of the compensation circuit in this embodiment; and the frequency information indicates the frequency component information of the compensation circuit in this embodiment. It should be further noted that the aforementioned detection module can be a single module or multiple independently configured detection units, such as a voltage sensor for detecting the power supply voltage information of the compensation circuit, or a temperature sensor for detecting the operating temperature or ambient temperature of the compensation circuit. This invention does not limit the type of the aforementioned detection module; any device type or structural layout capable of detecting corresponding information in the simulation circuit can be used as a detection module.

[0106] Further, after acquiring the aforementioned working information, the detection module 404 processes the working information, such as encoding and encapsulating it, to obtain the corresponding second configuration signal. In the optional embodiment described above, when the working information includes one of process information, voltage information, temperature information, and frequency information, the process information can generate a corresponding process configuration signal, the voltage information can generate a corresponding voltage configuration signal, the temperature information can generate a corresponding temperature configuration signal, and the frequency information can generate a corresponding frequency configuration signal. After acquiring the second configuration signal, the detection module can provide it to the linearity compensation module. Figure 9 As shown, the detection module acquires the process information P from the simulation module. i Voltage information V i Temperature information T i Frequency information F i And generate the corresponding process configuration signal P. o Voltage configuration signal V o Temperature configuration signal T o Frequency configuration signal F o The above process configuration signal P oVoltage configuration signal V o Temperature configuration signal T o Frequency configuration signal F o The unified signal is sent to the linearity compensation module as the second configuration signal.

[0107] The linearity compensation module 406 can acquire the second configuration signal provided by the detection module 404, and also the first configuration signal provided by the simulation module 402; the first configuration signal acquired by the linearity compensation module is the signal at any position in the simulation module 402, such as... Figure 9 As shown, the first configuration signal can indicate the input signals X1 to X2 of the analog module. n Or output signal Y1~Y m Or the process signals Z1 to Z2 between the input node and the output node. n Alternatively, it can be the above-mentioned input signals X1 to X... n Output signals Y1~Y m and process signals Z1~Z n The present invention does not limit the combination of these two signals. The linearity compensation module obtains the first configuration signal and the second configuration signal, and based on these, obtains the compensation signal and provides it to the output node of the analog module.

[0108] It should be further explained that the operating information of the simulation module, such as process information and temperature information, is only generated after the simulation module starts working and will change with different operating environments. Therefore, when the simulation module first starts working, the operating information is often not detectable or the detected operating information is inaccurate. In this case, the linearity compensation module can obtain the compensation signal based solely on the first configuration signal. When the simulation module is in a stable operating state, the linearity compensation module can obtain the compensation signal simultaneously based on both the first and second configuration signals. At the same time, the linearity compensation module can also perform independent linearity compensation based solely on the operating information of the simulation module, that is, obtain the compensation signal solely based on the second configuration signal.

[0109] To further illustrate the process by which the linearity compensation module acquires the compensation signal based on the first configuration signal and / or the second configuration signal, the following describes the method for acquiring the compensation signal:

[0110] Enumeration method: Substitute the first configuration signal and / or the second configuration signal into the linearity compensation module, calculate the corresponding compensation signal under the first configuration signal and / or the second configuration signal using all possible compensation methods in the linearity compensation module, and use the compensation signal with the best compensation effect as the actual compensation signal to perform linearity compensation processing on the analog module.

[0111] Search method: The different input / output / process signals corresponding to the analog module are tested in advance to obtain the compensation signal required for each first configuration signal. Simultaneously, the different operating information corresponding to the analog module is tested in advance to obtain the compensation signal required for each second configuration signal. The compensation method of the linearity compensation module corresponding to each of the above different compensation signals is then confirmed. In the actual compensation processing of the analog module, after obtaining the first configuration signal and / or the second configuration signal, the linearity compensation module can determine the compensation method of the linearity compensation module corresponding to the current first configuration signal and / or the second configuration signal, as well as the compensation signal it provides, based on the correspondence between the first configuration signal and / or the second configuration signal and the compensation signal, in order to perform linearity compensation processing on the analog module.

[0112] It should be further noted that the above two methods are only two optional embodiments of the linearity compensation module obtaining the compensation signal according to the first configuration signal and / or the second configuration signal in this embodiment. Other methods of obtaining the compensation signal are also one of the working modes of the linearity compensation module, and the present invention does not limit them.

[0113] Through the compensation circuit in this embodiment, since the detection module can detect the working information of the simulation module and provide a second configuration signal according to the working information, the linearity compensation module can acquire the compensation signal according to the second configuration signal and the first configuration signal provided by the simulation module and provide it to the output node of the simulation module for linearity compensation. Therefore, the above compensation circuit can solve the problem of large linearity compensation deviation caused by the incomplete consideration of nonlinearity sources and influencing factors in the linearity compensation process in related technologies, so as to improve the reliability of linearity compensation technology.

[0114] In the compensation circuit of this embodiment, since the second configuration signal obtained from the operating information of the analog module is used as one of the bases for the linearity compensation module to perform compensation, the compensation signal provided by the linearity compensation module can effectively compensate for the nonlinear factors caused by the operating information of the analog module. Therefore, the compensation circuit in this embodiment can effectively compensate for the linearity of the analog module based on its process characteristics, thereby further improving the reliability of the linearity compensation.

[0115] In an optional embodiment, the linearity compensation module 406 is configured as follows:

[0116] In the m-th cycle, a first configuration signal and / or a second configuration signal are acquired, and a compensation signal is provided based on the first configuration signal and / or the second configuration signal.

[0117] In the (m+1)th cycle, the first configuration signal and the second configuration signal are acquired, and the (m+1)th compensation signal is provided based on the first configuration signal and the second configuration signal.

[0118] When the numerical difference between the (m+1)th compensation signal and the mth compensation signal is within a preset range, the linearity compensation module is configured to provide the mth compensation signal to the output node.

[0119] It should be further explained that m is an integer, and the assignment of m is only used to express a certain cycle in the operation of the simulation module. That is, the technical solution in the above optional embodiment can be adopted for any cycle in the operation of the simulation module. m+1 is used to represent the next cycle after the m-th cycle. For example, when the m-th cycle is the 0th cycle, the m+1th cycle is the 1st cycle. In this optional embodiment, there is no restriction on the assignment of m. That is, when the m-th cycle is the 0th cycle and the m+1th cycle is the 1st cycle, m can be reset to 1, that is, the m-th cycle is the 1st cycle and the m+1th cycle is the 2nd cycle. This is used to express that the technical solution in this optional embodiment can be executed cyclically according to the working cycle of the simulation module.

[0120] The following explanation focuses on the case where m is 0:

[0121] In the 0th cycle, that is, the initial working stage of the simulation module, the linearity compensation module obtains the input signal or output signal in the simulation module as the first configuration signal, and calculates the compensation signal according to the first configuration signal. The calculation method of the compensation signal is as described in the above embodiment, and will not be repeated here. At this time, the provided compensation signal is used as the 0th compensation signal, which is the initial value of the compensation signal provided by the linearity compensation module.

[0122] In the first cycle, once the analog module is in a stable operating state, the detection module can detect the analog module's operating information, such as process information, voltage information, temperature information, and frequency information. It then uses this information, through encoding and encapsulation, to obtain corresponding second configuration signals, such as process configuration signals, voltage configuration signals, temperature configuration signals, and frequency configuration signals. These second configuration signals are then provided to the linearity compensation module. The linearity compensation module recalculates the compensation signal based on the first configuration signal provided by the analog module in the first cycle, along with the aforementioned second configuration signal. This compensation signal is then used as the first compensation signal.

[0123] Given the first compensation signal, it can be compared with the zeroth compensation signal to determine whether the numerical difference between them is within a preset range. The numerical difference between the first and zeroth compensation signals can be understood as the error between the compensation signals provided by the linearity compensation module in the first and zeroth periods. When the numerical difference is within the preset range, the error is acceptable. The influence of the simulation module's operating information on the linearity of the simulation module in the first period is more controllable than in the zeroth period. Therefore, the zeroth compensation signal provided by the linearity compensation module in the zeroth period can be used as a steady-state compensation signal, and the simulation module can perform effective linearity compensation based on this zeroth compensation signal.

[0124] Conversely, when the numerical difference between the first compensation signal and the zeroth compensation signal is outside the preset range, that is, when the working information of the analog module has a greater impact on the linearity of the analog module in the first cycle, if the zeroth compensation signal is still used to compensate the linearity of the output signal of the analog module, effective linearity compensation cannot be achieved. Therefore, it is necessary to provide a new compensation signal.

[0125] In the above situation, m can be assigned the value 1, and the above process can be repeated with the m-th period as the first period. Specifically, in the first period, when the linearity compensation module has obtained the first compensation signal, in the (m+1)-th period, that is, the second period, the detection module re-detects the working information of the simulation module, and obtains a new second configuration signal based on the re-detected working information to provide to the linearity compensation module.

[0126] In the second cycle, the linearity compensation module recalculates the compensation signal based on the first and second configuration signals of the current cycle, and uses this compensation signal as the second compensation signal. Similarly, given the second compensation signal, it can be compared with the first compensation signal to determine if the numerical difference between the two signals is within a preset range. When the numerical difference between the second and first compensation signals is within the preset range, meaning the impact of the simulation module's operating information on the linearity of the simulation module in the second cycle is within a controllable range compared to the first cycle, the first compensation signal provided by the linearity compensation module in the first cycle can be used as the steady-state compensation signal, and the simulation module can perform effective linearity compensation based on this first compensation signal.

[0127] Correspondingly, if the numerical difference between the second compensation signal and the first compensation signal in the second cycle is still outside the preset range, then m is reassigned the value to 3, and the third compensation signal calculated in the third cycle is compared with the second compensation signal, repeating the above process. This continues until the numerical difference between the (m+1)th compensation signal and the mth compensation signal is within the preset range, at which point the linearity compensation module can provide the mth compensation signal to the output node of the analog module for linearity compensation. This process can be called the iterative process of the linearity compensation module. Through this iterative process, the compensation signal provided by the linearity compensation module to the output node of the analog module can effectively and reliably compensate for the linearity of the analog module in the current cycle.

[0128] Based on the introduction of the working information of the analog module to provide the compensation signal in this embodiment, the above technical solution can ensure that the compensation signal provides effective linearity compensation in the current cycle, thereby further improving the reliability of the linearity compensation of the analog module.

[0129] In an optional embodiment, the detection module 404 is configured as follows:

[0130] When a change in the working information of the simulation module is detected in the nth cycle, a second configuration signal is provided to the linearity compensation module again based on the changed working information.

[0131] The linearity compensation module 406 is configured as follows:

[0132] In the nth cycle, the first configuration signal and the second configuration signal are acquired, and the nth compensation signal is provided based on the first configuration signal and the second configuration signal.

[0133] In the (n+1)th cycle, the first configuration signal and the second configuration signal are acquired, and the (n+1)th compensation signal is provided based on the first configuration signal and the second configuration signal.

[0134] When the numerical difference between the (n+1)th compensation signal and the nth compensation signal is within a preset range, the linearity compensation module is configured to provide the nth compensation signal to the output node.

[0135] It should be further clarified that n is an integer, and the assignment of n is only used to express a certain cycle in the operation of the simulation module. That is, the technical solution in the above optional embodiment can be adopted for any cycle in the operation of the simulation module. n+1 is used to represent the next cycle after the nth cycle. For example, if the nth cycle is the 2nd cycle, then the n+1th cycle is the 3rd cycle. In this optional embodiment, there is no restriction on the assignment of n. That is, if the nth cycle is the 2nd cycle and the n+1th cycle is the 3rd cycle, n can be reassigned to 3, that is, the nth cycle is the 3rd cycle and the n+1th cycle is the 4th cycle. This is used to express that the technical solution in this optional embodiment can be executed cyclically according to the working cycle of the simulation module.

[0136] The following explanation focuses on the case where n is 5:

[0137] In the 5th cycle, the detection module detects a change in the operating information of the simulation module, re-acquires the second configuration signal based on the changed operating information, and provides it to the linearity detection module. After acquiring the second configuration signal re-acquired based on the changed operating signal in the 5th cycle, the linearity detection module recalculates the compensation signal based on the first and second configuration signals of the current cycle. The calculation method of the compensation signal is as described in the above embodiment and will not be repeated here. At this time, the calculated compensation signal is used as the 5th compensation signal, which is the initial value of the compensation signal provided by the linearity compensation module after the change in the operating information of the simulation module.

[0138] In the 6th cycle, after the simulation module has returned to a stable working state after the change in working information, the detection module can obtain the second configuration signal based on the working information of the simulation module in the 6th cycle and provide it to the linearity detection module. The linearity detection module recalculates the compensation signal based on the first configuration signal of the simulation module in the 6th cycle together with the aforementioned second configuration signal. At this time, the compensation signal is used as the 6th compensation signal.

[0139] Given the sixth compensation signal, it can be compared with the fifth compensation signal to determine whether the numerical difference between them is within a preset range. The numerical difference between the sixth and fifth compensation signals can be understood as the error between the compensation signals provided by the linearity compensation module in the sixth and fifth cycles. When the numerical difference is within the preset range, the error is acceptable. The change in the operating information of the simulation module has a more controllable impact on the linearity of the simulation module in the sixth cycle than in the fifth cycle. Therefore, the fifth compensation signal provided by the linearity compensation module in the fifth cycle can be used as a steady-state compensation signal, and the simulation module can perform effective linearity compensation based on this fifth compensation signal.

[0140] Conversely, when the numerical difference between the 6th compensation signal and the 5th compensation signal is outside the preset range, that is, when the change in the working information of the analog module has a greater impact on the linearity of the analog module in the 6th cycle, if the 5th compensation signal is still used to compensate the linearity of the output signal of the analog module, effective linearity compensation cannot be achieved. Therefore, it is necessary to provide a new compensation signal.

[0141] In the above situation, n can be assigned the value 6, and the above process can be repeated with the nth period as the 6th period. Specifically, in the 6th period, when the linearity compensation module has obtained the 6th compensation signal, in the n+1th period, that is, the 7th period, the detection module re-detects the working information of the analog module, and obtains a new second configuration signal based on the re-detected working information to provide to the linearity compensation module.

[0142] In the 7th cycle, the linearity compensation module recalculates the compensation signal based on the first and second configuration signals of the current cycle, and uses this compensation signal as the 7th compensation signal. Similarly, given the 7th compensation signal, it can be compared with the 6th compensation signal to determine if the numerical difference between the 7th and 6th compensation signals is within a preset range. When the numerical difference between the 7th and 6th compensation signals is within the preset range, meaning the influence of the analog module's operating signal on the linearity of the analog module in the 7th cycle is within a controllable range compared to the 6th cycle, the 6th compensation signal provided by the linearity compensation module in the 6th cycle can be used as a steady-state compensation signal, and the analog module can perform effective linearity compensation based on this 6th compensation signal.

[0143] Correspondingly, if the numerical difference between the 7th compensation signal and the 6th compensation signal in the 7th cycle is still outside the preset range, then n is reassigned to 8, and the 8th compensation signal calculated in the 8th cycle is compared with the 7th compensation signal, repeating the above process. This continues until the numerical difference between the (n+1)th compensation signal and the nth compensation signal is within the preset range, at which point the linearity compensation module can provide the nth compensation signal to the output node of the analog module for linearity compensation.

[0144] The above technical solution, based on the linearity compensation module's iterative and effective linearity compensation for the current cycle of the simulation module, also allows for timely adjustment of the corresponding compensation signal whenever the working information of the simulation module changes. This ensures that the compensation signal provided by the linearity compensation module to the output node of the simulation module can provide more reliable linearity compensation for the simulation module after changes in working information, thereby guaranteeing that the linearity compensation effect is not weakened by parameter fluctuations and mode changes.

[0145] In an optional embodiment, the linearity compensation module 406 includes a plurality of transconductance units 4062;

[0146] The multiple transconducting units 4062 are configured to acquire a first configuration signal and a second configuration signal, and configure a combination of multiple transconducting units 4062 according to the first configuration signal and / or the second configuration signal to provide a compensation signal to the output node.

[0147] Figure 10This is a circuit diagram (III) of the linearity compensation module provided according to an embodiment of the present invention, as shown below. Figure 10 As shown in the above optional embodiment, the linearity compensation module includes multiple transconductance units 4062, corresponding to G. c1 G c2 ...G cn G co The linearity compensation module configures the combination of multiple transconductance units according to the differences between the first configuration signal and the second configuration signal. Specifically, it configures the objects and number of transconductance units to be compensated in the linearity compensation module. By combining different transconductance units, it performs transconductance processing on the input first configuration signal and / or second configuration signal to output a compensation signal, and provides the compensation signal to the output node of the analog module to compensate the output signal.

[0148] For example Figure 10 In the linearity compensation module shown, the linearity compensation module can be used to... Figure 9 The input signals X1 to X2 in the compensation circuit shown n Output signals Y1~Y m and process signals Z1~Z n Or a combination thereof as the first configuration signal, the process configuration signal P o Voltage configuration signal V o Temperature configuration signal T o Frequency configuration signal F o Or a combination thereof, as a second configuration signal, is sent to different transconductance units in the linearity compensation module, such as input signals X1 to X... n As the first configuration signal input to G in multiple transconductance units c1 G c2 ...G cn The first configuration signal nonlinear component is processed, and the process configuration signal P is... o As a second configuration signal, G is input to multiple transconductance units. co The nonlinear components in the second configuration signal are processed, that is, according to the actual types of the first and second configuration signals, the G values ​​in multiple transconductance units are configured. c1 G c2 ...G cn G co To form a combination to participate in the transconductance processing of the first configuration signal and the second configuration signal, and according to G in multiple transconductance units c1 G c2 ...G cn G co The compensation signal is calculated and then provided to the output signal of the analog module for compensation.

[0149] In the linearity compensation module, multiple transconductance units can use devices of the same size or different sizes. When multiple transconductance units can use devices of the same size, the transconductance processing of the first configuration signal and / or the second configuration signal can be achieved by configuring the number of transconductance units to form corresponding combinations. When multiple transconductance units use devices of different sizes, the transconductance of the transconductance units differs due to the different device sizes. Therefore, in this case, based on configuring the number of transconductance units, transconductance unit objects of corresponding device sizes can be configured for different signals in the first configuration signal and / or the second configuration signal to form corresponding combinations. To further increase the applicability of the above-mentioned linearity compensation module for configuring the first configuration signal and / or the second configuration signal, the linearity compensation module in this optional embodiment uses transconductance units of different device sizes to construct the linearity compensation module, that is, in Figure 10 In the linearity compensation module shown, different transconductance units G c1 G c2 ...G cn G co Different sizes of devices are used between them, namely transconductance unit G. c1 G c2 ...G cn G co There are at least two transconductance units that use devices of different sizes. Specifically, the device sizes of multiple transconductance units may be different from each other, or the device sizes of multiple transconductance units may be partially different. This invention does not limit this.

[0150] In this optional embodiment, the linearity compensation module can refer to the OTA-based broadband analog signal processing circuit in Embodiment 1 during the calculation of the compensation signal to perform nonlinearity compensation on the input signals, etc., in the circuit. Simultaneously, regarding the operating information of the analog module in the above embodiments, the linearity compensation module in this optional embodiment can pre-record or store different operating information, such as the compensation signal required for the output signal under process, voltage, temperature, and frequency conditions (which can be recorded using a lookup table). This compensation signal is then considered in conjunction with the aforementioned compensation signals to serve as the basis for configuring the linearity compensation module. In the case of introducing the operating information of the analog module in the above embodiments, the linearity compensation module in this optional embodiment can perform nonlinearity compensation calculation in the following manner: In this optional embodiment, after determining the corresponding compensation current based on the first configuration signal and / or the second configuration signal, the combination of transconductance units can be determined for configuration in the following manner:

[0151] Enumeration method: Arrange the possible combinations of multiple transconductance units in the linearity compensation module in sequence, substitute the first configuration signal and / or the second configuration signal into each of the above combinations of transconductance units, traverse all possible combinations, and try the compensation signals output under different combinations of transconductance units in sequence, so as to obtain the combination of transconductance units with the best linearity compensation effect as the actual configuration of multiple transconductance unit combinations in the linearity compensation module.

[0152] Search method: Test different configuration signals corresponding to the analog module in advance to obtain the compensation signal required for each configuration signal, and use this to confirm the combination of transconductance units corresponding to the compensation signal; In the actual compensation process of the analog circuit, after obtaining the first configuration signal and the second configuration signal, the linearity compensation module can determine the combination of transconductance units corresponding to the current configuration signal according to the correspondence between the above configuration signals and the combination of transconductance units, and configure accordingly.

[0153] It should be further noted that the above two methods are only optional configuration methods in the process of configuring multiple transconductance units in the linearity compensation module in this embodiment. Any method that can configure the combination of transconductance units according to the corresponding relationship of compensation current in this embodiment is within the protection scope of this invention, and this invention does not limit it.

[0154] It should be further explained that, in this optional embodiment, the linearity compensation module in the above-mentioned compensation circuit can absorb the input signal, output signal, and process signal of the analog module, as well as the process information during the operation of the analog module, and provide compensation current to the output signal of the OTA in the analog circuit accordingly. This reduces the swing at the input of the OTA and improves the linearity of the output signal. Therefore, the analog circuit does not need to strictly consider the gain, bandwidth, and applicable process parameters of the OTA during the design process, thus indirectly reducing the performance requirements and cost of the OTA design. On the other hand, the linearity compensation module in this embodiment is not limited to a fixed transconductance value. It can be configured with a combination of corresponding transconductance units according to different configuration signals in the analog circuit. Therefore, the above-mentioned linearity compensation module can be applied to analog modules with different processes, different bandwidth modes, and different frequency components. Thus, it can significantly improve the reliability of linearity compensation for analog modules with different processes, bandwidth modes, and frequency components, and also make the linearity compensation module configurable or adaptable.

[0155] In an optional embodiment, each transconducting unit 4062 includes a plurality of transconducting subunits 40622 connected in parallel with each other;

[0156] The multiple transconductance units 4062 and multiple transconductance subunits 40622 are configured to acquire a first configuration signal and a second configuration signal, and configure a combination of multiple transconductance units 4062 and a combination of multiple transconductance subunits 40622 in the transconductance units 4062 according to the first configuration signal and / or the second configuration signal, so as to provide a compensation signal to the output node.

[0157] Figure 11 This is a circuit diagram (four) of the linearity compensation module provided according to an embodiment of the present invention, as shown below. Figure 11 As shown in the above optional embodiments, each transconductance unit is composed of multiple transconductance sub-units connected in parallel, with transconductance unit G... c1 For example, the transconductance unit G c1 It includes multiple interconnected transconductance subunits G c1,1 G c1,2 ...G c1,m1 The linearity compensation module described above configures combinations of multiple transconductance units and combinations of multiple transconductance sub-units within the transconductance units according to the first configuration signal and / or the second configuration signal. This indicates that the linearity compensation module has two configuration dimensions during configuration. The first dimension indicates the configuration of the objects and number of transconductance units, and the second dimension indicates the configuration of the objects and number of transconductance sub-units within the transconductance units based on the configuration of the objects and number of transconductance units in the first dimension. When the transconductance units with different objects and numbers and the transconductance sub-units with different objects and numbers within each transconductance unit participate in the transconductance processing of the signal, different transconductance processing results for the signal can be formed.

[0158] For each transconductance unit, since the multiple transconductance sub-units within the transconductance unit are connected in parallel, the transconductance of the transconductance unit can be adjusted by configuring different objects and numbers of transconductance sub-units within the same transconductance unit. Therefore, in the above embodiments, the situation where different transconductance units use devices of different sizes can also be achieved by configuring the objects and numbers of transconductance sub-units within each transconductance unit, that is, configuring the objects and numbers of transconductance sub-units within each transconductance unit according to the first configuration signal and / or the second configuration signal.

[0159] Correspondingly, different transconductance subunits within the same transconductance unit can use devices of the same size or different sizes. When multiple transconductance subunits use devices of the same size, corresponding combinations can be formed by configuring the number of transconductance subunits, thereby achieving transconductance processing of the first configuration signal and / or the second configuration signal. When multiple transconductance subunits use devices of different sizes, the transconductance of the transconductance subunits differs due to the different device sizes. Therefore, in this case, based on configuring the number of transconductance subunits, transconductance subunit objects of corresponding device sizes can be configured for different first configuration signals and / or second configuration signals to form corresponding combinations. To further increase the applicability of the linearity compensation module in configuring the first configuration signal and / or the second configuration signal, in this optional embodiment, multiple transconductance subunits within each transconductance unit of the linearity compensation module can use devices of different sizes. Figure 4 In the linearity compensation module shown, the transconductance unit G... c1 For example, the transconductance unit G c1 Multiple transconducting subunits G c1,1 G c1,2 ...G c1,m1 G c1,1 There are at least two transconductance sub-units that use devices of different sizes. Specifically, the device sizes of multiple transconductance sub-units may be different from each other, or the device sizes of multiple transconductance sub-units may be partially different. This invention does not limit this.

[0160] It should be further explained that, regardless of whether the device sizes of the multiple transconductance sub-units are the same, different transconductance units can be connected in parallel with different numbers of transconductance sub-units to form transconductance units of different transconductance sizes. Therefore, the multiple configuration dimensions of the linearity compensation module in the above optional embodiments can significantly improve the applicability of the linearity compensation module.

[0161] In this optional embodiment, after introducing multiple configuration dimensions composed of different transconductance sub-units, the way to compensate the transconductance unit and the way to configure the combination of transconductance units are based on the configuration of the transconductance unit by the linearity compensation module in the above embodiment, and the multiple transconductance sub-units in each transconductance unit are configured again.

[0162] Specifically, during the configuration of the compensation current, the compensation signal can still be obtained according to the calculation method of the multiple transconductance units in the linearity compensation module, which will not be elaborated here.

[0163] Accordingly, after determining the compensation current according to the above method, this optional embodiment can still adopt the method described in the above embodiment when determining the combination of transconductance units for configuration, for example:

[0164] Enumeration method: Arrange the possible combinations of multiple transconductance units and multiple transconductance subunits in the linearity compensation module in sequence, substitute the first configuration signal and / or the second configuration signal into each of the above combinations, traverse all possible combinations, and try the compensation signals output under different combinations of transconductance units and different transconductance subunits in the transconductance units in sequence, so as to obtain the corresponding combination with the best linearity compensation effect as the actual configuration of the multiple transconductance units and multiple transconductance subunits in the linearity compensation module.

[0165] Search method: Test different configuration signals corresponding to the analog module in advance to obtain the compensation signal required for each configuration signal, and use this to confirm the transconductance unit corresponding to the compensation signal and the combination of multiple transconductance sub-units in the transconductance unit; In the actual compensation processing of the analog circuit, after obtaining the first configuration signal and the second configuration signal, the linearity compensation module can determine the combination of transconductance units corresponding to the current configuration signal according to the correspondence between the above configuration signals and the combination of transconductance units, and configure accordingly.

[0166] It should be further explained that the configuration of the transconductance unit in the above optional embodiments can improve the configurability of the linearity compensation module during the configuration process according to the first configuration signal and / or the second configuration signal due to the setting of multiple configuration dimensions, thereby significantly increasing the effectiveness and reliability of the linearity compensation module for linearity compensation corresponding to different analog modules.

[0167] In one optional embodiment, the transconductance subunit includes a transconductance tube and a bias tube, wherein the gate of the transconductance tube is configured to acquire a first configuration signal and / or a second configuration signal, and the drain of the transconductance tube is configured to provide a signal to the source of the bias tube; the gate of the bias tube is configured to acquire a bias signal, and the drain of the bias tube is configured to provide a compensation signal.

[0168] Both the transconductor and the bias tube are PMOS transistors, or both the transconductor and the bias tube are NOMS transistors.

[0169] It should be further explained that the aforementioned transconductor and bias tube constitute a common-source, common-gate transconductor subunit, and the internal structure of this common-source, common-gate transconductor subunit remains as described above. Figure 5 or Figure 6 As shown, Figure 5 As shown, both the transconductor Ma and the bias transistor Mb are NMOS transistors. The gate of the transconductor Ma serves as the input terminal of the transconductance sub-unit, used to obtain the first configuration signal or the second configuration signal V. iThe drain of the transconductor Ma is configured to provide a signal to the source of the bias transistor Mb, and the source of the transconductor Ma is used to ground the signal; the gate of the bias transistor Mb is configured to acquire the bias signal V. B The drain of the bias transistor Mb is configured to provide a compensation signal; the bias signal V acquired by the gate of the bias transistor Mb is... B The bias signal can be provided by a DC bias module, which can be provided by an analog module, that is, the process signal in the analog module is provided as the bias signal to the bias transistor, or an independently set DC bias module can be used, that is, a separate circuit module is provided for the bias signal of the bias transistor. This invention does not limit this. Figure 6 As shown, both the transconductor Ma and the bias transistor Mb are PMOS transistors. In this case, the connection method between the transconductor Ma and the bias transistor Mb is the same as that in the case where the transconductor Ma and the bias transistor Mb are NMOS transistors, and will not be repeated here.

[0170] The working principle of the common source cascode transconductor sub-unit in the above optional embodiments is the same as that of the common source cascode transconductor sub-unit in Embodiment 1, and will not be repeated here.

[0171] In one alternative embodiment, the transconductance subunit includes an input terminal, an output terminal, and a current mirror disposed between the input terminal and the output terminal, wherein the output terminal is configured to provide a compensation signal;

[0172] The input terminal includes a PMOS transistor and an NMOS transistor, wherein the source of the PMOS transistor is connected to the source of the NMOS transistor, the source of the PMOS transistor and the source of the NMOS transistor are configured to acquire a first configuration signal and / or a second configuration signal, the gate of the PMOS transistor is configured to acquire a first bias signal, the gate of the NMOS transistor is configured to acquire a second bias signal, and the drain of the PMOS transistor and the drain of the NMOS transistor are configured to provide a signal to the current mirror.

[0173] It should be further explained that the aforementioned transconductor and bias tube constitute a common-gate transconductor subunit, and the internal structure of this common-gate transconductor subunit remains as described above. Figure 7 As shown, Figure 7 As shown, the input terminal of the common-gate transconductance sub-unit includes two input transistors, Mp and Mn. Input transistor Mp is a PMOS transistor, and input transistor Mn is an NMOS transistor. The sources of input transistors Mp and Mn are connected and used to receive input signals, namely the first configuration signal or the second configuration signal in this embodiment. The gates of input transistors Mp and Mn are respectively used to connect to bias signals, wherein the gate of input transistor Mp is used to obtain the first bias signal V. bn The gate of the input transistor Mn is used to obtain the second bias signal V. bpThe drains of input transistors Mp and Mn are connected to the corresponding current mirror modules, and the output is generated after passing through the current mirror modules.

[0174] The working principle of the common-gate transconductor sub-unit in the above optional embodiments is the same as that of the common-gate transconductor sub-unit in Embodiment 1, and will not be repeated here.

[0175] In an alternative embodiment, multiple transconductance sub-units in each transconductance unit are configured to employ PMOS transistors and / or NMOS transistors of different sizes.

[0176] In one optional embodiment, the first configuration signal includes: an input signal, an output signal, and a process signal at any position between the input node and the output node in the analog module.

[0177] It should be further noted that the first configuration signal can also be a combination of the above-mentioned input signal, output signal and process signal, and the present invention does not limit it in this way.

[0178] In an optional embodiment, when the first configuration signal is an input signal, the multiple transconductance units are configured such that each transconductance unit acquires the input signal of one input node. It should be further noted that the number of transconductance units corresponds to the number of the first configuration signal, ensuring that the transconductance units can compensate for the nonlinear components in each input signal.

[0179] Example 5

[0180] This embodiment also provides a compensation chip, including the compensation circuit in the above embodiment 4 and the optional embodiment corresponding to embodiment 4; the technical solution and technical effect of the compensation circuit in the compensation chip in this embodiment are the same as those of the compensation circuit in embodiment 4, and will not be repeated here.

[0181] Example 6

[0182] This embodiment also provides a compensation method applied to a simulation module, which includes an input node and an output node. Figure 12 This is a flowchart (II) of the compensation method provided according to an embodiment of the present invention, as shown below. Figure 12 As shown, the compensation method includes:

[0183] S602, the detection module detects the working information of the simulation module and provides a second configuration signal based on the working information;

[0184] S604, the linearity compensation module acquires a first configuration signal and a second configuration signal, and provides a compensation signal to the output node according to the first configuration signal and / or the second configuration signal, wherein the first configuration signal is used to indicate the signal at any position in the analog module.

[0185] The compensation method in this embodiment can detect the working information of the simulation module and provide a second configuration signal based on the working information. The compensation signal is then obtained based on the second configuration signal and the first configuration signal provided by the simulation module and provided to the output node of the simulation module for linearity compensation. Therefore, the above compensation method can solve the problem of large linearity compensation deviation caused by incomplete consideration of nonlinearity sources and influencing factors in the linearity compensation process in related technologies, thereby improving the reliability of linearity compensation technology.

[0186] In one optional embodiment, the operating information includes at least one of the following: process information, voltage information, temperature information, and frequency information; the second configuration information includes at least one of the following: process configuration signal, voltage configuration signal, temperature configuration signal, and frequency configuration signal.

[0187] It should be further noted that the above-mentioned working information and the technical significance and acquisition method of the second configuration signal are the same as those in Embodiment 4, and will not be repeated here.

[0188] In an optional embodiment, the above compensation method further includes:

[0189] In the m-th cycle, a first configuration signal and / or a second configuration signal are acquired, and a compensation signal is provided based on the first configuration signal and / or the second configuration signal.

[0190] In the (m+1)th cycle, the first configuration signal and the second configuration signal are acquired, and the (m+1)th compensation signal is provided based on the first configuration signal and the second configuration signal.

[0191] When the numerical difference between the (m+1)th compensation signal and the mth compensation signal is within a preset range, the mth compensation signal is provided to the output node.

[0192] It should be further explained that m is an integer, and the assignment of m is only used to express a certain cycle in the operation of the simulation module. That is, the technical solution in the above optional embodiment can be adopted for any cycle in the operation of the simulation module. m+1 is used to represent the next cycle after the m-th cycle. For example, when the m-th cycle is the 0th cycle, the m+1th cycle is the 1st cycle. In this optional embodiment, there is no restriction on the assignment of m. That is, when the m-th cycle is the 0th cycle and the m+1th cycle is the 1st cycle, m can be reset to 1, that is, the m-th cycle is the 1st cycle and the m+1th cycle is the 2nd cycle. This is used to express that the technical solution in this optional embodiment can be executed cyclically according to the working cycle of the simulation module.

[0193] The following explanation focuses on the case where m is 0:

[0194] In the 0th cycle, i.e. the initial working stage of the simulation module, the linearity compensation module obtains the input signal or output signal in the simulation module as the first configuration signal according to step S604, and calculates the compensation signal according to the first configuration signal. The calculation method of the compensation signal is as described in the above embodiment, and will not be repeated here. At this time, the provided compensation signal is used as the 0th compensation signal, which is the initial value of the compensation signal provided by the linearity compensation module.

[0195] In the first cycle, when the simulation module is in a stable operating state, the detection module can detect the operating information of the simulation module according to step S602, such as process information, voltage information, temperature information, frequency information, etc., and obtain the corresponding second configuration signal, such as process configuration signal, voltage configuration signal, temperature configuration signal, and frequency configuration signal, through encoding, encapsulation, etc., and provide the second configuration signal to the linearity compensation module. The linearity compensation module then recalculates the compensation signal according to step S604, based on the first configuration signal of the first cycle provided by the simulation module and the aforementioned second configuration signal. This compensation signal is then used as the first compensation signal.

[0196] Given the first compensation signal, it can be compared with the zeroth compensation signal to determine whether the numerical difference between them is within a preset range. The numerical difference between the first and zeroth compensation signals can be understood as the error between the compensation signals provided by the linearity compensation module in the first and zeroth periods. When the numerical difference is within the preset range, the error is acceptable. The influence of the simulation module's operating information on the linearity of the simulation module in the first period is more controllable than in the zeroth period. Therefore, the zeroth compensation signal provided by the linearity compensation module in the zeroth period can be used as a steady-state compensation signal, and the simulation module can perform effective linearity compensation based on this zeroth compensation signal.

[0197] Conversely, when the numerical difference between the first compensation signal and the zeroth compensation signal is outside the preset range, that is, when the working information of the analog module has a greater impact on the linearity of the analog module in the first cycle, if the zeroth compensation signal is still used to compensate the linearity of the output signal of the analog module, effective linearity compensation cannot be achieved. Therefore, it is necessary to provide a new compensation signal.

[0198] In the above situation, m can be assigned the value 1, and the above process can be repeated with the m-th period as the first period. Specifically, in the first period, when the linearity compensation module has obtained the first compensation signal, in the (m+1)-th period, that is, the second period, the detection module re-detects the working information of the simulation module, and obtains a new second configuration signal based on the re-detected working information to provide to the linearity compensation module.

[0199] In the second cycle, the linearity compensation module recalculates the compensation signal based on the first and second configuration signals of the current cycle, and uses this compensation signal as the second compensation signal. Similarly, given the second compensation signal, it can be compared with the first compensation signal to determine if the numerical difference between the two signals is within a preset range. When the numerical difference between the second and first compensation signals is within the preset range, meaning the impact of the simulation module's operating information on the linearity of the simulation module in the second cycle is within a controllable range compared to the first cycle, the first compensation signal provided by the linearity compensation module in the first cycle can be used as the steady-state compensation signal, and the simulation module can perform effective linearity compensation based on this first compensation signal.

[0200] Correspondingly, if the numerical difference between the second compensation signal and the first compensation signal in the second cycle is still outside the preset range, then m is reassigned the value to 3, and the third compensation signal calculated in the third cycle is compared with the second compensation signal, repeating the above process. This continues until the numerical difference between the (m+1)th compensation signal and the mth compensation signal is within the preset range, at which point the linearity compensation module can provide the mth compensation signal to the output node of the analog module for linearity compensation. This process can be called the iterative process of the linearity compensation module. Through this iterative process, the compensation signal provided by the linearity compensation module to the output node of the analog module can effectively and reliably compensate for the linearity of the analog module in the current cycle.

[0201] Based on the introduction of the working information of the analog module to provide the compensation signal in this embodiment, the above technical solution can ensure that the compensation signal provides effective linearity compensation in the current cycle, thereby further improving the reliability of the linearity compensation of the analog module.

[0202] In an optional embodiment, the above compensation method further includes:

[0203] When a change in the operating information of the simulation module is detected in the nth cycle, a second configuration signal is provided again based on the changed operating information.

[0204] In the nth cycle, the first configuration signal and the second configuration signal are acquired, and the nth compensation signal is provided based on the first configuration signal and the second configuration signal.

[0205] In the (n+1)th cycle, the first configuration signal and the second configuration signal are acquired, and the (n+1)th compensation signal is provided based on the first configuration signal and the second configuration signal.

[0206] When the numerical difference between the (n+1)th compensation signal and the nth compensation signal is within a preset range, the nth compensation signal is provided to the output node.

[0207] It should be further clarified that n is an integer, and the assignment of n is only used to express a certain cycle in the operation of the simulation module. That is, the technical solution in the above optional embodiment can be adopted for any cycle in the operation of the simulation module. n+1 is used to represent the next cycle after the nth cycle. For example, if the nth cycle is the 2nd cycle, then the n+1th cycle is the 3rd cycle. In this optional embodiment, there is no restriction on the assignment of n. That is, if the nth cycle is the 2nd cycle and the n+1th cycle is the 3rd cycle, n can be reassigned to 3, that is, the nth cycle is the 3rd cycle and the n+1th cycle is the 4th cycle. This is used to express that the technical solution in this optional embodiment can be executed cyclically according to the working cycle of the simulation module.

[0208] The following explanation focuses on the case where n is 5:

[0209] In the 5th cycle, step S602 detects a change in the operating information of the simulation module, re-acquires the second configuration signal based on the changed operating information, and provides it to the linearity detection module. After acquiring the second configuration signal re-acquired based on the changed operating signal within the 5th cycle, the linearity detection module recalculates the compensation signal based on the first and second configuration signals of the current cycle. The calculation method for the compensation signal is as described in the above embodiment and will not be repeated here. At this time, the calculated compensation signal is used as the 5th compensation signal, which is the initial value of the compensation signal provided by the linearity compensation module after the change in the operating information of the simulation module.

[0210] In the 6th cycle, after the simulation module has returned to a stable working state after the change in working information, the detection module can obtain the second configuration signal based on the working information of the simulation module in the 6th cycle and provide it to the linearity detection module. The linearity detection module recalculates the compensation signal based on the first configuration signal of the simulation module in the 6th cycle together with the aforementioned second configuration signal. At this time, the compensation signal is used as the 6th compensation signal.

[0211] Given the sixth compensation signal, it can be compared with the fifth compensation signal to determine whether the numerical difference between them is within a preset range. The numerical difference between the sixth and fifth compensation signals can be understood as the error between the compensation signals provided by the linearity compensation module in the sixth and fifth cycles. When the numerical difference is within the preset range, the error is acceptable. The change in the operating information of the simulation module has a more controllable impact on the linearity of the simulation module in the sixth cycle than in the fifth cycle. Therefore, the fifth compensation signal provided by the linearity compensation module in the fifth cycle can be used as a steady-state compensation signal, and the simulation module can perform effective linearity compensation based on this fifth compensation signal.

[0212] Conversely, when the numerical difference between the 6th compensation signal and the 5th compensation signal is outside the preset range, that is, when the change in the working information of the analog module has a greater impact on the linearity of the analog module in the 6th cycle, if the 5th compensation signal is still used to compensate the linearity of the output signal of the analog module, effective linearity compensation cannot be achieved. Therefore, it is necessary to provide a new compensation signal.

[0213] In the above situation, n can be assigned the value 6, and the above process can be repeated with the nth period as the 6th period. Specifically, in the 6th period, when the linearity compensation module has obtained the 6th compensation signal, in the n+1th period, that is, the 7th period, the detection module re-detects the working information of the analog module, and obtains a new second configuration signal based on the re-detected working information to provide to the linearity compensation module.

[0214] In the 7th cycle, the linearity compensation module recalculates the compensation signal based on the first and second configuration signals of the current cycle, and uses this compensation signal as the 7th compensation signal. Similarly, given the 7th compensation signal, it can be compared with the 6th compensation signal to determine if the numerical difference between the 7th and 6th compensation signals is within a preset range. When the numerical difference between the 7th and 6th compensation signals is within the preset range, meaning the influence of the analog module's operating signal on the linearity of the analog module in the 7th cycle is within a controllable range compared to the 6th cycle, the 6th compensation signal provided by the linearity compensation module in the 6th cycle can be used as a steady-state compensation signal, and the analog module can perform effective linearity compensation based on this 6th compensation signal.

[0215] Correspondingly, if the numerical difference between the 7th compensation signal and the 6th compensation signal in the 7th cycle is still outside the preset range, then n is reassigned to 8, and the 8th compensation signal calculated in the 8th cycle is compared with the 7th compensation signal, repeating the above process. This continues until the numerical difference between the (n+1)th compensation signal and the nth compensation signal is within the preset range, at which point the linearity compensation module can provide the nth compensation signal to the output node of the analog module for linearity compensation.

[0216] The above technical solution, based on the linearity compensation module's iterative and effective linearity compensation for the current cycle of the simulation module, also allows for timely adjustment of the corresponding compensation signal whenever the working information of the simulation module changes. This ensures that the compensation signal provided by the linearity compensation module to the output node of the simulation module can provide more reliable linearity compensation for the simulation module after changes in working information, thereby guaranteeing that the linearity compensation effect is not weakened by parameter fluctuations and mode changes.

[0217] It should be further noted that the other technical solutions and effects of the compensation method in this embodiment correspond to the technical solutions and effects of the compensation circuit in Embodiment 4 and the optional embodiments corresponding to Embodiment 4, so they will not be repeated here.

[0218] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, or network device, etc.) to execute the methods described in the various embodiments of the present invention.

[0219] Example 7

[0220] This embodiment also provides a compensation device applied to an analog module, which includes an input node and an output node. This device is used to implement Embodiment 3 and the preferred embodiment described above; details already described will not be repeated. As used below, the term "module" can refer to a combination of software and / or hardware that performs a predetermined function. Although the device described in the following embodiments is preferably implemented in software, hardware implementation, or a combination of software and hardware, is also possible and contemplated. Figure 13 This is a structural block diagram (I) of the compensation device provided according to an embodiment of the present invention, as shown below. Figure 13 As shown, the compensation device includes:

[0221] The first compensation module 701 is used to acquire a first configuration signal and configure a combination of multiple transconductance units according to the first configuration signal to provide a compensation signal to the output node; wherein, the first configuration signal is used to indicate the signal at any position in the analog module.

[0222] The compensation device in this embodiment can configure the combination of the plurality of transconductance units according to the acquired first configuration signal to provide a compensation signal to the output node in the analog module; wherein the first configuration signal is used to indicate the signal at any position in the analog module; therefore, the above compensation method can solve the problem of large linearity compensation deviation caused by the incomplete consideration of nonlinearity sources and influencing factors in the linearity compensation process in related technologies, so as to improve the reliability of linearity compensation technology.

[0223] It should be further noted that the remaining schemes and technical effects of the compensation device in this embodiment correspond to the compensation method in embodiment 3, and will not be repeated here.

[0224] It should be noted that the above modules can be implemented by software or hardware. For the latter, they can be implemented in the following ways, but are not limited to: all the above modules are located in the same processor; or, the above modules are located in different processors in any combination.

[0225] Example 8

[0226] This embodiment also provides a compensation device applied to an analog module, which includes an input node and an output node. This device is used to implement Embodiment 6 and the preferred embodiment described above; details already described will not be repeated. As used below, the term "module" can refer to a combination of software and / or hardware that performs a predetermined function. Although the device described in the following embodiments is preferably implemented in software, hardware implementation, or a combination of software and hardware, is also possible and contemplated. Figure 14 This is a structural block diagram (II) of the compensation device provided according to an embodiment of the present invention, as shown below. Figure 14 As shown, the compensation device includes:

[0227] Module 801 is provided to detect the operating information of the simulation module and provide a second configuration signal based on the operating information;

[0228] The second compensation module 802 is used to acquire a first configuration signal and a second configuration signal, and to provide a compensation signal to the output node according to the first configuration signal and / or the second configuration signal, wherein the first configuration signal is used to indicate the signal at any position in the analog module.

[0229] The compensation device in this embodiment can detect the working information of the simulation module and provide a second configuration signal based on the working information. The compensation signal is then obtained based on the second configuration signal and the first configuration signal provided by the simulation module and provided to the output node of the simulation module for linearity compensation. Therefore, the compensation circuit can solve the problem of large linearity compensation deviation caused by incomplete consideration of nonlinearity sources and influencing factors in the linearity compensation process in related technologies, thereby improving the reliability of linearity compensation technology.

[0230] In one optional embodiment, the operating information includes at least one of the following: process information, voltage information, temperature information, and frequency information; the second configuration information includes at least one of the following: process configuration signal, voltage configuration signal, temperature configuration signal, and frequency configuration signal.

[0231] In an optional embodiment, the above compensation method further includes:

[0232] In the m-th cycle, a first configuration signal and / or a second configuration signal are acquired, and a compensation signal is provided based on the first configuration signal and / or the second configuration signal.

[0233] In the (m+1)th cycle, the first configuration signal and the second configuration signal are acquired, and the (m+1)th compensation signal is provided based on the first configuration signal and the second configuration signal.

[0234] When the numerical difference between the (m+1)th compensation signal and the mth compensation signal is within a preset range, the mth compensation signal is provided to the output node.

[0235] In an optional embodiment, the above compensation method further includes:

[0236] When a change in the operating information of the simulation module is detected in the nth cycle, a second configuration signal is provided again based on the changed operating information.

[0237] In the nth cycle, the first configuration signal and the second configuration signal are acquired, and the nth compensation signal is provided based on the first configuration signal and the second configuration signal.

[0238] In the (n+1)th cycle, the first configuration signal and the second configuration signal are acquired, and the (n+1)th compensation signal is provided based on the first configuration signal and the second configuration signal.

[0239] When the numerical difference between the (n+1)th compensation signal and the nth compensation signal is within a preset range, the nth compensation signal is provided to the output node.

[0240] It should be further noted that the remaining schemes and technical effects of the compensation device in this embodiment correspond to the compensation method in embodiment 6, and will not be repeated here.

[0241] It should be noted that the above modules can be implemented by software or hardware. For the latter, they can be implemented in the following ways, but are not limited to: all the above modules are located in the same processor; or, the above modules are located in different processors in any combination.

[0242] Example 9

[0243] Embodiments of the present invention also provide a storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above method embodiments when running.

[0244] Optionally, in this embodiment, the storage medium may be configured to store a computer program for performing the following steps:

[0245] S1, acquire the first configuration signal, and configure a combination of multiple transconductance units according to the first configuration signal to provide a compensation signal to the output node; wherein, the first configuration signal is used to indicate the signal at any position in the analog module.

[0246] Optionally, in this embodiment, the storage medium may include, but is not limited to, various media capable of storing computer programs, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.

[0247] Example 10

[0248] Embodiments of the present invention also provide a storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above method embodiments when running.

[0249] Optionally, in this embodiment, the storage medium may be configured to store a computer program for performing the following steps:

[0250] S1, detect the working information of the simulation module and provide a second configuration signal based on the working information;

[0251] S2, acquire the first configuration signal and the second configuration signal, and provide a compensation signal to the output node according to the first configuration signal and / or the second configuration signal, wherein the first configuration signal is used to indicate the signal at any position in the analog module.

[0252] Optionally, in this embodiment, the storage medium may include, but is not limited to, various media capable of storing computer programs, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.

[0253] Example 11

[0254] Embodiments of the present invention also provide an electronic device including a memory and a processor, the memory storing a computer program and the processor being configured to run the computer program to perform the steps in any of the above method embodiments.

[0255] Optionally, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor and the input / output device is connected to the processor.

[0256] Optionally, in this embodiment, the processor can be configured to perform the following steps via a computer program:

[0257] S1, acquire the first configuration signal, and configure a combination of multiple transconductance units according to the first configuration signal to provide a compensation signal to the output node; wherein, the first configuration signal is used to indicate the signal at any position in the analog module.

[0258] Optionally, specific examples in this embodiment can refer to the examples described in the above embodiments and optional implementations, and will not be repeated here.

[0259] Example 12

[0260] Embodiments of the present invention also provide an electronic device including a memory and a processor, the memory storing a computer program and the processor being configured to run the computer program to perform the steps in any of the above method embodiments.

[0261] Optionally, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor and the input / output device is connected to the processor.

[0262] Optionally, in this embodiment, the processor can be configured to perform the following steps via a computer program:

[0263] S1, detect the working information of the simulation module and provide a second configuration signal based on the working information;

[0264] S2, acquire the first configuration signal and the second configuration signal, and provide a compensation signal to the output node according to the first configuration signal and / or the second configuration signal, wherein the first configuration signal is used to indicate the signal at any position in the analog module.

[0265] Optionally, specific examples in this embodiment can refer to the examples described in the above embodiments and optional implementations, and will not be repeated here.

[0266] It is obvious to those skilled in the art that the modules or steps of the present invention described above can be implemented using general-purpose computing devices. They can be centralized on a single computing device or distributed across a network of multiple computing devices. Optionally, they can be implemented using computer-executable program code, thereby storing them in a storage device for execution by a computing device. In some cases, the steps shown or described can be performed in a different order than those presented herein, or they can be fabricated as separate integrated circuit modules, or multiple modules or steps can be fabricated as a single integrated circuit module. Thus, the present invention is not limited to any particular combination of hardware and software.

[0267] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, or improvements made within the principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A compensation circuit, characterized in that, include: An analog module is configured to convert an input signal in the form of voltage into an output signal in the form of current, and includes an input node and an output node; wherein the input node is configured to receive the input signal, and the output node is configured to output the output signal; A linearity compensation module includes multiple transconductance units, wherein the multiple transconductance units are configured to acquire a first configuration signal and configure a combination of the multiple transconductance units according to a preset configuration strategy based on the first configuration signal, so as to provide a compensation signal to the output node to compensate for the nonlinear components included in the output signal; the first configuration signal is used to indicate the signal at any position in the analog module; The first configuration signal includes: the input signal, the output signal, and a process signal at any position between the input node and the output node in the simulation module; the configuration strategy is as follows: substitute the first configuration signal into each combination of the plurality of transconductance units, traverse all combinations, try the compensation signal output by each combination of the plurality of transconductance units in turn, and use the combination of the plurality of transconductance units with the best linearity compensation effect as the configuration of the plurality of transconductance unit combinations in the linearity compensation module; or determine the combination of the plurality of transconductance units corresponding to the current first configuration signal according to the correspondence between the first configuration signal and each combination of the plurality of transconductance units, and configure accordingly.

2. The circuit according to claim 1, characterized in that, Each of the transconductance units includes multiple transconductance sub-units connected in parallel with each other; The plurality of transconductance units and the plurality of transconductance subunits are configured to acquire the first configuration signal and configure the combination of the plurality of transconductance units and the combination of the plurality of transconductance subunits in the transconductance units according to the first configuration signal, so as to provide the compensation signal to the output node.

3. The circuit according to claim 2, characterized in that, The transconductance sub-unit includes a transconductance tube and a bias tube, wherein the gate of the transconductance tube is configured to acquire the first configuration signal, and the drain of the transconductance tube is configured to provide a signal to the source of the bias tube; the gate of the bias tube is configured to acquire a bias signal, and the drain of the bias tube is configured to provide the compensation signal. Both the transconductor and the bias transistor are PMOS transistors, or both the transconductor and the bias transistor are NMOS transistors.

4. The circuit according to claim 2, characterized in that, The transconductance subunit includes an input terminal, an output terminal, and a current mirror disposed between the input terminal and the output terminal, wherein the output terminal is configured to provide the compensation signal; The input terminal includes a PMOS transistor and an NMOS transistor, wherein the source of the PMOS transistor is connected to the source of the NMOS transistor, the source of the PMOS transistor and the source of the NMOS transistor are configured to acquire the first configuration signal, the gate of the PMOS transistor is configured to acquire the first bias signal, the gate of the NMOS transistor is configured to acquire the second bias signal, and the drain of the PMOS transistor and the drain of the NMOS transistor are configured to provide a signal to the current mirror.

5. The circuit according to claim 3 or 4, characterized in that, The plurality of transconductance sub-units in each of the transconductance units are configured to employ PMOS transistors and / or NMOS transistors of different sizes.

6. The circuit according to claim 1, characterized in that, When the first configuration signal is the input signal, the plurality of transconductance units are configured such that each transconductance unit acquires the input signal of one of the input nodes.

7. A compensation chip, characterized in that, Includes the compensation circuit as described in any one of claims 1 to 6.

8. A compensation method, characterized in that, The method is applied to the compensation circuit described in any one of claims 1-6, wherein the analog module includes an input node and an output node; the method includes: A first configuration signal is acquired, and a combination of multiple transconductance units is configured according to the first configuration signal to provide a compensation signal to the output node; wherein, the first configuration signal is used to indicate a signal at any position in the simulation module; the first configuration signal includes: an input signal, an output signal, and a process signal at any position between the input node and the output node in the simulation module.

9. A compensation circuit, characterized in that, include: An analog module is configured to convert an input signal in the form of voltage into an output signal in the form of current. It includes an input node and an output node, wherein the input node is configured to receive the input signal and the output node is configured to output the output signal. The detection module is configured to detect the operating information of the simulation module and provide a second configuration signal based on the operating information; A linearity compensation module includes multiple transconductance units; it is configured to acquire a first configuration signal and a second configuration signal, and provide a compensation signal to the output node according to the first configuration signal and / or the second configuration signal in accordance with a preset configuration strategy. The first configuration signal is used to indicate the signal at any position in the analog module. The configuration strategy is as follows: substituting the first configuration signal and / or the second configuration signal into each combination of the multiple transconductance units, traversing all combinations, sequentially trying the compensation signal output by each combination of the multiple transconductance units, and using the combination of the multiple transconductance units with the best linearity compensation effect as the configuration of the multiple transconductance unit combinations in the linearity compensation module; or determining the combination of multiple transconductance units corresponding to the current first configuration signal and / or the second configuration signal based on the correspondence between the first configuration signal and / or the second configuration signal and each combination of the multiple transconductance units, and configuring accordingly. The linearity compensation module is configured as follows: In the m-th cycle, the first configuration signal and / or the second configuration signal are acquired, and the m-th compensation signal is provided based on the first configuration signal and / or the second configuration signal. In the (m+1)th cycle, the first configuration signal and the second configuration signal are acquired, and the (m+1)th compensation signal is provided based on the first configuration signal and the second configuration signal. When the numerical difference between the (m+1)th compensation signal and the mth compensation signal is within a preset range, the linearity compensation module is configured to provide the mth compensation signal to the output node.

10. The circuit according to claim 9, characterized in that, The operating information includes at least one of the following: process information, voltage information, temperature information, and frequency information; the second configuration signal includes at least one of the following: process configuration signal, voltage configuration signal, temperature configuration signal, and frequency configuration signal.

11. The circuit according to claim 9, characterized in that, The detection module is configured as follows: When a change in the operating information of the simulation module is detected in the nth cycle, the second configuration signal is provided to the linearity compensation module again according to the changed operating information; The linearity compensation module is configured as follows: In the nth cycle, the first configuration signal and the second configuration signal are acquired, and the nth compensation signal is provided based on the first configuration signal and the second configuration signal. In the (n+1)th cycle, the first configuration signal and the second configuration signal are acquired, and the (n+1)th compensation signal is provided based on the first configuration signal and the second configuration signal. When the numerical difference between the (n+1)th compensation signal and the nth compensation signal is within a preset range, the linearity compensation module is configured to provide the nth compensation signal to the output node.

12. The circuit according to claim 9, characterized in that, The plurality of transconductance units are configured to acquire the first configuration signal and the second configuration signal, and configure a combination of the plurality of transconductance units according to the first configuration signal and / or the second configuration signal to provide the compensation signal to the output node.

13. The circuit according to claim 12, characterized in that, Each of the transconductance units includes multiple transconductance sub-units connected in parallel with each other; The plurality of transconductance units and the plurality of transconductance subunits are configured to acquire the first configuration signal and the second configuration signal, and configure the combination of the plurality of transconductance units and the combination of the plurality of transconductance subunits in the transconductance units according to the first configuration signal and / or the second configuration signal, so as to provide the compensation signal to the output node.

14. The circuit according to claim 13, characterized in that, The transconductance subunit includes a transconductance tube and a bias tube, wherein the gate of the transconductance tube is configured to acquire the first configuration signal and / or the second configuration signal, and the drain of the transconductance tube is configured to provide a signal to the source of the bias tube; the gate of the bias tube is configured to acquire a bias signal, and the drain of the bias tube is configured to provide the compensation signal. Both the transconductor and the bias transistor are PMOS transistors, or both the transconductor and the bias transistor are NMOS transistors.

15. The circuit according to claim 13, characterized in that, The transconductance subunit includes an input terminal, an output terminal, and a current mirror disposed between the input terminal and the output terminal, wherein the output terminal is configured to provide the compensation signal; The input terminal includes a PMOS transistor and an NMOS transistor, wherein the source of the PMOS transistor is connected to the source of the NMOS transistor, the source of the PMOS transistor and the source of the NMOS transistor are configured to acquire the first configuration signal and / or the second configuration signal, the gate of the PMOS transistor is configured to acquire the first bias signal, the gate of the NMOS transistor is configured to acquire the second bias signal, and the drain of the PMOS transistor and the drain of the NMOS transistor are configured to provide a signal to the current mirror.

16. The circuit according to claim 14 or 15, characterized in that, The plurality of transconductance sub-units in each of the transconductance units are configured to employ PMOS transistors and / or NMOS transistors of different sizes.

17. The circuit according to any one of claims 12 to 15, characterized in that, The first configuration signal includes: the input signal, the output signal, and a process signal at any position between the input node and the output node in the simulation module.

18. The circuit according to claim 17, characterized in that, When the first configuration signal is the input signal, the plurality of transconductance units are configured such that each transconductance unit acquires the input signal of one of the input nodes.

19. A compensation chip, characterized in that, Includes the compensation circuit as described in any one of claims 9 to 18.

20. A compensation method, characterized in that, The method is applied to a simulation module, which includes input nodes and output nodes; the method includes: The operating information of the simulation module is detected, and a second configuration signal is provided based on the operating information; Acquire a first configuration signal and a second configuration signal, and provide a compensation signal to the output node according to the first configuration signal and / or the second configuration signal in accordance with a preset configuration strategy. The first configuration signal is used to indicate the signal at any position in the analog module. The configuration strategy is as follows: substitute the first configuration signal and / or the second configuration signal into each combination of multiple transconductance units, traverse all combinations, and sequentially try the compensation signal output by each combination of multiple transconductance units. Use the combination of multiple transconductance units with the best linearity compensation effect as the configuration of the multiple transconductance unit combination in the linearity compensation module; or determine the combination of multiple transconductance units corresponding to the current first configuration signal and / or the second configuration signal based on the correspondence between the first configuration signal and / or the second configuration signal and each combination of multiple transconductance units, and configure accordingly. The method further includes: In the m-th cycle, the first configuration signal and / or the second configuration signal are acquired, and the m-th compensation signal is provided based on the first configuration signal and / or the second configuration signal. In the (m+1)th cycle, the first configuration signal and the second configuration signal are acquired, and the (m+1)th compensation signal is provided based on the first configuration signal and the second configuration signal. When the numerical difference between the (m+1)th compensation signal and the mth compensation signal is within a preset range, the mth compensation signal is provided to the output node.

21. The method according to claim 20, characterized in that, The operating information includes at least one of the following: process information, voltage information, temperature information, and frequency information; the second configuration signal includes at least one of the following: process configuration signal, voltage configuration signal, temperature configuration signal, and frequency configuration signal.

22. The method according to claim 20, characterized in that, The method further includes: When a change in the operating information of the simulation module is detected in the nth cycle, the second configuration signal is provided again based on the changed operating information; In the nth cycle, the first configuration signal and the second configuration signal are acquired, and the nth compensation signal is provided based on the first configuration signal and the second configuration signal. In the (n+1)th cycle, the first configuration signal and the second configuration signal are acquired, and the (n+1)th compensation signal is provided based on the first configuration signal and the second configuration signal. When the numerical difference between the (n+1)th compensation signal and the nth compensation signal is within a preset range, the nth compensation signal is provided to the output node.

23. A compensation device, characterized in that, The device is applied to an analog module, which includes an input node and an output node; the device includes: A first compensation module is configured to acquire a first configuration signal and configure a combination of multiple transconductance units according to a preset configuration strategy based on the first configuration signal to provide a compensation signal to the output node. The first configuration signal indicates a signal at any position within the simulation module. The first configuration signal includes an input signal, an output signal, and a process signal at any position between the input node and the output node in the simulation module. The first configuration signal is substituted into each combination of the multiple transconductance units, and all combinations are iterated over. The compensation signal output by each combination of the multiple transconductance units is tried sequentially, and the combination of the multiple transconductance units with the best linearity compensation effect is used as the configuration of the multiple transconductance unit combination in the linearity compensation module. Alternatively, the combination of multiple transconductance units corresponding to the current first configuration signal is determined based on the correspondence between the first configuration signal and each combination of the multiple transconductance units, and configured accordingly.

24. A compensation device, characterized in that, The device is applied to an analog module, which includes an input node and an output node; the device includes: A module is provided for detecting the operating information of the simulation module and providing a second configuration signal based on the operating information; The second compensation module is used to acquire a first configuration signal and a second configuration signal, and to provide a compensation signal to the output node according to the first configuration signal and / or the second configuration signal in accordance with a preset configuration strategy. The first configuration signal is used to indicate a signal at any position in the simulation module. The first configuration signal includes an input signal, an output signal, and a process signal at any position between the input node and the output node in the simulation module. The configuration strategy is as follows: substituting the first configuration signal and / or the second configuration signal into each combination of multiple transconductance units, traversing all combinations, sequentially trying the compensation signal output by each combination of multiple transconductance units, and using the combination of multiple transconductance units with the best linearity compensation effect as the configuration of the multiple transconductance unit combination in the linearity compensation module; or determining the combination of multiple transconductance units corresponding to the current first configuration signal and / or the second configuration signal based on the correspondence between the first configuration signal and / or the second configuration signal and each combination of multiple transconductance units, and configuring accordingly.

25. A storage medium, characterized in that, The storage medium stores a computer program, wherein the computer program is configured to execute the method described in any one of claims 8, 20 to 22 when it is run.

26. An electronic device comprising a memory and a processor, characterized in that, The memory stores a computer program, and the processor is configured to run the computer program to perform the method as described in any one of claims 8, 20 to 22.

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