Advanced overvoltage protection strategies for wireless power transmission

CN112542899BActive Publication Date: 2026-08-14STMICROELECTRONICS ASIA PACIFIC PTE
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-09-22
Publication Date
2026-08-14

AI Technical Summary

Technical Problem

由于在接收器中耗散的电量是在整流器的输入处的阻抗的函数,因此在来自发射器的电力输送超过20 W的情况下由该技术提供的不足的阻抗修改会导致过高的设备操作温度

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Abstract

Embodiments of this disclosure relate to advanced overvoltage protection strategies for wireless power transmission. A wireless power receiving circuit includes a transistor-based rectifier that receives an AC input voltage and control logic that receives an overvoltage signal. The control logic generates control signals based on the overvoltage signal to control the switching on of transistors within the transistor-based rectifier, causing the transistor-based rectifier to produce a rectified output voltage from the AC input voltage. A comparator compares the rectified output voltage with a reference voltage and establishes an overvoltage signal if the rectified output voltage is greater than the reference voltage. In response to the establishment of the overvoltage signal, the control logic establishes a control signal to simultaneously turn on all transistors of the transistor-based rectifier.
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Description

[0001] Related applications

[0002] This application claims priority to U.S. Provisional Patent Application 62 / 904,115, filed September 23, 2019, the contents of which are incorporated herein by reference in their entirety to the full extent permitted by law. Technical Field

[0003] This application relates to the field of wireless power transmission, and more particularly to circuits and techniques for protecting devices that wirelessly receive power from overvoltage conditions caused by receiving wireless power. Background Technology

[0004] In such Figure 1 In the typical wireless charging system 10 shown, the transmitter system 12 supplies alternating current to the primary coil 13, thereby generating an oscillating magnetic field at the primary coil 13. The secondary coil 19 in the receiver 18, placed close to the primary coil 13, resonates with the magnetic field due to the magnetic coupling between the primary coil 13 and the secondary coil 19, thereby generating a corresponding alternating current in the secondary coil 19 according to Faraday's law of induction. By rectifying the alternating current in the secondary coil 19 using a rectifier circuit within the power pickup unit 20, output DC power can be generated to power the load 21.

[0005] The problem with this typical wireless charging system 10 is that if the output power (e.g., output voltage) exceeds the safe operating voltage, the device inside the receiver 18 may be damaged. Therefore, the output voltage is monitored and actions are taken to help ensure that the voltage does not exceed the safe operating voltage.

[0006] A common technique to ensure that the output voltage does not exceed the safe operating voltage is to stop rectifying the alternating current induced in the secondary coil when the output voltage exceeds the safe operating voltage. This technique works by short-circuiting the input of the rectifier circuit to ground, thereby changing the impedance of the receiver, resulting in the rectifier receiving less power from the receiver.

[0007] While this technology works as expected in some applications, it is insufficient for power delivery from transmitters exceeding 20W because the impedance reduction provided by short-circuiting the input of the rectifier circuit is inadequate. Specifically, the power received at the rectifier is dissipated in a switch used to short-circuit the input of the rectifier circuit to ground, and therefore, the impedance modification of the receiver is a function of the switch's on-resistance. Since the power dissipated in the receiver is a function of the impedance at the rectifier's input, the insufficient impedance modification provided by this technology in cases where power delivery from the transmitter exceeds 20W leads to excessively high device operating temperatures. This excessively high device operating temperature can then cause other devices within the receiver to malfunction, and since the receiver can be included in devices such as smartphones, smartwatches, or wireless earphone systems, many such devices can exist. Summary of the Invention

[0008] This document discloses a wireless power receiving circuit, comprising: a transistor-based rectifier for receiving an AC input voltage; control logic for receiving an overvoltage signal and generating control signals for the transistors of the transistor-based rectifier based on the overvoltage signal, such that the transistor-based rectifier generates a rectified output voltage from the AC input voltage; a comparator for comparing the rectified output voltage with a reference voltage and establishing an overvoltage signal if the rectified output voltage is greater than the reference voltage; and wherein the control logic establishes control signals in response to the establishment of the overvoltage signal to turn on each transistor of the transistor-based rectifier.

[0009] A transistor-based rectifier can be a transistor-based single-phase full-wave rectifier with four transistors. In this case, the control logic establishes a control signal to turn on the four transistors of the transistor-based single-phase full-wave rectifier in response to the establishment of an overvoltage signal (by simultaneously turning on all four transistors or asynchronously turning on the four transistors, but resulting in all four transistors eventually being turned on at the same time); and the control logic establishes two control signals to switch on two of the four transistors of the transistor-based single-phase full-wave rectifier at once in the absence of an overvoltage signal.

[0010] The control signal can be a first control signal, a second control signal, a third control signal, and a fourth control signal. The transistor-based rectifier can include: a first n-channel transistor having a drain coupled to a third node, a source coupled to a first node, and a gate coupled to the first control signal; a third n-channel transistor having a drain coupled to the first node, a source coupled to ground, and a gate coupled to the third control signal; a second n-channel transistor having a drain coupled to the third node, a source coupled to the second node, and a gate coupled to the second control signal; and a fourth n-channel transistor having a drain coupled to the second node, a source coupled to ground, and a gate coupled to the fourth control signal. The control logic can establish the first, second, third, and fourth control signals in response to the establishment of an overvoltage signal to turn on the first, second, third, and fourth transistors. Furthermore, the control logic can switch between establishing the first and fourth control signals and establishing the second and third control signals when no overvoltage signal is established.

[0011] The power supply circuit can generate an output signal from the rectified output voltage, and the load can be powered by the output signal. The load can be a battery charging circuit and / or a battery.

[0012] Low dropout amplifiers can generate low-voltage outputs for powering control logic.

[0013] The power receiving coil can wirelessly receive transmitted power and generate an AC input voltage from that power.

[0014] This document also discloses a method aspect. The method includes: wirelessly receiving power; using a single-phase full-wave rectifier with four transistors, rectifying the received power by alternately switching on different transistor pairs from the four transistors to generate a rectified voltage; comparing the rectified voltage with a reference voltage, and: a) if the rectified voltage is greater than the reference voltage, then switching on the four transistors of the single-phase full-wave rectifier; and b) if the rectified voltage is less than the reference voltage, then continuing to alternately switch on different transistor pairs from the four transistors.

[0015] The method may also include: generating a power signal from the rectified voltage and using the power signal to supply power to the battery charging circuit.

[0016] The method may further include: generating a logic circuit power signal from the rectified voltage, and using the logic circuit power signal to supply power to the control logic that performs a) and b). Attached Figure Description

[0017] Figure 1This is a block diagram of a current wireless charging system.

[0018] Figure 2 This is a schematic block diagram of a receiver for a wireless charging system according to the present disclosure, in which an overvoltage protection circuit device is provided to protect the receiver from overvoltage generated by the received wireless power.

[0019] Figure 3 This is a graph showing the power delivered over a frequency range under the following operating conditions: normal operating conditions (no overvoltage protection), overvoltage conditions with an existing overvoltage protection circuit, and overvoltage conditions with... Figure 2 Overvoltage conditions of the overvoltage protection circuit system. Detailed Implementation

[0020] The following disclosure enables those skilled in the art to make and use the subject matter disclosed herein. The general principles described herein can be applied to embodiments and applications other than those detailed above without departing from the spirit and scope of this disclosure. This disclosure is not intended to be limited to the embodiments shown, but rather will be accorded the widest scope based on the principles and features disclosed or suggested herein.

[0021] Now for reference Figure 2 An electronic device 90, such as a smartphone, tablet computer, smartwatch, or wireless earphone system, is described. The electronic device 90 includes a receiver 100 for wirelessly receiving and supplying power to a load 110 (e.g., a battery and / or battery charging circuitry). The receiver includes a secondary coil 101 (schematically shown as an inductor Ls and a capacitor Cs) for wirelessly receiving power from a primary coil 99 (schematically shown as an inductor Lp and a capacitor Cp) associated with a transmitter (not shown). The receiver 100 also includes a single-phase full-wave rectifier 102 having input nodes N1 and N2 connected to the ends AC1_RX and AC2_RX of the secondary coil 101 to receive AC signals transmitted from the primary coil 99 of the transmitter to the secondary coil 101.

[0022] The single-phase full-wave rectifier 102 comprises n-channel transistors Q1 and Q3 connected in series between node N3 and ground, and n-channel transistors Q2 and Q4 connected in series between node N3 and ground. Specifically, Q1 has its drain coupled to node N3, its source connected to node N1, and its gate connected to the Gate_Q1 signal; Q3 has its drain coupled to node N1, its source connected to ground, and its gate connected to the Gate_Q3 signal; Q2 has its drain connected to node N3, its source connected to node N2, and its gate connected to the Gate_Q2 signal; and Q4 has its drain connected to node N2, its source connected to ground, and its gate connected to the Gate_Q4 signal. Furthermore, diode D1 has its cathode connected to the drain of Q1, and its anode connected to the source of Q1; diode D3 has its cathode connected to the drain of Q3, and its anode connected to the source of Q3; diode D2 has its cathode connected to the drain of Q2, and its anode connected to the source of Q2; and diode D4 has its cathode connected to the drain of Q4, and its anode connected to the source of Q4. In some cases, these diodes may be inherent to transistors Q1 through Q4, for example, generated by a junction in the transistor.

[0023] Receiver 100 also includes comparator 104, which has a non-inverting terminal connected to node N3, an inverting terminal connected to a reference voltage Vref, and an output OVP (e.g., representing overvoltage protection) connected to control logic 106. Capacitor C1 is coupled between the non-inverting input of comparator 104 and ground. Control logic 106 receives the output OVP of comparator 104 as an input, is powered by a 5V voltage V5V from a low-dropout amplifier (LDO) 108, and outputs control signals Gate_Q1, Gate_Q2, Gate_Q3, and Gate_Q4.

[0024] The LDO 108 is connected to node N3 for power supply and is switched via switch S1 to the first terminal of capacitor C2 to generate V5V. The second terminal of capacitor C2 is connected to ground.

[0025] It should be noted that LDO 108 is a low-voltage amplifier used to power control logic 10. A second amplifier (such as a DC-DC converter or LDO 109) generates a regulated output voltage Vout from the rectified voltage Vrect and uses this output voltage to power load 110 for purposes such as charging a battery or battery charging circuit included in device 90 (which includes receiver 100). Iload is the load current (e.g., the current flowing to the battery or battery charging circuit), while Vout... Iload generates the total power supplied to the load. Vout is less than Vrect in magnitude.

[0026] In operation, the single-phase full-wave rectifier 102 rectifies the input AC signal to generate a rectified voltage Vrect at node N3. Comparator 104 continuously compares this rectified voltage with a reference voltage Vref. If the rectified voltage Vrect does not exceed the reference voltage Vref, an overvoltage signal OVP output by comparator 104 is de-established, and therefore, as those skilled in the art will understand, control logic 106 continues to appropriately switch transistors Q1 to Q4 (e.g., simultaneously turning on a high-side transistor on one side and a low-side transistor on the other side, such as Q1 and Q4 or Q2 and Q3) to rectify the input AC voltage to generate the rectified voltage Vrect.

[0027] However, if the rectified voltage Vrect exceeds the reference voltage Vref, comparator 104 establishes an overvoltage signal OVP at its output, which is then passed to control logic 106. Upon receiving the established overvoltage signal OVP, control logic 106 establishes Gate_Q1, Gate_Q2, Gate_Q3, and Gate_Q4 to simultaneously turn on transistors Q1 through Q4 (this turning on of Q1 through Q4 can be simultaneous or gradual until all transistors Q1 through Q4 are turned on at the same time), which is asynchronous to the normal switching of the single-phase full-wave rectifier 102.

[0028] Since all transistors Q1 through Q4 are turned on, the reflected impedance at receiver 100 increases, less power is received from the primary coil of the transmitter, and Vrect decreases. Note that at this point, switch S1 will be turned off, and capacitor C2 will maintain a voltage of V5V so that control logic 106 maintains the established control signals Gate_Q1, Gate_Q2, Gate_Q3, and Gate_Q4 to keep transistors Q1 through Q4 turned on.

[0029] Robust overvoltage protection provided by receiver 100 Figure 3 As can be seen, in Figure 3 As can be seen from this, compared to the power received during operation, Figure 2 The embodiments significantly reduce the received power, and compared to existing technology designs, Figure 2 The embodiment reduced the received power by approximately 6 dB.

[0030] While this disclosure has been described with respect to a limited number of embodiments, those skilled in the art who benefit from this disclosure will understand that other embodiments may be contemplated without departing from the scope of this disclosure as disclosed herein. Therefore, the scope of this disclosure should be defined only by the appended claims.

Claims

1. A wireless power receiving circuit, comprising: A transistor-based rectifier is configured to receive an AC input voltage at a first node and a second node. The transistor-based rectifier includes a transistor-based single-phase full-wave rectifier having a first high-side transistor coupled between the first node and the third node, a first low-side transistor coupled between the third node and ground, a second high-side transistor coupled between the second node and the third node, and a second low-side transistor coupled between the third node and ground. The control logic is configured to receive an overvoltage signal and generate control signals for controlling the actuation of the first high-side transistor, the first low-side transistor, the second high-side transistor, and the second low-side transistor, so that the transistor-based rectifier generates a rectified output voltage at the third node from the AC input voltage. A comparator is configured to compare the rectified output voltage with a reference voltage, and to establish an overvoltage signal when the rectified output voltage is greater than the reference voltage; The control logic establishes the control signal in response to the establishment of the overvoltage signal, so that the first high-side transistor, the first low-side transistor, the second high-side transistor, and the second low-side transistor are simultaneously turned on; as well as The control logic establishes two control signals in the control signals to switch on the first high-side transistor and the second low-side transistor or the second high-side transistor and the first low-side transistor at one time, in the absence of the establishment of the overvoltage signal.

2. The wireless power receiving circuit according to claim 1, wherein the control signal includes a first control signal, a second control signal, a third control signal, and a fourth control signal; and wherein: The first high-side transistor includes a first n-channel transistor having a drain coupled to the third node, a source coupled to the first node, and a gate coupled to the first control signal. The first low-side transistor includes a third n-channel transistor having a drain coupled to the first node, a source coupled to ground, and a gate coupled to the third control signal; The second high-side transistor includes a second n-channel transistor having a drain coupled to the third node, a source coupled to the second node, and a gate coupled to the second control signal. and` The second low-side transistor includes a fourth n-channel transistor having a drain coupled to the second node, a source coupled to ground, and a gate coupled to the fourth control signal.

3. The wireless power receiving circuit of claim 2, wherein the control logic is configured to establish the first control signal, the second control signal, the third control signal, and the fourth control signal in response to the establishment of the overvoltage signal, so as to turn on the first n-channel transistor, the second n-channel transistor, the third n-channel transistor, and the fourth n-channel transistor.

4. The wireless power receiving circuit according to claim 3, wherein the control logic is configured to switch between establishing the first control signal and the fourth control signal and establishing the second control signal and the third control signal when the overvoltage signal is not established.

5. The wireless power receiving circuit according to claim 1 further includes a power supply circuit, the power supply circuit generating an output signal from the rectified output voltage.

6. The wireless power receiving circuit according to claim 5 further includes a load, the load being powered by the output signal.

7. The wireless power receiving circuit according to claim 6, wherein the load includes a battery charging circuit.

8. The wireless power receiving circuit according to claim 6, wherein the load comprises a battery.

9. The wireless power receiving circuit of claim 5 further includes a low-dropout amplifier that generates a low-voltage output for powering the control logic.

10. The wireless power receiving circuit of claim 1 further includes a power receiving coil that wirelessly receives the transmitted power and generates the AC input voltage from the power.

11. The wireless power receiving circuit of claim 1, further comprising a low-dropout amplifier, a capacitor, and a switch connected between the output of the low-dropout amplifier and the capacitor, the low-dropout amplifier being configured to receive the rectified output voltage as an input; wherein the switch is configured to connect the output of the low-dropout amplifier to the capacitor to form a low-voltage output across the capacitor, the low-voltage output being used to power the control logic in the absence of an established overvoltage signal.

12. The wireless power receiving circuit of claim 1, wherein the control logic establishes the control signal by gradually establishing different control signals in the control signal over time until each control signal is established in response to the establishment of the overvoltage signal, causing the first high-side transistor, the first low-side transistor, the second high-side transistor, and the second low-side transistor to be simultaneously turned on in response to the establishment of the overvoltage signal, thereby gradually turning on different transistors among the first high-side transistor, the first low-side transistor, the second high-side transistor, and the second low-side transistor over time until each of the first high-side transistor, the first low-side transistor, the second high-side transistor, and the second low-side transistor is simultaneously turned on.

13. A method for receiving electricity, the method comprising: Wirelessly receive power; Using a single-phase full-wave rectifier with two high-side transistors and two low-side transistors, the received power is rectified to produce a rectified voltage by alternating between switching on different pairs of transistors from the two high-side transistors and the two low-side transistors. The rectified voltage is compared with a reference voltage, and: a) When the rectified voltage is greater than the reference voltage, the two high-side transistors and the two low-side transistors of the single-phase full-wave rectifier are simultaneously turned on; as well as b) When the rectified voltage is less than the reference voltage, continue to alternate between turning on different pairs of transistors from the two high-side transistors and the two low-side transistors.

14. The method of claim 13, further comprising: A power signal is generated from the rectified voltage, and the power signal is used to supply power to the battery charging circuit.

15. The method according to claim 13, further comprising: The rectified voltage generates a logic circuit power signal, and the logic circuit power signal is used to power the control logic that executes a) and b).

16. An electronic device comprising: Battery; Battery charging circuit; The receiver coil receives power transmitted wirelessly and generates an AC input voltage from said power; as well as A wireless power receiving circuit supplies power to the battery charging circuit, the wireless power receiving circuit comprising: A single-phase full-wave rectifier receives the AC input voltage at a first node and a second node. The single-phase full-wave rectifier has a first high-side transistor coupled between the first node and the third node, a first low-side transistor coupled between the third node and ground, a second high-side transistor coupled between the second node and the third node, and a second low-side transistor coupled between the third node and ground. The control logic receives an overvoltage signal and generates, based on the overvoltage signal, a control signal for controlling the actuation of the first high-side transistor, the first low-side transistor, the second high-side transistor, and the second low-side transistor, so that the single-phase full-wave rectifier generates a rectified output voltage at the third node from the AC input voltage; A comparator compares the rectified output voltage with a reference voltage, and establishes the overvoltage signal when the rectified output voltage is greater than the reference voltage; The control logic establishes the control signal in response to the establishment of the overvoltage signal, so that the first high-side transistor, the first low-side transistor, the second high-side transistor, and the second low-side transistor are simultaneously turned on; and The control logic establishes two control signals in the control signals to switch on the first high-side transistor and the second low-side transistor or the second high-side transistor and the first low-side transistor at one time, in the absence of the establishment of the overvoltage signal. The power supply circuit generates power from the rectified output voltage to supply power to the battery charging circuit, thereby enabling the battery charging circuit to charge the battery.

17. The electronic device of claim 16, wherein the control signal includes a first control signal, a second control signal, a third control signal, and a fourth control signal; and wherein: The first high-side transistor includes a first n-channel transistor having a drain coupled to the third node, a source coupled to the first node, and a gate coupled to the first control signal. The first low-side transistor includes a third n-channel transistor having a drain coupled to the first node, a source coupled to ground, and a gate coupled to the third control signal; The second high-side transistor includes a second n-channel transistor having a drain coupled to the third node, a source coupled to the second node, and a gate coupled to the second control signal. as well as The second low-side transistor includes a fourth n-channel transistor having a drain coupled to the second node, a source coupled to ground, and a gate coupled to the fourth control signal; The AC input voltage is coupled across the first node and the second node.

18. The electronic device of claim 17, wherein the control logic, in the absence of the establishment of the overvoltage signal, switches between establishing the first control signal and the fourth control signal and establishing the second control signal and the third control signal, thereby causing the single-phase full-wave rectifier to generate the rectified output voltage from the AC input voltage.

19. A wireless power receiving circuit, comprising: A transistor-based rectifier has a first node and a second node configured to receive an input AC signal, and a first output and a second output configured to generate a DC output. The transistor-based rectifier includes a transistor-based single-phase full-wave rectifier having a first high-side transistor coupled between the first node and the third node, a first low-side transistor coupled between the third node and ground, a second high-side transistor coupled between the second node and the third node, and a second low-side transistor coupled between the third node and ground. The comparator has a non-inverting terminal coupled to the first output of the rectifier, an inverting terminal coupled to a reference voltage, and an output; as well as The control logic has inputs coupled to the output of the comparator, and the control logic generates control signals for the rectifier; The control logic establishes the control signal based on receiving a first output level from the comparator, so that the first high-side transistor, the first low-side transistor, the second high-side transistor, and the second low-side transistor are simultaneously turned on; as well as The control logic is configured to establish two control signals in the control signals to switch on the first high-side transistor and the second low-side transistor or the second high-side transistor and the first low-side transistor at a time based on a second output level received from the comparator.

20. The wireless power receiving circuit according to claim 19, wherein the control signal includes a first control signal, a second control signal, a third control signal, and a fourth control signal; and wherein: The first high-side transistor includes a first n-channel transistor having a drain coupled to the third node, a source coupled to the first node, and a gate coupled to the first control signal, wherein the third node is the first output of the rectifier; The first low-side transistor includes a third n-channel transistor having a drain coupled to the first node, a source coupled to ground, and a gate coupled to the third control signal, wherein the second output of the rectifier is coupled to the source of the third n-channel transistor; The second high-side transistor includes a second n-channel transistor having a drain coupled to the third node, a source coupled to the second node, and a gate coupled to the second control signal. as well as The second low-side transistor includes a fourth n-channel transistor having a drain coupled to the second node, a source coupled to ground, and a gate coupled to the fourth control signal, wherein the second output of the rectifier is coupled to the source of the fourth n-channel transistor.

21. The wireless power receiving circuit of claim 20, wherein the control logic is configured to establish the first control signal, the second control signal, the third control signal, and the fourth control signal in response to receiving a first output level from the comparator, to turn on the first n-channel transistor, the second n-channel transistor, the third n-channel transistor, and the fourth n-channel transistor.

22. The wireless power receiving circuit of claim 21, wherein the control logic is configured to switch between establishing the first control signal and the fourth control signal and establishing the second control signal and the third control signal in response to receiving a second output level from the comparator.

Citation Information

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