Storage devices, memory devices, and memory systems

Abstract

Storage devices, memory devices, and memory systems are provided. The storage device includes an auxiliary power device having at least one capacitor, wherein the at least one capacitor has a first path for a leakage current, a charging circuit including a switch connected to the auxiliary power device, and a state determination circuit connected to the auxiliary power device, wherein the state determination circuit includes a path circuit connected in parallel with the at least one capacitor to form a second path, the second path having at least one of a lower resistance than a resistance of the first path and a current source.

Description

[0001] This application claims priority to Korean Patent Application No. 10-2019-0111567, filed on September 9, 2019, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field

[0002] Exemplary embodiments of the inventive concept relate to externally powered memory devices, and more specifically, to auxiliary power supply devices that provide secondary auxiliary power and memory systems including auxiliary power supply devices. Background Technology

[0003] Typically, memory systems, including memory devices and memory controllers, operate using power supplied from an external power source. Sudden power outages (SPOs) can occur, where power is interrupted abruptly during the operation of the memory system. In cases where the memory controller uses volatile memory to store data, the data stored in the volatile memory may be lost, or operations performed by the memory device (e.g., erase operations, write operations, etc.) may not be completed. Summary of the Invention

[0004] An exemplary embodiment of the inventive concept provides a storage device including a path circuit and a memory system including said storage device, the path circuit providing a current path to efficiently and accurately monitor the status of an auxiliary power supply. For example, in the event of a sudden power outage (SPO), the memory system can use the auxiliary power supply to complete ongoing operations and / or perform data backup operations.

[0005] According to an exemplary embodiment of the inventive concept, a storage device includes: an auxiliary power supply device including at least one capacitor, wherein the at least one capacitor has a first path for leakage current; a charging circuit including a switch connected to the auxiliary power supply device; and a state determination circuit connected to the auxiliary power supply device, wherein the state determination circuit includes a path circuit connected in parallel with the at least one capacitor to form a second path, the second path having at least one of a resistance lower than the resistance of the first path and a current source.

[0006] According to an exemplary embodiment of the inventive concept, a memory device includes: a measuring device for measuring the voltage of at least one capacitor in an auxiliary power supply circuit of the memory device; a detection device for determining a fault in the at least one capacitor by comparing the time of change of the measured voltage with a reference time; a normal state device for determining that the auxiliary power supply circuit is in a normal state if the voltage of the at least one capacitor periodically cycles between a first voltage level and a second voltage level lower than the first voltage level; and an abnormal state device for determining that the auxiliary power supply circuit is in an abnormal state if the voltage of the at least one capacitor non-periodically cycles between the first voltage level and the second voltage level or deviates from the first voltage level and the second voltage level.

[0007] According to an exemplary embodiment of the inventive concept, a memory system includes: a power-loss protection (PLP) circuit having an auxiliary power supply device including at least one capacitor; a charging circuit including a switching circuit connected to the auxiliary power supply device that is turned on or off, and configured to supply power to the auxiliary power supply device; a main system circuit including a controller and at least one memory chip; and a power block disposed between the PLP circuit and the main system circuit and configured to supply power to the main system circuit, wherein the PLP circuit includes a state determination circuit configured to measure the voltage of the at least one capacitor and determine a fault of the at least one capacitor by comparing the time of change of the measured voltage with a reference time, and the state determination circuit includes a path circuit connected in parallel with the at least one capacitor and configured to form a second path having a resistance value that is smaller than the resistance value of a first path for leakage current of the at least one capacitor. Attached Figure Description

[0008] Exemplary embodiments of the inventive concept can be more clearly understood from the following detailed description in conjunction with the accompanying drawings, wherein:

[0009] Figure 1 This is a schematic block diagram of a storage device including a path circuit according to an exemplary embodiment of the inventive concept;

[0010] Figure 2 This is a schematic circuit diagram of a charging circuit according to an exemplary embodiment of the inventive concept.

[0011] Figure 3 This is a schematic circuit diagram of a buck converter for a charging circuit according to an exemplary embodiment of the inventive concept.

[0012] Figure 4A This is a schematic circuit diagram of a capacitor and an insulating resistor connected in series with each other in an auxiliary power supply device according to an exemplary embodiment of the inventive concept.

[0013] Figure 4B This is a schematic circuit diagram of capacitors and insulation resistors connected in parallel to each other in an auxiliary power supply device according to an exemplary embodiment of the inventive concept.

[0014] Figure 5A This is a schematic circuit diagram of a first path and a second path including a resistor state determination circuit of an auxiliary power supply device according to an exemplary embodiment of the inventive concept.

[0015] Figure 5B This is a schematic circuit diagram of a first path and a second path including a current source state determination circuit of an auxiliary power supply device according to an exemplary embodiment of the inventive concept.

[0016] Figure 5C This is a schematic circuit diagram of a first path of an auxiliary power supply device and a second path including a state determination circuit of a voltage divider, according to an exemplary embodiment of the inventive concept.

[0017] Figure 6 It is a schematic graph showing the switching of the voltage of the auxiliary power supply and the charging circuit over time in the normal state of the auxiliary power supply under the exemplary embodiment of the inventive concept.

[0018] Figures 7A to 7C It is a schematic graph showing the switching of the voltage of the auxiliary power supply and the charging circuit over time in an abnormal state of the auxiliary power supply in accordance with an exemplary embodiment of the inventive concept.

[0019] Figure 8A This is a schematic block diagram of a memory system in which a state determination circuit is included in a main system integrated circuit (IC) according to an exemplary embodiment of the inventive concept.

[0020] Figure 8B This is a schematic block diagram of a memory system in which a state determination circuit is included in a power-down protection (PLP) IC, according to an exemplary embodiment of the inventive concept.

[0021] Figure 9A This is a schematic block diagram of a memory system in which a state determination circuit is included in a PLP block, according to an exemplary embodiment of the inventive concept.

[0022] Figure 9B This is a schematic block diagram of a memory system in which a state determination circuit is included in a main system IC, according to an exemplary embodiment of the inventive concept.

[0023] Figure 10A and Figure 10BThis is a schematic hybrid concept diagram illustrating the power supply process in a memory system according to exemplary embodiments of the inventive concept; and

[0024] Figures 11 to 13 This is a flowchart illustrating an operation method of a storage device for determining the state of an auxiliary power supply device according to an exemplary embodiment of the inventive concept. Detailed Implementation

[0025] In the event of a sudden power outage (SPO) or similar situation, the memory system of the exemplary embodiment can use an auxiliary power supply to complete the operation being performed and / or perform a data backup operation. Exemplary embodiments of the inventive concept will be described below with reference to the accompanying drawings.

[0026] Figure 1 A storage device including a path circuit is shown according to an exemplary embodiment of the inventive concept. (Refer to...) Figure 1 The storage device 1000 including a path circuit according to an exemplary embodiment of the inventive concept may include a charging circuit 100, an auxiliary power supply device 200 connected to the charging circuit, and a state determination circuit 300 connected to the charging circuit and the auxiliary power supply device, wherein the state determination circuit 300 may include a path circuit 310.

[0027] The charging circuit 100 can supply power to the auxiliary power supply device 200. For example, the charging circuit 100 can be implemented as (but should not be limited to) a DC-DC converter.

[0028] The charging circuit 100 of the storage device 100 according to an exemplary embodiment of the inventive concept may include a switching circuit connected to an auxiliary power supply device 200 for being turned on or off. The switching circuit may supply power to or disconnect power to the auxiliary power supply device 200 when the switch is turned on or off. The charging circuit 100 may supply voltage to the auxiliary power supply device 200 to charge the auxiliary power supply device 200.

[0029] The charging operation of the charging circuit 100 can be represented by the on / off state of the switching circuit. The charging operation of the charging circuit 100 can also be represented by the switching profile of the DC-DC converter. The switching profile represents information about the on / off state of the FETs in the DC-DC converter over time when the field-effect transistors (FETs) are used as switches. See reference... Figure 2 , Figure 3 , Figure 6 as well as Figures 7A to 7C The charging circuit 100 is described in more detail.

[0030] At least one capacitor 210 may be connected to the auxiliary power supply device 200. In implementation, the capacitor 210 may include an insulation resistor 230 due to its physical characteristics, and leakage current of the capacitor 210 may flow through a path including the insulation resistor 230. (See reference...) Figure 1 The path including the insulation resistor 230 is shown as the first path Path1.

[0031] Although for the sake of ease of description, in Figure 1 A capacitor is shown, but various connection methods (such as series connection, parallel connection, and combinations of series / parallel connection) can be used between multiple capacitors, and this example is not limited to. See also... Figure 4A and Figure 4B The capacitor connection method for the auxiliary power supply device 200 is described in more detail.

[0032] Each of the multiple capacitors may have its own corresponding insulation resistor, thus multiple insulation resistors may exist. However, for ease of description, it should be understood that all such insulation resistors may be converted into or considered as a single equivalent insulation resistor 230.

[0033] Capacitor 210 can be an electrolytic capacitor, a film capacitor, a tantalum capacitor, a ceramic capacitor, etc.

[0034] Electrolytic capacitors use a thin oxide film as the dielectric and aluminum as the electrode, hence they are also called aluminum (Al) capacitors. Electrolytic capacitors have good low-frequency characteristics and can be made with high capacitance up to tens of thousands of μF. Tantalum capacitors consist of electrodes formed of tantalum (Ta) and can have better temperature and frequency characteristics than electrolytic capacitors.

[0035] Film capacitors can be constructed by inserting a thin film dielectric (such as polypropylene, polystyrene, polytetrafluoroethylene, etc.) into electrodes (such as aluminum, copper, etc.) and winding them. Depending on the materials and manufacturing processes, film capacitors can have different capacitances and applications. Among film capacitors, biaxially oriented polyethylene terephthalate (BoPET) capacitors, which may be relatively inexpensive, are cylindrical capacitors made by inserting a polyester film into a metal core and are primarily used in high-frequency circuits, oscillating circuits, etc.

[0036] For ceramic capacitors, high dielectric constant materials (such as barium titanate) can be used as the dielectric. Ceramic capacitors have good high-frequency characteristics and can be used to transmit noise through ground. Multilayer ceramic capacitors (MLCCs), a type of ceramic capacitor, use multiple layers of high dielectric constant ceramics as the dielectric between the electrodes. MLCCs can be used for bypassing due to their good temperature and frequency characteristics and small size.

[0037] In the storage device 1000 according to an exemplary embodiment of the inventive concept, the capacitor 210 of the auxiliary power supply device 200 may include a tantalum capacitor, an aluminum capacitor, an MLCC, etc., having a low equivalent series resistance (ESR). However, the specific material of the capacitor 210 of the auxiliary power supply device 200 may vary from the foregoing examples.

[0038] The auxiliary power supply device 200 can be powered from the charging circuit 100, allowing the capacitor 210 to be charged. Charging from the charging circuit 100 can be stopped when charge accumulates in the capacitor 210 through charging from the charging circuit 100, causing the voltage of the capacitor 210 to reach a first voltage. When charging in the capacitor 210 stops, a slow, natural discharge occurs, causing the voltage of the capacitor 210 to slowly decrease. When the voltage of the capacitor 210 decreases and reaches a second voltage, the charging operation of the charging circuit 100 restarts, and the replenished charge can be recharged into the capacitor 210 of the auxiliary power supply device 200.

[0039] When the auxiliary power supply device 200 is in normal condition, the charging operation of the charging circuit 100 can be repeated at preset intervals. However, when the auxiliary power supply device 200 is in an abnormal condition (e.g., when a fault such as a short circuit or open circuit occurs in some of the capacitors 210 of the auxiliary power supply device 200), the charging operation of the charging circuit 100 may have aspects different from those when the auxiliary power supply device 200 is in normal condition. Therefore, by measuring and analyzing the charging operation of the charging circuit 100, the condition of the auxiliary power supply device 200 can be determined. In other words, a fault in the capacitors 210 of the auxiliary power supply device 200 can be determined.

[0040] The state of the auxiliary power supply unit 200 can be determined by measuring and analyzing the on / off state of the switching circuit. The state of the auxiliary power supply unit 200 can also be determined by measuring and analyzing the switching profile of the DC-DC converter. (Refer to...) Figure 6 as well as Figures 7A to 7C The condition measurements and analyses performed by the auxiliary power supply unit 200 are described in more detail.

[0041] When a sudden power outage (SPO) occurs, interrupting the external power supply to an electronic system (such as a memory system), the auxiliary power supply device 200 can supply auxiliary power to the memory system. More specifically, the auxiliary power supply device 200 can perform ongoing operations and data backup operations by supplying energy accumulated in capacitor 210 to the memory system. According to an exemplary embodiment of the inventive concept, in an SPO situation, the memory system can receive temporary power from the auxiliary power supply device 200 and store data in a non-volatile storage device (such as NAND flash memory) to perform backup operations. However, in the event of a fault in the auxiliary power supply device 200, adequate power may not be supplied to the memory system in an SPO situation, resulting in the loss of important data in the memory system. To prevent data loss in the memory system during an SPO situation, the auxiliary power supply device 200 can be monitored periodically or substantially continuously in real time, and its status can be checked so that, in the event of a fault, the auxiliary power supply device 200 can be repaired or replaced.

[0042] According to an exemplary embodiment of the inventive concept, the state determination circuit 300 of the storage device 1000 can measure and analyze the charging operation of the charging circuit 100 and the voltage of the capacitor 210 included in the auxiliary power supply device 200 to determine the state of the auxiliary power supply device 200. For example, the charging operation of the charging circuit 100 can be represented by the on / off state of the switching circuit or the switching profile of the DC-DC converter, and the state determination circuit 300 can determine the state of the auxiliary power supply device 200 by measuring and analyzing the on / off state of the switching circuit or the switching profile of the DC-DC converter. The voltage of the capacitor 210 can be measured and analyzed to determine a fault in the capacitor 210, and thus a fault in the auxiliary power supply device 200.

[0043] The status determination circuit 300 can determine a fault in capacitor 210 by monitoring its voltage. More specifically, the status determination circuit 300 can determine whether the auxiliary power supply device 200 is functioning correctly based on changes in the voltage level of capacitor 210. For example, the status determination circuit 300 can compare the time taken for the voltage of capacitor 210 to drop from a first voltage to a second voltage with a reference time, and compare the time taken for the voltage of capacitor 210 to rise from a second voltage to a first voltage with a reference time.

[0044] The auxiliary power supply 200 is maintained in a state of being charged with at least sufficient preset energy to support the storage device 1000 for a preset time under SPO conditions. Therefore, the state determination circuit 300 can measure the voltage of the capacitor 210 and determine the energy stored in the auxiliary power supply 200 by calculating the effective capacitance, thus determining whether the auxiliary power supply 200 is in a normal state.

[0045] The state determination circuit 300 of the storage device 1000 according to an exemplary embodiment of the inventive concept may include a path circuit 310 connected in parallel with the auxiliary power supply device 200. The path circuit 310 may be configured to form a second path Path2 having a resistance value smaller than that of the first path through which the leakage current of the capacitor 210 flows. More specifically, the resistance value of the second path may be implemented to be a threshold value smaller than that of the first path. The threshold value may be predetermined as a value that minimizes the influence of the leakage current of the capacitor 210 when the state determination circuit 300 determines the state of the auxiliary power supply device 200. In other words, the second path may be configured to force the leakage current flowing in the capacitor 210 to flow through an alternative path other than the first path inside the capacitor 210.

[0046] Capacitor 210 may have an insulation resistance derived from physical characteristics. Path circuit 310 provides a shunt path for the leakage current of capacitor 210 generated due to the insulation resistance. (Refer to...) Figure 1 A portion of the leakage current may flow through the first path, and the remainder of the leakage current may flow through the path circuit 310. At least one current path may be provided within the path circuit 310.

[0047] The leakage current flowing in capacitor 210 can be altered by various internal or external environmental factors (such as the lifespan of capacitor 210, temperature and humidity of electronic components, etc.). For example, the initial leakage current of capacitor 210 used in auxiliary power supply device 200 may be less than or equal to 5 μA, and the appropriate allowable leakage current may be less than or equal to 100 μA. However, depending on various operating environments (such as the usage time of storage device 1000, temperature and humidity of the environment in which storage device 1000 is used, etc.), the leakage current of capacitor 210 may rise above 100 μA. In this case, by including path circuit 310, the amount of leakage current flowing in capacitor 210 can be adjusted and thus returned to an appropriate range (such as, for example, to 100 μA or less). In this way, by adjusting the amount of leakage current flowing in capacitor 210, status determination circuit 300 can accurately measure and determine faults in auxiliary power supply device 200. Therefore, storage device 1000 can compensate for many faults and provide system alarms for other faults. See also Figure 6 and 7A to Figure 7C The measurement and analysis of leakage current of capacitor 210 and faults of auxiliary power supply device 200 are described in more detail.

[0048] According to an exemplary embodiment of the inventive concept, the storage device 1000, including the path circuit 310, can measure and analyze the charging operation of the charging circuit 100 in real time via the state determination circuit 300, thereby monitoring the state of the auxiliary power supply device 200 in real time. Here, the charging operation of the charging circuit 100 can be represented, for example, by the switching profile of the DC-DC converter, wherein the state determination circuit 300 can measure the switching profile of the DC-DC converter.

[0049] Because the state of the auxiliary power supply device 200 is monitored based on the natural charging operation of the charging circuit 100, the storage device 1000 including the path circuit 310 according to the exemplary embodiment of the inventive concept can avoid performing operations such as forcibly discharging the capacitor 210 of the auxiliary power supply device 200. Therefore, the storage system supplied with power from the auxiliary power supply device 200 can be safely maintained, and a data backup state can always be maintained.

[0050] Typically, if a forced discharge operation, such as capacitor 210, is performed to monitor the state of auxiliary power supply 200, data loss may not be prevented in the event of an actual SPO (Special Purpose) condition. Although the memory write mode can be changed in consideration of the occurrence of an SPO condition during forced discharge, the operating efficiency of the memory system may be reduced if the memory write mode is changed in advance regardless of the state of auxiliary power supply 200.

[0051] However, the storage device 1000 including the path circuit 310 according to the exemplary embodiment of the inventive concept does not require forced discharge of the capacitor 210, eliminating the need to change the memory write operation during monitoring of the auxiliary power supply device 200, and thus preventing a decrease in the operating efficiency of the memory system. Furthermore, the path circuit 310 can be used to adjust the amount of leakage current, thereby avoiding measurement distortion caused by leakage current when determining a fault in the capacitor 210. Therefore, a fault in the capacitor 210 can be measured more accurately, thereby improving the accuracy of determining whether the storage device 1000 is in an abnormal state.

[0052] Figure 2 and Figure 3 Detailed description includes Figure 1 Example of a DC-DC converter for a storage device 1000 and a charging circuit 100, with path circuit 310. Figure 2 A simple buck converter configuration is shown, and Figure 3 The actual buck converter configuration is shown. For ease of understanding, please refer to [reference needed]. Figure 1 Describe it.

[0053] Reference Figure 2 and Figure 3 In the storage device 1000 including path circuit 310 according to an exemplary embodiment, the charging circuit 100 may include a DC-DC converter. However, for ease of understanding and detailed description of the application, a device may be specified without limiting the charging circuit 100 to a DC-DC converter. For example, a buffer circuit including switching elements may also be used in the charging circuit 100.

[0054] DC-DC converters can include boost converters and buck converters. A boost converter is a converter that boosts the input DC voltage and outputs a boosted input DC voltage, while a buck converter is a converter that bucks the input DC voltage and outputs a buck input DC voltage.

[0055] Reference Figure 2 In a storage device 1000 including path circuit 310 according to an exemplary embodiment of the inventive concept, charging circuit 100 may include a simple buck converter 100a, which may include a switch 110, an inductor 120, a diode 130, and a capacitor 140. As shown, capacitor 140 may be included in buck converter 100a. However, capacitor 140 may be considered as part of auxiliary power supply device 200 as a charging target.

[0056] Reference Figure 2 When switch 110 of buck converter 100a is closed, voltage is supplied from power supply 101 to inductor 120, increasing the current flowing in inductor 120. This causes energy to accumulate in inductor 120 and be transferred to the output, thereby increasing the output voltage Vo (i.e., the voltage across capacitor 140). Diode 130 can be reverse biased, preventing current from flowing to diode 130.

[0057] When switch 110 is open, a closed circuit is formed, comprising inductor 120, diode 130, and capacitor 140. The current flowing through inductor 120 flows through the closed circuit and decreases slowly, thus the output voltage Vo (i.e., the voltage across capacitor 140) decreases. This can be interpreted as the natural discharge of capacitor 140. The average voltage of the output voltage Vo can be controlled according to the ratio of the closing time to the opening time of switch 110. When switch 110 is closed, the maximum output voltage is reached, and the output voltage can be equal to or less than the input voltage. Switch 110 may include, but is not limited to, easily controllable field-effect transistors (FETs).

[0058] Reference Figure 3The substantial buck converter 100b may include a pair of first switches 110a and second switches 110b, an inductor 120, and a capacitor 140. Here, the pair of switches 110a and 110b may include the same n-type FET as shown, and pulse width modulation (PWM) signals PWM_T and PWM_B may be input to the pair of switches 110a and 110b, respectively. However, the inventive concept is not limited to this example. For example, the pair of switches 110a and 110b may include an n-type FET and a p-type FET, or the same p-type FET, wherein the same pulse width modulation signal may be input to the pair of switches 110a and 110b for both the n-type and p-type FETs. Furthermore, the FETs may be enhancement-type as shown, or one or both may be depletion-type.

[0059] According to an exemplary embodiment of the inventive concept, the buck converter 100b can operate in two modes depending on the on or off state of each of the switches 110a and 110b.

[0060] For example, the first mode could be the operating mode when the first switch 110a is turned on and the second switch 110b is turned off, wherein as a voltage from the power supply 101 is applied to the inductor 120, the current flowing in the inductor 120 increases, causing energy to accumulate in the inductor 120 and be transferred to the output terminal, thereby increasing the output voltage Vo (i.e., the voltage across the capacitor 140).

[0061] For example, the second mode could be an operating mode when the first switch 110a is off and the second switch 110b is on, wherein a closed circuit including an inductor 120 and a capacitor 140 can be formed. The current flowing in the inductor 120 flows through the closed circuit and decreases slowly until the first switch 110a turns on in the next cycle, causing the output voltage Vo to decrease.

[0062] According to an exemplary embodiment of the inventive concept, the charging circuit 100 can be controlled by the controller 400a.

[0063] When the sensed output voltage Vo is low, controller 400a can extend the on-time of the first switch 110a and shorten the on-time of the second switch 110b, thereby increasing the output voltage Vo. When the sensed output voltage Vo is high, controller 400a can shorten the on-time of the first switch 110a and extend the on-time of the second switch 110b, thereby decreasing the output voltage Vo. For example, controller 400a can adjust the duty cycle of the PWM signal output to each of switches 110a and 110b according to the output voltage Vo, thereby maintaining the voltage in capacitor 140 within a specific range. See reference... Figure 8A The controller 400a is described in more detail.

[0064] Figure 4A and Figure 4B Showing includes Figure 1 The different structures of auxiliary power supply devices for storage devices in the path circuit. For ease of understanding, please refer to... Figure 1 Describe it.

[0065] Reference Figure 4A In the storage device 1000 including path circuitry according to an exemplary embodiment, the auxiliary power supply device 200a may be configured such that a plurality of capacitors 210 are connected in series. Typically, when the capacitors 210 are connected in series, the total voltage of the capacitors 210 can be increased. Therefore, a high-voltage auxiliary power supply device can be achieved by connecting small-capacity capacitors in series. Simultaneously, by connecting the capacitors 210 in parallel, the total capacitance of the capacitors 210 can be increased, thereby increasing the amount of charge that can be stored in the capacitors 210.

[0066] Due to the physical characteristics of capacitor 210, an insulation resistor can be present in each of the plurality of capacitors 210. For a corresponding plurality of capacitors 210, the insulation resistor can be connected in parallel with the capacitors and thus serves as a path through which leakage current flows. (Refer to...) Figure 4A The multiple insulation resistors generated in the multiple capacitors 210 can be represented as an equivalent insulation resistor 230a.

[0067] The leakage current generated in capacitor 210, including in auxiliary power supply unit 200a, can flow through equivalent insulation resistor 230a. (Refer to...) Figure 4A and Figure 1 The equivalent insulation resistance 230a can be represented as the first path.

[0068] Now refer to Figure 4B In the storage device 1000 including path circuitry according to an exemplary embodiment, the auxiliary power supply device 200b may be configured such that a plurality of capacitors 210 are connected in parallel. The plurality of parallel capacitors 210 can increase the charge capacity of the auxiliary power supply device 200b. As described above, due to the physical characteristics of the capacitors 210, an insulation resistor may be present in each of the plurality of capacitors 210. For each of the respective plurality of capacitors 210, the insulation resistor may be connected in parallel with the capacitors and thus serve as a path through which leakage current flows. (Refer to...) Figure 4B The multiple insulation resistors generated in the multiple capacitors 210 can be represented as an equivalent insulation resistor 230b. For example, an equivalent insulation resistance value can be proportional to the harmonic average of the insulation resistance values ​​of the multiple capacitors 210.

[0069] The leakage current generated in capacitor 210, including in auxiliary power supply unit 200b, can flow through equivalent insulation resistor 230b. (Refer to...) Figure 4B and Figure 1The equivalent insulation resistor 230b can be represented as the first path.

[0070] Although not shown, in the storage device 1000 including a path circuit according to an exemplary embodiment, the auxiliary power supply device 200b may be configured such that a plurality of capacitors 210 are connected in a combination of parallel and series connections. As described above, the total voltage of the capacitors can be increased by connecting the capacitors in series, and the total capacitance of the capacitors can be increased by connecting the capacitors in parallel. In the storage device 1000 including a path circuit 310 according to an exemplary embodiment of the inventive concept, the total voltage and total capacitance of the capacitors can be increased by connecting a plurality of capacitors 210 in a combination of series and parallel connections.

[0071] Figure 5A , Figure 5B and Figure 5C A first path of an auxiliary power supply device 200 and a second path of a path circuit 310 according to an exemplary embodiment of the inventive concept are shown. The first path Path1 and the second path Path2 can be paths through which leakage current generated by the physical characteristics of capacitor 210 flows. The second path of path circuit 310 may include a resistor. The first path and the second path are connected in parallel such that when a voltage is applied from charging circuit 100 to a common node on the upper part of the first path and the second path, leakage current of capacitor 210 can flow through the first path and the second path.

[0072] exist Figure 5A The diagram illustrates a first path Path1 of an auxiliary power supply device according to an exemplary embodiment of the inventive concept, and a second path Path2 of the path circuit 310 of the state determination circuit 300a. The value of the current flowing through the second path may be greater than the value of the current flowing through the first path. That is, the value of the resistor 311 included in the second path may be less than the value of the insulation resistor 230 included in the first path. For example, the value of the current flowing in the second path may be 1 mA, and the value of the current flowing in the first path may be 10 μA, such that the value of the current flowing in the first path may be a ratio of 1% to the value of the current flowing in the second path. However, this is merely an example of numerical values ​​used to describe an exemplary embodiment of the inventive concept, and is not a limitation thereof.

[0073] Reference Figure 5ABy including a resistor 311 in the second path of the path circuit 310, the leakage current flowing in the capacitor can be adjusted. The value of the capacitor's leakage current can change with the capacitor's lifespan and the temperature and humidity of the operating environment. The leakage current flowing through the capacitor is shunt through the path circuit 310, thereby suppressing changes in the leakage current flowing in the first path, which could interfere with the measurement of the auxiliary power supply voltage. In other words, while maintaining a substantially constant total discharge current of the capacitor, the change in the leakage current flowing through the first path is kept relatively small despite changes in the capacitor's characteristics, thus improving the accuracy of capacitor fault measurement.

[0074] Although not specified, Figure 5A The resistor 311 shown can be a variable resistor. The variable resistor can be flexibly adjusted in response to changes in the capacitor 210, allowing the value of the current flowing in the first and second paths to be variablely adjusted. The variable resistor can be adjusted to 0 based on measurement or control needs.

[0075] Reference Figure 5B According to an exemplary embodiment of the inventive concept, a first path Path1 of the auxiliary power supply device and a second path Path2 of the path circuit 310 of the state determination circuit 300b are shown. The second path of the path circuit 310 may include a current source 313. In other words, the value of the current flowing through the second path may be greater than the value of the current flowing through the first path. The current source may be variably set or preset according to the insulation resistor 230 included in the first path. For example, the value of the current flowing through the first path may be 10 μA, and the value of the current flowing through the current source 313, which is preset to be substantially constant, may be 1 mA. That is, the current source 313 may be preset for the value of the current flowing through the second path, which is 100 times the value of the current flowing through the first path. However, this example is merely a numerical representation for describing an exemplary embodiment of the inventive concept and is not limited thereto.

[0076] For reference Figure 5B As described, the current source 313 included in the second path can suppress changes in the leakage current flowing in the first path, which may be the cause of interference with the measurement of the voltage of the auxiliary power supply device.

[0077] Reference Figure 5C According to an exemplary embodiment of the inventive concept, a first path Path1 of the auxiliary power supply device and a second path Path2 of the path circuit 310 of the state determination circuit 300c are shown. The second path may include a voltage divider (or voltage splitter).

[0078] Reference Figure 5CThe voltage divider can be a first resistor 315 and a second resistor 311 connected in series, and a circuit that supplies voltage to the node between the first resistor and the second resistor, wherein the second resistor is connected to ground, and the first resistor is connected to a recharge circuit to maintain a substantially constant voltage applied to the capacitor 210. That is, the voltage divider can be used as a circuit for providing feedback as a voltage regulator.

[0079] When the voltage applied to the node to which the first resistor 315 and the second resistor 311 of the voltage divider are connected is fed back to the charging circuit 100, the voltage applied to the capacitor 210 can remain substantially constant. That is, even if the input resistance generated by the charging circuit 100 changes or the leakage current characteristics of the capacitor 210 change, the voltage applied to the capacitor can remain substantially constant due to the voltage divider.

[0080] Reference Figure 1 , Figure 2 and Figure 5C When the applied voltage Vo of the capacitor remains essentially constant despite changes in the external environment, the applied voltage Vo of the capacitor measured by the state determination circuit 300 can be an accurate value, so that the fault of the capacitor 210 can be accurately identified.

[0081] Although not shown, multiple paths for leakage current to flow may exist besides the second path. For example, a third path may exist connected in parallel with the second path, and the third path may include references. Figures 5A to 5C The resistors, current sources, and voltage dividers described serve as channels through which leakage current flows.

[0082] Figure 6 This illustration shows the voltage of the auxiliary power supply and the switching of the charging circuit over time in the normal state of the auxiliary power supply according to an exemplary embodiment of the inventive concept. The x-axis indicates time, and the y-axis indicates voltage, where the units can be arbitrary. A on the y-axis can indicate the first voltage of the auxiliary power supply 200 when the charging circuit 100 completes charging (i.e., discharge begins), and B can indicate the second voltage of the auxiliary power supply 200 when the charging circuit 100 begins charging. For ease of understanding, see reference... Figure 1 Describe it.

[0083] Reference Figure 6 In a storage device 1000 including a path circuit 310 according to an exemplary embodiment of the inventive concept, a state determination circuit 300 can measure the output voltage of the charging circuit 100 or the voltage of the auxiliary power supply device 200. More specifically, the state determination circuit 300 can detect a first voltage A at the start of discharge of the capacitor 210 and a second voltage B at the start of charging.

[0084] The charging circuit 100 can automatically perform a charging operation based on the voltage level of the auxiliary power supply device 200. In other words, the charging circuit 100 can perform a charging operation for the auxiliary power supply device 200 based on preset voltage conditions. For example, when a first voltage of the auxiliary power supply device 200 is set as a discharge start voltage and a second voltage of the auxiliary power supply device 200 is set as a charging start voltage, and when the voltage of the auxiliary power supply device 200 can reach the second voltage due to the natural discharge of the auxiliary power supply device 200, the charging circuit 100 can begin a charging operation for the auxiliary power supply device 200. Thereafter, when the voltage of the auxiliary power supply device 200 reaches the first voltage, which serves as both the discharge start voltage and the charging completion voltage, the charging circuit 100 can end the charging operation. The charging operation of the charging circuit 100 can be performed periodically and repeatedly between the first voltage and the second voltage under normal conditions of the auxiliary power supply device 200.

[0085] When the state determination circuit 300 detects the first voltage and the second voltage of the auxiliary power supply device 200, a timer (not shown) measures the duration of the charging period and / or the discharging period of the charging circuit 100. More specifically, the discharging period is the time during which the voltage of the auxiliary power supply device 200 drops from the first voltage level (A) to the second voltage level (B), and thus can correspond to the FET (FET) of the DC-DC converter in the charging circuit 100. Figure 2 The off-time of 110) or the open state of the switching circuit. More specifically, the charging period is the period during which the voltage of the auxiliary power supply device 200 rises from the second voltage level (B) to the first voltage level (A), and thus corresponds to the FET (FET) of the DC-DC converter in the charging circuit 100. Figure 2 The conduction period of 110) or the switching state of the switching circuit.

[0086] Once the on-time and / or off-time of the FET is measured by a timer (not shown), the state determination circuit 300 can determine whether the auxiliary power supply device 200 is functioning correctly. In other words, when the auxiliary power supply device 200 is functioning correctly, the charging operation of the charging circuit 100 can be performed periodically and repeatedly between a first voltage and a second voltage. Therefore, the on-time of the FET corresponding to the charging period and the off-time of the FET corresponding to the discharging period can each have specific values. As a result, the on-time and / or off-time of the FET can be measured and reference times can be set separately, and the measured on-time and / or off-time of the FET can be compared with the reference times to determine whether the auxiliary power supply device 200 is functioning correctly. The reference times can be pre-input without separate initialization or setting processes.

[0087] The state determination circuit 300 can compare the measured on-time of the FET and / or the measured off-time of the FET with one or more reference times, such that when the difference between the measured time and the reference time is within a preset range, the state determination circuit 300 can determine that the state of the auxiliary power supply device 200 is normal; when the difference exceeds the preset range, the state determination circuit 300 can determine that the state of the auxiliary power supply device 200 is abnormal.

[0088] Reference Figure 6 When the auxiliary power supply device 200 is in normal condition, the on-time of the FET can correspond to the on-time reference time ΔTon-R, and the off-time of the FET can correspond to the off-time reference time ΔToff-R. The on-time reference time ΔTon-R and the off-time reference time ΔToff-R can be kept substantially constant for each time period.

[0089] In other words, when the state of the auxiliary power supply device 200 is not determined, if the on-time and / or off-time of the FET in the charging circuit 100, measured by the state determination circuit 300, are substantially the same as the on-time reference time ΔTon-R and / or the off-time reference time ΔToff-R, then the auxiliary power supply device 200 can be determined to be in a normal state. For example, the preset range of the difference between the measured time and the on / off reference time can be ±5%. However, the set range is not limited to the above values.

[0090] Both the on-time reference time and the off-time reference time for the FET can be set separately, or either one can be set. The determination of whether the auxiliary power supply device 200 is in a normal state, made by the state determination circuit 300, may include comparing the measured on-time of the FET with the on-time reference time, or comparing the measured off-time of the FET with the off-time reference time. Optionally, this determination may include both comparing the measured on-time of the FET with the on-time reference time and comparing the measured off-time of the FET with the off-time reference time.

[0091] Figures 7A to 7C This illustrates, according to an exemplary embodiment of the inventive concept, the switching of the voltage of the auxiliary power supply and the charging circuit over time in an abnormal state of the auxiliary power supply. Figure 7A and Figure 7B This shows the open-circuit state of capacitor 210. Figure 7C This shows the short-circuit state of capacitor 210.

[0092] Reference Figure 7AWhen the auxiliary power supply device 200 is in an abnormal state, the voltage of the auxiliary power supply device 200 may deviate from the periodic rise and fall pattern between the first voltage A and the second voltage B, or deviate from the cycle between the first voltage A and the second voltage B. For example, when in Figure 7A When an open-circuit fault occurs in some capacitors 210 of the auxiliary power supply device 200, the natural discharge may slow down or speed up depending on the surrounding environment. Figure 7A An example of slowed natural discharge is shown. For reference, when natural discharge is slowed due to an open-circuit fault in capacitor 210, the charging period can be shortened. However, the time relationship between discharge and charging is not limited to this.

[0093] When natural discharge slows down, the time it takes for the voltage of the auxiliary power supply device 200 to drop to the second voltage B (i.e., the off-time of the FET) can be extended. Therefore, the state determination circuit 300 can measure the off-time of the FET as a first open-circuit off-time ΔToff-O1. The first open-circuit off-time ΔToff-O1 can differ from the off-circuit reference time ΔToff-R. For example, when the preset range for the difference is 5%, the first open-circuit off-time ΔToff-O1 can be extended beyond the off-circuit reference time ΔToff-R by at least 5%. Therefore, the state determination circuit 300 can determine that the auxiliary power supply device 200 is in an abnormal state (e.g., an open-circuit state).

[0094] Figure 7B This illustrates a situation where the auxiliary power supply 200 is in an abnormal state, and some capacitors 210 have experienced open-circuit faults. However, Figure 7B Showing with Figure 7A Different situations of accelerated natural discharge.

[0095] According to an exemplary embodiment of the inventive concept, when natural discharge accelerates, the time it takes for the voltage of the auxiliary power supply device 200 to drop to the second voltage B (i.e., the off-time of the FET) during this period can be shortened. Therefore, the state determination circuit 300 can measure the off-time of the FET as a second open-circuit off-time ΔToff-O2. The second open-circuit off-time ΔToff-O2 may differ from the off-time reference ΔToff-R. For example, when the preset range for the difference is 5%, the second open-circuit off-time ΔToff-O2 can be shortened by more than 5% of the off-time reference ΔToff-R. Therefore, the state determination circuit 300 can determine that the auxiliary power supply device 200 is in an abnormal state (such as an open-circuit state).

[0096] Figure 7CThis illustrates a scenario where the auxiliary power supply 200 is in an abnormal state, and some capacitors 210 experience short-circuit faults. When a short-circuit fault occurs in capacitor 210, charge can flow out instead of accumulating in capacitor 210, allowing the voltage of capacitor 210 to gradually decrease until it eventually reaches ground. Figure 4B As shown, when the auxiliary power supply device 200 includes capacitors 210 connected in parallel, when a short-circuit fault occurs in any capacitor 210, the other capacitors are affected, causing the total voltage of the auxiliary power supply device 200 to drop to ground.

[0097] Considering the on-time and off-time of the FET, the short-circuit fault of capacitor 210 can be described as follows. For example, in Figure 7C In this circuit, when a short-circuit fault occurs in capacitor 210 at the point where the solid line begins, discharge can proceed rapidly through the short-circuit path. Therefore, the off-time of the FET can be significantly shortened, allowing the state determination circuit 300 to measure the off-time of the FET as the short-circuit off-time ΔToff-S. The short-circuit off-time ΔToff-S can differ from the off-time reference ΔToff-R. For example, when the preset range for the difference is 5%, the short-circuit off-time ΔToff-S can be shortened to at least 5% less than the off-time reference ΔToff-R. Therefore, the state determination circuit 300 can determine that the auxiliary power supply device 200 is in an abnormal state.

[0098] According to an exemplary embodiment of the inventive concept, the short-circuit cutoff time ΔToff-S can indicate the time during which the voltage drops from the first voltage A to the second voltage B.

[0099] Under normal conditions, when the voltage of the auxiliary power supply 200 reaches the second voltage B, the charging operation of the charging circuit 100 restarts. However, when the auxiliary power supply 200 is in an abnormal state (e.g., a short circuit), its voltage can continue to drop despite the charging operation of the charging circuit 100. Therefore, the charging operation of the charging circuit 100 can be continuously maintained, and the on-time of the FET can be continuously maintained.

[0100] Even when the state of the auxiliary power supply unit 200 is determined to be abnormal by the state determination circuit 300, it may be difficult to determine whether an open-circuit fault or a short-circuit fault has occurred in the capacitor 210 of the auxiliary power supply unit 200. This is because even in cases where the auxiliary power supply unit 200 is in a state determination circuit 300, it may be difficult to determine whether an open-circuit fault or a short-circuit fault has occurred. Figure 7B In the event of an open-circuit fault in the capacitor 210 shown, the second open-circuit cutoff time ΔToff-O2 can also be shorter than the reference cutoff time ΔToff-R. However, as in Figure 7AIn the event of an open-circuit fault in capacitor 210, if the first open-circuit cutoff time ΔToff-O1 is longer than the reference cutoff time ΔToff-R, it can be determined that an open-circuit fault is occurring in capacitor 210.

[0101] like Figure 7C As shown, when a short-circuit fault is occurring in capacitor 210, the voltage of the auxiliary power supply device 200 continuously drops through the second voltage B. Therefore, when a third voltage C lower than the second voltage B is set and the state determination circuit 300 detects the voltage of the auxiliary power supply device 200 corresponding to the third voltage C, it can be determined that a short-circuit fault is occurring in capacitor 210 of the auxiliary power supply device 200. In other words, by adding a detection mechanism for the third voltage C, it can be determined that a short-circuit fault is occurring in capacitor 210 of the auxiliary power supply device 200. Figure 7B Open circuit fault of capacitor 210 and Figure 7C The short-circuit faults of capacitor 210 in the middle are distinguished from each other.

[0102] Reference Figure 3 as well as Figures 7A to 7C When a fault occurs in the auxiliary power supply unit 200, detailed information about the type of fault is processed by the controller 400, thus enabling effective control of the charging circuit 100. For example, when an open-circuit fault occurs in capacitor 210, the controller 400 can control the auxiliary power supply unit 200 to maintain normal operation by adjusting the switching period of the FET or the input voltage. Furthermore, when a short-circuit fault occurs in capacitor 210, the controller 400 can stop the charging operation of the charging circuit 100, thus preventing unnecessary power consumption. Additionally, the fault status of capacitor 210 can be transmitted to the user via alarm messages or alarm signals, allowing for rapid repair or replacement of the auxiliary power supply unit 200.

[0103] Reference Figure 1 as well as Figures 7A to 7C The storage device 1000, including the path circuit 310, can determine the capacitor fault in real time by measuring the voltage of the auxiliary power supply device 200 and comparing the charging or discharging period with a reference time. The path circuit 310 provides a path for the leakage current generated by the insulation resistor 230, which exists due to the physical characteristics of the capacitor 210, to flow in a shunt manner. Therefore, the state determination circuit 300 can suppress the influence of leakage current in the measurement of the voltage of the capacitor 210 and continuously and accurately measure the voltage of the capacitor 210. When the influence of leakage current is suppressed, the accuracy of determining the total capacitance of the capacitor under normal conditions can be improved, allowing the determination of whether the auxiliary power supply device 200 is operating under normal conditions to be performed with increased precision.

[0104] Figure 8AA memory system 10000a, in which a state determination circuit 300 is included in a main system IC 2000, is shown according to an exemplary embodiment of the inventive concept. (See also...) Figure 8A The status determination circuit 300 can be installed in an IC independent of the charging circuit 100. When the status determination circuit 300 is outside the charging circuit 100 and the auxiliary power supply device or auxiliary power unit (APU) 200, the voltage signal applied by the charging circuit 100 or the voltage signal of the capacitor 210 measured in the APU 200 can be sent to the main system IC 2000, and the status determination circuit 300 included in the main system IC 2000 can determine in real time whether the APU 200 is operating in a normal state. Although not specifically shown, the charging circuit 100 and the APU 200 can be arranged in a different IC or block than the main system IC 2000.

[0105] Reference Figure 3 and Figure 8A The main system IC 2000 may include a controller 400a. Since the status determination circuit 300 is located within the main system IC 2000, the status of the auxiliary power supply device 200 can be monitored, and information regarding the status of the auxiliary power supply device 200 can be directly transmitted to the controller 400a. Therefore, control of the charging circuit 100 executed by the controller 400a can be performed quickly.

[0106] More specifically, when the state determination circuit 300 determines that the voltage Vo of capacitor 210 is low, the controller 400a can extend the on-time of the first switch 110a and shorten the on-time of the second switch 110b, thereby increasing the output voltage Vo. As described above, when the state determination circuit 300 determines that the voltage Vo of capacitor 210 is high, the controller 400a can shorten the on-time of the first switch 110a and extend the on-time of the second switch 110b, thereby decreasing the output voltage Vo.

[0107] Figure 8B A memory system 10000b is shown in which a state determination circuit is included in a power-off protection (PLP) IC 1500, according to an exemplary embodiment of the inventive concept. (See also...) Figure 8BThe status determination circuit 300 can be installed in the PLP IC 1500, and the charging circuit 100 is also installed in the PLP IC 1500. The PLP IC 1500 can prevent power failure. When the status determination circuit 300 is inside the PLP IC 1500 and directly connected to the auxiliary power supply device 200, the voltage signal applied to the charging circuit 100 or the voltage signal of the capacitor 210 measured in the auxiliary power supply device 200 can be sent to the status determination circuit 300 without going through a separate interface, and the status determination circuit 300 included in the PLP IC 1500 can determine in real time whether the auxiliary power supply device 200 is functioning properly. In an optional embodiment, the APU 200 can also be installed in the PLP IC 1500.

[0108] Reference Figure 8B The PLP IC 1500 can transmit the determination made by the status determination circuit 300 as to whether the auxiliary power supply device 200 is operating in a normal state to the main system IC 2000 via an interrupt. The interrupt signal can transmit the normal, open circuit, and / or short circuit status to the main system IC 2000 according to the status of the auxiliary power supply device 200.

[0109] Figure 9A This illustrates an exemplary embodiment of a memory system according to the inventive concept, in which the state determination circuitry is included in or directly connected to a PLP IC, and Figure 9B The present invention illustrates an exemplary embodiment of a memory system in which a state determination circuit is included in or directly connected to a host system IC, according to an inventive concept.

[0110] Reference Figure 9A and Figure 9B The memory system 10000c or 10000d may include a PLP IC 1500, a power supply block 2500, and a main system IC 2000.

[0111] The PLP IC 1500 prevents power outages to the main system IC 2000. For example, the PLP IC 1500 may include a charging circuit 100 and an auxiliary power supply device 200.

[0112] Power supply block 2500 supplies power from PLP IC 1500 to main system IC 2000. Power supply block 2500 corresponds to the power input / output terminals of main system IC 2000.

[0113] The main system IC 2000 may include a controller 400, a first memory chip 2100, and a second memory chip 2200. Either the first memory chip 2100 or the second memory chip 2200 may be a buffer memory, and the other may be a main memory.

[0114] The controller 400 controls the charging circuit 100 of the PLP 1500. More specifically, when a fault occurs in the auxiliary power supply unit 200, the controller 400 can change the charging conditions of the charging circuit 100 to maintain the auxiliary power supply unit 200 in a normal state if possible. When a fault occurs in the auxiliary power supply unit 200, the controller 400 can change the memory write operation mode in the powered electronic system (such as a memory system) to store data in the main memory in real time.

[0115] Furthermore, in the event of a failure in the auxiliary power supply unit 200, the controller 400 may generate alarm signals and provide them to the user and / or higher-level systems, thereby allowing the user or system to perform repair or replacement work on the auxiliary power supply unit 200.

[0116] The chips corresponding to the main memory can have a multi-layer stacked structure. Depending on the type of main memory, the memory system can correspond to any of a solid-state drive (SSD) module, a dynamic random access memory (DRAM) module, and a flash memory module. In the case of an SSD module, DRAM can be used as buffer memory, and NAND can be used as main memory.

[0117] In an exemplary embodiment according to the inventive concept, a circuit with a path is included. Figure 1 In the memory system of the storage device 1000, an auxiliary power supply device may be employed in electronic devices (such as memory modules) that use relatively high backup energy. Therefore, in the auxiliary power supply device, multiple capacitors may be connected in parallel and have high capacitance. For example, the auxiliary power supply device may have a high capacitance of several μF to several mF. More specifically, the auxiliary power supply device may be used in SSD modules that use 10 mJ or more of backup energy, such that the storage device 1000 including path circuitry according to exemplary embodiments of the inventive concept may be included in the SSD module to monitor the auxiliary power supply device. Electronic devices employing auxiliary power supplies are not limited to SSD modules.

[0118] Reference Figure 9A The memory system 10000c according to an exemplary embodiment of the inventive concept may include a state determination circuit 300 in a PLP IC 1500. The voltage signal of the capacitor 210 can be immediately transmitted to the state determination circuit 300 without passing through a separate interface indicated by the dotted line, and the determination by the state determination circuit 300 of whether the auxiliary power supply device 200 is operating in a normal state can be made as described in reference to... Figure 8B As described, the data is transmitted to the main system IC 2000 via an interrupt.

[0119] Reference Figure 9BThe memory system 10000d according to an exemplary embodiment of the inventive concept may include a state determination circuit 300 in the main system IC 2000. The state determination circuit 300 may be arranged in the main system IC 2000 to monitor the state of the auxiliary power supply device 200 and directly transmit information about the state of the auxiliary power supply device 200 to the controller 400, so that the charging circuit 100 can, as described above... Figure 8A As described, it is quickly controlled by controller 400.

[0120] Figure 10A and Figure 10B The power supply process in a memory system according to an exemplary embodiment of the inventive concept is illustrated. Although for ease of description, in Figure 10A and Figure 10B The status determination circuit 300 is shown as being directly connected to or included in the PLP IC 1500, but the status determination circuit 300 may also be included in the main system IC 2000, and is not limited to this example.

[0121] Reference Figure 10A and Figure 10B When the external power supply Ext is sufficient, such as Figure 10A As indicated by the bold arrows, power from the external power source Ext can be supplied to the main system IC 2000 via the PLP IC 1500 and the power block 2500. Power from the external power source Ext can also be supplied to the charging circuit 100 in the PLP IC 1500, enabling the charging circuit 100 to perform periodic and repetitive charging operations on the auxiliary power supply device 200.

[0122] In cases where an SPO condition may occur due to an abnormality or failure of the external power supply Ext, such as Figure 10B As indicated by the bold arrows, power from the auxiliary power supply 200 can be supplied to the main system IC 2000 via the PLP IC 1500 and the power block 2500. Therefore, the main system IC 2000 can continue operating during critical periods starting from SPO by using power from the auxiliary power supply 200, thereby preventing data loss.

[0123] Figures 11 to 13 The operation of a storage device for determining the state of an auxiliary power supply device is illustrated according to an exemplary embodiment of the inventive concept.

[0124] Reference Figure 1 and Figure 11 The operation method of the storage device 1000 used to determine the state of the auxiliary power supply device 200 is shown as a flowchart.

[0125] In operation S110, the auxiliary power supply device is charged when the charging circuit 100 supplies power. Subsequently, in operation S120, when charging / discharging of the auxiliary power supply device 200 is performed, the state determination circuit 300 measures the capacitor voltage. In operation S130, the state determination circuit 300 measures a first voltage A and a second voltage B, and determines whether the auxiliary power supply device 200 is operating under normal conditions based on the on / off state of the switching circuit.

[0126] Reference Figure 1 and Figure 12 In the operation method of the storage device 1000 used to determine the state of the auxiliary power supply device 200, the charging operation S110 and the capacitor measurement operation S120 of the auxiliary power supply device 200 are shown in more detail.

[0127] In charging operation S111, the charging circuit 100 applies a voltage to the capacitor of the auxiliary power supply device 200. Subsequently, in operation S112, leakage current originating from the physical characteristics of the capacitor flows in a shunt manner through the second path of the state determination circuit 300, thereby regulating the total leakage current of the capacitor. In operation S113, because the leakage current of the capacitor is regulated, the capacitor voltage can be accurately measured without being affected by the leakage current.

[0128] Reference Figure 1 , Figure 6 , Figures 7A to 7C as well as Figure 13 The operation method of the storage device 1000 for determining the state of the auxiliary power supply device 200 will be described in more detail with respect to the state of the capacitor.

[0129] After the charging operation S110 of the auxiliary power supply device 200, the state determination circuit 300 can detect the first voltage A in operation S122. The state determination circuit 300 can detect the second voltage B in operation S124.

[0130] In operation S126, the state determination circuit 300 can measure the on and / or off periods of the FET. In operation S131, the state determination circuit 300 can compare the measured on / off period time ΔT of the FET with a reference time ΔTR.

[0131] In operation S132, when the measured on / off time of the FET is within a preset error range of the reference time (e.g., + / - 5%), the state determination circuit 300 can determine that the auxiliary power supply device 200 is in a normal state. In operation S133, when the measured on / off time of the FET is outside the preset error range of the reference time, the state determination circuit 300 can determine whether the capacitor voltage Vo is between the first voltage and the second voltage.

[0132] In operation S134, when the capacitor voltage Vo is not between the first voltage and the second voltage, the state determination circuit 300 can determine that the auxiliary power supply device 200 is in a short-circuit state. In operation S136, when the capacitor voltage Vo is between the first voltage and the second voltage, the state determination circuit 300 can determine that the auxiliary power supply device 200 is in an open-circuit state.

[0133] Although the inventive concept has been specifically shown and described with reference to exemplary embodiments thereof, it should be understood that various changes in form and detail may be made therein by those skilled in the art without departing from the scope or spirit of this disclosure as set forth in the claims and their legal equivalents.

Claims

1. A storage device, comprising: An auxiliary power supply device includes at least one capacitor, wherein the at least one capacitor has a first path for leakage current; The charging circuit includes a switch connected to an auxiliary power supply; and The state determination circuit is connected to the auxiliary power supply. The state determination circuit is configured to measure the voltage of the at least one capacitor and determine a fault in the at least one capacitor by comparing the time of change of the measured voltage with a reference time. The state determination circuit includes a path circuit connected in parallel with the at least one capacitor to form a second path, the second path having at least one of a resistance lower than that of the first path and a current source, and wherein the first path and the second path are paths through which leakage current generated by the physical characteristics of the at least one capacitor flows.

2. The storage device according to claim 1, wherein, The charging circuit includes a DC-DC converter.

3. The storage device according to claim 1, wherein, The state determination circuit is configured as follows: When the voltage of the at least one capacitor cycles periodically between a first voltage level and a second voltage level that is lower than the first voltage level, it is determined that the auxiliary power supply device is in a normal state. as well as When the voltage of the at least one capacitor cycles non-periodically between a first voltage level and a second voltage level or deviates from between the first voltage level and the second voltage level, it is determined that the auxiliary power supply device is in an abnormal state.

4. The storage device according to claim 3, wherein, The state determination circuit is also configured to: when the voltage of the at least one capacitor cycles non-periodically between a first voltage level and a second voltage level, if the off-time of the switch is longer than the time of a preset first time period, then determine the abnormal state as an open circuit state.

5. The storage device according to claim 3, wherein, The state determination circuit is also configured to determine the abnormal state as a short-circuit state if the voltage of the at least one capacitor is measured to be lower than or equal to a third voltage level that is lower than the second voltage level.

6. The storage device according to claim 1, wherein, The second path includes at least one current source.

7. The storage device according to claim 1, wherein, The path circuit includes resistors, and The first current flowing through the first path is less than the second current flowing through the resistor.

8. The storage device according to claim 1, wherein, The second path includes a variable resistor, and The variable resistor is variably adjusted based on the change in resistance in the insulation resistor of the first path of the at least one capacitor.

9. The storage device according to claim 1, wherein, The path circuit includes a first resistor and a second resistor connected in series to form a second path, and is configured to feed back a feedback voltage to the charging circuit through a node to which the first resistor and the second resistor are connected, in order to maintain a constant voltage applied to the at least one capacitor.

10. The storage device according to claim 1, wherein, In addition to the first and second paths, the state determination circuit also includes a third path for leakage current.

11. The storage device according to claim 1, wherein, The auxiliary power supply unit includes multiple capacitors, and Each of the plurality of capacitors is connected in series, in parallel, or in a combination of series and parallel to at least one other capacitor among the plurality of capacitors.

12. The storage device according to claim 1, wherein, The auxiliary power supply unit includes multiple capacitors connected in parallel; The charging circuit includes at least one field-effect transistor in the switch and a DC-DC converter in the charging circuit; and The state determination circuit is configured to determine the state of the auxiliary power supply device by measuring the time of at least one of the off-time and on-time of the at least one field-effect transistor and comparing the measured time with a reference time. The path circuit is connected in parallel with the plurality of capacitors to form a second path with a resistance value smaller than that of the first path.

13. The storage device according to claim 1, wherein, The charging circuit is configured to apply voltage to the at least one capacitor, and The status determination circuit is configured to measure the voltage during the charging and / or discharging periods of the at least one capacitor, and to determine a fault in the at least one capacitor by comparing the measured charging and / or discharging period with a reference time.

14. The storage device according to claim 1, wherein, The state determination circuit is also configured as follows: If the voltage of the at least one capacitor cycles periodically between a first voltage level and a second voltage level that is lower than the first voltage level, then the auxiliary power supply device is determined to be in a normal state. When the voltage of the at least one capacitor cycles non-periodically between a first voltage level and a second voltage level lower than the first voltage level, if the off-time of the switch is longer than the preset first time period, the auxiliary power supply device is determined to be in an open circuit state. as well as If the voltage of the at least one capacitor is measured to be lower than or equal to a third voltage level that is lower than the second voltage level, then the auxiliary power supply device is determined to be in a short-circuit state.

15. A memory device, comprising: A measuring device for measuring the voltage of at least one capacitor in an auxiliary power supply circuit of the memory device, wherein the at least one capacitor has a first path for leakage current; A detection device for determining the fault of the at least one capacitor by comparing the measured voltage change time with a reference time; A path circuit is connected in parallel with the at least one capacitor to form a second path, wherein the first path and the second path are paths through which leakage current generated by the physical characteristics of the at least one capacitor flows. A normal state device is configured to determine that the auxiliary power supply circuit is in a normal state if the voltage of the at least one capacitor cycles periodically between a first voltage level and a second voltage level lower than the first voltage level; and An abnormal state device is used to determine that the auxiliary power supply circuit is in an abnormal state if the voltage of the at least one capacitor cycles non-periodically between a first voltage level and a second voltage level or deviates from between the first voltage level and the second voltage level.

16. The memory device of claim 15, further comprising: An open-circuit state device is used to determine that the auxiliary power supply circuit is in an abnormal state of electrical open circuit type when the voltage of the at least one capacitor cycles non-periodically between a first voltage level and a second voltage level, and the time of the cutoff period for discharging the at least one capacitor is longer than the time of a preset first period. as well as A short-circuit condition device for determining that the auxiliary power supply circuit is in an abnormal state of electrical short circuit type if the voltage of the at least one capacitor is measured to be lower than or equal to a third voltage level that is lower than a second voltage level.

17. A memory system comprising: A power failure protection circuit having an auxiliary power supply device including at least one capacitor; The charging circuit includes a switching circuit that is turned on or off connected to an auxiliary power supply device, and is configured to supply power to the auxiliary power supply device. The main system circuit includes a controller and at least one memory chip; as well as The power supply block is located between the power failure protection circuit and the main system circuit and is configured to supply power to the main system circuit. The power failure protection circuit includes a state determination circuit configured to measure the voltage of the at least one capacitor and determine a fault in the at least one capacitor by comparing the measured voltage change time with a reference time. The state determination circuit includes a path circuit connected in parallel with the at least one capacitor and configured to form a second path, the resistance of which is a threshold value smaller than the resistance of a first path for leakage current of the at least one capacitor, wherein the first and second paths are paths through which leakage current generated by the physical characteristics of the at least one capacitor flows.

18. The memory system according to claim 17, wherein, The charging circuit is configured to apply a voltage to the at least one capacitor, and The status determination circuit is configured to measure the voltage during the charging and / or discharging periods of the at least one capacitor, and to determine a fault in the at least one capacitor by comparing the measured charging and / or discharging period with a reference time.

19. The memory system according to claim 18, wherein, The second path includes at least one current source, and The at least one current source is installed together with the auxiliary power supply device in the power failure protection circuit.

20. The memory system according to claim 18, wherein, The path circuit includes a first resistor and a second resistor connected in series to form a second path, and is configured to feed back a feedback voltage to the charging circuit through a node to which the first resistor and the second resistor are connected, in order to maintain a constant voltage applied to the at least one capacitor.

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