High-frequency power supply device and method for outputting high-frequency power

By periodically controlling the amplitude or phase of the high-frequency signal, and combining the phase difference synthesis and feedback control of multiple high-frequency signals, the problem of plasma instability caused by rapid changes in high-frequency power was solved, and stable high-frequency power output and etching process were achieved.

CN112564694BActive Publication Date: 2026-07-31DAIHEN CORP
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
DAIHEN CORP
Filing Date
2020-09-14
Publication Date
2026-07-31

AI Technical Summary

Technical Problem

In existing technologies, rapid changes in high-frequency power can lead to plasma instability, affecting the stability and efficiency of the etching process.

Method used

By periodically controlling the amplitude or phase of the high-frequency signal, the high-frequency power is adjusted to different levels during different periods, ensuring that the average value of the high-frequency output remains fixed. The phase difference synthesis technology of multiple high-frequency signals and feedback control are used to stabilize the power output.

Benefits of technology

It mitigates the rapid changes in high-frequency power, maintains the stability and etching efficiency of the plasma processing, and reduces charging damage and micro-load effects on the substrate.

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Abstract

This invention provides a high-frequency power supply device and a method for outputting high-frequency power. It provides a high-frequency power supply device and a method for outputting high-frequency power that can mitigate abrupt changes in high-frequency power. The high-frequency power supply device generates a high-frequency signal, periodically controls the amplitude or phase of the generated high-frequency signal, and outputs a high-frequency power whose magnitude is controlled based on the amplitude or phase of the high-frequency signal. The high-frequency power supply device controls the amplitude or phase of the high-frequency signal such that the magnitude of the high-frequency power is at a first level during a first period of the control cycle, and at a second level lower than the first level during a second period of the control cycle, different from the first period. The high-frequency power supply device gradually decreases or increases at least one of the ratio of the length of the first period to the length of the control cycle and the second level, and gradually increases or decreases the first level.
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Description

Technical Field

[0001] This disclosure relates to a high-frequency power supply device for providing high-frequency power to a plasma processing apparatus and a method for outputting high-frequency power. Background Technology

[0002] There are various ways to provide high-frequency power to plasma processing apparatuses used in the manufacture of semiconductor devices, etc. In one method, a relatively high-frequency power suitable for plasma generation is provided to the upper electrode from a first power source. Furthermore, a relatively low-frequency power suitable for attracting ions in the plasma within the processed body is provided to the lower electrode from a second power source.

[0003] Hereinafter, "on" or "high level" will be collectively referred to as "Level 1," and "off" or "low level" will be collectively referred to as "Level 2." Patent Document 1 outlines a technique for suppressing charge damage to the substrate being processed. In this technique, the high-frequency power of a first power source is modulated with a given frequency amplitude offset to Level 1 / Level 2 to shorten the time for continuous plasma generation. This suppresses charge damage to the substrate being processed. Furthermore, the high-frequency power of a second power source is modulated with a second frequency to Level 1 / Level 2 to discontinuously advance the etching of a given film on the substrate being processed. This reduces the so-called micro-load effect, enabling etching at high etching rates (etch rate per hour).

[0004] On the other hand, the processing conditions, such as the plasma state, are switched sequentially at each processing step according to the so-called formula. For example, when the plasma is generated intermittently, the magnitude of the high-frequency power of the generated plasma is periodically modulated to a first level / a second level (see Patent Document 2).

[0005] Existing technical documents

[0006] Patent documents

[0007] Patent Document 1: JP 2015-90759

[0008] Patent Document 2: JP 2013-214583

[0009] However, according to the technology disclosed in Patent Documents 1 and 2, the high-frequency power changes discontinuously from an unmodulated state to an amplitude-shifted modulated state. Furthermore, the magnitude of the high-frequency power changes in a stepwise manner from the first and second levels to the third and fourth levels. Therefore, there is a possibility that the conditions for the generation of ions and atomic groups in the plasma change abruptly, causing the plasma to become unstable. Summary of the Invention

[0010] This disclosure is made in view of the relevant circumstances, and its purpose is to provide a high-frequency power supply device and a method for outputting high-frequency power that can mitigate rapid changes in high-frequency power.

[0011] One aspect of this disclosure relates to a high-frequency power supply device comprising: a high-frequency generating unit for generating a high-frequency signal; a control unit for periodically controlling the amplitude or phase of the high-frequency signal generated by the high-frequency generating unit; and a high-frequency output unit for outputting a high-frequency power whose magnitude is controlled based on the high-frequency signal whose amplitude or phase is controlled by the control unit. The control unit controls the amplitude or phase of the high-frequency signal such that the magnitude of the high-frequency power output by the high-frequency output unit is at a first level during a first period of the control cycle, and at a second level lower than the first level during a second period of the control cycle different from the first period. The control unit gradually decreases or increases at least one of the ratio of the length of the first period to the length of the control cycle and the second level. When the control unit gradually decreases at least one of the ratio and the second level, it gradually increases the first level, thereby fixing the average value of the high-frequency power output by the high-frequency output unit. When the control unit gradually increases at least one of the ratio and the second level, it gradually decreases the first level, thereby fixing the average value of the high-frequency power output by the high-frequency output unit.

[0012] One aspect of this disclosure relates to a high-frequency power output method that outputs a high-frequency power whose magnitude is controlled based on a high-frequency signal whose amplitude or phase is periodically controlled. The amplitude or phase of the high-frequency signal is controlled such that the magnitude of the high-frequency power is at a first level during a first period of the control cycle, and at a second level lower than the first level during a second period of the control cycle different from the first period. At least one of the ratio of the length of the first period to the length of the control cycle and the second level is gradually decreased or increased. When at least one of the ratio and the second level is gradually decreased, the first level is gradually increased, resulting in a fixed average value of the high-frequency power. Conversely, when at least one of the ratio and the second level is gradually increased, the first level is gradually decreased, resulting in a fixed average value of the high-frequency power.

[0013] In this scheme, the control unit periodically adjusts the magnitude of the high-frequency power output by the high-frequency output unit to a first level and a second level during the first and second periods, respectively, by periodically controlling the amplitude or phase of the high-frequency signal generated by the high-frequency generation unit. The second level is lower than the first level. Furthermore, during the periodic control of the amplitude or phase of the high-frequency signal, the control unit gradually decreases or increases at least one of the duty cycle of the first period relative to the control period and the second level, and gradually increases or decreases the first level. This keeps the average value of the high-frequency power output by the high-frequency output unit constant. That is, when at least one of the duty cycle and the second level is gradually decreased, the control unit gradually increases the first level. When at least one of the duty cycle and the second level is gradually increased, the control unit gradually decreases the first level. This keeps the average value of the high-frequency power constant.

[0014] In a high-frequency power supply device according to one aspect of this disclosure, the high-frequency generation unit generates multiple high-frequency signals including a first high-frequency signal and a second high-frequency signal of the same frequency; the control unit controls the phase difference between the first high-frequency signal and the second high-frequency signal during the first period and the second period, respectively; and the high-frequency output unit comprises: a first generation unit that generates a first high-frequency voltage having a phase corresponding to the first high-frequency signal; a second generation unit that generates a second high-frequency voltage having a phase corresponding to the second high-frequency signal; and a power combining unit that combines the high-frequency power of the first high-frequency voltage and the second high-frequency voltage generated by the first generation unit and the second generation unit, respectively, in a proportion corresponding to the phase difference.

[0015] In this scheme, a high-frequency generation unit generates a first high-frequency signal and a second high-frequency signal with the same frequency. A control unit individually controls the phase difference between the first and second high-frequency signals during the first and second periods, respectively. A high-frequency output unit generates a first high-frequency voltage with a phase corresponding to the first high-frequency signal and a second high-frequency voltage with a phase corresponding to the second high-frequency signal. The high-frequency output unit further synthesizes the high-frequency power based on the generated first and second high-frequency voltages at a ratio corresponding to the phase difference between the first and second high-frequency voltages, and outputs the synthesized high-frequency power. By synthesizing the high-frequency power based on the first and second high-frequency voltages at different ratios during the first and second periods, the magnitude of the high-frequency power output during each of the first and second periods varies to a first level and a second level, respectively.

[0016] In one aspect of the high-frequency power supply device disclosed herein, the control unit controls the amplitude of the high-frequency signal during the first period and the second period respectively, and the high-frequency output unit outputs a high-frequency power having a magnitude corresponding to the high-frequency signal whose amplitude is controlled by the control unit.

[0017] In this scheme, the control unit controls the amplitude of the high-frequency signal generated by the high-frequency generation unit in both the first and second periods. The high-frequency output unit generates high-frequency power with a magnitude corresponding to the controlled amplitude of the high-frequency signal. Therefore, the magnitude of the high-frequency power output in each of the first and second periods varies to a first level and a second level, respectively.

[0018] In one aspect of the high-frequency power supply device disclosed herein, the high-frequency power supply device further comprises: a power detection unit for detecting the high-frequency power output by the high-frequency output unit, and a control unit for adjusting the amplitude or phase of the high-frequency signal so that the magnitude of the high-frequency power detected by the power detection unit during the first period and the second period is consistent with the first level and the second level.

[0019] In this scheme, the high-frequency power output by the high-frequency output unit in each of the first and second periods is detected. The control unit controls the amplitude or phase of the high-frequency signal to ensure that the detected high-frequency power is consistent with the target values ​​(i.e., the first and second levels) of the high-frequency power that should be output by the high-frequency output unit in each of the first and second periods. As a result, the magnitude of the high-frequency power output in each control cycle is correctly adjusted.

[0020] One aspect of this disclosure relates to a high-frequency power supply device comprising: a high-frequency generating unit that generates a first high-frequency signal and a second high-frequency signal; a control unit that periodically controls the amplitude or phase of the first high-frequency signal and the second high-frequency signal generated by the high-frequency generating unit; a first high-frequency output unit that outputs a high-frequency power whose magnitude is controlled based on the amplitude or phase of the first high-frequency signal controlled by the control unit; and a second high-frequency output unit that outputs a high-frequency power whose magnitude is controlled based on the amplitude or phase of the second high-frequency signal controlled by the control unit, wherein the control unit controls the amplitude or phase of the first high-frequency signal such that the magnitude of the high-frequency power output by the first high-frequency output unit is at a first level during the first period of the control cycle, and the control unit controls the amplitude or phase of the second high-frequency signal such that the amplitude or phase of the first high-frequency signal is at a first level during the first period of the control cycle. The magnitude of the high-frequency power output by the second high-frequency output unit is a second level lower than the first level in the second period of the control cycle, which is different from the first period. The control unit gradually decreases or increases at least one of the ratio of the length of the first period to the length of the control cycle and the second level. When the control unit gradually decreases at least one of the ratio and the second level, it gradually increases the first level, so that the average value of the sum of the high-frequency power output by the first high-frequency output unit and the second high-frequency output unit becomes fixed. When the control unit gradually increases at least one of the ratio and the second level, it gradually decreases the first level, so that the average value of the sum of the high-frequency power output by the first high-frequency output unit and the second high-frequency output unit becomes fixed.

[0021] In this scheme, the control unit periodically controls the amplitude or phase of the first high-frequency signal and the second high-frequency signal generated by the high-frequency generation unit. The first high-frequency output unit outputs high-frequency power based on the first high-frequency signal with controlled amplitude or phase. The second high-frequency output unit outputs high-frequency power based on the second high-frequency signal with controlled amplitude or phase. The magnitude of the high-frequency power output by the first high-frequency output unit is periodically adjusted to a first level during a first period. The magnitude of the high-frequency power output by the second high-frequency output unit is periodically adjusted to a second level during a second period. The second level is lower than the first level. Furthermore, during the periodic control of the amplitude or phase of the first and second high-frequency signals, the control unit gradually decreases or increases at least one of the duty cycle of the first period relative to the control period and the second level, and gradually increases or decreases the first level. Thus, the average value of the sum of the high-frequency power output by the first and second high-frequency output units is kept fixed. That is, while gradually decreasing at least one of the duty cycle and the second level, the control unit gradually increases the first level. While gradually increasing at least one of the duty cycle and the second level, the control unit gradually decreases the first level. This keeps the average value of the sum of the high-frequency power constant.

[0022] The effects of the invention

[0023] According to this disclosure, it is possible to mitigate rapid changes in high-frequency power. Attached Figure Description

[0024] Figure 1 This is a block diagram illustrating a structural example of the high-frequency power supply device according to Embodiment 1.

[0025] Figure 2 This is a circuit diagram showing an example of the structure of the power combining section.

[0026] Figure 3 This is an explanatory diagram that appropriately represents the high-frequency power in the high-frequency power supply device according to Embodiment 1 when the first period is gradually reduced.

[0027] Figure 4 It is a graph showing the correspondence between the duty cycle and the phase difference used in the high-frequency power supply device according to Embodiment 1.

[0028] Figure 5 This is a flowchart showing the processing sequence of the control unit that sets the duty cycle and phase difference in the pulse generation unit and the high-frequency generation unit, respectively.

[0029] Figure 6 This is an explanatory diagram illustrating the high-frequency power in the high-frequency power supply device involved in Modification 1, where the power is gradually reduced during the first period.

[0030] Figure 7It is a graph showing the correspondence between the duty cycle and the phase difference used in the high-frequency power supply device involved in Modification 1.

[0031] Figure 8 This is an explanatory diagram illustrating the high-frequency power in the high-frequency power supply device involved in Modification Example 2, where the second level is gradually reduced.

[0032] Figure 9 It is a graph showing the correspondence between the duty cycle and the phase difference used in the high-frequency power supply device involved in Modification Example 2.

[0033] Figure 10 This is a block diagram illustrating a structural example of the high-frequency power supply device according to Embodiment 2.

[0034] Figure 11 This is a flowchart showing the processing sequence of the control unit that sets the duty cycle and pulse level for the pulse generation unit.

[0035] Figure 12 This is a block diagram illustrating a structural example of the high-frequency power supply device according to Embodiment 3.

[0036] Explanation of reference numerals in the attached figures

[0037] 100, 100b, 100c High-frequency power supply devices

[0038] 1, 1b, 1c High-frequency generation section

[0039] 2, 2b, 2c Control Unit

[0040] 3. High-frequency output section

[0041] 30 DC power supply

[0042] 31, 32 DC-RF converter section

[0043] 33 Power Combining Section

[0044] R resistor

[0045] N1 and N2 input ports

[0046] Ns summation port

[0047] Tt Transmission Transformer

[0048] 34 Filtering Circuit

[0049] 4. Pulse Generation Section

[0050] 5 Power Detection Section

[0051] 6. High-frequency oscillator

[0052] 7.7b Pulse Generation Section

[0053] 8 Multiplication Operator

[0054] 9. High-frequency output section

[0055] 200 Matcher

[0056] 300 load

[0057] Electrodes 301 and 302 Detailed Implementation

[0058] The present disclosure will now be described in detail with reference to the accompanying drawings illustrating embodiments thereof.

[0059] (Implementation Method 1)

[0060] Figure 1 This is a block diagram illustrating a structural example of the high-frequency power supply device 100 according to Embodiment 1. The high-frequency power supply device 100 includes a high-frequency generation unit 1, a control unit 2, and a high-frequency output unit 3. The high-frequency generation unit 1 generates high-frequency signals S1 and S2 of the same frequency. High-frequency signals S1 and S2 correspond to a first high-frequency signal and a second high-frequency signal, respectively. The control unit 2 controls the phases of the high-frequency signals S1 and S2 generated by the high-frequency generation unit 1. The high-frequency output unit 3 outputs a high-frequency power Ps adjusted based on the controlled phases of the high-frequency signals S1 and S2.

[0061] The high-frequency power supply device 100 also includes a pulse generation unit 4 and a power detection unit 5. The pulse generation unit 4 generates timing pulses to notify the control unit 2 to control the phase of high-frequency signals S1 and S2. The power detection unit 5 detects the high-frequency power output by the high-frequency output unit 3. The high-frequency power output by the high-frequency output unit 3 is supplied to loads such as plasma processing devices via the power detection unit 5 and the matching unit 200. The matching unit 200 aims to match the impedance with the load.

[0062] The high-frequency generation unit 1, for example, includes a direct digital synthesizer. The voltage of the high-frequency signal S1 generated by the high-frequency generation unit 1 is used... The voltage of the high-frequency signal S2 generated by the high-frequency generation unit 1 is represented by... Indicated. A is, for example, a fixed amplitude. f is the frequency set from the control unit 2, such as the frequency of an industrial RF band (Radio Frequency) like 2MHz, 13.56MHz, 27MHz, or 60MHz. (or ) is the phase difference between high-frequency signal S1 and high-frequency signal S2. (or The phase difference θ is adjusted to the value set by the control unit 2. The control unit 2 sets the phase in the high-frequency generation unit 1. as well as In this case, the high-frequency generation unit 1 can be adjusted so that the phase difference between the high-frequency signal S1 and the high-frequency signal S2 satisfies (or That's all.

[0063] Control unit 2 has a CPU (Central Processing Unit) not shown. Control unit 2 controls the operation of each unit and performs input / output, arithmetic, and other processing according to a control program pre-stored in ROM (Read Only Memory). Temporarily generated information is stored in RAM (Random Access Memory). A computer program that determines, for example, the order of processing performed by the CPU is loaded into RAM using a means not shown, and the CPU executes the loaded computer program. Alternatively, control unit 2 may include a microcomputer or dedicated hardware circuitry.

[0064] The high-frequency output unit 3 includes DC-RF conversion units 31 and 32, and a power combining unit 33. The DC-RF conversion unit 31 generates a high-frequency voltage V1 having a phase corresponding to the high-frequency signal S1 generated by the high-frequency generation unit 1. The DC-RF conversion unit 32 generates a high-frequency voltage V2 having a phase corresponding to the high-frequency signal S2 generated by the high-frequency generation unit 1. The high-frequency voltages V1 and V2 correspond to a first high-frequency voltage and a second high-frequency voltage, respectively. The power combining unit 33 combines the high-frequency power P1 based on the high-frequency voltage V1 generated by the DC-RF conversion unit 31 and the high-frequency power P2 based on the high-frequency voltage V2 generated by the DC-RF conversion unit 32. DC power is supplied from the DC power supply 30 to the DC-RF conversion units 31 and 32. The high-frequency component of the high-frequency power Ps combined in the power combining unit 33 is removed by the filter circuit 34. After removing the high-frequency component, the fundamental component of the high-frequency power Ps is output to the load side.

[0065] DC-RF converters 31 and 32 respectively include, for example, a half-bridge Class D amplifier, a capacitor, and an LC low-pass filter. The capacitor cuts off the DC current contained in the output of the Class D amplifier. The LC low-pass filter removes the harmonics contained in the output of the Class D amplifier. The high-frequency voltage V1 generated by DC-RF converter 31 is represented by v(t) = Bsin(2πft + θ1). The high-frequency voltage V2 generated by DC-RF converter 32 is represented by v(t) = Bsin(2πft + θ2). B is a fixed amplitude corresponding to the voltage of DC power supply 30. The phase difference between high-frequency voltages V1 and V2, i.e., θ2 - θ1 (or θ1 - θ2), is equal to the phase difference θ between high-frequency signal S1 and high-frequency signal S2.

[0066] As described above, the high-frequency power P1 is based on the first high-frequency voltage V1 generated by the DC-RF converter 31. The high-frequency power P2 is based on the second high-frequency voltage V2 generated by the DC-RF converter 32. The power combining unit 33 combines the high-frequency powers P1 and P2 according to the phase difference between the high-frequency voltages V1 and V2, that is, the phase difference between the high-frequency signal S1 and the high-frequency signal S2. Therefore, the power combining unit 33 adjusts the magnitude of the output high-frequency power Ps. The power combining unit 33 will be described below.

[0067] Figure 2 This is a circuit diagram illustrating a structural example of the power combining unit 33. The power combining unit 33 includes a mixing circuit comprising a resistor R and a transmission transformer Tt. Regarding the transmission transformer Tt, the ratio of the number of turns in the first winding to the number of turns in the second winding is 1:1. The power combining unit 33 also has two input ports N1 and N2 and one summing port Ns. A high-frequency voltage V1 is applied to input port N1. A high-frequency voltage V2 is applied to input port N2.

[0068] One end of input port N1 is connected to one end of resistor R and one end of the first winding of transmission transformer Tt as the starting point of winding. The other end of the first winding of transmission transformer Tt is connected to one end of the second winding as the starting point of winding and one end of summation port Ns. The other end of the second winding of transmission transformer Tt is connected to the other end of resistor R and one end of input port N2. The other ends of input port N1, N2, and summation port Ns are each connected to ground potential.

[0069] The load is connected to the summation port Ns. It is known that when the load impedance is R0 / 2, the input impedance of input ports N1 and N2 becomes R0 by setting the resistance value of resistor R to 2R0. This is detailed in Japanese Patent Application Publication No. 2017-201630. High-frequency power P1 is input from input port N1. High-frequency power P2 is input from input port N2. High-frequency power P1 is expressed using the voltage formula described above for high-frequency voltage V1, as shown in equation (1) below. High-frequency power P2 is expressed using the voltage formula described above for high-frequency voltage V2, as shown in equation (2) below.

[0070] P1 = B 2 sin 2 (2πft+θ1) / R0···············(1)

[0071] P2 = B 2 sin 2 (2πft+θ2) / R0···············(2)

[0072] According to Japanese Patent Application Publication No. 2017-201630, the currents flowing into input ports N1 and N2 and the current flowing through resistor R are calculated using the voltage formulas described above, which respectively represent high-frequency voltages V1 and V2. Then, the currents flowing through the first and second windings of the transmission transformer Tt are calculated, and the current output from the summing port Ns is calculated. As a result, the high-frequency voltage Vs and high-frequency power Ps output from the summing port Ns are expressed as follows in equations (3) and (4). Therefore, the average value Ps_avr of the high-frequency power Ps is expressed by equation (5).

[0073] Vs=Bcos(θ / 2)·sin(2πft+θ / 2)··········(3)

[0074] Ps = Vs 2 / (R0 / 2)

[0075] =2B 2 cos 2 (θ / 2)·sin 2 (2πft+θ / 2) / R0··(4)

[0076] Ps_avr=B 2 cos 2 (θ / 2) / R0···············(5)

[0077] Where θ: θ2-θ1

[0078] By comparing equations (1), (2), and (4), the proportion η of the high-frequency power Ps output from the power combining unit 33 in the high-frequency power (P1+P2) input to the power combining unit 33 is expressed by the following equation (6). The remaining high-frequency power is consumed by the resistor R. Given that the proportion η of combining the high-frequency power P1 and P2 has been determined, the phase difference θ is obtained by the following equation (7).

[0079] η = cos 2 (θ / 2)·············(6)

[0080]

[0081] Furthermore, even if the impedance of the load connected to the summing port Ns differs from Ro / 2, the magnitude of the high-frequency power Ps output from the power combining unit 33 can be adjusted by varying the phase difference θ within the range of 0 to 2π. Figure 2The structure shown is as follows. The structure of the power combining unit 33 can be, for example, a structure that combines high-frequency power P1 and P2 using a so-called 90° mixing circuit. Power loss generated in the filter circuit 34 is ignored below. In this case, the high-frequency power Ps output by the power combining unit 33 is output from the high-frequency output unit 3 while maintaining its magnitude.

[0082] Figure 1 The pulse generation unit 4 shown may be, for example, a general-purpose timer IC or a timer built into a microcomputer. The pulse generation unit 4 generates pulses with a period and duty cycle set by the control unit 2. The pulse height value is a so-called logic level. The pulse period is sufficiently long compared to the period expressed as the reciprocal of the frequency f. The frequency f is set by the control unit 2 in the high-frequency generation unit 1. By sending the generated pulses to the control unit 2, the pulse generation unit 4 periodically notifies the control unit 2 of the start time of the pulse's activation period and the start time of the pulse's deactivation period.

[0083] For convenience, even when the duty cycle is set to 100%, the pulse generation unit 4 notifies the control unit 2 of two start times. Hereinafter, the activation period and deactivation period of the pulse generated by the pulse generation unit 4 will be referred to as the first period and the second period, respectively. Furthermore, the repetition cycle of the first period and the second period will be referred to as the control cycle.

[0084] The power detection unit 5 includes a directional coupler and detects the traveling wave power output from the high-frequency output unit 3 to the load side and the reflected wave power reflected from the load side. The power detection unit 5 feeds back the detection results to the control unit 2. The power detection unit 5 can be structured to detect only the traveling wave power.

[0085] Matching unit 200 aims to independently match the impedance of the high-frequency output unit 3 and the load from the high-frequency power supply device 100. However, in structures where the magnitude of the high-frequency power Ps output by the high-frequency output unit 3 varies with a relatively short period, it may be difficult to consistently achieve impedance matching. Therefore, in Embodiment 1, matching unit 200 focuses on impedance matching during the first period described above. For this purpose, matching unit 200 is notified of timing related to the first period from control unit 2. In addition, the signal indicating the first period can be directly provided to matching unit 200 from pulse generation unit 4.

[0086] In the above structure, the control unit 2 can periodically change the magnitude of the high-frequency power Ps supplied to the load to a first level and a second level during the first and second periods, respectively. The control unit 2 sets the pulse period and duty cycle in the pulse generation unit 4 to be notified of the start time of each of the first and second periods. The duty cycle is the ratio of the first period to the repetition period of the first and second periods, i.e., the control period. Therefore, the pulse generation unit 4 periodically notifies the control unit 2 of the start time of the first and second periods, for example, by performing an interruption.

[0087] When the pulse generation unit 4 is notified of the start times of the first and second periods, the control unit 2 sets different phase differences in the high-frequency generation unit 1 so that the magnitude of the high-frequency power Ps output from the power combining unit 33 becomes the first and second levels. Here, the phase difference corresponding to the first level of the high-frequency power Ps and the phase difference corresponding to the second level of the high-frequency power Ps can be calculated in advance based on equations (5) and (7). In this case, the two calculated values ​​are stored in a storage unit not shown. In addition, the phase differences corresponding to the first and second levels can be calculated each time they are set. The maximum value of the average value Ps_avr of the high-frequency power Ps expressed by equation (5) is (B 2 / R0). Calculating the phase difference at each setting, the first level relative to the maximum value (B) is calculated. 2 The proportion η of / R0) and the second level relative to the maximum value (B) 2 The ratio η of / R0). The phase difference θ between the two calculated η is calculated individually based on equation (7). The average value of the high-frequency power Ps and the maximum value of Ps_avr can also be calculated by actual measurement.

[0088] When the control unit 2 sets a phase difference θ for the high-frequency generation unit 1, the high-frequency powers P1 and P2 output by the DC-RF converters 31 and 32, respectively, are combined in the power combining unit 33 at a ratio η corresponding to θ. The combined high-frequency power Ps is provided to the load. The high-frequency power Ps provided to the load is adjusted to the first level and the second level in the first period and the second period, respectively. However, the actual magnitudes of the high-frequency powers P1 and P2, as expressed by equations (1) and (2) above, are affected by the variation of the load impedance (R0 / 2). In addition, the input impedance of the power combining unit 33 and the output impedance of the DC-RF converters 31 and 32 may not be matched. Furthermore, the output impedance of the power combining unit 33 and the impedance of the load may not be matched either. As a result, the combining ratio η in the power combining unit 33 becomes a different value than the value calculated in equation (6).

[0089] To this end, feedback control can be implemented so that the high-frequency power Ps supplied to the load from the high-frequency output unit 3 in the first and second periods respectively is close to the target first and second levels. Specifically, the control unit 2 individually calculates the detection results of the traveling wave power (or the difference between the traveling wave power and the reflected power) fed back from the power detection unit 5 in the first and second periods respectively, and the deviations from the target first and second levels. The control unit 2 controls the increase or decrease of the phase difference θ set in the high-frequency generation unit 1 so that the calculated deviation is close to zero. Regarding the specific feedback control, since there are various known methods, the explanation of feedback control is omitted.

[0090] Regarding the aforementioned feedback control, in the structure that receives the detection result of the traveling wave power from the power detection unit 5, phase difference θ is controlled so that the power consumed by the load is less than the amount of reflected wave power compared to the target first and second levels. Furthermore, in the structure that receives the detection result of the difference between the traveling wave power and the reflected power from the power detection unit 5, phase difference θ is controlled so that the actual power consumed by the load is equal to the target first and second levels. In structures where the feedback control response is relatively slow, for example, phase difference θ can be controlled so that the average value of the detection result received from the power detection unit 5 is equal to the average value of the target first and second levels. In this case, the phase difference θ set by the control unit 2 in each of the first and second periods can be determined together every one or more control cycles.

[0091] As described above, high-frequency power Ps is supplied to the load from the high-frequency output unit 3. If the magnitude of the high-frequency power Ps changes abruptly from the first level to a level significantly different from the first level, or if the magnitude of the high-frequency power Ps changes abruptly from the second level to a level significantly different from the second level, the plasma may become unstable. Similarly, if the duty cycle changes abruptly during the first period, the plasma may also become unstable. Therefore, in Embodiment 1, when the duty cycle during the first period changes, the duty cycle is gradually decreased (or gradually increased), and the first level is gradually increased (or gradually decreased). This smooths out the time variation of the duty cycle during the first period and the time variation of the first level, and the average value of the high-frequency power Ps supplied to the load from the high-frequency output unit 3 remains constant. As a result, the plasma remains stable.

[0092] Figure 3 This is an explanatory diagram illustrating the high-frequency power Ps in the high-frequency power supply device 100 according to Embodiment 1, where the power is gradually reduced during the first period. Figure 3The horizontal axis of the two graphs shown is the same time axis (t). The upper graph shows the control cycle, which includes both the first and second periods, starting from the first period. The lower graph shows the control cycle starting from the second period. The control cycle is represented by T. Control unit 2 gradually decreases the duty cycle of the first period in each control cycle in the order of 75%, 50%, and 25%, and gradually increases the first level in the order of 1167W, 1500W, and 2500W.

[0093] The first period shown in the upper diagram and the second period shown in the lower diagram correspond to the activation period of the pulse generated by the pulse generation unit 4. The control unit 2, for example, gradually decreases the duty cycle set for the pulse generation unit 4. Thus, the first period in the upper diagram is gradually decreased in sync with the timing notified from the pulse generation unit 4. Furthermore, the step size for gradually decreasing the duty cycle is not limited to 25% and can be a finer value. Alternatively, after maintaining the same duty cycle for multiple cycles, it can be reduced to a smaller duty cycle. The duty cycle can also be decreased linearly. In Embodiment 1, the second level is fixed at 600W.

[0094] The average values ​​of the high-frequency power Ps in the first, second, and third control cycles shown in the diagram above are denoted as Ps1, Ps2, and Ps3, respectively. The average values ​​Ps1, Ps2, and Ps3 are given in equations (8), (9), and (10) below. The unit is W. Decimal values ​​are rounded. The value of "100" subtracted from each equation is the assumed value of the reflected power in the second period. Impedance matching is assumed to have been achieved in the first period.

[0095] Ps1=1167×0.75+(600-100)×0.25=1000··(8)

[0096] Ps2=1500×0.50+(600-100)×0.50=1000··(9)

[0097] Ps3=2500×0.25+(600-100)×0.75=1000··(10)

[0098] Compared to the graph in the previous section, the only difference in the graph in the lower section is that each control cycle begins from the second period. In the lower section's graph, the average value of the high-frequency power Ps in each control cycle is the same as the average value in the graph in the previous section. Furthermore, in... Figure 3 The text describes the time variation of high-frequency power Ps when the duty cycle of the first period is gradually decreased. However, the text also discusses the time variation of high-frequency power Ps when the duty cycle of the first period is gradually increased. Figure 3This is represented by a diagram that reverses the orientation of the time axis. In this case, the first level decreases as the duty cycle of the first period gradually increases.

[0099] Figure 4 This is a graph showing the correspondence between the duty cycle and phase difference used in the high-frequency power supply device 100 according to Embodiment 1. The contents of this graph are stored as a table in a storage unit (not shown). In the table, power (W), phase difference, and amplitude (relative value) corresponding to multiple duty cycles are stored for the first and second levels, respectively. Figure 3 In the diagram, multiple duty cycles are given, such as 100%, 75%, 50%, and 25%, with corresponding power (W), phase difference, and amplitude (relative values) shown. The power of level 1 and level 2 are respectively... Figure 3 The power corresponding to the power is shown. Figure 4 The pulse level shown represents a relative value of the level of the pulsed voltage signal corresponding to the magnitude of the power, as used in embodiments 2 and 3 described later.

[0100] For example, assume that the maximum value of the high-frequency power Ps synthesized in the power combining section 33 is 2500W. In this case, the phase difference θ14 is zero. The phase difference θ13 is calculated based on equation (6) and satisfies 1500 / 2500=cos 2 (θ / 2)θ. Similarly, the phase difference θ12 satisfies 1167 / 2500=cos 2 (θ / 2)θ. The phase difference θ11 satisfies 1000 / 2500=cos 2 The phase difference θ22 to θ24 satisfies 600 / 2500 = cosθ. 2 θ = (θ / 2). With a duty cycle of 100%, there are no two levels (level 1 and level 2). However, for convenience, we assume levels 1 and 2 are 1000W to store the phase difference and amplitude. The following flowchart illustrates the reference and... Figure 4 The chart shown corresponds to a table used to control the phase difference θ method.

[0101] Figure 5 This is a flowchart illustrating the processing sequence of the control unit 2, which sets the duty cycle and phase difference in the pulse generation unit 4 and the high-frequency generation unit 1, respectively. Pa and Pt in the diagram represent the stored... Figure 4The pointers to the header addresses of the columns in the chart shown are used to represent the column pointers. Hereinafter, these pointers will only be referred to as column pointers. When the contents of each column are considered as an array, Pa and Pt are pointers representing the addresses of the arrays. Pa represents the header address of the currently referenced column. Pt represents the header address of the column ultimately set as the target. ΔP represents the difference between the header addresses of the two columns. Control unit 2 stores the pointer Pa to the current column and the pointer Pt to the target column.

[0102] In such Figure 3 As shown, when the duty cycle is gradually reduced during the first period, control unit 2 sets the pointer of the column corresponding to the final target duty cycle of 25% to Pt, and sets the distance (a positive value) between adjacent columns to ΔP. Then, control unit 2 starts... Figure 5 The process is shown. The initial value of Pa is the pointer of the column corresponding to a 100% duty cycle. When the duty cycle of the first period is gradually increased, the control unit 2 sets the pointer of the column corresponding to the new duty cycle set to the target to Pt, and sets the value obtained by reversing the sign of the distance between adjacent columns (a negative value) to ΔP.

[0103] Start Figure 5 In the case of this processing, control unit 2 temporarily stores the pointer Pt of the column corresponding to the target duty cycle in a storage unit (not shown) (S11). Next, control unit 2 adds ΔP to the pointer Pa of the current column (S12). Here, if ΔP is a positive value, the column indicated by Pa is changed to the column next to it with a duty cycle that is 1 stage smaller. If ΔP is a negative value, the column indicated by Pa is changed to the column next to it with a duty cycle that is 1 stage larger.

[0104] Then, control unit 2 references the pointer Pa. Figure 4 The duty cycle is read from the column contents shown in Pa (S14) of the table corresponding to the chart shown. The control unit 2 sets the read duty cycle in the pulse generation unit 4 (S15). The duty cycle set here is reflected in the next control cycle immediately following the current control cycle. The control cycle is set for the pulse generation unit 4 during the initialization process. Next, the control unit 2 reads the phase difference corresponding to the first level and the second level from the column contents shown in Pa (S16).

[0105] Then, the control unit 2 determines whether it has been notified of the rise in the first period from the pulse generation unit 4 (S17). If the control unit 2 has not been notified of the rise in the first period (S17 "No"), it remains in standby mode until it is notified of the rise. If the control unit 2 has been notified of the rise in the first period (S17 "Yes"), it sets the phase difference corresponding to the first level from the phase difference read in advance in step S16 to the high-frequency generation unit 1 (S18).

[0106] Then, the control unit 2 determines whether it has been notified of the rise in the second period from the pulse generation unit 4 (S19). If the control unit 2 has not been notified of the rise in the second period (S19 "No"), it remains in standby mode until it is notified of the rise in the second period. If the control unit 2 is notified of the rise in the second period (S19 "Yes"), it sets the phase difference corresponding to the second level from the phase difference read in advance in step S16 to the high-frequency generation unit 1 (S20).

[0107] Next, the control unit 2 determines whether the pointer Pa of the current column is consistent with the pointer Pt of the target column (S21). If the pointer Pa and the pointer Pt are consistent (S21 "Yes"), the control unit 2 moves the processing to step S17 in order to periodically set the phase difference corresponding to the subsequent first level and second level, respectively. If the pointer Pa and the pointer Pt are inconsistent (S21 "No"), the control unit 2 determines whether the Pt used in step S21 has changed (S22).

[0108] If the pointer Pt has not changed, it means that the gradual decrease or increase of the duty cycle in the first period has not been completed. If the pointer Pt has not changed (S22 "No"), the control unit 2 moves the process to step S12 in order to advance the pointer Pa of the current column by 1. If the pointer Pt has changed, it means that the pointer of the target column has been changed. If the pointer Pt has changed (S22 "Yes"), the control unit 2 moves the process to step S11 in order to start the sequence of gradual decrease or increase of the duty cycle in the first period from the beginning.

[0109] The above Figure 5 The processing order of the control unit 2 shown is as follows: Figure 3 As shown in the previous paragraph, this corresponds to the situation where the first period begins before the second period. For example... Figure 3 As shown in the next paragraph, the processing order of control unit 2 regarding the case where the second period begins before the first period will be... Figure 4 The charts shown correspond to the tables and Figure 5 The processing order shown can be changed by altering only a portion of it. Specifically, the duty cycle of each column initially stored in the table is changed from the duty cycle of period 1 to the duty cycle of period 2.

[0110] Therefore, in Figure 5 In step S15, since the duty cycle of the second period is set in the pulse generation unit 4, the start time of the second period is notified first within one control cycle. Therefore, the control unit 2 executes steps S17 to S20 as follows. Figure 5In step S17, control unit 2 waits for the rise of the second period. In step S18, control unit 2 sets a phase difference corresponding to the second level in high-frequency generation unit 1. In step S19, control unit 2 waits for the rise of the first period. In step S20, control unit 2 sets a phase difference corresponding to the first level in high-frequency generation unit 1.

[0111] According to Embodiment 1, the control unit 2 periodically controls the phases of the high-frequency signals S1 and S2 generated by the high-frequency generation unit 1. The high-frequency output unit 3 outputs high-frequency power Ps based on the phase-controlled high-frequency signals S1 and S2. By controlling the phases of the high-frequency signals S1 and S2, the magnitude of the high-frequency power Ps output by the high-frequency output unit 3 is periodically adjusted to a first level and a second level during the first and second periods, respectively. The second level is lower than the first level. The control unit 2 further gradually decreases the duty cycle of the first period relative to the control period and gradually increases the first level during the period of periodically controlling the phases. As a result, the average value of the high-frequency power Ps output by the high-frequency output unit 3 is kept constant. Therefore, abrupt changes in the high-frequency power Ps can be mitigated.

[0112] Furthermore, according to Embodiment 1, the high-frequency generation unit 1 generates high-frequency signals S1 and S2 having the same frequency. The control unit 2 individually controls the phase difference θ between the high-frequency signals S1 and S2 during the first and second periods, respectively. DC-RF conversion units 31 and 32 are included in the high-frequency output unit 3. The DC-RF conversion unit 31 generates a high-frequency voltage V1 having a phase corresponding to the high-frequency signal S1. The DC-RF conversion unit 32 generates a high-frequency voltage V2 having a phase corresponding to the high-frequency signal S2. The high-frequency output unit 3 synthesizes the high-frequency powers P1 and P2 based on the generated high-frequency voltages V1 and V2, respectively, at a ratio corresponding to the phase difference θ between the high-frequency voltages V1 and V2. The high-frequency output unit 3 outputs the synthesized high-frequency power Ps. The high-frequency powers P1 and P2 are based on the high-frequency voltages V1 and V2, respectively. During the first and second periods, the high-frequency powers P1 and P2 are synthesized at different ratios. As a result, the magnitude of the high-frequency power Ps output during the first and second periods can be changed to a first level and a second level, respectively.

[0113] Furthermore, according to Embodiment 1, the control unit 2 controls the phase described above, so that the high-frequency power Ps output by the high-frequency output unit 3 in the first period is consistent with the magnitude detected by the power detection unit 5 and the first level. Here, the first level is the target value of the high-frequency power Ps that the high-frequency output unit 3 should output in the first period of the current control cycle. The control unit 2 controls the phase described above, so that the high-frequency power Ps output by the high-frequency output unit 3 in the second period is consistent with the second level. Here, the second level is the target value of the high-frequency power Ps that the high-frequency output unit 3 should output in the second period of the current control cycle. As described above, since the control unit 2 controls the phase, the magnitude of the high-frequency power Ps output by the high-frequency output unit 3 in each control cycle can be correctly adjusted.

[0114] (Variation Example 1)

[0115] Implementation Example 1 is a configuration in which the duty cycle of the first period is gradually decreased (or gradually increased), and the first level is gradually increased (or gradually decreased). Modification Example 1 is a configuration in which both the duty cycle of the first period and the second level are gradually decreased (or gradually increased), and the first level is gradually increased (or gradually decreased). The block structure of the high-frequency power supply device involved in Modification Example 1 is different from that in Implementation Example 1. Figure 1 The block structure of the high-frequency power supply device 100 shown is the same. Therefore, in Modification 1, the same reference numerals are used for the parts corresponding to Embodiment 1, and the description of their structure is omitted.

[0116] Figure 6 This is an explanatory diagram illustrating the high-frequency power Ps in the high-frequency power supply device 100 according to Modification Example 1, where the duty cycle of the first period is gradually reduced. Figure 6 The horizontal axis of both graphs shown is the same time axis (t). The upper graph shows the control cycle, which includes both period 1 and period 2, starting from period 1. The lower graph shows the control cycle starting from period 2. The duty cycle of period 1 is gradually decreased in each control cycle in the order of 75%, 50%, and 25%. Simultaneously, level 1 is gradually increased in the order of 1056W, 1333W, and 2500W, and level 2 is gradually decreased in the order of 933W, 766W, and 600W.

[0117] The average values ​​of the high-frequency power Ps in the first, second, and third control cycles shown in the diagram above are denoted as Ps1, Ps2, and Ps3, respectively. For example, the average values ​​Ps1, Ps2, and Ps3 are as shown in equations (11), (12), and (13) below. The unit is W. The decimal places are rounded.

[0118] Ps1=1056×0.75+(933-100)×0.25=1000··(11)

[0119] Ps2=1333×0.50+(766-100)×0.50=1000··(12)

[0120] Ps3=2500×0.25+(600-100)×0.75=1000··(13)

[0121] Compared to the graph in the previous section, the only difference in the graph in the lower section is that each control cycle begins in the second period. In the lower section, the average high-frequency power Ps in each control cycle is the same as in the graph in the previous section. Furthermore, in... Figure 6 The text describes the time variation of high-frequency power Ps when the duty cycle of the first period is gradually decreased. It also describes the time variation of high-frequency power Ps when the duty cycle of the first period is gradually increased. Figure 6 The diagram shows the time axis orientation reversed. In this case, the duty cycle of the first period is gradually increased. Simultaneously, the first level is gradually decreased and the second level is gradually increased.

[0122] Figure 7 This is a graph showing the correspondence between the duty cycle and phase difference used in the high-frequency power supply device 100 involved in Modification Example 1. The contents of this graph are stored as a table. In the table, the power (W), phase difference, and amplitude (relative value) corresponding to multiple duty cycles are stored for the first and second levels, respectively. Figure 7 In the diagram, 100%, 75%, 50%, and 25% are given as multiple duty cycles, and their corresponding power (W), phase difference, and amplitude (relative values) are shown. The power of each of the first and second levels is... Figure 6 The power corresponding to the power is shown.

[0123] For example, assume that the maximum value of the high-frequency power Ps synthesized in the power combining unit 33 is 2500W. In this case, the phase difference θ34 is zero. The phase difference θ33 is calculated based on equation (6) and satisfies 1333 / 2500=cos 2 (θ / 2)θ. Similarly, the phase difference θ32 satisfies 1056 / 2500=cos 2 (θ / 2)θ. The phase difference θ31 satisfies 1000 / 2500=cos 2 (θ / 2)θ. The phase difference θ44 satisfies 600 / 2500=cos 2 (θ / 2)θ. The phase difference θ43 satisfies 766 / 2500=cos 2 (θ / 2)θ. The phase difference θ42 satisfies 933 / 2500=cos 2(θ / 2) of θ.

[0124] The flowchart showing the processing sequence of the control unit 2, which periodically sets the phase difference in the high-frequency generation unit 1, is the same as the flowchart shown in Embodiment 1. Therefore, the illustration and explanation of the flowchart involved in Modification 1 are omitted.

[0125] As described above, according to Modification 1, the control unit 2 periodically controls the phases of the high-frequency signals S1 and S2 generated by the high-frequency generation unit 1. During the phase control period, the control unit 2 gradually decreases the duty cycle of the first period relative to the control cycle. Simultaneously, the control unit 2 gradually increases the first level and gradually decreases the second level. As a result, the average value of the high-frequency power Ps output by the high-frequency output unit 3 is kept constant. Therefore, abrupt changes in the high-frequency power Ps can be mitigated.

[0126] (Variation Example 2)

[0127] Implementation Example 1 involves gradually decreasing (or increasing) the duty cycle during the first period and gradually increasing (or decreasing) the first level. Modification Example 2 involves gradually decreasing (or increasing) the second level and gradually increasing (or decreasing) the first level. The block structure of the high-frequency power supply device involved in Modification Example 2 is the same as that in Implementation Example 1. Figure 1 The block structure of the high-frequency power supply device 100 shown is the same. Therefore, in Modification 2, the same reference numerals are used for the parts corresponding to those in Embodiment 1, and the description of their structure is omitted.

[0128] Figure 8 This is an explanatory diagram illustrating the high-frequency power Ps in the high-frequency power supply device 100 involved in Modification Example 2, where the second level is gradually reduced. Figure 8 The horizontal axis of both graphs shown is the same time axis (t). The upper graph shows the control cycle, which includes both period 1 and period 2, starting from period 1. The lower graph shows the control cycle starting from period 2. With the duty cycle of period 1 fixed at 25%, the first level is gradually increased in the order of 1375W, 1750W, 2125W, 2500W, and the second level is gradually decreased in the order of 975W, 850W, 725W, 600W.

[0129] The average values ​​of the high-frequency power Ps in the first, second, and third control cycles shown in the diagram above are denoted as Ps1, Ps2, and Ps3, respectively. For example, the average values ​​Ps1, Ps2, and Ps3 are as shown in equations (14), (15), and (16) below. The unit is W.

[0130] Ps1=1375×0.25+(975-100)×0.75=1000··(14)

[0131] Ps2=1750×0.25+(850-100)×0.75=1000··(15)

[0132] Ps3=2500×0.25+(600-100)×0.75=1000··(16)

[0133] Comparing the graph in the previous section, the only difference in the graph in the lower section is from the second period onwards in each control cycle. In the lower section, the average value of the high-frequency power Ps in each control cycle is the same as in the graph in the previous section. Furthermore, in Figure 8 The text describes the time variation of the high-frequency power Ps when the second level is gradually decreased. The time variation of the high-frequency power Ps when the second level is gradually increased is illustrated using... Figure 8 The diagram shows the time axis orientation reversed. In this case, with the duty cycle of the first period fixed at a constant value, the first level is gradually decreased while the second level is gradually increased.

[0134] Figure 9 This is a graph showing the correspondence between the duty cycle and phase difference used in the high-frequency power supply device 100 involved in Modification Example 2. The contents of this graph are stored as a table. In the table, the power (W), phase difference, and amplitude (relative value) are stored for the first and second levels respectively when the duty cycle is always 25%. The power and phase difference for the first and second levels are respectively... Figure 8 The power corresponding to the power is shown.

[0135] For example, assume that the maximum value of the high-frequency power Ps synthesized in the power combining section 33 is 2500W. In this case, the phase difference θ55 is zero. The phase difference θ54 is calculated based on equation (6) and satisfies 2125 / 2500=cos 2 (θ / 2)θ. Similarly, the phase difference θ53 satisfies 1750 / 2500=cos 2 The phase difference θ52 satisfies 1375 / 2500 = cosθ. 2 (θ / 2)θ. The phase difference θ51 satisfies 1000 / 2500=cos 2 (θ / 2)θ. The phase difference θ65 satisfies 600 / 2500=cos 2 The phase difference θ64 of (θ / 2) satisfies 725 / 2500=cos 2 (θ / 2)θ. The phase difference θ63 satisfies 850 / 2500=cos 2 (θ / 2)θ. The phase difference θ62 satisfies 975 / 2500=cos 2 (θ / 2) of θ.

[0136] The flowchart illustrating the processing sequence of the control unit 2, which periodically sets the phase difference in the high-frequency generation unit 1, is the same as the flowchart shown in Embodiment 1. Therefore, the illustration and explanation of the flowchart involved in Modification 2 are omitted.

[0137] As described above, according to Modification 2, the control unit 2 periodically controls the phases of the high-frequency signals S1 and S2 generated by the high-frequency generation unit 1. During the phase control period, the control unit 2 gradually increases the first level and gradually decreases the second level. As a result, the average value of the high-frequency power Ps output by the high-frequency output unit 3 is kept constant. Therefore, abrupt changes in the high-frequency power Ps can be mitigated.

[0138] (Implementation Method 2)

[0139] In Embodiment 1, the control unit 2 periodically controls the phases of the high-frequency signals S1 and S2 generated by the high-frequency generation unit 1. The high-frequency output unit 3 outputs high-frequency power Ps based on the controlled phases of the high-frequency signals S1 and S2. The magnitude of the high-frequency power Ps output by the high-frequency output unit 3 is periodically adjusted to a first level and a second level. In Embodiment 2, the control unit 2 periodically controls the amplitude of the high-frequency signals generated by the high-frequency generation unit. The high-frequency output unit outputs high-frequency power based on the high-frequency signals with controlled amplitude. The magnitude of the high-frequency power output by the high-frequency output unit is periodically adjusted to a first level and a second level.

[0140] Figure 10 This is a block diagram illustrating a structural example of the high-frequency power supply device 100b according to Embodiment 2. The high-frequency power supply device 100b includes a high-frequency generation unit 1b, a control unit 2b, and a high-frequency output unit 9. The high-frequency generation unit 1b generates a high-frequency signal Sm. The control unit 2b controls the amplitude of the high-frequency signal Sm generated by the high-frequency generation unit 1b. The high-frequency output unit 9 outputs a high-frequency power Po having a magnitude corresponding to the controlled amplitude of the high-frequency signal Sm. The high-frequency power supply device 100b also includes a power detection unit 5 for detecting the high-frequency power Po output by the high-frequency output unit 9. The high-frequency power Po output by the high-frequency output unit 9 is provided to a load via the power detection unit 5 and a matching unit 200. The matching unit 200 seeks impedance matching with the power detection unit 5 and the load. In Embodiment 2, the same reference numerals are used for the parts corresponding to those in Embodiment 1, and descriptions of their structures are omitted.

[0141] The high-frequency generation unit 1b includes a high-frequency oscillator 6, a pulse generation unit 7, and a multiplier 8. The high-frequency oscillator 6 oscillates a high-frequency continuous signal S0. The pulse generation unit 7 generates a rectangular wave-shaped pulse signal Vp to modulate the continuous signal S0 oscillated by the high-frequency oscillator 6. The multiplier 8 modulates the amplitude of the continuous signal S0 by multiplying the continuous signal S0 oscillated by the high-frequency oscillator 6 with the pulse signal Vp generated by the pulse generation unit 7. The rectangular wave-shaped signal has a stepped rise and fall. In the rectangular wave-shaped signal, the levels before the rise and after the fall are not necessarily zero. Here, the rectangular wave-shaped signal is also considered a generalized pulse signal. For the rectangular wave-shaped signal, the period from the rise to the fall is defined as the effective period.

[0142] The control unit 2b has a CPU, ROM, and RAM, and its hardware is the same as that of Embodiment 1. Figure 1 The control unit 2 shown is similarly configured. In terms of software, control unit 2 periodically sets the duty cycle in pulse generation unit 4 and periodically sets the phase difference θ in high-frequency generation unit 1. Control unit 2b periodically sets the duty cycle and two pulse levels in pulse generation unit 7. Details will be described later.

[0143] The high-frequency oscillator 6, for example, includes a direct digital synthesizer. The voltage of the high-frequency continuous signal S0 oscillated by the high-frequency oscillator 6 is used... The high-frequency oscillation unit 6 inputs a high-frequency continuous signal S0 to one side of the multiplication operation input of the multiplier 8. A0 is a fixed amplitude. It is the initial phase. f is the frequency set from the control unit 2b, such as the frequency of an industrial RF band, such as 2MHz, 13.56MHz, 27MHz, 60MHz, etc.

[0144] The pulse generation unit 7 includes, for example, a direct digital synthesizer. The pulse generation unit 7 generates a pulse signal Vp with high and low levels, following the period, duty cycle, and two pulse levels set by the control unit 2b. The pulse generation unit 7 inputs the generated pulse signal Vp to the multiplication input of the multiplier 8. The period of the pulse signal Vp is sufficiently long compared to the period expressed as the reciprocal of the frequency f set by the control unit 2b in the high-frequency oscillator 6. The pulse generation unit 7 periodically notifies the control unit 2b of the start time of the high-level period of the pulse signal Vp and the start time of the low-level period of the pulse signal Vp.

[0145] For convenience, even when the pulse generation unit 7 sets the duty cycle to 100%, two start times are notified to the control unit 2b. As described above, the pulse generation unit 7 generates a pulse signal Vp. The period during which the pulse signal Vp is at a high level is referred to as the first period. The period during which the pulse signal Vp is at a low level is referred to as the second period. Furthermore, the repetition period of the first period and the second period is referred to as the control period.

[0146] The multiplier 8 may include, for example, an analog multiplier or a digital modulator. Regarding the multiplier 8, the instantaneous values ​​of a high-frequency continuous signal S0 and a pulse signal Vp are input to the two multiplication inputs. The multiplier 8 performs a multiplication operation on the instantaneous values ​​of the high-frequency continuous signal S0 and the pulse signal Vp. This results in amplitude offset modulation of the high-frequency continuous signal S0. The multiplier 8 outputs a high-frequency signal Sm obtained through amplitude offset modulation. With the signal level of the pulse signal Vp fixed at a reference level Lr and a duty cycle of 100%, the high-frequency signal Sm output by the multiplier 8 is represented using the voltage expression for the aforementioned continuous signal S0, as shown in equation (17) below.

[0147]

[0148] Where B0: fixed amplitude

[0149] The high-frequency output unit 9 includes a linear amplifier. The high-frequency output unit 9 linearly amplifies the high-frequency signal Sm input from the multiplier 8, i.e., the high-frequency generation unit 1b, and outputs the amplified high-frequency voltage Vo. Thus, a high-frequency power Po with a magnitude corresponding to the high-frequency voltage Vo is provided to the load side. The impedance of the load side observed from the high-frequency output unit 9 is assumed to be R0 / 2, similar to Embodiment 1. When the signal level of the pulse signal Vp is a fixed reference level Lr, the high-frequency power Po output by the high-frequency output unit 9 is expressed using equation (17) as shown in equation (18) below. In this case, the average value Po_avr of the high-frequency power Po is expressed as shown in equation (19), and is proportional to the square of the reference level Lr.

[0150]

[0151] Po_avr=(G·Lr·B0) 2 / R0············(19)

[0152] Wherein, G: the amplification of the high-frequency output section 9

[0153] With the above structure, the control unit 2b can periodically change the magnitude of the high-frequency power Po supplied to the load to a first level and a second level during the first and second periods, respectively. To be notified of the start time of each of the first and second periods, the control unit 2b sets the period and duty cycle of the pulse signal Vp in the pulse generation unit 7. The duty cycle is the ratio of the first period to the repetition period of the first and second periods, i.e., the control period. Therefore, the pulse generation unit 7, for example, by interrupting, periodically notifies the control unit 2b of the start time of the first and second periods.

[0154] Upon receiving notification of the start times of the first and second periods from the pulse generation unit 7, the control unit 2b sets different pulse levels in the pulse generation unit 7, such that the magnitude of the high-frequency power Po output from the high-frequency output unit 9 becomes the first and second levels, respectively. The pulse levels set for the pulse generation unit 7 at the start times of the first and second periods are reflected in the signal levels during the activation and deactivation periods of the pulse signal Vp generated by the pulse generation unit 7. Then, based on these signal levels, the magnitude of the high-frequency power Po is adjusted to the first and second levels.

[0155] Here, the pulse levels corresponding to the first level and the second level can also be calculated in advance based on equation (19). In this case, the two calculated values ​​are stored in a storage unit not shown. In addition, the pulse levels corresponding to the first level and the second level can be calculated each time they are set. As described above, the average value Po_avr of the high-frequency power Po is expressed by equation (19). Specifically, the multiple of the first level relative to the average value Po_avr and the multiple of the second level relative to the average value Po_avr are calculated. The pulse levels of the high level and the low level are calculated by multiplying the square root of each of the two calculated multiples by the aforementioned reference level Lr. The average value Po_avr of the high-frequency power Po when the signal level of the pulse signal Vp is a fixed reference level Lr can also be calculated by actual measurement.

[0156] Feedback control can be performed so that the high-frequency power Po supplied to the load from the high-frequency output unit 9 in both the first and second periods is close to the target first and second levels, respectively. This is the same as in Embodiment 1. Furthermore, when the first or second level is changed, the duty cycle in the first period is gradually decreased (or gradually increased) along with the change in the first or second level, maintaining plasma stability. This is also the same as in Embodiment 1, Modification 1, and Modification 2.

[0157] For example, when the duty cycle of the first period is gradually decreased (or increased) and the first level is gradually increased (or decreased), the pulse level set for the pulse generation unit 7 is changed according to the change in duty cycle. To change the pulse level, for example, the method described in Embodiment 1 is used. Figure 4 The diagram shown illustrates this. When the pulse level is varied as described above, the first period corresponds to the effective period of the rectangular wave-shaped pulse signal Vp generated by the pulse generation unit 7. The control unit 2, for example, gradually decreases the duty cycle set for the pulse generation unit 7. Thus, the first period can be gradually decreased in sync with the timing notified from the pulse generation unit 7.

[0158] Similarly, when the duty cycle of the first period and the second level are both gradually decreased (or gradually increased), and the first level is gradually increased (or gradually decreased), the pulse level set for the pulse generation unit 7 is changed according to the change in duty cycle. For example, Modified Example 1 is used to change the pulse level. Figure 7 The diagram shown. Additionally, assume that the second level is gradually decreasing (or increasing) while the first level is gradually increasing (or decreasing). In this case, the pulse level set in the pulse generation unit 7 gradually decreases (or increases) towards the second level of the target, and the pulse level set in the pulse generation unit 7 gradually increases (or decreases) towards the first level of the target. To gradually decrease or increase the pulse level, for example, using Modified Example 2... Figure 9 The chart shown.

[0159] In addition, Figure 4 , Figure 7 as well as Figure 9 In this context, the pulse level at level 1000W is set as the reference level Lr. The square root of the multiplier relative to level 1000W for both level 1 and level 2 is set as the relative pulse level relative to the reference level L. The following flowchart illustrates the reference and... Figure 4 , Figure 7 as well as Figure 9 The chart shown corresponds to a table used to control pulse levels.

[0160] Figure 11 This is a flowchart illustrating the processing sequence of the control unit 2b, which sets the duty cycle and pulse level for the pulse generation unit 7. Steps S31 to S42, excluding steps S36, S38, and S40, are consistent with those in Embodiment 1. Figure 5 The steps S11 to S22 shown correspond to each other. These processes are the same as in Implementation Method 1. Therefore, the explanation will focus on steps S36, S38, and S40.

[0161] Start Figure 11If the processing of steps S31 to S35 is completed, the control unit 2b reads the pulse levels corresponding to the first level and the second level from the contents of the column shown in Pa (S36). Then, the control unit 2b determines whether it has been notified of an increase in the first period from the pulse generation unit 7 (S37). If no increase in the first period has been notified (S37 "No"), the control unit 2b remains in standby mode until an increase is notified. If an increase in the first period has been notified (S37 "Yes"), the control unit 2b pre-reads the pulse potential pulse generation unit 7 corresponding to the first level from the pulse levels in step S36 (S38).

[0162] Then, the control unit 2b determines whether it has been notified of an increase in the second period from the pulse generation unit 7 (S39). If it has not been notified of an increase in the second period (S39 "No"), the control unit 2b remains in standby mode until it is notified of an increase. If it has been notified of an increase in the second period (S39 "Yes"), the control unit 2b sets the pulse level corresponding to the second level to the pulse generation unit 7 from the pulse levels read in advance in step S36 (S40). The following processing is the same as in Embodiment 1.

[0163] As described above, according to Embodiment 2, the control unit 2b periodically controls the amplitude of the high-frequency signal Sm generated by the high-frequency generation unit 1b. The high-frequency output unit 9 outputs high-frequency power Po based on the high-frequency signal Sm whose amplitude is controlled. By periodically controlling the amplitude of the high-frequency signal Sm by the control unit 2b, the magnitude of the high-frequency power Po output by the high-frequency output unit 9 is periodically adjusted to a first level and a second level in each of the first and second periods. The second level is lower than the first level. The control unit 2b further gradually decreases or increases at least one of the duty cycle of the first period relative to the control period and the second level during the period of periodically controlling the amplitude, and gradually increases or decreases the first level. As a result, the average value of the high-frequency power Po output by the high-frequency output unit 9 is kept constant. Therefore, abrupt changes in the high-frequency power Po can be mitigated.

[0164] Furthermore, according to Embodiment 2, the control unit 2b controls the amplitude of the high-frequency signal Sm generated by the high-frequency generation unit 1b in both the first and second periods. The high-frequency output unit 9 generates a high-frequency power Po having a magnitude corresponding to the high-frequency signal Sm whose amplitude is controlled. Therefore, the magnitude of the high-frequency power Po output in each of the first and second periods can be varied to a first level and a second level, respectively.

[0165] (Implementation Method 3)

[0166] Embodiment 2 involves a single high-frequency output unit 9 providing high-frequency power Po, adjusted to a first level and a second level through amplitude offset modulation, to the load. In Embodiment 3, a single high-frequency output unit 9 provides the first level high-frequency power Po1 to the load only during the first period. Furthermore, other high-frequency output units 9 provide the second level high-frequency power Po2 to the load only during the second period. One high-frequency output unit 9 corresponds to the first high-frequency output unit. The other high-frequency output units correspond to the second high-frequency output units.

[0167] Figure 12 This is a block diagram illustrating a structural example of the high-frequency power supply device 100c according to Embodiment 3. The high-frequency power supply device 100c includes a high-frequency generation unit 1c, a control unit 2c, and high-frequency output units 9 and 9. The high-frequency generation unit 1c generates high-frequency signals Sm1 and Sm2. High-frequency signals Sm1 and Sm2 correspond to a first high-frequency signal and a second high-frequency signal, respectively. The control unit 2c controls the amplitudes of the high-frequency signals Sm1 and Sm2 generated by the high-frequency generation unit 1c. One high-frequency output unit 9 outputs a high-frequency power Po1 having a magnitude corresponding to the controlled amplitude of the high-frequency signal Sm1. Other high-frequency output units 9 output high-frequency power Po2 having a magnitude corresponding to the controlled amplitude of the high-frequency signal Sm2.

[0168] The high-frequency power supply device 100c also includes power detection units 5 and 5' that detect the high-frequency power Po1 and Po2 output by the high-frequency output units 9 and 9 respectively. The high-frequency power Po1 output by one high-frequency output unit 9 is provided to the electrode 301 of the load 300 via a power detection unit 5 and a matching unit 200. The high-frequency power Po2 output by other high-frequency output units 9 is provided to the electrode 301 of the load 300 via other power detection units 5 and other matching units 200. The matching units 200 and 200 are designed to match the impedance of the load 300. The load 300 is a plasma processing device. The other electrode 302 of the load 300 is grounded. The same reference numerals are used for the parts corresponding to embodiments 1 and 2, and the description of their structure is omitted.

[0169] The high-frequency generation unit 1c includes a high-frequency oscillator 6, a pulse generation unit 7b, and multipliers 8 and 8. The high-frequency oscillator 6 oscillates a high-frequency continuous signal S0. The pulse generation unit 7b generates pulse signals Vp1 and Vp2 for modulating the continuous signal S0 oscillated by the high-frequency oscillator 6. One multiplier 8 modulates the amplitude of the continuous signal S0 by multiplying the continuous signal S0 oscillated by the high-frequency oscillator 6 with the pulse signal Vp1 generated by the pulse generation unit 7b. Other multipliers 8 modulate the amplitude of the continuous signal S0 by multiplying the continuous signal S0 oscillated by the high-frequency oscillator 6 with the pulse signal Vp2 generated by the pulse generation unit 7b.

[0170] The control unit 2c includes a CPU, ROM, and RAM, similar to that in Embodiment 2. Figure 10 The control unit 2b shown is similarly configured. The detection results of the power detection units 5 and 5 are individually input to the control unit 2c. Furthermore, the control unit 2c notifies the matching units 200 and 201 of timings related to the first period and the second period, respectively. Signals representing the first period and signals representing the second period can be directly supplied to the matching units 200 and 201 from the pulse generation unit 7b.

[0171] The high-frequency oscillator 6 distributes the oscillating continuous signal S0 to multipliers 8 and 8. Thus, the continuous signal S0 is input to the multiplication input of each of the multipliers 8 and 8. Alternatively, two continuous signals with different frequencies can be input to multipliers 8 and 8 respectively.

[0172] The pulse generation unit 7b generates a high-level pulse signal Vp1 according to the period and duty cycle set by the control unit 2c, and inputs the generated pulse signal Vp1 to the other multiplication input of one multiplier 8. The pulse generation unit 7b further generates a pulse signal Vp2 with a lower level than pulse signal Vp1 during the failure period of pulse signal Vp1, and inputs the generated pulse signal Vp2 to the other multiplication input of the other multiplier 8. In other words, regarding the rectangular wave-shaped pulse signal Vp generated by the pulse generation unit 7b in Embodiment 2, the pulse generation unit 7b outputs pulse signal Vp1 in the first period and pulse signal Vp2 in the second period. Pulse signals Vp1 and Vp2 are narrowly defined pulse signals with a zero level during the failure period. The pulse generation unit 7b periodically notifies the control unit 2c of the start time points of the generated pulse signals Vp1 and Vp2 respectively.

[0173] For convenience, even when the duty cycle in the pulse generation unit 7b is set to 100%, two start times are notified to the control unit 2c. As described above, the pulse generation unit 7b generates pulse signals Vp1 and Vp2. The effective period of pulse signal Vp1 is referred to as the first period. The effective period of pulse signal Vp2 is referred to as the second period. Furthermore, the repetition period of the first period and the second period is referred to as the control period.

[0174] Multipliers 8 and 8 perform amplitude offset modulation on the high-frequency continuous signal S0. One multiplier 8 outputs a high-frequency signal Sm1. The other multipliers 8 output a high-frequency signal Sm2. High-frequency output units 9 and 9 linearly amplify the high-frequency signals Sm1 and Sm2 output from multipliers 8 and 8, i.e., high-frequency generation units 1c. High-frequency output units 9 and 9 output the amplified high-frequency voltages Vo1 and Vo2, respectively. Thus, high-frequency power Po1 and Po2, corresponding to the high-frequency voltages Vo1 and Vo2, are provided to the load 300 side.

[0175] With the above structure, the control unit 2c can adjust the magnitude of the high-frequency power Po1 supplied to the load 300 to a first level during the first period. Furthermore, the control unit 2c can adjust the magnitude of the high-frequency power Po2 supplied to the load 300 to a second level during the second period. To be notified of the start time of each of the first and second periods, the control unit 2c sets the pulse period and the duty cycle of the pulse signal Vp1 in the pulse generation unit 7b. The duty cycle is the ratio of the first period to the repetition period of both the first and second periods, i.e., the control period. Therefore, the pulse generation unit 7b periodically notifies the control unit 2c of the start time of the first and second periods, for example, by performing an interruption.

[0176] When the pulse generation unit 7b notifies the start time of the first period, the control unit 2c sets a pulse level in the pulse generation unit 7b such that the magnitude of the high-frequency power Po1 output from a high-frequency output unit 9 becomes the first level. Furthermore, when the pulse generation unit 7b notifies the start time of the second period, the control unit 2c sets other pulse levels in the pulse generation unit 7b such that the magnitude of the high-frequency power Po2 output from another high-frequency output unit 9 becomes the second level. The control unit 2c sets the pulse levels. The pulse levels corresponding to the first level and the pulse levels corresponding to the second level can be pre-calculated in the same way as in Embodiment 2. In this case, the two calculated values ​​are stored in a storage unit (not shown). The pulse levels corresponding to the first level and the second level can be calculated each time they are set.

[0177] As described above, in both the first and second periods, high-frequency power Po1 and Po2 are supplied to the load 300 from the high-frequency output units 9 and 9, respectively. Feedback control can be performed to make the high-frequency power Po1 and Po2 approach the target first and second levels, respectively. This is the same as in Embodiments 1 and 2. Furthermore, when the first or second level is changed, the duty cycle in the first period is gradually decreased (or gradually increased) along with the change in the first or second level to maintain plasma stability. This is also the same as in Embodiments 1 and 2, and Modifications 1 and 2.

[0178] As described above, the settings of the control unit 2c for the pulse generation unit 7b are the same as those set by the control unit 2b for the pulse generation unit 7b in Embodiment 2. Therefore, the processing order of the control unit 2c, which periodically sets the duty cycle and pulse level of the pulse generation unit 7b, is the same as in Embodiment 2. Figure 11 The processing order shown is the same. Therefore, the flowchart illustrating the processing order and its explanation are omitted here.

[0179] As described above, according to Embodiment 3, the control unit 2c periodically controls the amplitudes of the high-frequency signals Sm1 and Sm2 generated by the high-frequency generation unit 1c. The high-frequency output units 9 and 9 output high-frequency powers Po1 and Po2, respectively, based on the amplitude-controlled high-frequency signals Sm1 and Sm2. By periodically controlling the amplitudes of the high-frequency signals Sm1 and Sm2, the magnitudes of the high-frequency powers Po1 and Po2 are periodically adjusted to a first level and a second level during the first and second periods, respectively. Furthermore, during the period of periodically controlling the amplitudes, the control unit 2c gradually decreases or increases at least one of the duty cycle of the first period relative to the control period and the second level, and gradually increases or decreases the first level. Thus, the average value of the sum of the high-frequency powers Po1 and Po2 output by the high-frequency output units 9 and 9 is kept fixed. That is, while gradually decreasing at least one of the duty cycle of the first period and the second level, the first level is gradually increased. While gradually increasing the duty cycle of the first period and at least one of the second level, the first level is gradually decreased. This keeps the average value of the sum of the high-frequency powers Po1 and Po2 constant. Therefore, abrupt changes in the high-frequency power Po can be mitigated.

[0180] In Embodiment 3, regarding each of the high-frequency signals Sm1 and Sm2, the control unit 2c controls the amplitude in the same way as in Embodiment 2 to adjust the magnitudes of the high-frequency power Po1 and Po2 supplied to the load 300 to the first and second levels, respectively. However, the structure for adjusting the magnitudes of the high-frequency power supplied to the two systems of the load 300 to the first and second levels is not limited to the structure described above. It is assumed that a set of high-frequency signals includes two signals. For example, two sets of high-frequency signals can be generated instead of high-frequency signals Sm1 and Sm2. In this structure, for example, the control unit controls the phase difference for each set of high-frequency signals in the same way as in Embodiment 1. As a result, the magnitudes of the high-frequency power supplied to the two systems of the load 300 are adjusted to the first and second levels, respectively.

[0181] The embodiments disclosed herein are illustrative in all respects and should not be considered limiting. The scope of the invention is not limited to the foregoing meaning, but is set forth in the claims and is intended to include all modifications within the meaning and scope equivalent to the claims. Furthermore, the technical features described in the various embodiments can be combined with each other.

Claims

1. A high-frequency power supply device characterized by comprising: have: A high-frequency generation unit that generates high-frequency signals; A control unit that periodically controls the amplitude or phase of the high-frequency signal generated by the high-frequency generation unit; and A high-frequency output unit whose output is based on a high-frequency signal whose amplitude or phase is controlled by the control unit, thereby controlling the magnitude of the high-frequency power. The control unit controls the amplitude or phase of the high-frequency signal, such that the high-frequency power output by the high-frequency output unit is at a first level during the first period of the control cycle, and at a second level lower than the first level during the second period of the control cycle, which is different from the first period. When the control unit changes the first level in the first period to a different level, or changes the ratio of the length of the first period to a target ratio of a different ratio, it sets a transition period with a predetermined number of transition cycles. Perform at least one of the following controls to make the average value of the high-frequency power output by the high-frequency output unit constant during one cycle of the control cycle in the transition period: The duty cycle of the first period relative to the control cycle is gradually decreased, and the first level is gradually increased; The duty cycle of the first period relative to the control cycle is gradually decreased, and the first level is gradually increased, while the second level is gradually decreased. The duty cycle of the first period relative to the control cycle and at least one of the second level is gradually decreased or increased, and the first level is gradually increased or decreased.

2. The high-frequency power supply device according to claim 1, characterized in that, The high-frequency generation unit generates multiple high-frequency signals, including a first high-frequency signal and a second high-frequency signal of the same frequency. The control unit controls the phase difference between the first high-frequency signal and the second high-frequency signal during the first period and the second period, respectively. The high-frequency output section has: A first generating unit generates a first high-frequency voltage having a phase corresponding to the first high-frequency signal; A second generating unit generates a second high-frequency voltage having a phase corresponding to the second high-frequency signal; and A power combining unit that combines the high-frequency power of the first high-frequency voltage and the second high-frequency voltage generated by the first generating unit and the second generating unit respectively in a proportion corresponding to the phase difference.

3. The high-frequency power supply device according to claim 1, characterized in that, The control unit controls the amplitude of the high-frequency signal during the first period and the second period respectively. The high-frequency output unit outputs high-frequency power with an amplitude corresponding to that of the high-frequency signal whose amplitude is controlled by the control unit.

4. The high-frequency power supply device according to any one of claims 1 to 3, characterized in that, The high-frequency power supply device further includes a power detection unit for detecting the high-frequency power output by the high-frequency output unit. The control unit adjusts the amplitude or phase of the high-frequency signal so that the magnitude of the high-frequency power detected by the power detection unit during the first period and the second period is consistent with the first level and the second level.

5. A high-frequency power supply device characterized by comprising: have: A high-frequency generation unit that generates the first high-frequency signal and the second high-frequency signal; A control unit that periodically controls the amplitude or phase of the first high-frequency signal and the second high-frequency signal generated by the high-frequency generation unit; A first high-frequency output unit whose output is based on a first high-frequency signal whose amplitude or phase is controlled by the control unit, thereby controlling the magnitude of the high-frequency power; and A second high-frequency output unit outputs a high-frequency power whose magnitude is controlled based on a second high-frequency signal whose amplitude or phase is controlled by the control unit. The control unit controls the amplitude or phase of the first high-frequency signal, such that the magnitude of the high-frequency power output by the first high-frequency output unit is at the first level during the first period of the control cycle. The control unit controls the amplitude or phase of the second high-frequency signal, such that the high-frequency power output by the second high-frequency output unit becomes a second level lower than the first level during the second period of the control cycle, which is different from the first period. When the control unit changes the first level in the first period to a different level, or changes the ratio of the length of the first period to a target ratio of a different ratio, it sets a transition period with a predetermined number of transition cycles. Perform at least one of the following controls to make the average value of the high-frequency power output during one cycle of the control cycle in the transition period constant: The duty cycle of the first period relative to the control cycle is gradually decreased, and the first level is gradually increased; The duty cycle of the first period relative to the control cycle is gradually decreased, and the first level is gradually increased, while the second level is gradually decreased. The duty cycle of the first period relative to the control cycle and at least one of the second level is gradually decreased or increased, and the first level is gradually increased or decreased.

6. A method for outputting high-frequency power, wherein the output is based on a high-frequency signal whose amplitude or phase is periodically controlled, thereby controlling the magnitude of the high-frequency power, characterized in that, The amplitude or phase of the high-frequency signal is controlled such that the magnitude of the high-frequency power is at a first level during the first period of the control cycle, and at a second level lower than the first level during the second period of the control cycle, which is different from the first period. When the first level in the first period is changed to a different level, or when the ratio of the lengths of the first period is changed to a different target ratio, a transition period with a predetermined number of transition cycles is set. Perform at least one of the following controls to make the average value of the high-frequency power output during one cycle of the control cycle in the transition period constant: The duty cycle of the first period relative to the control cycle is gradually decreased, and the first level is gradually increased; The duty cycle of the first period relative to the control cycle is gradually decreased, and the first level is gradually increased, while the second level is gradually decreased. The duty cycle of the first period relative to the control cycle and at least one of the second level is gradually decreased or increased, and the first level is gradually increased or decreased.