Input drive configuration for reducing phase and gain imbalance
Patent Information
- Application Number
- CN202011038089.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-06-04
- Filing Date
- 2020-09-28
- Publication Date
- 2026-08-21
- Estimated Expiration
- 2040-09-28
AI Technical Summary
用于前端信号链的许多变压器和巴伦变压器(balun transformer)配置难以平衡相位不平衡的改善与幅度不平衡的恶化
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Figure CN112615624B_ABST
Abstract
Description
[0001] Cross-references to related applications This application claims priority to Indian Provisional Application No. 201941040009, filed on 3 October 2019, which is incorporated herein by reference. Technical Field
[0002] This application generally involves input driver configuration and transformer configuration. Background Technology
[0003] The front-end signal chain for an analog-to-digital converter (ADC) converts a single-ended analog input signal into a differential analog input signal, which can then be converted by the ADC into a digital output signal. Impedance mismatch between the two ADC inputs causes amplitude and phase imbalances in the differential input signals, introducing nonlinearity at the beginning of the signal chain. This nonlinearity propagates through all other operations performed using the digital output signal. These nonlinearities, particularly the second harmonic, are especially problematic for multi-band ADCs, where the amplitude of the second harmonic of the signal in the first band is greater than that in the second band, degrading the signal quality of the signal in the second band. Many transformer and balun transformer configurations used in the front-end signal chain struggle to balance the improvement of phase imbalance with the exacerbation of amplitude imbalance. Furthermore, certain configurations cannot be achieved with certain types of balun transformers that have a specific footprint and a specific number of pins. Summary of the Invention
[0004] An apparatus includes three transformers. A first transformer includes a first primary winding coupled to ground and a second primary winding coupled to a first node and a second node. The first primary winding is configured to receive an input signal at an input node. A second transformer includes a second primary winding coupled to ground and the first node, and a second primary winding coupled to a first output node and a second output node. A third transformer includes a third primary winding coupled to ground and the second node, and a third primary winding coupled to the first output node and the second output node. The second and third transformers are balun transformers.
[0005] In some examples, the first, second, and third stage windings are further coupled to ground. In some implementations, the second stage winding includes a first output coupled to a first output node and a second output coupled to a second output node. The third stage winding includes a third output coupled to the second output node and a fourth output coupled to the first output node. In some examples, the first capacitance between the second primary winding and the first output of the second stage winding is substantially the same as the second capacitance between the third primary winding and the third output of the third stage winding. The third capacitance between the second primary winding and the second output of the second stage winding is substantially the same as the fourth capacitance between the third primary winding and the fourth output of the third stage winding.
[0006] In some implementations, the first impedance between the input node and the first output node is substantially the same as the second impedance between the input node and the second output node. The impedance ratio of the device is adjusted by adjusting the impedance ratio of the first transformer. Attached Figure Description
[0007] For a detailed description of the various examples, reference will now be made to the accompanying drawings, in which: Figure 1 This describes a single-transformer configuration for the front-end signal chain used in a high-speed ADC.
[0008] Figure 2 Explanation Figure 1 The spectrum of the RF input signal and the ADC output signal is shown.
[0009] Figure 3 This describes the front-end signal chain used in multi-band ADCs.
[0010] Figure 4 Explanation Figure 3 The spectrum of the RF input signal and the multi-band ADC output signal is shown.
[0011] Figure 5 The dual-balun configuration of the front-end signal chain for high-speed ADCs is described.
[0012] Figure 6 This describes the dual-transformer configuration of the front-end signal chain for a high-speed ADC.
[0013] Figures 7A-7B The graphs show the phase and amplitude imbalances for each of the single-transformer, dual-balun, and dual-transformer configurations of the front-end signal chain used in high-speed ADCs.
[0014] Figure 8 An example transformer configuration for the front-end signal chain of a high-speed ADC is illustrated.
[0015] Figures 9A-9B Explanation Figure 8Elimination of first-order and second-order common-mode currents in the transformer configuration shown.
[0016] Figures 10A-10B Showing Figure 8 The transformer configuration shown is as follows: Figure 1 The graphs show the phase imbalance and amplitude imbalance of a single transformer configuration. Detailed Implementation
[0017] In the publicly disclosed analog front-end equipment and transformer configuration, the input transformer receives the analog input signal and converts it into an analog differential input signal, which is then provided to two additional balun transformers in the secondary stage. The balun transformers are intrinsically matched between units such that the capacitance between the primary and secondary windings of the balun transformers is substantially the same. The first output of the first balun transformer is coupled to the second output of the second balun transformer, and the second output of the first balun transformer is coupled to the first output of the second balun transformer, which essentially cancels out the first-order common-mode current at all outputs and reduces the second-order common-mode current.
[0018] Figure 1 A single-transformer configuration 100 for the front-end signal chain of a high-speed ADC is described. Configuration 100 includes a transformer 110 having input nodes 115 and 120 and output nodes 125 and 130. An RF input signal 105 is applied to input node 115, and input node 120 is coupled to ground. Output node 125 is coupled to the positive input of ADC 170, and output node 130 is coupled to the negative input of ADC 170. Transformer 110 includes primary and secondary windings and converts the single-ended RF input signal 105 into a differential input signal for ADC 170. This differential input signal includes a positive input signal 150 and a negative input signal 160. ADC 170 outputs a digital output signal 175.
[0019] The nonlinearity in ADC 170 and the unbalanced impedance in transformer 110 introduce nonlinearity into the ADC digital output signal 175, where second-order nonlinearity dominates in terms of amplitude. For example, the mismatched impedance in transformer 110 causes an imbalance in the amplitude and phase of the ADC input signals 150 and 160. The positive ADC input signal 150 can be expressed as: Where K1 represents the amplitude of the positive input signal 150, f represents the frequency of the RF input signal 105, and t represents time. The negative ADC input signal 160 can be expressed as: Where K2 represents the amplitude of the negative input signal 160, f represents the frequency of the RF input signal 105, t represents time, and θ represents the phase shift of the negative input signal 160.
[0020] In an ideal differential signal, the positive input signal 150 and the negative input signal 160 have the same amplitude, and the phase of the negative input signal 160 is offset by 180 degrees from the phase of the positive input signal 150. However, due to impedance mismatch, K1 and K2 may not be equal, and the phase offset θ may be less than or greater than zero degrees. Figure 2 As illustrated in the spectrum diagram, the ADC output 275 for the single-frequency RF input signal 205 can exhibit a second-order effect at the second frequency, thereby introducing nonlinearity into the signal processing performed on the ADC output signal.
[0021] Figure 3 A front-end signal chain for a multi-band ADC is described. Signal chain 300 includes a first RF input signal 310 in the 1.8 GHz band and a second RF input signal 320 in the 3.5 GHz band. Input signals 310 and 320 are combined by combiner 330, and the combined signal is converted into a differential signal by balun transformer 340. The positive differential input signal 345 and negative differential input signal 350 output from balun transformer 340 are input to analog front-end (AFE) signal processing module 360, which includes a dual-band ADC for each of the 1.8 GHz and 3.5 GHz bands instead of two separate ADCs. A digitized output signal 370 includes baseband data that can be used for wireless data communication or further signal processing such as range calculations and angle of arrival.
[0022] As referenced earlier in this article Figure 1 The mismatched impedance discussed will occur in the balun transformer 340 Figure 4 The digital output signal 370 shown introduces a second-order nonlinearity. Figure 400 illustrates this. Figure 3 The spectrum of the input signal 410 in the 1.8 GHz band and the input signal 420 in the 3.5 GHz band of the signal chain 300 shown is illustrated in Figure 450. The spectrum of the digitized output signal 470A and the second-order nonlinear signal 470B is also shown. The digitized output signal 470A corresponds to the input signal 410 in the 1.8 GHz band; the second-order nonlinear signal 470B overlaps with the 3.5 GHz band adjacent to the digitized output signal 475 corresponding to the input signal 420.
[0023] Second-order frequency interference in the 1.8 GHz band affects the 3.5 GHz band and degrades the signal quality within the 3.5 GHz band. In particular, if the amplitude of the input signal in the 3.5 GHz band is sufficiently smaller than the amplitude of the input signal in the 1.8 GHz band, the signal quality in the 3.5 GHz band will be severely degraded.
[0024] Figure 5 A dual-balun configuration 500 for the front-end signal chain of a high-speed ADC is described. The dual-balun configuration includes a first balun transformer 510 and a second balun transformer 550. The first balun transformer has two input nodes 515 and 520 and two output nodes 525 and 530. An RF input signal 505 is applied to input node 515, and input node 520 is coupled to ground node 540. A positive differential output signal OUT 575 is provided to output node 525, and a negative differential output signal... 580 is provided to output node 530.
[0025] The second balun transformer 530 has a first input coupled to node 530 and a second input node 560 coupled to ground node 540. The second balun transformer also has a first output node 555 coupled to ground node 540 and a second output node coupled to node 525. Figure 1 Compared to the single-transformer configuration 100 shown, the dual-balun configuration 500 exhibits less phase imbalance but greater amplitude imbalance, which will be discussed in this paper. Figures 7A-7B Further discussion.
[0026] Figure 6 A dual-transformer configuration 600 for the front-end signal chain of a high-speed ADC is described. The dual-transformer configuration 600 includes a first transformer 610 and a second transformer 650. Transformer 610 has a first input node 615 to which an RF input signal 605 is applied and a second input node 620 coupled to a ground node 640. Transformer 610 has two output nodes 625 and 630. The secondary winding of transformer 610 is biased at node 635 by capacitor 645. Capacitor 645 is further coupled to ground node 640.
[0027] Transformer 650 has an input node coupled to output node 625 of transformer 610 and an input node coupled to output node 630 of transformer 610. Transformer 650 also has two output nodes 655 and 660. The secondary winding of transformer 650 is biased at node 665 by capacitor 670. Capacitor 670 is further coupled to ground node 640. A positive differential output signal OUT 675 is provided to output node 655, and a negative differential output signal... 680 is provided for output node 660. The dual-transformer configuration 600 exhibits better performance than... Figure 5The dual balun configuration shown has 500 fewer phase imbalances, but exhibits better performance than... Figure 1 The single transformer configuration shown has 100 more amplitude imbalances.
[0028] Figures 7A-7B It shows the use of Figure 1 The single transformer configuration shown is 100. Figure 5 The double balun configuration shown is 500 and Figure 6 The graphs show the phase imbalance and amplitude imbalance of each of the dual transformer configurations 600. Figure 7A The amplitude imbalance is described as 710A for a single transformer configuration of 100, 750A for a double balun configuration of 500, and 760A for a double transformer configuration of 600. The amplitude imbalance of 760A is less than that of 750A, but greater than that of 710A. Figure 7B The phase imbalance 710B of a single transformer configuration 100, the phase imbalance 750B of a double balun configuration 500, and the phase imbalance 760B of a double transformer configuration 600 are described. Phase imbalance 750B is less than phase imbalance 710B but greater than phase imbalance 760B. Figure 1 The single transformer configuration shown is 100. Figure 5 The double balun configuration shown is 500 and Figure 6 The dual transformer configuration 600 shown is further described in "Wideband A / D Converter Front-End Design Considerations" published in Analog Dialogue 40-07 in July 2006.
[0029] Figure 8 An example transformer configuration 800 for the front-end signal chain of a high-speed ADC is illustrated. Transformer configuration 800 includes an input balun transformer 820 and balun transformers 830A-B coupled together in parallel in the secondary stage. Balun transformers 830A-B are intrinsically matched such that their output signals exhibit substantially the same phase and amplitude imbalance. Balun transformer 820 has an input coupled to a ground node 810 and an input configured to receive an RF input signal 805. The secondary winding of transformer 820 is coupled to ground node 810. A first output of transformer 820 is coupled to the input of transformer 830A, and a second output of transformer 820 is coupled to the input of transformer 830B.
[0030] The second input and secondary winding of transformer 830A are coupled to ground node 810. Transformer 830A has a first output coupled to output node 850 and a second output coupled to output node 860. Transformer 830A exhibits a first parasitic capacitance represented by capacitor 834A between the first input coupled to transformer 820 and the first output coupled to output node 850. Transformer 830A also exhibits a second parasitic capacitance represented by capacitor 838A between the second input coupled to ground node 810 and the second output coupled to output node 860.
[0031] The second input and secondary winding of transformer 830B are coupled to ground node 810. Transformer 830B has a first output coupled to output node 860 and a second output coupled to output node 850. Transformer 830B exhibits a first parasitic capacitance represented by capacitor 834B, which lies between the first input coupled to transformer 820 and the first output coupled to output node 860. Transformer 830B also exhibits a second parasitic capacitance represented by capacitor 838B, which lies between the second input coupled to ground node 810 and the second output coupled to output node 850.
[0032] Because the balun transformers 830A-B are matched, the parasitic capacitances 834A-B are essentially equal, and the parasitic capacitances 838A-B are essentially equal. The symmetry of the balun transformers 830A-B ensures that output nodes 850 and 860 exhibit essentially the same impedance, meaning that if signals at output nodes 850 and 860 are reflected back from the ADCs coupled to them, these signals will be reflected back essentially equally. The impedance ratio of the transformer configuration 800 can be adjusted by changing the impedance ratio of the balun transformer 820.
[0033] Figures 9A-9B This explains that in Figure 8 The transformer configuration 800 shown illustrates the elimination and reduction of first-order and second-order common-mode currents. Figure 9A In this context, it is assumed that the balun transformer 830A-B is ideal so that efforts can be focused on eliminating the first-order common-mode current at output nodes 850 and 860 and ignoring the second-order common-mode current. Figure 9B This explains the reduction in the second-order common-mode current in transformer configuration 800. Return Figure 9A The output signal 924A from the first output of balun transformer 820 to the first input of balun transformer 830A can be expressed as: Id+Ic ,in Id Represents differential current. IcThis represents the common-mode current caused by impedance imbalance in the balun transformer 820. The output signal 928A from the second output of transformer 820 to the first input of balun transformer 830B can be expressed as... -Id+Ic .
[0034] In response to the signal 924A provided to the first input of the balun transformer 830A, the balun transformer 830A outputs a first signal 934A from the first output and a second signal 938A from the second output. The output signal 934A can be represented as... Id+ Ic The output signal 938A can be represented as... -Id-Ic In response to the signal 928A provided to the first input of the balun transformer 830B, the balun transformer 830B outputs a first signal 944A from its first output and a second signal 948A from its second output. The output signal 944A can be represented as... -Id+Ic The output signal 948A can be represented as... Id-Ic .
[0035] Add signals 934A and 948A to eliminate the first-order common-mode current. Ic And it is provided to output node 850 as output signal 955A. Output signal 955A can be expressed as (Id+Ic)+(Id-Ic)=2Id Adding signals 938A and 944A together eliminates the first-order common-mode current. Ic And it is provided to output node 860 as output signal 965A. Output signal 965A can be expressed as (-Id-Ic) +(-Id+Ic)=-2Id The output signals generated at output nodes 850 and 860 are pure differential signals without any common-mode current.
[0036] Figure 9B This includes the effect of the second-order common-mode current. For ease of explanation, the common-mode current is expressed as... aId ,in a This indicates a very small multiple, less than 1, indicating common-mode rejection in balun transformer 820. The output signal 924B from the output of balun transformer 820 to the first input of balun transformer 830A can be represented as... Id+aId The output signal 928B from the second output of balun transformer 820 to the first input of balun transformer 830B can be represented as: -Id+aId .
[0037] In response to the signal 924B provided to the first input of the balun transformer 830A, the balun transformer 830A outputs a first signal 934B from the first output and a second signal 938B from the second output. The output signal 934B can be represented as... (Id+ aId)+b(Id+aId),in b This indicates a very small multiple, less than 1, indicating the common-mode rejection in the balun transformer 830A. The output signal 938B can be represented as... (-Id-aId)+b(Id+aId) In response to the signal 928B provided to the first input of the balun transformer 830B, the balun transformer 830B outputs a first signal 944B from its first output and a second signal 948B from its second output. The output signal 944B can be represented as... (-Id+aId)+b(-Id+aId) The output signal 948B can be represented as... (Id-aId)+b(-Id+aId) Because the 830A-B balun transformer is intrinsically matched with similar parasitic capacitances, the multiple... b The two are essentially the same for the 830A-B balun transformer.
[0038] Signals 934B and 948B are added together and the sum is used as output signal 955B, which is provided to output node 850. Output signal 955B can be expressed as: [(Id+aId)+b(Id+aId)]+[(Id-aId)+b(-Id+aId)]=2Id+2abId Signals 938B and 944B are added together and the sum is used as output signal 965B, which is provided to output node 860. Output signal 965B can be expressed as... .multiple a and b Both are less than 1, making the second-order common-mode current in each of the differential signals 955B and 965B... 2abId Compare Figure 1 The common-mode current exhibited in the single-transformer configuration 100 shown is an order of magnitude smaller.
[0039] Figures 10A-10B Showing the use of in Figure 8 The transformer configuration shown and in Figure 1 The graphs shown illustrate the phase and amplitude imbalances in a single-transformer configuration. Figure 10A In the configuration of a single transformer (configuration 100), the phase imbalance of 1010A is greater than that of a transformer (configuration 800), which is 1080A. Figure 10B In this context, except for a few frequency ranges, the amplitude imbalance 1010B of single transformer configuration 100 is greater than the amplitude imbalance 1080B of transformer configuration 800. In some implementations, transformer configuration 800 can improve second harmonic distortion by 14% compared to transformer configuration 100 used for the analog front-end input of an ADC.
[0040] The term "coupled" is used throughout this specification. This term can cover a connection, communication, or signaling path that achieves a functional relationship consistent with that described in this disclosure. For example, if device A generates a signal to control device B to perform an action, in a first example, device A is coupled to device B; or in a second example, if intervening component C does not substantially alter the functional relationship between device A and device B, device A is coupled to device B via intervening component C such that control signals generated by device B via device A are controlled by device A. Unless otherwise stated, in this specification, "identical" or "substantially identical" means that the similarity between two things is within 90% or more.
[0041] Within the scope of the claims, the described embodiments can be modified, and other embodiments can also be modified.
Claims
1. An apparatus for configuring a transformer, comprising: A first transformer includes a first primary winding and a second secondary winding, wherein the first primary winding is coupled to ground and configured to receive an input signal at an input node, and wherein the second secondary winding is coupled to a first node and a second node; The second transformer includes a second primary winding and a second secondary winding, wherein the second primary winding is directly coupled to ground and directly coupled to the first node, and wherein the second secondary winding is coupled to the first output node and the second output node; as well as The third transformer includes a third primary winding and a third secondary winding, wherein the third primary winding is directly coupled to ground and directly coupled to the second node, and wherein the third secondary winding is coupled to the first output node and the second output node.
2. The apparatus according to claim 1, wherein, The second transformer includes a first balun transformer, and the third transformer includes a second balun transformer.
3. The apparatus according to claim 1, wherein, The first-stage winding, the second-stage winding, and the third-stage winding are further coupled to ground.
4. The apparatus according to claim 1, wherein, The second-stage winding includes a first output coupled to the first output node and a second output coupled to the second output node, and wherein the third-stage winding includes a third output coupled to the second output node and a fourth output coupled to the first output node.
5. The apparatus according to claim 4, wherein, The first capacitor between the second primary winding and the first output of the second secondary winding is substantially the same as the second capacitor between the third primary winding and the third secondary winding.
6. The apparatus according to claim 4, wherein, The first capacitor between the second primary winding and the second output of the second secondary winding is substantially the same as the second capacitor between the third primary winding and the fourth output of the third secondary winding.
7. The apparatus according to claim 4, wherein, The first impedance between the input node and the first output node is substantially the same as the second impedance between the input node and the second output node.
8. The apparatus according to claim 7, wherein, The impedance ratio of the device is adjusted by adjusting the impedance ratio of the first transformer.
9. An input driver configuration comprising: A transformer, comprising: a first primary winding and a second secondary winding, the first primary winding being coupled to ground and configured to receive an input signal at an input node; and A secondary stage, coupled to the primary winding, comprising: A first balun transformer includes a second primary winding and a second secondary winding, wherein the second primary winding is directly coupled to ground and directly coupled to a first output of the first secondary winding, wherein the first output of the second secondary winding is coupled to a first output node, and the second output of the second secondary winding is coupled to a second output node; and The second balun transformer includes a third primary winding and a third secondary winding, wherein the third primary winding is directly coupled to ground and directly coupled to a second output of the first secondary winding, wherein a first output of the third secondary winding is coupled to a second output node, and a second output of the third secondary winding is coupled to a first output node.
10. The input driver configuration according to claim 9, wherein, The first-stage winding, the second-stage winding, and the third-stage winding are further coupled to ground.
11. The input driver configuration according to claim 9, wherein, The first capacitance between the first output of the second primary winding and the second secondary winding is substantially the same as the second capacitance between the first output of the third primary winding and the third secondary winding.
12. The input driver configuration according to claim 11, wherein, The third capacitor between the second primary winding and the second output of the second secondary winding is substantially the same as the fourth capacitor between the second output of the third primary winding and the third secondary winding.
13. The input driver configuration according to claim 9, wherein, The input drive configuration is configured to receive a single-ended input signal at the input node and output differential signals at the first output node and the second output node.
14. The input driver configuration according to claim 13, wherein, The first output node and the second output node are coupled to the analog-to-digital converter.
15. The input driver configuration according to claim 9, wherein, The first impedance between the input node and the first output node is substantially the same as the second impedance between the input node and the second output node.
16. The input driver configuration according to claim 15, wherein, The impedance ratio of the input drive configuration is adjusted by adjusting the impedance ratio of the transformer.
17. An analog front-end device, comprising: A transformer having a first input, a first output, and a second output, wherein the first input is configured to receive an input signal; as well as A secondary stage, coupled to the first output and the second output, includes: A first balun transformer has a second input directly coupled to the first output, a third output coupled to the first device output, and a fourth output coupled to the second device output. The second balun transformer has a third input directly coupled to the second output, a fifth output coupled to the second device output, and a sixth output coupled to the first device output. The phase imbalance of the first balun transformer is substantially the same as the phase imbalance of the second balun transformer, and the amplitude imbalance of the first balun transformer is substantially the same as the amplitude imbalance of the second balun transformer.
18. The analog front-end device according to claim 17, wherein, The impedance ratio of the analog front-end device is adjusted by adjusting the impedance ratio of the transformer.
19. The analog front-end device according to claim 17, wherein, The analog front-end device is configured to output differential signals on the first device output and the second device output.
20. The analog front-end device according to claim 19, wherein, The outputs of the first device and the second device are coupled to an analog-to-digital converter.
21. The analog front-end device according to claim 17, wherein, The first capacitor between the second input and the third output is substantially the same as the second capacitor between the third input and the fifth output, and the third capacitor between the second input and the fourth output is substantially the same as the fourth capacitor between the second input and the sixth output.
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