Electronic device package and method of manufacturing the same

Abstract

An electronic device package and a method of manufacturing the same. The electronic device package includes a first conductive substrate, a second conductive substrate, and a dielectric layer. The first conductive substrate has a first coefficient of thermal expansion (CTE). The second conductive substrate is disposed on an upper surface of the first conductive substrate and is electrically connected to the first conductive substrate. The second conductive substrate has a second CTE. The dielectric layer is disposed on the upper surface of the first conductive substrate and is disposed on at least one sidewall of the second conductive substrate. The dielectric layer has a third CTE. A difference between the first CTE and the second CTE is greater than a difference between the first CTE and the third CTE.

Description

Technical Field

[0001] This disclosure relates to an electronic device package and a method of manufacturing the same, and more specifically to an electronic device package comprising a stack of a pair of conductive substrates having matched coefficients of thermal expansion (CTE) and a dielectric layer located adjacent to the pair of conductive substrates, and a method of manufacturing the same. Background Technology

[0002] Wireless communication devices, such as smartphones, typically include antennas for transmitting and receiving radio frequency (RF) signals. These devices generally consist of an antenna substrate and a communication substrate. The antenna substrate and communication substrate have different functional requirements. For example, one or more dielectric layers in the antenna substrate require relatively low dielectric constants (Dk) and relatively low dissipation factors (Df) to achieve the desired peak gain and thinner thickness, while one or more dielectric layers in the communication substrate require relatively high dielectric constants (Dk). To achieve low Dk and Df characteristics, the elastic modulus and adhesive properties of one or more dielectric layers in the antenna substrate are correspondingly reduced, which decreases the robustness of the wireless communication device and the adhesion between the antenna substrate and the communication substrate. Summary of the Invention

[0003] In some embodiments, an electronic device package includes a first conductive substrate, a second conductive substrate, and a dielectric layer. The first conductive substrate has a first coefficient of thermal expansion (CTE). The second conductive substrate is disposed on an upper surface of the first conductive substrate and electrically connected to the first conductive substrate. The second conductive substrate has a second CTE. The dielectric layer is disposed on the upper surface of the first conductive substrate and on at least one sidewall of the second conductive substrate. The dielectric layer has a third CTE. The difference between the first CTE and the second CTE is greater than the difference between the first CTE and the third CTE.

[0004] In some embodiments, an antenna device package includes a substrate, at least one first antenna structure, a dielectric layer, and electronic components. The substrate has a first surface and a second surface opposite to the first surface. The at least one first antenna structure is disposed on the first surface of the substrate. A space is defined between the first surface of the substrate and a sidewall of the first antenna structure, and the space exposes a portion of the first surface of the substrate. The dielectric layer is disposed in the space and contacts the sidewall of the first antenna structure and the first surface of the substrate. The electronic components are disposed on the second surface of the substrate and are electrically connected to the first antenna structure through the substrate.

[0005] In some embodiments, a method for manufacturing an electronic device package includes the following operations: receiving a substrate; forming a plurality of antenna structures on the substrate; and forming a dielectric layer on the substrate to encapsulate the antenna structures. Attached Figure Description

[0006] When with attachment Figure 1 When reading the following detailed description, various aspects of some embodiments of this disclosure can be readily understood from it. Various structures may not be drawn to scale, and the dimensions of various structures may be arbitrarily increased or decreased for clarity of discussion.

[0007] Figure 1 This is a cross-sectional view of an electronic device package according to some embodiments of the present disclosure.

[0008] Figure 1A According to some embodiments of this disclosure Figure 1 A top view of the electronic device package.

[0009] Figure 2 This is a cross-sectional view of an electronic device package according to some embodiments of the present disclosure.

[0010] Figure 2A According to some embodiments of this disclosure Figure 2 A top view of the electronic device package.

[0011] Figure 3 This is a cross-sectional view of an electronic device package according to some embodiments of the present disclosure.

[0012] Figure 4A , Figure 4B , Figure 4C , Figure 4D , Figure 4E , Figure 4F and Figure 4G Operations for manufacturing an electronic device package according to some embodiments of the present disclosure are illustrated.

[0013] Figure 5A , Figure 5B and Figure 5C The operation of manufacturing an antenna structure according to some embodiments of the present disclosure is illustrated. Detailed Implementation

[0014] The following disclosure provides numerous different embodiments or instances for implementing various features of the provided subject matter. Specific examples of components and arrangements are described below to explain certain aspects of this disclosure. Of course, these are merely examples and are not intended to be limiting. For example, in the following description, forming a first feature above or on a second feature may include embodiments in which the first and second features are formed or arranged in direct contact, and may also include embodiments in which additional features are formed and arranged between the first and second features such that the first and second features are not in direct contact. Furthermore, reference numerals and / or letters may be repeated in various instances of this disclosure. Such repetition is for simplicity and clarity and does not in itself indicate a relationship between the various embodiments and / or configurations discussed.

[0015] As used herein, spatial relative terms such as “below,” “under,” “above,” “on top,” “upper,” “lower,” “left,” and “right” may be used for descriptive purposes to describe the relationship between one element or feature as shown in the accompanying drawings and one or more other elements or features. In addition to the orientations depicted in the accompanying drawings, the spatial relative terms are also intended to cover different orientations of the device during use or operation. The device may be oriented in other ways (rotated 90 degrees or in other orientations), and the spatial relative descriptive terms used herein may be interpreted accordingly. It should be understood that when an element is referred to as “connected to” or “coupled to” another element, it may be directly connected to or coupled to the other element, or there may be intermediate elements present.

[0016] This disclosure provides an electronic device package and a method for manufacturing the same. The electronic device package may include, but is not limited to, an antenna device package. The electronic device package may include any electronic device package comprising two heterogeneous substrates or a stack of two heterogeneous structures having different material properties such as coefficient of thermal expansion (CTE), elastic modulus (Young's modulus), dielectric constant (Dk), and dissipation factor (Df).

[0017] Figure 1 This is a cross-sectional view of an electronic device package 1 according to some embodiments of the present disclosure, and Figure 1A According to some embodiments of this disclosure Figure 1 A top view of the electronic device package 1. (See attached image.) Figure 1 and Figure 1AAs shown, the electronic device package 1 includes a first conductive substrate 10, a second conductive substrate 20, and a dielectric layer 30. The electronic device package 1 may include, but is not limited to, an antenna device package. The first conductive substrate 10 has a first coefficient of thermal expansion (CTE) and a first elastic modulus. The first conductive substrate 10 may also be referred to as a substrate, a communication substrate, etc. The first conductive substrate 10 may be a multilayer substrate. For example, the first conductive substrate 10 may be a core substrate including a core layer 12 and a plurality of dielectric films 14 disposed on the opposite side of the core layer 12. The material of the dielectric films 14 may individually comprise an organic material. One or more circuit layers may be formed in and / or between the core layer 12 and the dielectric films 14. The circuit layers may include a first bonding pad 16 exposed from the upper surface 10U and a second bonding pad 18 exposed from the lower surface 10B. In some other embodiments, the first conductive substrate 10 may include a coreless substrate, a semiconductor substrate, or another type of substrate.

[0018] The second conductive substrate 20 is disposed on the upper surface 10U of the first conductive substrate 10 and electrically connected to the first conductive substrate 10. The second conductive substrate 20 may be a pre-formed structure and can be attached to the upper surface 10U of the first conductive substrate 10 via an adhesion layer 32, and electrically connected to the first conductive substrate 10 via a plurality of conductive structures 34. The conductive structures 34 may include solder conductive structures such as solder bumps or solder balls, or non-solder conductive structures such as copper pillars, or combinations thereof. The second conductive substrate 20 and the first conductive substrate 10 are electrically connected via the conductive structures 34. Compared with wire bonding, the conductive structures 34 disposed between the first conductive substrate 10 and the second conductive substrate 20 do not affect antenna performance and do not require additional encapsulation layer thickness to cover the bonding wires. The second conductive substrate has a second CTE and a second elastic modulus. In some embodiments, the first conductive substrate 10 may be more rigid than the second conductive substrate 20, and therefore the first elastic modulus of the first conductive substrate 10 is greater than the second elastic modulus of the second conductive substrate 20. In some embodiments, the ratio between the first elastic modulus of the first conductive substrate 10 and the second elastic modulus of the second conductive substrate 20 is greater than about 1.5 or about 2. In some embodiments, the adhesion layer 32 is softer than the first conductive substrate 10 and the second conductive substrate 20, and therefore the elastic modulus of the adhesion layer 32 is lower than the first elastic modulus and the second elastic modulus. The dimensions (e.g., length and / or width) of the second conductive substrate 20 are smaller than the dimensions of the first conductive substrate 10, and a portion of the upper surface 10U of the first conductive substrate 10 is exposed by the second conductive substrate 20. The second conductive substrate 20 may comprise a plurality of dielectric films 22 and a plurality of conductive layers 24 stacked alternately on top of each other. The material of the dielectric films 22 may individually comprise organic materials. The conductive layers 24 may be electrically connected to or electrically coupled to each other. The second conductive substrate 20 may further comprise bonding pads 26 electrically connected to the conductive layers 24 and exposed from the bottom surface 20B. In some embodiments, the highest conductive layer 24U may be exposed from the upper surface 20U of the second conductive substrate 20. In some embodiments, the second conductive substrate 20 may be configured as an antenna structure. For example, the second conductive substrate 20 may contain a multi-band antenna structure, and the highest conductive layer 24U may be a patch antenna. The second conductive substrate 20 may be referred to as the antenna structure or the first antenna structure. The materials of the conductive layer 24 and the bonding pad 26 may individually contain metals such as copper (Cu), aluminum (Al), silver (Ag), or their alloys.

[0019] The core layer 12 / dielectric film 14, dielectric film 22, and adhesive layer 32 can be heterogeneous materials with different properties. For example, the dielectric constant (Dk) of dielectric film 22 can range from about 2.8 to about 3.4 at a frequency of about 10 GHz and about 2.3 at a frequency of about 60 GHz. The dielectric constant (Dk) of core layer 12 and / or dielectric film 14 can range from about 3.4 to about 3.5 at a frequency of about 10 GHz. The dielectric constant (Dk) of adhesive layer 32 can be about 3.1 at a frequency of about 10 GHz and about 2.3 at a frequency of about 60 GHz. The dissipation factor (Df) of core layer 12 and / or dielectric film 14 ranges from about 0.0016 to about 0.0128 at a frequency of about 10 GHz and about 0.0009 at a frequency of about 60 GHz. The dissipation factor (Df) of dielectric film 22 ranges from about 0.004 to about 0.005 at a frequency of about 10 GHz. The dissipation factor (Df) of adhesion layer 32 can range from about 0.0016 to about 0.0128 at a frequency of about 10 GHz, or about 0.0009 at a frequency of about 60 GHz. The CTE of dielectric film 22 can range from about 19 to about 110. The CTE of core layer 12 and / or dielectric film 14 can range from about 11 to about 13. The CTE of adhesion layer 32 can range from about 70 to about 110. The modulus of dielectric film 22 can range from about 0.4 GPa to about 13 GPa. The elastic modulus of core layer 12 / dielectric film 14 can range from about 25 GPa to about 26 GPa. The modulus of adhesion layer 32 can range from about 0.4 GPa to about 0.75 GPa.

[0020] In some embodiments, the electronic device package 1 may further include an electronic component 50 disposed on the lower surface 10B of the first conductive substrate 10 and electrically connected to the first conductive substrate 10 and the second conductive substrate 20 via a portion of the second bonding pad 18 and a plurality of conductive structures 56. The conductive structures 56 may include solder conductive structures such as solder bumps or solder balls, or non-solder conductive structures such as copper pillars, or combinations thereof. The electronic component 50 may include active components such as semiconductor dies, passive components, or combinations thereof. In some embodiments, the electronic component 50 may include an RFIC (radio frequency integrated circuit). In some embodiments, the electronic device package 1 may further include a plurality of electrical contacts 52 disposed on the lower surface 10B of the first conductive substrate 10 and electrically connected to the first conductive substrate 10 via, for example, another portion of the second bonding pad 18. The electronic device package 1 may be electrically connected to external electronic components, such as printed circuit boards (PCBs), via the electrical contacts 52. The electrical contacts 52 may include solder balls, etc. The electronic component 50 is placed on the lower surface 10B of the first conductive substrate 10 and close to the PCB, thus shortening the heat dissipation path.

[0021] In some embodiments, the electronic device package 1 may further include an encapsulation layer 54 disposed on the lower surface 10B of the first conductive substrate 10 and encapsulating the electronic component 50. The material of the encapsulation layer 54 may include molding materials. The encapsulation layer 54 and the dielectric layer 30 may contain the same or different materials.

[0022] A dielectric layer 30 is disposed on the upper surface 10U of the first conductive substrate 10 and on at least one sidewall 20S of the second conductive substrate 20. The dielectric layer 30 has a third CTE and a third elastic modulus. In some embodiments, a space S is defined between the upper surface 10U of the first conductive substrate 10 and the sidewall 20S of the second conductive substrate 20, and the space exposes a portion of the upper surface 10U of the first conductive substrate 10. The dielectric layer 30 is disposed in the space S and may contact the upper surface 10U of the first conductive substrate 10 and the sidewall 20S of the second conductive substrate 20. In some embodiments, the dielectric layer 30 may surround the sidewall 20S of the second conductive substrate 20, such as... Figure 1A As shown. For example, dielectric layer 30 includes a cavity 30C, and a second conductive substrate 20 is disposed in cavity 30C. In some embodiments, dielectric layer 30 may be arranged symmetrically with respect to the second conductive substrate 20. In some embodiments, the upper surface 20U of the second conductive substrate 20 may be lower than the upper surface 30U of dielectric layer 30. In some other embodiments, the upper surface 20U of the second conductive substrate 20 may be substantially coplanar with or higher than the upper surface 30U of dielectric layer 30. The edge 30E of dielectric layer 30 may be substantially coplanar with the sidewall 10S of first conductive substrate 10. In some embodiments, the material of dielectric layer 30 may include molding materials such as epoxy resin, and fillers such as silicon oxide fillers may be filled in the molding materials.

[0023] The materials of the first conductive substrate 10, the second conductive substrate 20, and the dielectric layer 30 are selected such that the first CTE of the first conductive substrate 10, the second CTE of the second conductive substrate 20, and the third CTE of the dielectric layer 30 are matched. For example, the difference between the first CTE and the second CTE is greater than the difference between the first CTE and the third CTE; that is, the third CTE is closer to the first CTE than the second CTE. The dielectric layer 30 may comprise a low Dk and low Df material. The third elastic modulus of the dielectric layer 30 may be between the first elastic modulus of the first conductive substrate 10 and the second elastic modulus of the second conductive substrate 20.

[0024] Both the dielectric layer 30 and the second conductive substrate 20 are disposed on the upper surface 10U of the first conductive substrate 10. Due to the large difference in CTE between the second conductive substrate 20 and the first conductive substrate 10, stress may occur, leading to warping. The fact that the third CTE of the dielectric layer 30 is close to the first CTE can help compensate for this stress, thereby mitigating warping. Furthermore, the fact that the third elastic modulus of the dielectric layer 30 is between the first elastic modulus of the first conductive substrate 10 and the second elastic modulus of the second conductive substrate 20 can also help withstand deformation, thereby mitigating warping, preventing delamination, and increasing robustness. The material of the dielectric layer 30 is selected to adhere more easily to both the first conductive substrate 10 and the second conductive substrate 20. Therefore, the adhesion force between the dielectric layer 30 and the first conductive substrate 10 is greater than the adhesion force between the second conductive substrate 20 and the first conductive substrate 10, and the adhesion force between the dielectric layer 30 and the second conductive substrate 20 is greater than the adhesion force between the second conductive substrate 20 and the first conductive substrate 10. Therefore, the robustness of the electronic device package 1 can be further enhanced.

[0025] The electronic device packaging and manufacturing method disclosed herein is not limited to the above embodiments and can be implemented according to other embodiments. For the sake of simplicity and ease of comparison between the various embodiments of this disclosure, similar components in the following embodiments are labeled with the same reference numerals and will not be described repeatedly.

[0026] Figure 2 This is a cross-sectional view of an electronic device package 2 according to some embodiments of the present disclosure, and Figure 2A According to some embodiments of this disclosure Figure 2 A top view of the electronic device package 2. (See attached image.) Figure 2 and Figure 2A As shown, with Figure 1Compared to the electronic device package 1, the electronic device package 2 further includes at least one second antenna structure 40 disposed in the dielectric layer 30. The second antenna structure 40 can be electrically connected to a portion of the first bonding pad 16 via a conductive structure 48. The conductive structure 48 may include solder balls, etc. In some embodiments, the first antenna structure (second conductive substrate) 20 and the second antenna structure 40 may include different types of antenna structures. For example, the first antenna structure 20 may include a multi-band antenna structure, and the second antenna structure 40 may include an end-fire antenna structure. The first antenna structure 20 and the second antenna structure 40 may be disposed on the first conductive substrate 10 at substantially the same level. The number of second antenna structures 40 may be modified based on communication requirements. In some embodiments, the second antenna structure 40 may include a T-shaped cross-section. The upper surface 40U of the second antenna structure 40 is exposed from the upper surface 30U of the dielectric layer 30. The upper surface 40U of the second antenna structure 40 may be substantially coplanar with the upper surface 30U of the dielectric layer 30. In some embodiments, the sidewalls 40S of the second antenna structure 40 are substantially coplanar with the edges 30E of the dielectric layer 30. In some embodiments, one or more conductive layers may be embedded in the dielectric layer 30 or partially exposed from the upper surface 30U and / or edge 30E of the dielectric layer 30. The second antenna structure 40 is disposed in the peripheral region of the first conductive substrate 10, and therefore no additional space is required to accommodate the second antenna structure 40. In some embodiments, the upper surface 20U of the second conductive substrate 20 is lower than the upper surface 30U of the dielectric layer 30.

[0027] Figure 3 This is a cross-sectional view of an electronic device package 3 according to some embodiments of the present disclosure. For example... Figure 3 As shown, with Figure 2 Compared to the electronic device package 2, the upper surface 20U of the second conductive substrate 20 is substantially coplanar with the upper surface 30U of the dielectric layer 30. The levels of the upper surfaces 20U and 30U can be modified to improve antenna performance.

[0028] Figure 4A , Figure 4B , Figure 4C , Figure 4D , Figure 4E , Figure 4F and Figure 4G Operations for manufacturing an electronic device package according to some embodiments of the present disclosure are illustrated. For example... Figure 4A As shown, a first substrate 100 is received. The substrate 100 includes a plurality of first conductive substrates 10 prior to single-cutting. As... Figure 4B As shown, the second substrate 200 includes a plurality of second conductive substrates 20 interconnected with each other. Figure 4CAs shown, a plurality of conductive structures 34 are formed on the bonding pad 26. In some embodiments, an adhesive material 31 is formed on the second substrate 200. In some embodiments, the adhesive material 31 is partially removed by, for example, laser drilling to expose the conductive structures 34.

[0029] like Figure 4D As shown, the second substrate 200 is segmented to separate the second conductive substrate 20, and the adhesive material 31 is divided into multiple adhesive layers 32. Figure 4E As shown, a plurality of second conductive substrates 20 are formed on a first substrate 100. In some embodiments, the second conductive substrates 20 are electrically connected to the first substrate 100 via conductive structures 34 and are respectively attached to the first substrate 100 via a plurality of adhesion layers 32. Figure 4F As shown, a dielectric layer 30 is formed on the first substrate 100 to encapsulate the second conductive substrate 20. In some embodiments, prior to forming the dielectric layer 30, a plurality of second antenna structures 40 may be formed on the first substrate and in the vicinity of the second conductive substrate 20.

[0030] like Figure 4G As shown, the first substrate 100 can be flipped. Multiple electronic components 50 can be formed on the lower surface 10B of the first substrate 100, and these multiple electronic components can be electrically connected to the first conductive substrate 10 via multiple conductive structures 56. Multiple electrical contacts 52, such as solder balls, can be formed on the lower surface 10B of the first substrate 100, and these multiple electrical contacts can be electrically connected to the first conductive substrate 10 via second bonding pads 18. An encapsulation layer 54 can be formed on the lower surface 10B of the first substrate 100 to encapsulate the electronic components 50. Then, the first substrate 100 and the dielectric layer 30 are separated to form... Figure 1 , Figure 2 or Figure 3 The electronic device shown is packaged in 1, 2, or 3.

[0031] Figure 5A , Figure 5B and Figure 5C The operation of manufacturing an antenna structure according to some embodiments of this disclosure is illustrated. For example... Figure 5A As shown, a third substrate 300 is received. The third substrate 300 includes a plurality of first conductive units 42 interconnected with each other. The first conductive units 42 may be... Figure 2 This is a portion of the antenna structure 40 shown. The third substrate 300 may contain a plurality of dielectric films 421 and a plurality of conductive layers 422 stacked alternately on top of each other.

[0032] like Figure 5B As shown, a fourth substrate 400 is received. The fourth substrate 400 includes a plurality of second conductive units 44 connected to each other. The second conductive units 44 may be... Figure 2Another part of the antenna structure 40 shown. The fourth substrate 400 may include multiple dielectric films 441 and multiple conductive layers 442 stacked alternately on top of each other. The fourth substrate 400 and the third substrate 300 are bonded to each other by multiple conductive structures 46 such as solder bumps.

[0033] like Figure 5C As shown, the third substrate 300 and the fourth substrate 400 are divided to form a plurality of antenna structures 40. The antenna structures 40 can be formed on the first conductive substrate 10 to form... Figure 2 or Figure 3 The electronic device shown is packaged in 2 or 3.

[0034] In some embodiments of this disclosure, the electronic device package establishes an electrical connection between two conductive substrates (e.g., a communication substrate and an antenna structure) using a conductive structure between the two substrates. This shortens the transmission path of the electrical connection and reduces the overall thickness of the electronic device package. The electronic device package includes a dielectric layer disposed in a space defined between the upper surface of the lower conductive substrate and the sidewall of the upper conductive substrate. The CTE of the dielectric layer being close to that of the lower conductive substrate can help compensate for stress between the pair of conductive substrates, thereby mitigating warpage. Furthermore, the elastic modulus of the dielectric layer being between the elastic moduli of the pair of conductive substrates can help withstand deformation, thereby mitigating warpage, preventing delamination, and increasing robustness. The adhesion between the dielectric layer and the lower conductive substrate is greater than the adhesion between the upper and lower conductive substrates, and the adhesion between the dielectric layer and the upper conductive substrate is greater than the adhesion between the upper and lower conductive substrates. Therefore, the robustness of the electronic device package can be further enhanced. The electronic device package may further include different types of antenna structures disposed in the space to improve antenna performance and communication effectiveness without occupying additional space.

[0035] As used herein, unless the context clearly indicates otherwise, the singular forms “a / an” and “the” may contain plural referents.

[0036] As used herein, the terms “approximately,” “substantially,” “basically,” and “about” are used to describe and explain small variations. When used in conjunction with an event or situation, the terms may refer to instances where the event or situation occurred precisely or instances where the event or situation was close to occurring. For example, when used in conjunction with a numerical value, the terms may refer to a range of variation less than or equal to ±10% of the numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. For example, if the difference between two numerical values ​​is less than or equal to ±10% of the average, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%, then the numerical values ​​may be considered “substantially” the same or equal. For example, "essentially parallel" can refer to an angle range of less than or equal to ±10° relative to 0°, such as less than or equal to ±5°, less than or equal to ±4°, less than or equal to ±3°, less than or equal to ±2°, less than or equal to ±1°, less than or equal to ±0.5°, less than or equal to ±0.1°, or less than or equal to ±0.05°. Similarly, "essentially perpendicular" can refer to an angle range of less than or equal to ±10° relative to 90°, such as less than or equal to ±5°, less than or equal to ±4°, less than or equal to ±3°, less than or equal to ±2°, less than or equal to ±1°, less than or equal to ±0.5°, less than or equal to ±0.1°, or less than or equal to ±0.05°.

[0037] In addition, quantities, ratios, and other numerical values ​​are sometimes presented in range format in this document. It should be understood that this range format is used for convenience and brevity and should be flexibly interpreted to include not only the numerical values ​​that are explicitly specified as the limits of the range, but also all individual numerical values ​​or subranges covered within the range, as if each numerical value and subrange were explicitly specified.

[0038] While this disclosure has been described and illustrated with reference to specific embodiments thereof, such depictions and illustrations are not limiting of this disclosure. Those skilled in the art will understand that various changes may be made and equivalents may be substituted without departing from the spirit and scope of this disclosure as defined by the claims. Illustrations may not necessarily be drawn to scale. There may be differences between artistic representations in this disclosure and actual devices due to manufacturing processes and tolerances. Other embodiments of this disclosure may exist that are not specifically shown. The description and drawings should be considered illustrative rather than restrictive. Modifications may be made to adapt particular circumstances, materials, composition, methods, or processes to the objectives, spirit, and scope of this disclosure. All such modifications are intended to fall within the scope of the appended claims. Although the methods disclosed herein are described with reference to specific operations performed in a particular order, it should be understood that these operations may be combined, subdivided, or rearranged to form equivalent methods without departing from the teachings of this disclosure. Therefore, unless expressly indicated herein, the order and grouping of operations are not a limitation of this disclosure.

Claims

1. An electronic device package, comprising: A first conductive substrate, the first conductive substrate having a first coefficient of thermal expansion CTE; A second conductive substrate is disposed on the upper surface of the first conductive substrate and electrically connected to the first conductive substrate, the second conductive substrate having a second CTE, wherein the first elastic modulus of the first conductive substrate is greater than the second elastic modulus of the second conductive substrate; as well as A dielectric layer disposed on the upper surface of the first conductive substrate and on at least one sidewall of the second conductive substrate, the dielectric layer having a third CTE, wherein the difference between the first CTE and the second CTE is greater than the difference between the first CTE and the third CTE.

2. The electronic device package of claim 1, wherein the third elastic modulus of the dielectric layer is between the first elastic modulus and the second elastic modulus.

3. The electronic device package according to claim 1, further comprising an adhesion layer located between the first conductive substrate and the second conductive substrate.

4. The electronic device package of claim 1, wherein the dielectric layer surrounds the sidewall of the second conductive substrate.

5. The electronic device package of claim 1, wherein the first conductive substrate comprises a communication substrate.

6. The electronic device package of claim 1, wherein the second conductive substrate includes at least one first antenna structure.

7. The electronic device package according to claim 6, wherein the first antenna structure includes a multi-band antenna structure.

8. The electronic device package of claim 6, further comprising at least one second antenna structure disposed in the dielectric layer.

9. The electronic device package of claim 8, wherein the sidewall of the second antenna structure is substantially coplanar with the edge of the dielectric layer.

10. The electronic device package of claim 1, further comprising a plurality of conductive structures disposed between the first conductive substrate and the second conductive substrate and electrically connecting the first conductive substrate to the second conductive substrate.

11. The electronic device package of claim 1, further comprising an electronic component disposed on a lower surface of the first conductive substrate and electrically connected to the first conductive substrate.

12. The electronic device package of claim 11, further comprising electrical contacts disposed on the lower surface of the first conductive substrate and electrically connected to the first conductive substrate.

13. The electronic device package of claim 11, further comprising an encapsulation layer disposed on the lower surface of the first conductive substrate and encapsulating the electronic component.

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