Display device

Abstract

A display device includes a first data line extending from a first peripheral area into a display area, a second data line extending from a second peripheral area into the display area, a pixel electrode, a second input line disposed in the first peripheral area, and a connection line having a first end portion electrically connected to the second data line in the second peripheral area and a second end portion electrically connected to the second input line in the first peripheral area. The connection line passes through the display area by extending over the first data line while not contacting the first data line, and at least a portion of the connection line includes the same material as the pixel electrode.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2019-0127867, filed with the Korean Intellectual Property Office on October 15, 2019, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] Exemplary embodiments relate to display devices, and more specifically, to display devices in which non-display areas can be reduced and high-quality images can be achieved. Background Technology

[0004] Generally, display devices such as organic light-emitting diode (OLED) devices include thin-film transistors arranged in each of a plurality of pixels for controlling the brightness of each pixel. For example, the thin-film transistors control the brightness of the corresponding pixel in response to a transmitted data signal.

[0005] Data signals are transmitted to pixels from the driving section in the peripheral area outside the display area through multiple data lines.

[0006] Referring to the display device of the comparative example, the driving part may occupy a large area of ​​the display device, or the area between the driving part and the display area of ​​the display device may be large, which may result in the amount of invalid space in which the image cannot be displayed on the display device becoming too large. Summary of the Invention

[0007] According to an exemplary embodiment, a display device is provided for achieving high-quality images while reducing non-display areas (e.g., invalid spaces).

[0008] According to an exemplary embodiment, a display device includes a substrate, the substrate including a display area, a first peripheral area disposed outside the display area, and a second peripheral area disposed outside the display area and the first peripheral area. The display device further includes a first data line disposed on the substrate and extending from the first peripheral area to the display area, a second data line disposed on the substrate and extending from the second peripheral area to the display area, and a third data line disposed on the substrate and extending from the second peripheral area to the display area. The second data line is disposed between the first data line and the third data line. The display device further includes a pixel electrode. The display device further includes a first input line, a second input line, and a third input line disposed in the first peripheral area and spaced apart from each other; and a first connecting line having a first end and a second end (e.g., Figure 3 and Figure 4The first connecting line (CL2) is electrically connected at one end to a second data line in the second peripheral region and at the other end to a second input line in the first peripheral region. The first connecting line passes through the display area by extending over the first data line without contacting it. At least a portion of the first connecting line comprises the same material as the pixel electrode.

[0009] In an exemplary embodiment, a portion of the first connection line is a portion extending over the first data line.

[0010] In an exemplary embodiment, a portion of the first connection line extending above the first data line has the same layer structure as the pixel electrode.

[0011] In an exemplary embodiment, the first connecting line includes a first portion having a first end connected to a second data line in a second peripheral region. The first portion is disposed on the same layer as the second data line and extends into the display area. The first connecting line further includes a second portion having a second end connected to the first portion. The second portion extends over the first data line without contacting it and comprises the same material as the pixel electrode. The first connecting line further includes a third portion having a second end connected to the second end of the second portion. The second end of the third portion is electrically connected to a second input line in the first peripheral region.

[0012] In an exemplary embodiment, the first end of the second portion is connected to the second end of the first portion through a contact hole formed in an insulating layer disposed between the first portion and the second portion.

[0013] In an exemplary embodiment, a contact hole is provided in the display area.

[0014] In an exemplary embodiment, the first part and the second data line are integrally formed into a single unit.

[0015] In an exemplary embodiment, the second part has the same layer structure as the pixel electrode.

[0016] In an exemplary embodiment, the third portion is disposed on the same layer as the second input line.

[0017] In an exemplary embodiment, the second end of the second part is disposed above the first end of the third part and is connected to the first end of the third part through a contact hole formed in an insulating layer disposed between the second part and the third part.

[0018] In an exemplary embodiment, a contact hole is provided in the display area.

[0019] In an exemplary embodiment, the third portion and the second input line are integrally formed into a single unit.

[0020] In an exemplary embodiment, the second input line is disposed on the same layer as the second data line.

[0021] In an exemplary embodiment, the display device further includes: a second connecting line having a first end and a second end (e.g., Figure 3 and Figure 4 The second connecting line (CL3) is electrically connected at its first end to a third data line in the second peripheral region, and at its second end to a third input line in the first peripheral region. The second connecting line passes through the display area by extending over the first and second data lines without contacting them. At least a portion of the second connecting line comprises the same material as the pixel electrode.

[0022] In an exemplary embodiment, a portion of the second connection line is an extension that extends over the first data line and the second data line.

[0023] In an exemplary embodiment, a portion of the second connection line extending above the first and second data lines has the same layer structure as the pixel electrode.

[0024] In an exemplary embodiment, a portion of the second connecting line extending over the first data line and the second data line is closer to the first peripheral region than a portion of the first connecting line extending over the first data line.

[0025] In an exemplary embodiment, the length of the second connecting line, which includes a portion of the same material as the pixel electrode, is greater than the length of the first connecting line, which includes a portion of the same material as the pixel electrode.

[0026] In an exemplary embodiment, the display device further includes a thin-film transistor disposed on a substrate in the display area and including a source electrode and a drain electrode. The first data line to the third data line are disposed on the same layer as the source electrode and the drain electrode.

[0027] According to an exemplary embodiment, the display device further includes a thin-film transistor disposed on a substrate in the display area and including a source electrode and a drain electrode. First data lines to third data lines are disposed on an insulating layer covering the source electrode and the drain electrode.

[0028] According to an exemplary embodiment, a display device includes: a first data line extending from a first peripheral region to a display region; a second data line extending from a second peripheral region to the display region; pixel electrodes disposed on the first and second data lines; an input line disposed in the first peripheral region; and a connecting line having a first end and a second end. The first end is electrically connected to the second data line in the second peripheral region, and the second end is electrically connected to the input line in the first peripheral region. The connecting line passes through the display region by extending over the first data line without contacting it. At least a portion of the connecting line comprises the same material as the pixel electrode. Attached Figure Description

[0029] The above and other features of this disclosure will become more apparent from the detailed description of exemplary embodiments thereof with reference to the accompanying drawings, in which:

[0030] Figure 1 This is a schematic plan view of a part of a display device according to an exemplary embodiment.

[0031] Figure 2 This is according to an exemplary embodiment. Figure 1 A schematic side view of the display device.

[0032] Figure 3 This is according to an exemplary embodiment. Figure 1 A schematic diagram of the data lines, connecting lines, and input lines of a display device.

[0033] Figure 4 This is according to an exemplary embodiment. Figure 3 A schematic enlarged plan view of the area.

[0034] Figure 5 According to the exemplary embodiments, along Figure 4 A cross-sectional view of a portion of the region cut by line VV.

[0035] Figure 6 This is a schematic cross-sectional view of a part of a display device according to an exemplary embodiment.

[0036] Figure 7 This is a schematic cross-sectional view of a part of a display device according to an exemplary embodiment.

[0037] Figure 8 This is a schematic plan view of a part of a display device according to an exemplary embodiment.

[0038] Figure 9 This is a schematic plan view of a part of a display device according to an exemplary embodiment.

[0039] Figure 10This is a schematic plan view of a part of a display device according to an exemplary embodiment.

[0040] Figure 11 This is a schematic plan view of a part of a display device according to an exemplary embodiment.

[0041] Figure 12 This is a schematic cross-sectional view of a part of a display device according to an exemplary embodiment.

[0042] Figure 13 This is a schematic cross-sectional view of a part of a display device according to an exemplary embodiment. Detailed Implementation

[0043] In the following description, exemplary embodiments will be described more fully with reference to the accompanying drawings. Throughout the drawings, the same reference numerals may refer to the same elements.

[0044] As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. Throughout the disclosure, the expression “at least one of a, b, and c” indicates only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof.

[0045] It will be understood that when a component, such as a membrane, region, layer, or element, is referred to as being “on,” “connected to,” “coupled to,” or “adjacent to” another component, the component may be directly on, directly connected to, directly coupled to, or directly adjacent to the other component, or there may be intermediate components present. It will also be understood that when a component is referred to as being “between” two components, the component may be the only component between the two components, or there may be one or more intermediate components present. It will also be understood that when a component is referred to as “covering” another component, the component may be the only component covering the other component, or one or more intermediate components may also cover the other component. Other terms used to describe relationships between components should be interpreted in the same manner.

[0046] In the exemplary embodiments described below, the x-axis, y-axis, and z-axis are not limited to three axes in an orthogonal coordinate system, and can be interpreted as indicating a broader concept that includes three axes in an orthogonal coordinate system. For example, the x-axis, y-axis, and z-axis may be orthogonal to each other, or may be in different directions in which the x-axis, y-axis, and z-axis do not intersect each other at right angles.

[0047] For ease of description, spatial relative terms such as “below,” “under,” “down,” “below,” “above,” and “above” may be used herein to describe the relationship between one element or feature and another element(s) as illustrated in the accompanying drawings. It will be understood that, in addition to the orientations depicted in the drawings, the spatial relative terms are intended to cover different orientations of the device in use or operation. For example, if the device in the drawings is flipped, an element described as “below,” “under,” or “below” other elements or features will then be positioned “above” other elements or features. Thus, the exemplary terms “below” and “below” can cover both above and below orientations.

[0048] It will be understood that the terms “first,” “second,” “third,” etc., are used herein to distinguish one element from another, and the elements are not limited by these terms. Thus, a “first” element in an exemplary embodiment may be described as a “second” element in another exemplary embodiment.

[0049] It should be understood that the description of features or aspects within each exemplary embodiment should generally be considered applicable to other similar features or aspects in other exemplary embodiments, unless the context explicitly indicates otherwise.

[0050] As used in this article, the singular forms “a” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0051] In this document, as will be understood by those skilled in the art, when two components or directions are described as extending substantially parallel or perpendicular to each other, the two components or directions extend precisely parallel or perpendicular to each other, or approximately parallel or perpendicular to each other within measurement error. Furthermore, as will be understood by those skilled in the art, when two or more processes are described as being performed or occurring substantially at the same time, it will be understood that the processes can be performed or occurring precisely at the same time or approximately at the same time. For example, as will be understood by those skilled in the art, the processes can be performed or occurring approximately at the same time within measurement error.

[0052] Figure 1 This is a plan view of a portion of a schematically illustrated display device according to an exemplary embodiment, and Figure 2 This is a schematic illustration according to an exemplary embodiment. Figure 1 A side view of the display device. The display device according to an exemplary embodiment may have a curved portion (e.g., a bendable portion). This portion may be referred to as a bendable portion. However, for ease of illustration, in Figure 1 The diagram shows the flexible section when it is not bent.

[0053] The display device may include a display panel 10. The display device may include any type of display device that includes the display panel 10. For example, the display device may include various products such as smartphones, tablets, laptops, televisions, or billboards.

[0054] Display panel 10 may include a display area DA and a peripheral area PA outside the display area DA. The peripheral area PA may include a first peripheral area PA1 on one side outside the display area DA (in the Y-axis direction), and a second peripheral area PA2 also on one side outside the display area DA (in the Y-axis direction) and outside the first peripheral area PA1. The second peripheral area PA2 may be located outside the first peripheral area PA1 (in the X-axis direction) and does not overlap with the first peripheral area PA1. For example, based on the first peripheral area PA1, the second peripheral area PA2 may be located in the direction toward the edge of the display panel 10 (X-axis direction) rather than in the direction toward the center of the display panel 10. For example, the second peripheral area PA2 may be positioned closer to the edge of the display panel 10 than the first peripheral area PA1. In an exemplary embodiment, the first peripheral area PA1 is located outside the display area DA in the direction toward the center of the display panel 10, and the second peripheral area PA2 may be located outside the display area DA on both sides of the first peripheral area PA1 adjacent to the opposite edge of the display panel 10 (and therefore, closer to the opposite edge of the display panel 10 than the first peripheral area PA1).

[0055] Because the display panel 10 includes a substrate 100 (see...) Figure 5 Therefore, the substrate 100 can also be described as including the display area DA, the first peripheral area PA1, and the second peripheral area PA2 as described above. In the following text, for ease of explanation, the substrate 100 will be described as including the display area DA, the first peripheral area PA1, and the second peripheral area PA2.

[0056] It can also be described as a display panel 10 including a main area MR, a curved area BR outside the main area MR, and a sub-area SR located opposite the main area MR, with the curved area BR located between the main area MR and the sub-area SR. For example... Figure 2 As illustrated, the display panel 10 can be bent within the bending region BR. Therefore, as... Figure 2As illustrated, when viewed from the Z-axis direction, at least a portion of the sub-region SR can overlap with the main region MR. However, this disclosure is not limited to curved / flexible display devices, and can also be applied to non-curved / inflexible display devices. The sub-region SR may include non-display areas as described below. Because the display panel 10 is curved in the curved region BR, the non-display areas of the display device may be invisible to the user when viewed from the front surface towards the Z-axis direction, or, even if the non-display areas of the display device are visible to the user, the area of ​​the visible non-display areas may be reduced.

[0057] The driver chip 20 can be arranged in a sub-region SR of the display panel 10. The driver chip 20 may include an integrated circuit for driving the display panel 10. The integrated circuit may include, for example, a data driver integrated circuit for generating data signals. However, this disclosure is not limited thereto.

[0058] The driver chip 20 can be mounted in a sub-region SR of the display panel 10. The driver chip 20 can be mounted on the same plane as the display surface of the display area DA. However, when the curved area BR is bent, the plane on which the driver chip 20 is mounted can change relative to the plane of the display surface of the display area DA. For example, when the display panel 10 is bent in the curved area BR as described above, the driver chip 20 can be located on the rear surface of the main area MR.

[0059] The printed circuit board 30 can be coupled to the end of the sub-region SR of the display panel 10. The printed circuit board 30 can be electrically connected to the driver chip 20 through the pads of the substrate 100.

[0060] Display panel 10 may include substrate 100. Substrate 100 may include, for example, glass, metal, or polymer resin. As described above, display panel 10 may be bent / flexible in the bending region BR. In this case, substrate 100 may be flexible or bendable. For example, in this case, substrate 100 may include polymer resin such as polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, or cellulose acetate propionate. However, this disclosure is not limited thereto and various modifications can be made. For example, substrate 100 may have a multilayer structure comprising two layers containing the polymer resin described above and a barrier layer disposed between the two layers, the barrier layer comprising an inorganic material (e.g., silicon oxide, silicon nitride, silicon oxynitride, etc.).

[0061] Figure 3 This is a schematic illustration based on an exemplary embodiment. Figure 1 A conceptual diagram of the data cables, connecting cables, and input cables of a display device. Figure 4This is a schematic illustration based on an exemplary embodiment. Figure 3 An enlarged plan view of the area, and Figure 5 According to the exemplary embodiments, along Figure 4 A cross-sectional view of a portion of the region cut by line VV.

[0062] Various signals can be applied to the display area DA. For example, data signals used to adjust the brightness of each pixel can be applied to the display area DA. For this purpose, such as... Figure 3 As schematically illustrated, various lines, such as data lines DL1 to DL5 extending substantially parallel to each other, can be located inside and outside the display area DA of the substrate 100. It will be understood that, in addition to data lines DL1 to DL5, additional signal lines, such as power lines or scan lines, can also be located inside and outside the display area DA.

[0063] A first data line DL1 can extend from a first peripheral region PA1 into a display region DA. Therefore, in an exemplary embodiment, the first data line DL1 is disposed in the first peripheral region PA1 and in the display region DA, but not in the second peripheral region PA2. A second data line DL2 can extend from the second peripheral region PA2 into the display region DA. Therefore, in an exemplary embodiment, the second data line DL2 can be disposed in the second peripheral region PA2 and in the display region DA, but not in the first peripheral region PA1. A third data line DL3 can also extend from the second peripheral region PA2 into the display region DA. Therefore, in an exemplary embodiment, the third data line DL3 can be disposed in the second peripheral region PA2 and in the display region DA, but not in the first peripheral region PA1. The third data line DL3 can be located opposite the first data line DL1, while the second data line DL2 is disposed between the third data line DL3 and the first data line DL1.

[0064] To input data signals to data lines DL1 to DL5, the separately configured input lines can be located in the first peripheral area PA1. For example, the first input line IL1 can be electrically connected to the first data line DL1, the second input line IL2 can be electrically connected to the second data line DL2, and the third input line IL3 can be electrically connected to the third data line DL3. The first input line IL1 can be integrated with the first data line DL1, such as... Figure 3 and Figure 4 As shown. For example, the first input line IL1 and the first data line DL1 can be integrally formed as a single unit. However, this disclosure is not limited thereto. The second input line IL2 can be electrically connected to the second data line DL2 via the second connecting line CL2, and the third input line IL3 can be electrically connected to the third data line DL3 via the third connecting line CL3.

[0065] The second connection line CL2 may have a first end electrically connected to a second data line DL2 in the second peripheral region PA2 and a second end electrically connected to a second input line IL2 in the first peripheral region PA1. The second connection line CL2 can extend through the display region DA without contacting the first data line DL1. Here, at least a portion of the second connection line CL2 may include a pixel electrode 311 as described below (see [link to pixel electrode 311]). Figure 5 The material included in the first data line DL1 is the same material. For example, in an exemplary embodiment, a portion of the second connection line CL2 (e.g., a portion extending over the first data line DL1) may include the same material included in the pixel electrode 311.

[0066] Furthermore, a portion of the second connection line CL2 (e.g., a portion extending over the first data line DL1) may have the same layer structure as the pixel electrode 311. Here, having the same layer structure can mean that when the pixel electrode 311 has a transparent conductive layer including ITO, IZO, or In2O3 and a reflective conductive layer including Al, the portion of the second connection line CL2 (e.g., a portion extending over the first data line DL1) may also have a transparent conductive layer including ITO, IZO, or In2O3 and a reflective conductive layer including Al. This can be because the portion of the second connection line CL2 (e.g., a portion extending over the first data line DL1) can be formed simultaneously with the pixel electrode 311 using the same material. For example, the portion of the second connection line CL2 (e.g., a portion extending over the first data line DL1) and the pixel electrode 311 can be formed substantially at the same time using the same material. This aspect is the same in the exemplary embodiments described below and in the exemplary embodiments modified from the exemplary embodiments described below.

[0067] In this document, the second connecting line CL2 is described in detail. The second connecting line CL2 may include the first part P1 to the third part P3, as follows: Figure 4 As shown.

[0068] The first end of the first portion P1 can be connected to the second data line DL2 in the second peripheral area PA2. Additionally, the first portion P1 can be located on the same layer as the second data line DL2 (e.g., directly on the same layer) and can extend into the display area DA. Accordingly, the first portion P1 can be connected to the second data line DL2, which has a substantially linear shape. Figure 4 The diagram illustrates that the first part P1 and the second data line DL2 constitute a whole. For example, the first part P1 and the second data line DL2 are considered as a single entity within the overall terrain.

[0069] The first end of the second part P2 can be connected to the second end of the first part P1. For example, the first end of the second part P2 can be connected to the second end of the first part P1 through the first contact hole CT1 in the insulating layer (planarization layer 140) between the first part P1 and the second part P2, as shown. Figure 5 As shown in the diagram, the first contact hole CT1 can be located in the display area DA. Additionally, the second portion P2 can extend over the first data line DL1 without contacting it, and can comprise the same material as that included in the pixel electrode 311. For example, the second portion P2 can have the same layer structure as the pixel electrode 311.

[0070] The first end of the third part P3 can be connected to the second end of the second part P2. The second end of the second part P2 can be located above the first end of the third part P3, and can be connected to the first end of the third part P3 through the second contact hole CT2 in the insulating layer (planarization layer 140) between the second part P2 and the third part P3. The second contact hole CT2 can be located in the display area DA. In addition, the second end of the third part P3 can be electrically connected to the second input line IL2 in the first peripheral area PA1. Figure 4 The illustration shows that the third part P3 is located on the same layer as the second input line IL2 (e.g., directly on the same layer), and the third part P3 and the second input line IL2 constitute a whole (e.g., the third part P3 and the second input line IL2 are integrally formed into a single unit).

[0071] The second input line IL2 can be located on the same layer as the second data line DL2 (e.g., directly on the same layer), such as Figure 3 and Figure 4 The figures are shown in the illustration. However, this disclosure is not limited thereto. For example, in an exemplary embodiment, the second input line IL2 and the second data line DL2 may be located on different layers.

[0072] The third connecting line CL3, which electrically connects the third input line IL3 to the third data line DL3, may have the same and / or substantially the same shape as the second connecting line CL2. For example, one end of the third connecting line CL3 may be electrically connected to the third data line DL3 in the second peripheral region PA2. Alternatively, the third connecting line CL3 may extend over the first data lines DL1 and DL2 without contacting them. Another end of the third connecting line CL3 may be electrically connected to the third input line IL3 in the first peripheral region PA1. At least a portion of the third connecting line CL3 may include the same material as that included in the pixel electrode 311. For example, a portion of the third connecting line CL3 (e.g., a portion extending over the first data lines DL1 and DL2) may include the same material as that included in the pixel electrode 311. Further, a portion of the third connecting line CL3 (e.g., a portion extending over the first data lines DL1 and DL2) may have the same layer structure as the pixel electrode 311.

[0073] Although not indicated by reference numerals in the accompanying drawings for ease of illustration, the third connecting line CL3 may have portions corresponding to the first portions P1 to the third portions P3 of the second connecting line CL2, respectively. The description of the first portions P1 to the third portions P3 of the second connecting line CL2 can be applied to such corresponding portions of the third connecting line CL3.

[0074] like Figure 3 and Figure 4As shown, in the case of the display device according to the exemplary embodiment, the area of ​​the unused space around the edge of the display area DA can be significantly reduced. The first data line DL1, located relative to the second data line DL2 or the third data line DL3 in the direction toward the center of the display panel 10, can be directly connected to the first input line IL1 (e.g., connected to the first input line IL1 without using a separate connecting line). However, the second data line D2 or the third data line DL3, located relative to the first data line DL1 in the direction toward the edge of the display panel 10, is not directly connected to the second input line IL2 or the third input line IL3. Instead, the second data line D2 or the third data line D3 can be connected to the second input line IL2 or the third input line IL3 via the second connecting line CL2 or the third connecting line CL3 extending through the display area DA. Accordingly, the second input line IL2 and the third input line IL3 are not located near the second data line DL2 and the third data line DL3 (e.g., not located in the same area as the second data line DL2 or the third data line DL3). Instead, the second input line IL2 and the third input line IL3 can be located relatively at the center of the display panel 10. With this structure, the area of ​​the unused space around the edge of the display area DA can be significantly reduced. For example, in an exemplary embodiment, the second data line D2 and the third data line D3 are respectively connected to the second input line IL2 and the third input line IL3, which are located near the center of the display panel 10, and the second data line D2 and the third data line D3 are not located near the center of the display panel 10 (e.g., not near the center of the display panel 10 compared to the second input line IL2 and the third input line IL3).

[0075] According to an exemplary embodiment, as described above, among the multiple data lines (e.g., data lines DL1 to DL5) located in the display area DA of the display panel 10, the data line located near the center of the display panel 10 can be directly connected to the corresponding input line located in the peripheral area PA, and another data line(s) located away from the center of the display panel 10 and closer to the edge of the display panel 10 can be connected to the corresponding input line located in the peripheral area PA via a connecting line extending through the display area DA.

[0076] like Figure 3 and Figure 4As shown, a portion of the third connecting line CL3 extending over the first data line DL1 and the second data line DL2 can be closer to the first peripheral region PA1 than a portion of the second connecting line CL2 (the second portion P2 extending over the first data line DL1). Since the portion of the third connecting line CL3 extending over both data lines DL1 and DL2 extends over both data lines DL1 and DL2, this portion can have a longer length than the second portion P2 of the second connecting line CL2 that extends only over one data line DL1. For example, the length of a portion of the third connecting line CL3 (including a portion of the same material included in the pixel electrode 311) can be greater than the length of the second portion P2 of the second connecting line CL2 (the second portion P2 includes the same material included in the pixel electrode 311).

[0077] However, since the portion of the third connecting line CL3 extending over the first data line DL1 and the second data line DL2 is closer to the first peripheral region PA1 than the portion of the second connecting line CL2 extending over the first data line DL1 (the second portion P2), the total length of the third connecting line CL3 and the total length of the second connecting line CL2 can be substantially the same. Based on this structure, when connecting lines are used for the second data line DL2 and the third data line DL3, the path length of each of the second data line DL2 and the third data line DL3 from their corresponding input line to their corresponding data line can be substantially the same.

[0078] Furthermore, in the case of the first data line DL1, the fourth data line DL4, and the fifth data line DL5, even if... Figure 3 and Figure 4 When these data lines can be implemented without connecting lines as illustrated, in an exemplary embodiment, connecting lines extending through the display area DA can still be intentionally used to connect the first data line DL1, the fourth data line DL4, and the fifth data line DL5 to the input lines. Based on this structure, the data lines can be connected to the input lines respectively via connecting lines, and all connecting lines can have substantially the same length. However, in this case, the connecting lines connecting the first data line DL1, the fourth data line DL4, and the fifth data line DL5 can extend through a deeper area of ​​the display area DA than the third connecting line CL3 or the second connecting line CL2.

[0079] In the following text, display device 310 and device references electrically connected to display device 310 are used. Figure 5 The spatial relationship between data lines DL1 and DL2 and the second connecting line CL2 is described.

[0080] like Figure 5 The diagram in the image shows... Figure 5The schematic diagram illustrates the following along Figure 4 A cross-sectional view of a portion of the area taken by line VV, in addition to the display device 310, the thin-film transistor 210 electrically connected to the display device 310 may be located in the display area DA of the substrate 100. Figure 5 The illustration shows that the display device 310 is implemented as an organic light-emitting device located in the display area DA. The organic light-emitting device is electrically connected to the thin-film transistor 210 via a pixel electrode 311.

[0081] The thin-film transistor 210 may include a semiconductor layer 211, a gate electrode 213, a source electrode 215a, and a drain electrode 215b. The semiconductor layer 211 may include, for example, amorphous silicon, polycrystalline silicon, or an organic semiconductor material. The gate electrode 213 may include various conductive materials and have various layer structures. For example, the gate electrode 213 may include a Mo layer and an Al layer. The source electrode 215a and the drain electrode 215b may also include various conductive materials and have various layer structures. For example, the source electrode 215a and the drain electrode 215b may include a Ti layer and an Al layer.

[0082] To achieve insulation between the semiconductor layer 211 and the gate electrode 213, a first gate insulating layer 121 comprising an inorganic material such as silicon oxide, silicon nitride, and / or silicon oxynitride may be included between the semiconductor layer 211 and the gate electrode 213. Furthermore, a first interlayer insulating layer 131 comprising an inorganic material such as silicon oxide, silicon nitride, and / or silicon oxynitride may be disposed on the gate electrode 213, and a source electrode 215a and a drain electrode 215b may be disposed on the first interlayer insulating layer 131. The insulating layers 121 and 131 comprising inorganic materials can be formed using, for example, chemical vapor deposition (CVD) or atomic layer deposition (ALD). This aspect is the same in the exemplary embodiments described below and in the exemplary embodiments modified from the exemplary embodiments described below.

[0083] A buffer layer 110, comprising an inorganic material such as silicon oxide, silicon nitride, and / or silicon oxynitride, may be disposed between the thin-film transistor 210 having the structure described above and the substrate 100. The buffer layer 110 may enhance the planarization of the upper surface of the substrate 100, or may prevent or reduce the penetration of impurities from the substrate 100 into the semiconductor layer 211 of the thin-film transistor 210.

[0084] Additionally, the planarization layer 140 can be disposed on the thin-film transistor 210. For example, as... Figure 5As illustrated, when an organic light-emitting device is disposed on a thin-film transistor 210, the planarization layer 140 can substantially planarize the upper portion of the protective layer (not shown) covering the thin-film transistor 210. The planarization layer 140 may comprise organic materials such as acrylic acid, benzocyclobutene (BCB), or hexamethyldisiloxane (HMDSO). Although in Figure 5 The planarization layer 140 is illustrated as a single layer, but this disclosure is not limited thereto. For example, in an exemplary embodiment, the planarization layer 140 may include multiple layers. Similarly, various other modifications may be made to the exemplary embodiment.

[0085] The display device 310 may be located on the planarization layer 140 in the display area DA of the substrate 100. The display device 310 may be, for example, an organic light-emitting device (OLED), which includes a pixel electrode 311, a counter electrode 315, and an intermediate layer 313 disposed between the pixel electrode 311 and the counter electrode 315 and including an emission layer. Figure 5 As illustrated, pixel electrode 311 can be electrically connected to thin-film transistor 210 by contacting either source electrode 215a or drain electrode 215b through an opening formed in planarization layer 140.

[0086] The pixel defining layer 150 can be disposed on the planarization layer 140. The pixel defining layer 150 can have an opening corresponding to each sub-pixel, for example, an opening to expose at least the central portion of the pixel electrode 311, thereby defining the pixel. Additionally, as... Figure 5 As illustrated, the pixel defining layer 150 can increase the distance between the edge of the pixel electrode 311 and the counter electrode 315 above the pixel electrode 311, thereby preventing, for example, the occurrence of electric arcing at the edge of the pixel electrode 311. The pixel defining layer 150 may include organic materials such as polyimide or HMDSO.

[0087] The intermediate layer 313 of the organic light-emitting device may comprise a low molecular weight material or a high molecular weight material. When the intermediate layer 313 comprises a low molecular weight material, it may have a stacked structure comprising any one or a combination of hole injection layers (HIL), hole transport layers (HTL), emission layers (EML), electron transport layers (ETL), and electron injection layers (EIL), and the intermediate layer 313 may be formed using, for example, vacuum deposition. When the intermediate layer 313 comprises a high molecular weight material, it may have a structure comprising HTL and EML. Here, HTL may comprise poly(3,4-ethylenedioxythiophene) (PEDOT), and EML may comprise high molecular weight materials such as polyphenylene acetylene and polyfluorene. The intermediate layer 313 may be formed using, for example, screen printing, inkjet printing, laser-induced thermal imaging (LITI), etc. However, the intermediate layer 313 is not limited thereto and may have various structures. Alternatively, the intermediate layer 313 may include a layer that is formed as a single entity across the entire plurality of pixel electrodes 311, or it may include a layer patterned to correspond to the plurality of pixel electrodes 311 respectively.

[0088] The counter electrode 315 can be arranged in and cover the display area DA. For example, the counter electrode 315 can be integrally formed across multiple organic light-emitting devices and can correspond to multiple pixel electrodes 311. The counter electrode 315 can cover the display area DA and can extend to the peripheral area PA outside the display area DA.

[0089] In an exemplary embodiment, the encapsulation layer may cover the organic light-emitting device to protect it from damage such as external water or moisture. The encapsulation layer may cover the display area DA and may extend to at least a portion of the peripheral area PA. The encapsulation layer may include, for example, a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer.

[0090] Data lines DL1 to DL5 can be located on the same layer as the source electrode 215a and drain electrode 215b of the thin-film transistor 210 (e.g., directly on the same layer). Accordingly, the first data lines DL1 to the fifth data lines DL5 can comprise the same material included in the source electrode 215a and drain electrode 215b, and the first data lines DL1 to the fifth data lines DL5 can have the same layer structure as the source electrode 215a and drain electrode 215b. Pixel electrode 311 can be located on planarization layer 140, which is an insulating layer that covers not only the source electrode 215a and drain electrode 215b but also the first data lines DL1 to the fifth data lines DL5. Therefore, pixel electrode 311 can be disposed on the first data lines DL1 to the fifth data lines DL5 (while planarization layer 140 is disposed between pixel electrode 311 and the first data lines DL1 to the fifth data lines DL5). Therefore, a portion of the connection line including the second connection line CL2 can be located on planarization layer 140. In the case of the second connection line CL2, the second portion P2 can be located on the planarization layer 140. The second portion P2 is located in the display area DA, and therefore, the counter electrode 315 covers the upper portion of the second portion P2.

[0091] However, this disclosure is not limited to the configuration described above, and various modifications can be made according to exemplary embodiments. For example, such as Figure 6 As shown in the diagram, Figure 6 This is a cross-sectional view of a portion of a schematically illustrated display device according to an exemplary embodiment. A second interlayer insulating layer 132, comprising an inorganic material such as silicon oxide, silicon nitride, and / or silicon oxynitride, may cover the source electrode 215a and drain electrode 215b on a first interlayer insulating layer 131, and a first data line DL1 and a second data line DL2 may be located on the second interlayer insulating layer 132. In this case, the power lines may be located on the same layer as the source electrode 215a and drain electrode 215b (e.g., directly on the same layer), or on the same layer as the first data line DL1 and the second data line DL2 (e.g., directly on the same layer). Alternatively, in an exemplary embodiment, some of the data lines may be located on the first interlayer insulating layer 131, and other data lines may be located on the second interlayer insulating layer 132.

[0092] Unlike according to Figure 6 An exemplary embodiment, in accordance with Figure 7 In an exemplary embodiment, Figure 7This is a cross-sectional view of a schematically illustrated display device, showing that all of the first data line DL1 and the second data line DL2, the first portion P1 and the third portion P3 of the second connecting line CL2, and the source electrode 215a and the drain electrode 215b can be located on the second interlayer insulating layer 132. In this case, the electrodes of the power supply line or capacitor can be located between the first interlayer insulating layer 131 and the second interlayer insulating layer 132.

[0093] refer to Figure 4 In an exemplary embodiment, it is described that input lines IL1 to IL5 are located on the same layer as data lines DL1 to DL5. However, this disclosure is not limited thereto. For example, in... Figure 8 In the exemplary embodiment illustrated herein, Figure 8 This is a schematic diagram showing a portion of a display device, where the first input lines IL1 to IL5 may be located below the first data lines DL1 to DL5. For example, the first input lines IL1 to IL5 may be located on the same layer as, for example, the gate electrode 213 (e.g., directly on the same layer) (see [reference]). Figure 5 In this case, the connecting wire can be electrically connected to the corresponding input wire via a contact hole formed in the first interlayer insulation layer 131.

[0094] The above is for reference only. Figure 3 and Figure 4 In an exemplary embodiment, a portion of the third connecting line CL3 extending over the first data line DL1 and the second data line DL2 may be closer to the first peripheral region PA1 than a portion of the second connecting line CL2 extending over the first data line DL1 (the second portion P2). However, this disclosure is not limited thereto. For example, as... Figure 9 As shown in the diagram, Figure 9 This is a plan view of a portion of a schematically illustrated display device according to an exemplary embodiment, wherein a portion of the second connecting line CL2 extending over the first data line DL1 (the second portion P2) may be closer to the first peripheral region PA1 than a portion of the third connecting line CL3 extending over the first data line DL1 and the second data line DL2.

[0095] In this case, in an exemplary embodiment, such as Figure 10 As illustrated, each of the connecting lines does not include portions located on different layers, but can be located on the same layer (e.g., directly on the same layer). For example, the first portion P1 to the third portion P3 of the second connecting line CL2 can be integrally formed as a single unit and can comprise the same material as the pixel electrode 311. The third connecting line CL3 can be configured in the same manner. In this case, since each connecting line is located above the data line, as... Figure 11 As shown, Figure 11 This is a plan view of a portion of a schematically illustrated display device according to an exemplary embodiment, in which portions of the second connecting line CL2 and the third connecting line CL3 may overlap with the second data line DL2 and the third data line DL3. For example, a first portion P1 of the second connecting line CL2 may be located on a different layer than the second data line DL2, but may overlap with the second data line DL2 in the plan view.

[0096] In this way, during the manufacturing process according to the exemplary embodiment, at least a portion of each of the second connection line CL2 and the third connection line CL3 can be formed simultaneously with the pixel electrode 311 on the same layer as the pixel electrode 311 (e.g., directly on the same layer). Accordingly, at least a portion of each of the second connection line CL2 and the third connection line CL3 may include the same material as the pixel electrode 311 and may have the same layer structure as the pixel electrode 311. The pixel electrode 311 is located on a planarization layer 140 with a relatively large thickness, and therefore, portions of the second connection line CL2 and the third connection line CL3 that include the same material as the pixel electrode 311 and are formed together with the pixel electrode 311 are also located on the planarization layer 140 with a relatively large thickness. Therefore, the parasitic capacitance that appears between the portions of the second connection line CL2 and the third connection line CL3 that include the same material as the pixel electrode 311 and are formed together with the pixel electrode 311 and the first data line DL1 below the planarization layer 140 can be reduced.

[0097] The above description, according to an exemplary embodiment, indicates that at least a portion of each of the second connection line CL2 and the third connection line CL3 is formed simultaneously with the pixel electrode 311 on the same layer as the pixel electrode 311. However, this disclosure is not limited thereto. For example, as Figure 12 As shown, Figure 12 This is a cross-sectional view of a portion of a schematically illustrated display device according to an exemplary embodiment. The first data line DL1 and the second data line DL2 may be located on the first interlayer insulating layer 131, just like the source electrode 215a and the drain electrode 215b. Additionally, a second interlayer insulating layer 132 comprising an inorganic material such as, for example, silicon oxide, silicon nitride, and / or silicon oxynitride may cover the source electrode 215a, the drain electrode 215b, the first data line DL1, and the second data line DL2 on the first interlayer insulating layer 131. In this case, the power line may be located on the same layer as the source electrode 215a and the drain electrode 215b.

[0098] As described above, the second connection line CL2 may include a first portion P1 to a third portion P3. Here, the first portion P1 and the third portion P3 of the second connection line CL2 may be located on the first interlayer insulating layer 131, just like the source electrode 215a and the drain electrode 215b. Additionally, the second interlayer insulating layer 132 may cover the first portion P1 and the third portion P3 of the second connection line CL2. The second portion P2 of the second connection line CL2 may be located on the second interlayer insulating layer 132 and may be electrically connected to the first portion P1 and the third portion P3 of the second connection line CL2 through contact holes. The first portion P1 and the third portion P3 of the second connection line CL2 may be formed simultaneously with the source electrode 215a and the drain electrode 215b during the manufacturing process using the same material. The second portion P2 of the second connection line CL2 may be formed using the same material used when forming the source electrode 215a and the drain electrode 215b. The planarization layer 140 may cover the second portion P2 of the second connection line CL2.

[0099] like Figure 13 As shown in the diagram, Figure 13 This is a cross-sectional view of a portion of a schematically illustrated device according to an exemplary embodiment. In addition to the first interlayer insulating layer 131, a second gate insulating layer 122 may be further disposed between the source electrode 215a, the drain electrode 215b, and the gate electrode 213. For example, the second gate insulating layer 122 may cover the gate electrode 213, and the first interlayer insulating layer 131 may cover the second gate insulating layer 122. The second gate insulating layer 122 may, like the first interlayer insulating layer 131, comprise, for example, silicon oxide, silicon nitride, and / or silicon oxynitride.

[0100] The first data line DL1 and the second data line DL2 can be located on the first gate insulating layer 121, just like the gate electrode 213. The first data line DL1 and the second data line DL2 can be made of the same material as the gate electrode 213. For example, the first data line DL1 and the second data line DL2 can be formed simultaneously with the gate electrode 213 using the same material. Except for the gate electrode 213, the second gate insulating layer 122 can cover the first data line DL1 and the second data line DL2. In this case, the power line can be located on the same layer as the first data line DL1 and the second data line DL2.

[0101] As described above, the second connection line CL2 may include a first portion P1 to a third portion P3. Here, the first portion P1 and the third portion P3 of the second connection line CL2 may be located on the first gate insulating layer 121, just like the gate electrode 213. Additionally, the second gate insulating layer 122 may cover the first portion P1 and the third portion P3 of the second connection line CL2. The second portion P2 of the second connection line CL2 may be located on the second gate insulating layer 122 and may be electrically connected to the first portion P1 and the third portion P3 of the second connection line CL2 through a contact hole. The first portion P1 and the third portion P3 of the second connection line CL2 may be formed simultaneously with the gate electrode 213 during manufacturing by using the same material as the gate electrode 213. The second portion P2 of the second connection line CL2 may be formed using the material used to form the gate electrode 213 or by using other conductive materials. The first interlayer insulating layer 131 may cover the second portion P2 of the second connection line CL2.

[0102] According to the exemplary embodiments described above, a display device in which the non-display area can be reduced and high-quality images can be achieved can be provided. However, the scope of this disclosure is not limited thereto.

[0103] Although the present disclosure has been specifically shown and described with reference to exemplary embodiments thereof, those skilled in the art will understand that various changes in form and detail may be made without departing from the spirit and scope of the disclosure as defined by the appended claims.

Claims

1. A display device, comprising: The substrate includes a display area, a first peripheral area disposed outside the display area, and a second peripheral area disposed outside the display area and the first peripheral area. A first data line is disposed on the substrate and extends from the first peripheral region to the display region; A second data line is disposed on the substrate and extends from the second peripheral region to the display region; A third data line is disposed on the substrate and extends from the second peripheral region to the display region, wherein the second data line is disposed between the first data line and the third data line; Pixel electrodes are disposed on the first data line to the third data line; A first input line, a second input line, and a third input line are disposed in the first peripheral region and spaced apart from each other; and The first connecting line has a first end and a second end. Wherein, the first end is electrically connected to the second data line in the second peripheral region, and the second end is electrically connected to the second input line in the first peripheral region, and The first connecting line passes through the display area by extending above the first data line without touching it. Wherein, a portion of the first connecting line is an extension above the first data line, and the portion of the first connecting line extending above the first data line is disposed on the same layer as the pixel electrode.

2. The display device according to claim 1, wherein, At least a portion of the first connecting line comprises the same material as the pixel electrode.

3. The display device according to claim 2, wherein, The first connecting line includes: The first part has a first end connected to the second data line in the second peripheral area, wherein the first part is disposed on the same layer as the second data line and extends into the display area; The second portion has a first end connected to a second end of the first portion, wherein the second portion extends over the first data line without contacting the first data line, and comprises the same material as the pixel electrode; and The third part has a first end connected to the second end of the second part, wherein the second end of the third part is electrically connected to the second input line in the first peripheral region.

4. The display device according to claim 3, wherein, The first end of the second portion is connected to the second end of the first portion through a contact hole formed in an insulating layer disposed between the first portion and the second portion.

5. The display device according to claim 4, wherein, The contact hole is located in the display area.

6. The display device according to claim 3, wherein, The first part and the second data line are integrated into a single unit.

7. The display device according to claim 4, wherein, The second part has the same layer structure as the pixel electrode.

8. The display device according to claim 3, wherein, The third part is located on the same layer as the second input line.

9. The display device according to claim 8, wherein, The second end of the second part is disposed above the first end of the third part and is connected to the first end of the third part through a contact hole formed in an insulating layer disposed between the second part and the third part.

10. The display device according to claim 9, wherein, The contact hole is located in the display area.

11. The display device according to claim 8, wherein, The third part and the second input line are integrated into a single unit.

12. The display device according to claim 11, wherein, The second input line is positioned on the same layer as the second data line.

13. The display device according to claim 1, further comprising: The second connecting line has a first end and a second end. Wherein, the first end of the second connecting line is electrically connected to the third data line in the second peripheral region, and the second end of the second connecting line is electrically connected to the third input line in the first peripheral region, and The second connecting line passes through the display area by extending over the first and second data lines without contacting them.

14. The display device according to claim 13, wherein, At least a portion of the second connecting line comprises the same material as the pixel electrode.

15. The display device according to claim 14, wherein, The at least portion of the second connecting line is a portion extending over the first data line and the second data line.

16. The display device as claimed in claim 15, wherein, The portion of the second connecting line extending above the first data line and the second data line has the same layer structure as the pixel electrode.

17. The display device according to claim 15, wherein, The portion of the second connecting line extending over the first data line and the second data line is closer to the first peripheral region than the portion of the first connecting line extending over the first data line.

18. The display device according to claim 14, wherein, The length of the second connecting line, including at least a portion of the same material as the pixel electrode, is greater than the length of the first connecting line, including a portion of the same material as the pixel electrode.

19. The display device according to claim 1, further comprising: A thin-film transistor, disposed on the substrate in the display area, includes a source electrode and a drain electrode. The first data line to the third data line are disposed on the same layer as the source electrode and the drain electrode.

20. The display device according to claim 1, further comprising: A thin-film transistor, disposed on the substrate in the display area, includes a source electrode and a drain electrode. The first data line to the third data line are disposed on an insulating layer covering the source electrode and the drain electrode.

21. A display device, comprising: The first data line extends from the first peripheral area to the display area; The second data line extends from the second peripheral area into the display area; Pixel electrodes are disposed on the first data line and the second data line; The input line is located in the first peripheral area; as well as The connecting wire has a first end and a second end. Wherein, the first end is electrically connected to the second data line in the second peripheral region, and the second end is electrically connected to the input line in the first peripheral region, and The connecting line passes through the display area by extending above the first data line without touching it. A portion of the connecting line extends above the first data line, and this portion of the connecting line extending above the first data line is disposed on the same layer as the pixel electrode.

22. The display device according to claim 21, wherein, At least a portion of the connecting line comprises the same material as the pixel electrode.

Images