A distributed IPOS system automatic voltage equalization control method

Abstract

The application discloses a kind of distributed IPOS system automatic voltage-sharing control methods, the distributed IPOS system is made of n sub DC / DC module, n is the natural number greater than 1;The input port of each sub DC / DC module is connected in parallel to the same DC input source, and the output port is connected in series in turn, and the total output after series connection is connected in parallel with load;In each sub DC / DC module, by adding single module output voltage to system output voltage reference, output current reference and output power reference, without centralized controller, the automatic voltage-sharing control of each sub DC / DC module output voltage can be realized in constant voltage, constant current, constant power three operating modes;The control method is simple, reliable, easy to expand, and helps system to realize modular design.

Description

Technical Field

[0001] This invention relates to a DC power supply system, and more particularly to an automatic voltage equalization control method for a distributed IPOS system, belonging to the field of power electronic conversion and DC power supply systems. Background Technology

[0002] In recent years, with the continuous development of economy and technology, the application of high-power DC power supplies in the industrial field has become increasingly widespread. In fields such as refractory metal smelting, photovoltaic power generation systems, and electrostatic precipitators, it is necessary to convert lower input voltages to higher output voltages. Due to the high output voltage, if a single-module DC power supply is used, the devices will be subjected to significant voltage stress, and the reliability of a single-module DC power supply is relatively low. However, an IPOS (Input Parallel Output Series) system, composed of multiple DC / DC modules connected in parallel input and series output, can reduce the current stress on the input-side devices and the voltage stress on the output-side devices, offering significant advantages in low-voltage input, high-voltage output applications.

[0003] To ensure reliable operation of an IPOS system, power balance among its modules is crucial. In an IPOS system, parallel inputs and series outputs guarantee identical input voltages and output currents for each module. Therefore, power balance can be achieved simply by equalizing input current or output voltage across the modules. Existing IPOS system control methods primarily employ a dual-loop control approach, consisting of an output voltage loop and an output voltage equalization loop. The output voltage loop stabilizes the system output voltage, while the output voltage equalization loop ensures voltage equalization across all modules. For example, the literature “W. Chen, X. Ruan, H. Yan and CKTse, ″DC / DC Conversion Systems Consisting of Multiple Converter Modules: Stability, Control, and Experimental Verifications,″in IEEE Transactions on Power Electronics, vol.24, no.6, pp.1463-1474, June, 2009” utilizes this method of adjusting the output voltage loop and output voltage equalization loop. However, to address potential discrepancies between the sampling signals and reference signals of each module, traditional control methods employ interconnecting buses or shared output voltage loops between modules to ensure identical sampling and reference signals for each module. However, this also introduces several problems: firstly, interference or faults in the bus can disrupt the system's normal operation, compromising its reliability; secondly, the shared signal connections between modules prevent independent control, hindering modular system implementation.

[0004] For the reasons mentioned above, it is necessary to explore a distributed control scheme for an IPOS system that is highly reliable and easy to modularize. Summary of the Invention Purpose of the invention:

[0005] To address the shortcomings of existing technologies, this invention provides an automatic voltage equalization control method for a distributed IPOS system. This method achieves independent control of each submodule, stable system output, and voltage equalization control of the output voltage of each module in three operating modes: constant voltage, constant current, and constant power. Technical solution:

[0006] To achieve the above objectives, the present invention adopts the following technical solution:

[0007] The distributed IPOS system consists of n sub-DC / DC modules, where n is a natural number greater than 1. Each sub-DC / DC module includes an input port and an output port. The input port of each sub-DC / DC module is connected in parallel to the same DC input source, and the output ports are connected in series. The total output after the series connection is connected in parallel with the load.

[0008] The control method for each sub-DC / DC module in the distributed IPOS system is the same, and its specific control process is as follows:

[0009] (1) Each sub-DC / DC module is based on the sampled total system output voltage V. o_i The module's own output voltage V Cfi Output current I o_i and by V o_i with I o_i The system output power P obtained by multiplication o_i (i = 1, 2, ..., n), each independently controls its own output voltage;

[0010] (2) In constant voltage mode, each sub-DC / DC module operates according to its module output voltage reference V. Cfi_ref (i = 1, 2, ..., n) and the output voltage sampling signal V Cfi (i = 1, 2, ..., n), calculate its output voltage error, and then multiply it by a fixed, positive-zero proportionality coefficient k. downv This is superimposed on the pre-set system output voltage reference V. o_ref This allows us to obtain a new system output voltage reference V for each sub-DC / DC module. o_refi (i = 1, 2, ..., n), i.e., V o_refi＝ V o_ref +k downv (V Cfi_reef -V Cfi );

[0011] (3) In constant current mode, each sub-DC / DC module operates according to its module output voltage reference V. Cfi_ref (i = 1, 2, ..., n) and the output voltage sampling signal V Cfi (i = 1, 2, ..., n), calculate its output voltage error, and then multiply it by a fixed, positive-zero proportionality coefficient k. downi This is superimposed on the pre-set system output current reference I. o_ref This allows us to obtain a new system output current reference I for each sub-DC / DC module. o_refi (i=1, 2,...n), that is, I o_refi =I o_ref +k downi (V Cfi_ref-V Cfii );

[0012] (4) In constant power mode, each sub-DC / DC module operates according to its module output voltage reference V. Cfi_ref (i = 1, 2, ..., n) and the output voltage sampling signal V Cfi (i = 1, 2, ..., n), calculate its output voltage error, and then multiply it by a fixed, positive-zero proportionality coefficient k. downpp This is superimposed on the pre-set system output power reference P. o_ref This allows us to obtain a new system output power reference P for each sub-DC / DC module. o_refi (i = 1, 2, ..., n), i.e., P o_refi =P o_ref +k downp (V Cfi_ref -V Cfi );

[0013] (5) In the above three modes, the calculated system output voltage, current, and power reference V o_refi、 I o_refi P o_refi The sampled values ​​V of the system output voltage and current are respectively compared with those of the system output voltage and current. o_i I o_i The calculated value of system output power P o_i Subtraction yields the error value V of the system output voltage, current, and power. o_errori I o_errori P o_errori (i = 1, 2, ... n), select the mode with the smallest error value as the actual running mode.

[0014] (6) The minimum value of the above three error values ​​is used as the input of the output voltage regulator. The signal output by the voltage regulator is modulated by PWM and used as the driving signal of the sub-DC / DC module, so as to realize the equal voltage control of the output voltage of all sub-modules.

[0015] The present invention has the following beneficial effects:

[0016] (1) The technical solution of the present invention can automatically achieve automatic voltage equalization of the output voltage of each sub-DC / DC module;

[0017] (2) The control of each sub-DC / DC module is independent of each other. That is, each sub-DC / DC module only implements its own control based on the information of the total output voltage, current, power and the module's own output voltage. There is no interconnection between the control loops of each module. Therefore, the fully distributed autonomous control of each sub-DC / DC module is realized.

[0018] (3) The system has a high degree of modularity, simple control and easy implementation, strong fault tolerance and scalability, and high system reliability. Attached Figure Description

[0019] Appendix Figure 1 This is a schematic diagram of the automatic voltage equalization control method for the distributed IPOS system of the present invention;

[0020] Appendix Figure 2 This is a schematic diagram of the relationship between the system output voltage and the module output voltage in the automatic voltage equalization control method of the distributed IPOS system of the present invention;

[0021] Appendix Figure 3 This is a schematic diagram of the output voltage curve when there is a voltage sampling deviation;

[0022] Appendix Figure 4 This is a schematic diagram of the output voltage curve when the voltage reference is deviated;

[0023] Appendix Figure 5 (a) is a schematic diagram showing the relationship between the system output current and the module output voltage of the automatic voltage equalization control method for the distributed IPOS system of the present invention. Figure 5 (b) is a schematic diagram of the relationship between system output power and module output voltage;

[0024] Appendix Figure 6 This is a schematic diagram of the IPOS system structure in a specific embodiment of the present invention;

[0025] Appendix Figure 7 These are simulation results diagrams showing sampling deviations occurring under three different working modes in specific embodiments of the present invention;

[0026] Appendix Figure 8 These are simulation results of constant voltage and constant current mode switching and constant voltage and constant power mode switching in a specific embodiment of the present invention;

[0027] Symbol name in the above attached diagram: V Cf1_ref ~V Cfn_ref It is the output voltage reference of the 1st to nth sub-DC / DC modules, V Cf1 ~V Cfn It is the output voltage sampling signal of the 1st to nth sub-DC / DC modules; V o_ref It is the system output voltage reference, V o_1 ~V o_n It is the system output voltage sampling signal of the 1st to nth sub-DC / DC modules, V o_error1 ~V o_errorn It is the system output voltage error value of the 1st to nth sub-DC / DC modules; I o_ref It is the system output current reference, I o_1 ~I o_nIt is the output current sampling signal of the 1st to nth sub-DC / DC modules, I o_error1 ~I o_errorn It is the system output current error value of the 1st to nth sub-DC / DC modules; P o_ref It is the system output power reference, P o_1 ~P o_n P is the calculated system output power value of the 1st to nth sub-DC / DC modules. o_error1 ~P o_errorn It is the system output power error value of the 1st to nth sub-DC / DC modules; k downv It is the proportional coefficient for constant voltage mode, k downi It is the proportional gain for constant current mode, k downp It is the proportional coefficient for constant power mode; D l ~D n It is the duty cycle signal output by the voltage regulator of the 1st to nth sub-DC / DC modules; V GS1 ~V GSn These are the drive signals for the 1st to nth sub-DC / DC modules; V of It is the sampled value of the system output voltage; K vo K is the sampling coefficient of the system output voltage; vo1 K vo2 These are the system output voltage sampling coefficients for modules 1 and 2, respectively; V o_ref1 V o_ref2 These are the system output voltage references for modules 1 and 2, respectively; V in It is the input voltage, I in It is the input current; I in1 ~I in4 These are the input currents of modules 1 through 4, respectively; I o1 ~I o4 These are the output currents of modules 1 through 4, respectively; C f1 ~C f4 These are the output capacitors of modules 1 through 4; V Cf1 ~V Cf4 These are the output voltages of modules 1 through 4, respectively; R Ld It is a load; I o It is the total output current; V o It is the total output voltage. Detailed Implementation

[0028] The technical solution of the present invention will be further described below with reference to the accompanying drawings.

[0029] A schematic diagram of the distributed IPOS system and its control method described in this invention is attached. Figure 1As shown. The distributed IPOS system consists of n sub-DC / DC modules, where n is a natural number greater than 1. Each sub-DC / DC module includes an input port and an output port, wherein the output port and the input port are electrically isolated. The input ports of each sub-DC / DC module are connected in parallel to the same DC input source, and the output ports are connected in series, with the total output after series connection connected in parallel with the load. The control method for each sub-DC / DC module in the distributed IPOS system of this invention is the same, and its specific control process is as follows:

[0030] (1) Each sub-DC / DC module is based on the sampled total system output voltage V. o_i The module's own output voltage V Cfi Output current I o_i and by V o_i with I o_i The system output power P obtained by multiplication o_i (i = 1, 2, ..., n), each independently controls its own output voltage;

[0031] (2) In constant voltage mode, each sub-DC / DC module operates according to its module output voltage reference V. Cfi_ref (i = 1, 2, ..., n) and the output voltage sampling signal V Cfi (i = 1, 2, ..., n), calculate its output voltage error, and then multiply it by a fixed, positive-zero proportionality coefficient k. downv This is superimposed on the pre-set system output voltage reference V. o_ref This allows us to obtain a new system output voltage reference V for each sub-DC / DC module. o_refi (i=1, 2,...n), that is: V o_refi =V o_ref +(V Cfi_ref -V Cfi )k downv (1)

[0032] (3) In constant current mode, each sub-DC / DC module operates according to its module output voltage reference V. Cfi_ref (i = 1, 2, ..., n) and the output voltage sampling signal V Cfi (i = 1, 2, ..., n), calculate its output voltage error, and then multiply it by a fixed, positive-zero proportionality coefficient k. downi This is superimposed on the pre-set system output current reference I. o_ref This allows us to obtain a new system output current reference I for each sub-DC / DC module. o_refi (i=1, 2,...n), that is: I o_refi =I o_ref +(VCfi_ref -V Cfi )k downi (2)

[0033] (4) In constant power mode, each sub-DC / DC module operates according to its module output voltage reference V. Cfi_ref (i = 1, 2, ..., n) and the output voltage sampling signal V Cfi (i = 1, 2, ..., n), calculate its output voltage error, and then multiply it by a fixed, positive-zero proportionality coefficient k. downp This is superimposed on the pre-set system output power reference P. o_ref This allows us to obtain a new system output power reference P for each sub-DC / DC module. o_refi (i=1, 2,...n), that is: P o_refi =P o_ref +(V Cfi_ref -V Cfi )k downp (3)

[0034] (5) In the above three modes, the calculated system output voltage, current, and power reference V o_refi I o_refi P o_refi The sampled values ​​V of the system output voltage and current are respectively compared with those of the system output voltage and current. o_i I o_i The calculated value of system output power P o_i Subtraction yields the error value V of the system output voltage, current, and power. o_errori I o_errori P o_errori (i = 1, 2, ... n), select the mode with the smallest error value as the actual running mode.

[0035] (6) The minimum value of the above three error values ​​is used as the input of the output voltage regulator. The signal output by the voltage regulator is modulated by PWM and used as the drive signal of the sub-DC / DC module. Taking constant voltage mode as an example, after the system stabilizes, the system output voltage sampling value V of That is, equal to the system output voltage reference V o_refi ,Right now: V of =V o_refi =V o_ref +(V Cfi_ref -V Cfi )k downv (4)

[0036] System output voltage sampling value V of With module output voltage V Cfi The characteristic curve of the relationship is shown in the attached figure. Figure 2 As shown in the figure, the absolute value of the slope of the system output voltage characteristic curve is the proportionality coefficient k. downv ;

[0037] (7) Considering the system output voltage sampling coefficient K vo Then the system output voltage sample value V of Compared with the actual value of the system output voltage V o The relationship is V of =K vo V o Formula (4) can be rewritten as:

[0038] At this point, the slope of the output voltage characteristic curve is k. downv / K vo When there are two modules in the system, the system output voltage sampling coefficient K vo When there is a deviation, assume there is K. vo2 >K vol Then module 2 # The absolute value of the slope of the output voltage characteristic curve will be less than that of module 1. # The system output voltage characteristic curves of the two modules will not completely overlap. Nevertheless, the system output voltage can still remain stable at V. o =V ol =V o2 Module 1 # and Module 2 # The output voltages are V Cf1 and V Cf2 As attached Figure 3 As shown.

[0039] (8) Considering the system output voltage reference V o_ref There is a discrepancy; assuming there is V in the two modules. o_ref2 >V o_ref1 Then module 2 # The output voltage characteristic curve of module 1 will shift upwards by a certain distance compared to module 1#, and the system output voltage characteristic curves of the two modules will not completely overlap. However, the system output voltage will still remain stable at V. o =V o1 =V o2 Module 1 # and Module 2 # The output voltages are V Cf1 and V Cf2 As attached Figure 4 As shown. Therefore, based on the characteristic curve of the system output voltage, voltage equalization control of the output voltage of all sub-modules can ultimately be achieved.

[0040] (9) In constant current and constant power modes, the sampled current value and the power value calculated based on the sampled value are compared with the module output voltage V. Cfi The relationships are shown in equations (6) and (7) respectively. I of =I o_refi =I o_ref +(V Cfi_ref -V Cfi )k downi (6) U of I of =P of =P o_refi =P o_ref +(V Cfi_ref -V Cfi )k downp (7)

[0041] Similar to the system output voltage characteristic curve, the system output current sample value I can be plotted using equation (6). of With module output voltage V Cfi The characteristic curve of the relationship can be plotted using equation (7) to obtain the system output power value P. of With module output voltage V Cfi The characteristic curves of the relationship are shown in the appendix. Figure 5 (a) and (b).

[0042] A specific embodiment of the automatic voltage equalization control method for a distributed IPOS system of the present invention is shown in the attached figure. Figure 6 As shown, this embodiment consists of four DC / DC modules, each with a rated output voltage of 125V and a rated output current of 50A. The system's rated output voltage is 500V. o1 ~V o4 These are the output voltages of modules 1 through 4, V. o It is the total output voltage of the system.

[0043] Appendix Figure 7 (a) The simulated waveform of voltage sampling under constant voltage mode in this specific embodiment is given, and the scaling factor k in the simulation is shown. downvThe value is set to 2. Initially, each module operates at its rated voltage, and the system output voltage is 500V. At t = 1ms, a 1% disturbance is added to the system output voltage sample of module 1 to simulate the situation where the converter voltage sampling is affected by interference and the sampled value deviates. Under the automatic voltage equalization control of the system, after the system stabilizes in the simulation, the output voltage of module 1 affected by the disturbance is 123V, the output voltage of the other three modules is 125.5V, and the total voltage remains almost unchanged at 500V. It can be seen that the system ensures that the output voltage of each module is basically equal when the voltage sampling deviates in constant voltage mode through automatic voltage equalization control, and also ensures the stability of the total output voltage.

[0044] Appendix Figure 7 (b) The simulation waveforms of the current sampling under constant current mode in this specific embodiment are given when the current is disturbed. Initially, the load current is 42A. At t = 2ms, a 1% disturbance is added to the system output current sampling of module 1 to simulate the situation where the converter current sampling is disturbed and the sampling value deviates. Under the automatic voltage equalization control of the system, after the system stabilizes in the simulation, the output voltage of module 1 affected by the disturbance is 108V, the output voltage of the other three modules is 104V, and the load current remains almost unchanged at 42A. In the simulation, the proportional coefficient k... downi Set to 0.1, current reference I o_ref The voltage reference for each module is set to 40A. Cfi_ref The voltage was initially set to 125V, but the actual module output voltage was approximately 105V, ultimately limiting the load current to 42A. This is consistent with the theoretical current limit value I. o_refi =I o_ref +k downi (V Cfi_ref -V Cfi The consistency indicates that the control method can effectively protect the output current, and also ensures that the output voltage of each module is basically equal when the current sampling deviates in constant current mode.

[0045] Appendix Figure 7 (c) The simulation waveform of the calculated power value under constant power mode in this specific embodiment is given when the power is disturbed. The scaling factor k in the simulation is shown. downp Set to 10, power reference P o_ref The power output is initially set to 20kW. At t = 1ms, a 1% disturbance is added to the power calculation value of module 1 to simulate a deviation in the converter's power calculation result. Under the automatic voltage equalization control of the system, after the system stabilizes in the simulation, the output voltage of module 1 affected by the disturbance is 117V, while the output voltage of the other three modules is 110V, and the output power remains almost unchanged at 20kW. This demonstrates that the control method effectively protects the output power and ensures that the output voltage of each module remains basically equal when the power calculation value deviates in constant power mode.

[0046] In the above simulation, the effect of system voltage equalization is related to the proportionality coefficient k. down The value of the proportionality constant k is related to the value of the proportionality constant k. down The larger the value of k, the better the voltage equalization effect of each module's output; conversely, the smaller the value, the worse the voltage equalization effect. However, k... down Increasing this value will increase the deviation between the actual output voltage, output current, or output power in the three modes and their reference values. Therefore, k down The selection of a module requires a trade-off between the module's voltage equalization effect and output accuracy.

[0047] Appendix Figure 8 (a) The simulation waveforms during the constant voltage and constant current mode switching in this specific embodiment are given. In the simulation, the voltage reference V of each module is shown. Cfi_ref Take 125V, current reference I o_ref The current is initially set to 50A. At the beginning, the converter operates in constant voltage mode, with each module operating at its rated voltage. The system output voltage is 500V, and the output current is 50A. At t = 1ms, half of the rated current is added to the converter's load. At this point, the instantaneous output current increases from 50A to 75A. The converter then switches to constant current mode, and the output current quickly returns to near the reference current of 50A. In the simulation, the output current eventually stabilizes at around 52A. This demonstrates that the converter's constant current mode effectively limits the output current, completing the constant voltage / constant current mode switching.

[0048] The switching processes for other operating modes are basically similar to the constant voltage / constant current mode switching process described above. (Appendix) Figure 8 (b) The simulation waveforms during the constant voltage and constant power mode switching in this specific embodiment are given. In the simulation, the voltage reference V of each module is shown. Cfi_ref Take 125V, power reference P o_ref The rated power was 25kW. When the load power of the converter increased by half of its rated power, the instantaneous output power increased from 25kW to 37.5kW. The converter then switched to constant power mode, and the output power quickly stabilized again at around 25kW. This demonstrates that the converter's constant current mode can effectively limit the output power and complete the constant voltage and constant power mode switching.

[0049] In summary, this invention provides a distributed automatic voltage equalization control method based on an IPOS system, which enables the system to achieve output voltage equalization control of each module in three operating modes—constant voltage, constant current, and constant power—without a centralized controller. At the same time, it ensures high system reliability and is easy to modularize.

[0050] The embodiments described above are only used to illustrate the technical solutions of the present invention and are not intended to limit the scope of the present invention. Therefore, any modifications to the technical solutions described in the foregoing embodiments, or equivalent substitutions for some or all of the technical features, are within the scope of the claims of the present invention.

Claims

1. An automatic voltage equalization control method for a distributed IPOS system, characterized in that: The distributed IPOS system consists of n sub-DC / DC modules, where n is a natural number greater than 1. Each sub-DC / DC module includes one input port and one output port. The input port of each sub-DC / DC module is connected in parallel to the same DC input source, and the output ports are connected in series. The total output of the series connection is connected in parallel with the load. All sub-DC / DC modules are controlled in the same way, and the specific control process is as follows: (1) Each sub-DC / DC module is based on the sampled total system output voltage V. o_i The module's own output voltage V Cfi Output current I o_i and by V o_i with I o_i Multiply to obtain the system output power P o_i (i = 1, 2, ..., n), each independently controls its own output voltage; (2) In constant voltage mode, each sub-DC / DC module operates according to its module output voltage reference V. Cfi_ref (i = 1, 2, ..., n) and the output voltage sampling signal V cfi (i = 1, 2, ..., n), calculate its output voltage error, and then multiply it by a fixed, positive-zero proportionality coefficient k. downv This is superimposed on the pre-set system output voltage reference V. o_ref This allows us to obtain a new system output voltage reference V for each sub-DC / DC module. o_refi (i = 1, 2, ..., n), i.e., V o_refi =V o_ref +k downv (V Cfi_ref -V Cfi ); (3) In constant current mode, each sub-DC / DC module operates according to its module output voltage reference V. Cfi_ref (i = 1, 2, ..., n) and the output voltage sampling signal V Cfi (i = 1, 2, ..., n), calculate its output voltage error, and then multiply it by a fixed, positive-zero proportionality coefficient k. downi This is superimposed on the pre-set system output current reference I. o_ref This allows us to obtain a new system output current reference I for each sub-DC / DC module. o_refi (i=1, 2,...n), that is, I o_refi =I o_ref +k downi (V Cfi_ref -V Cfi ); (4) In constant power mode, each sub-DC / DC module operates according to its module output voltage reference V. Cfi_ref (i = 1, 2, ..., n) and the output voltage sampling signal V Cfi (i = 1, 2, ..., n), calculate its output voltage error, and then multiply it by a fixed, positive-zero proportionality coefficient k. downp This is superimposed on the pre-set system output power reference P. o_ref This allows us to obtain a new system output power reference P for each sub-DC / DC module. o_refi (i = 1, 2, ..., n), i.e., P o_refi =P o_ref +k downp (V Cfi_ref -V Cfi ); (5) In the above three modes, the calculated system output voltage, current, and power reference V o_refi I o_refi P o_refi The sampled values ​​V of the system output voltage and current are respectively compared with those of the system output voltage and current. o_i I o_i The calculated value of system output power P o_i Subtraction yields the error value V of the system output voltage, current, and power. o_errori I o_errori P o_errori (i = 1, 2, ... n), select the mode with the smallest error value as the actual running mode; (6) The minimum value of the above three error values ​​is used as the input of the output voltage regulator. The signal output by the voltage regulator is modulated by PWM and used as the driving signal of the sub-DC / DC module, so as to realize the equal voltage control of the output voltage of all sub-modules.

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