Display devices
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-10-29
- Publication Date
- 2026-08-14
Smart Images

Figure CN112750877B_ABST
Abstract
Description
[0001] Cross-reference to related applications
[0002] This application claims priority and benefit to Korean Patent Application No. 10-2019-0135588, filed on October 29, 2019, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference. Technical Field
[0003] One or more embodiments relate to display devices. Background Technology
[0004] In recent years, display devices have been used for a wide variety of purposes. Moreover, as display devices have become thinner and lighter, their applications have expanded.
[0005] Because display devices are used in a variety of ways, various methods have been applied to design various forms of display devices. These various forms of display devices can have flexible structures, foldable structures, bendable structures, and rollable structures.
[0006] The information disclosed in this background section is only intended to enhance the understanding of the background, and therefore, the information discussed in this background section does not necessarily constitute prior art. Summary of the Invention
[0007] Aspects of one or more embodiments relate to display devices, and for example, to display devices that are robustly resistant to moisture penetration and have improved flexibility.
[0008] Aspects of one or more example embodiments include a display device that is robustly resistant to moisture penetration and has relatively improved flexibility so that various forms of the display device can be obtained. However, these features are merely examples, and the scope of embodiments according to this disclosure is not limited thereto.
[0009] Additional aspects will be set forth in part in the description which follows, and will become more apparent from the description, or may be learned by practice of embodiments of the present disclosure.
[0010] According to one or more example embodiments, a display device includes: a substrate including a display area and a peripheral area surrounding the display area, and the substrate having at least a curved portion; a plurality of display elements disposed in the display area of the substrate; and a thin-film encapsulation layer disposed above the plurality of display elements, and including a first encapsulation layer, a second encapsulation layer disposed above the first encapsulation layer, and an organic encapsulation layer positioned between the first encapsulation layer and the second encapsulation layer, wherein the second encapsulation layer includes a plurality of inorganic thin layers and a plurality of organic thin layers arranged alternately, and the thickness of the second encapsulation layer is equal to or less than the thickness of the first encapsulation layer.
[0011] According to some example embodiments, each of the plurality of organic thin layers may include silicon dioxide.
[0012] According to some example embodiments, the elastic modulus of the second encapsulation layer can be from 5 GPa to 10 GPa.
[0013] According to some example embodiments, the plurality of inorganic thin layers may contact each other at the ends of the second encapsulation layer.
[0014] According to some example embodiments, the display device may further include: a first partition wall disposed in the peripheral region of the substrate and extending along the periphery of the display region, and a second partition wall disposed spaced apart from the first partition wall, wherein the first encapsulation layer and the second encapsulation layer may contact each other on the second partition wall.
[0015] According to some example embodiments, the upper surface of the first encapsulation layer may contact the surface of one of the inorganic thin layers of the plurality of inorganic thin layers of the second encapsulation layer.
[0016] According to some example embodiments, the display device may further include: at least two dams positioned in the peripheral region and a groove positioned between the dams.
[0017] According to some example embodiments, the groove may have an undercut cross-section structure.
[0018] According to some example embodiments, each dam section includes: a lower layer having a first width and an upper layer disposed on the lower layer and having a second width greater than the first width.
[0019] According to some example embodiments, the upper layer may include a pair of tips protruding toward the center of the groove.
[0020] According to some example embodiments, the plurality of inorganic thin layers may be in contact with each other at the side surface of the lower layer.
[0021] According to some example embodiments, the lower layer may include an organic insulating material.
[0022] According to some example embodiments, the lower layer may include an inorganic insulating material.
[0023] According to some example embodiments, the lower layer may include multiple inorganic layers.
[0024] According to some example embodiments, the upper layer may include a conductive material.
[0025] According to some example embodiments, each of the plurality of display elements may include: a pixel electrode, a counter electrode facing the pixel electrode, and an intermediate layer positioned between the pixel electrode and the counter electrode, and the upper layer may include the same material as the pixel electrode.
[0026] According to some example embodiments, each of the plurality of organic thin layers may have a discontinuous structure due to the grooves.
[0027] According to some example embodiments, the plurality of inorganic thin layers may contact each other at the inner surface of the groove.
[0028] According to some example embodiments, the display device may further include: a first partition wall disposed in the peripheral region of the substrate and extending along the periphery of the display region, and a second partition wall disposed spaced apart from the first partition wall, wherein the second partition wall may be positioned between the first partition wall and the dam.
[0029] According to some example embodiments, the display device may further include: an input sensing layer disposed on the thin-film encapsulation layer and including an inorganic insulating layer, wherein the inorganic insulating layer may extend to the peripheral region to cover the thin-film encapsulation layer.
[0030] According to some example embodiments, the input sensing layer can be directly disposed on the thin-film encapsulation layer.
[0031] According to some example embodiments, the inorganic insulating layer may be arranged to cover the end of the second encapsulation layer.
[0032] According to one or more example embodiments, a display device includes: a substrate including a display area and a peripheral area surrounding the display area, and the substrate having at least a curved portion; a plurality of display elements disposed in the display area of the substrate; a dam positioned in the peripheral area and including a lower layer having a first width and an upper layer having a second width greater than the first width; and a thin-film encapsulation layer disposed above the plurality of display elements and including a first encapsulation layer, a second encapsulation layer disposed above the first encapsulation layer, and an organic encapsulation layer positioned between the first encapsulation layer and the second encapsulation layer, wherein the second encapsulation layer includes a plurality of alternately arranged inorganic thin layers and a plurality of organic thin layers, and the plurality of inorganic thin layers cover the dam and are in contact with each other in at least a partial area.
[0033] According to some example embodiments, the plurality of organic thin layers may cover the dam section and be arranged discontinuously in at least some areas.
[0034] According to one or more example embodiments, a display device includes: a substrate including a display area and a peripheral area surrounding the display area, and the substrate having at least a curved portion; a plurality of display elements disposed in the display area of the substrate; and a thin-film encapsulation layer disposed above the plurality of display elements, and including a first encapsulation layer, a second encapsulation layer disposed above the first encapsulation layer, and an organic encapsulation layer positioned between the first encapsulation layer and the second encapsulation layer, wherein at least one of the first encapsulation layer and the second encapsulation layer includes a plurality of inorganic thin layers and a plurality of organic thin layers arranged alternately.
[0035] According to some example embodiments, each of the plurality of organic thin layers may include silicon dioxide.
[0036] According to some example embodiments, the elastic modulus of at least one of the first and second encapsulation layers can be from 5 GPa to 10 GPa.
[0037] According to some example embodiments, the plurality of inorganic thin layers may contact each other at the ends of at least one of the first and second encapsulation layers. Other aspects, features, and characteristics besides those described above will become apparent from the following detailed description, this disclosure, and the accompanying drawings. Attached Figure Description
[0038] The above and other aspects, features, and characteristics of certain exemplary embodiments will become more apparent from the following description taken in conjunction with the accompanying drawings, in which:
[0039] Figure 1A This is a schematic perspective view of a display device according to some example embodiments, and Figure 1B This is an illustrative representation of a display device according to some example embodiments. Figure 1A A cross-sectional view taken by line A-A' in the diagram;
[0040] Figure 2 This is a schematic plan view of a portion of a display device according to some example embodiments;
[0041] Figure 3 This is an equivalent circuit diagram of pixels that can be included in a display device according to some example embodiments;
[0042] Figure 4 This is a plan view illustrating a portion of a display device according to some example embodiments;
[0043] Figure 5 This is a cross-sectional view showing a portion of a display device according to some example embodiments;
[0044] Figure 6 This is a schematic cross-sectional view illustrating the process of manufacturing a display device according to some example embodiments;
[0045] Figure 7 This is a schematic cross-sectional view of a portion of a display device according to some example embodiments;
[0046] Figure 8 yes Figure 7 Enlarged cross-sectional view of region VIII;
[0047] Figure 9 This is a schematic cross-sectional view of a portion of a display device according to some example embodiments;
[0048] Figure 10 yes Figure 9 An enlarged cross-sectional view of region X;
[0049] Figure 11 This is a schematic plan view of a portion of the input sensing layer according to some example embodiments;
[0050] Figure 12A and Figure 12B These are plan views showing the first and second conductive layers of the input sensing layer according to some example embodiments;
[0051] Figure 12C This is a cross-sectional view showing the input sensing layer according to some example embodiments;
[0052] Figure 13A and Figure 13B These are plan views showing the first and second conductive layers of the input sensing layer according to some example embodiments;
[0053] Figure 13C This is a cross-sectional view showing the input sensing layer according to some example embodiments;
[0054] Figure 14 and Figure 15 This is a schematic cross-sectional view of a display device according to some example embodiments; and
[0055] Figure 16 and Figure 17 This is a schematic cross-sectional view of a display device according to some example embodiments. Detailed Implementation
[0056] Reference will now be made in more detail to aspects of some exemplary embodiments illustrated in the accompanying drawings, wherein the same reference numerals refer to the same elements throughout. In this respect, the embodiments may take different forms and should not be construed as limited to the description set forth herein. Therefore, exemplary embodiments are described below only by reference to the accompanying drawings to explain aspects of exemplary embodiments according to this specification. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. Throughout the disclosure, the expression “at least one of a, b, and c” means only a, only b, only c, both a and b, both a and c, both b and c, all a, b, and c, or any combination of a, b, and / or c.
[0057] In the following description, exemplary embodiments will be described in more detail with reference to the accompanying drawings, and in the following description, the same reference numerals will refer to the same elements, and redundant descriptions will be omitted.
[0058] It will be understood that although terms such as “first” and “second” may be used in this document to describe various components, these components should not be limited by these terms, and these terms are only used to distinguish one component from another.
[0059] As used herein, unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well.
[0060] It will be understood that terms such as “including,” “comprising,” and “having” as used herein indicate the presence of the stated features or components, but do not preclude the presence or addition of one or more other features or components.
[0061] It will be understood that when a layer, region, or component is referred to as being “on” another layer, region, or component, that layer, region, or component may be “directly on” the other layer, region, or component, or may be “indirectly on” the other layer, region, or component, with one or more intermediate layers, regions, or components between the layer, region, or component and the other layer, region, or component.
[0062] For ease of description, the dimensions of the components in the accompanying drawings may be exaggerated. In other words, this disclosure is not limited thereto because the dimensions and thicknesses of the components in the accompanying drawings have been arbitrarily shown for ease of description.
[0063] When an embodiment can be implemented differently, a particular process sequence can be performed in a different order than that described. For example, two consecutively described processes can be performed substantially simultaneously, or in the reverse order of their description.
[0064] As used herein, “A and / or B” means A, B, or A and B. Furthermore, “at least one of A and B” means A, B, or A and B.
[0065] It will be understood that when a layer, region, or component is referred to as being "connected to" another layer, region, or component, that layer, region, or component may be "directly connected to" the other layer, region, or component, or may be "indirectly connected to" the other layer, region, or component, with one or more intermediate layers, regions, or components between the layer, region, or component and the other layer, region, or component. For example, it will be understood that when a layer, region, or component is referred to as being "electrically connected to" another layer, region, or component, that layer, region, or component may be "directly electrically connected to" the other layer, region, or component, and / or may be "indirectly electrically connected to" the other layer, region, or component, with one or more intermediate layers, regions, or components between the layer, region, or component and the other layer, region, or component.
[0066] The x-axis, y-axis, and z-axis are not limited to the three axes of a Cartesian coordinate system and can be interpreted in a broader sense. For example, the x-axis, y-axis, and z-axis can be perpendicular to each other, or they can represent different directions that are not perpendicular to each other.
[0067] Figure 1A This is a schematic perspective view of a display device according to some example embodiments, and Figure 1B This is an illustrative representation of a display device according to some example embodiments. Figure 1A The cross-sectional view taken by line A-A' in the diagram.
[0068] Reference Figure 1AThe display device 1 may include a display area DA that implements or displays an image and a peripheral area PA (e.g., a border area) surrounding the display area DA that does not implement or display an image. The display device 1 may provide or display an image by using light emitted from a plurality of pixels P arranged in the display area DA, and the peripheral area PA may be a region surrounding the display area DA in which no image is displayed or a region outside the display area DA.
[0069] In the following description, an organic light-emitting display device using an organic light-emitting diode (OLED) as a display element will be used as an example of display device 1 according to some exemplary embodiments; however, the display device according to embodiments of this disclosure is not limited thereto. According to some exemplary embodiments, display device 1 according to embodiments of this disclosure may be an inorganic light-emitting display device (or an inorganic electroluminescent (EL) display device), or it may be a display device such as a quantum dot light-emitting display device. For example, the emitting layer of the display element included in display device 1 may include organic materials, may include inorganic materials, may include quantum dots, may include organic materials and quantum dots, or may include inorganic materials and quantum dots.
[0070] Display device 1 may include a three-dimensional display surface or a curved display surface. When display device 1 includes a three-dimensional display surface, display device 1 may include multiple display areas indicating different directions, and may include, for example, a polygonal columnar display surface.
[0071] When the display device 1 includes a curved display surface, the display device 1 can be implemented in various forms such as flexible, foldable, and rollable display devices. The display device 1 can be bent about a first bending axis BAX1 and a second bending axis BAX2. Although Figure 1A The image shows the flat state before bending the display device 1, but as... Figure 1B As shown, at least a portion of the display device 1 can be bent.
[0072] Figure 1A and Figure 1BThe illustration shows that the display device 1 can be bent around a first bending axis BAX1 and a second bending axis BAX2; however, according to some example embodiments, the display device can have a shape in which all four edge portions (e.g., at the first and second edges of the display device 1, adjacent to the first and second edges of the display device 1, or corresponding to the first and second edges of the display device 1) are bent around the first bending axis BAX1 and the second bending axis BAX2 and (e.g., at the third and fourth edges of the display device 1, adjacent to the third and fourth edges of the display device 1, or corresponding to the third and fourth edges of the display device 1) are bent around a third bending axis and a fourth bending axis that intersect the first bending axis BAX1 and the second bending axis BAX2.
[0073] Figure 1B The display device 1 may include a curved region BA on each of two sides symmetrical to each other. The curved region BA may include at least a portion of the display region DA and at least a portion of the peripheral region PA. Typically, because the user is facing the display device 1 in the -z direction, a portion of the peripheral region PA can be identified as a non-display region NDA in which no image is displayed. However, when the curvature of the curved region BA is adjusted, the portion of the peripheral region PA that is identified as a non-display region NDA in the user's eye can be reduced or eliminated.
[0074] According to some example embodiments, such as Figure 1A As shown, display device 1 can be applied to a mobile phone terminal. According to some example embodiments, a mobile phone terminal can be constructed by arranging electronic modules, camera modules, and power modules mounted on a motherboard together with display device 1 in a bracket / housing, etc. Display device 1 according to some example embodiments of this disclosure can be applied to large electronic devices such as televisions or monitors, as well as small and medium-sized electronic devices such as tablet computers, car navigation devices, game consoles, or smartwatches.
[0075] Figure 1A The illustration shows a case where the display area DA of the display device 1 is a quadrilateral; however, according to some example embodiments, the shape of the display area DA may also be a circle, an ellipse, or a polygon such as a triangle or a pentagon.
[0076] Figure 2 This is a schematic plan view of a portion of a display device according to some example embodiments.
[0077] Reference Figure 2The display device 1 may include a plurality of pixels P arranged in a display area DA. Each pixel P may include a display element such as an organic light-emitting diode (OLED). Each pixel P may emit, for example, red, green, blue, or white light from the OLED. As described above, according to this disclosure, a pixel P can be understood as a pixel that emits any one of red, green, blue, and white light. The display area DA may be covered by a thin-film encapsulation layer 300 to protect the display area DA from external air or moisture.
[0078] Each pixel P can be electrically connected to peripheral circuitry arranged in the peripheral region PA. The peripheral region PA can be equipped with a first scan drive circuit 110, a second scan drive circuit 120, a pad portion 140, a data drive circuit 150, a first power line 160, and a second power line 170.
[0079] The first scan driving circuit 110 may include a plurality of scan circuits. Each of the plurality of scan circuits may provide a scan signal to each pixel P via a scan line SL. The first scan driving circuit 110 may also include a plurality of emission control circuits. Each of the plurality of emission control circuits may provide an emission control signal to each pixel P via a plurality of emission control lines EL. In another embodiment, the display device 1 may include a separate emission control driving circuit arranged such that the emission control driving circuit is spaced apart from the first scan driving circuit 110.
[0080] The second scan driving circuit 120 may be arranged parallel to the first scan driving circuit 110, with the display area DA located between the second scan driving circuit 120 and the first scan driving circuit 110. Each pixel P arranged in the display area DA may be electrically connected to the first scan driving circuit 110 and the second scan driving circuit 120 to receive scan signals. According to some example embodiments, some pixels P arranged in the display area DA may be electrically connected to the first scan driving circuit 110, while other pixels P may be connected to the second scan driving circuit 120. According to some example embodiments, the second scan driving circuit 120 may be omitted.
[0081] The pad portion 140 can be disposed on one side of the substrate 100. The pad portion 140 can be exposed without being covered by an insulating layer and can be electrically connected to the printed circuit board (PCB). The pad portion PCB-P of the printed circuit board PCB can be electrically connected to the pad portion 140 of the display device 1. The printed circuit board PCB can be configured to transmit power or signals from the controller to the display device 1. Control signals generated by the controller can be transmitted through the printed circuit board PCB to each of the first scan drive circuit 110 and the second scan drive circuit 120.
[0082] The controller can transmit the first power supply voltage ELVDD and the second power supply voltage ELVSS (see first connection line 161 and second connection line 171 respectively) to the first power supply voltage ELVDD and the second power supply voltage ELVSS respectively. Figure 3 The first power supply voltage ELVDD can be provided to each pixel P via the drive voltage line PL connected to the first power supply line 160, and the second power supply voltage ELVSS can be provided to the opposite electrode 223 of each pixel P connected to the second power supply line 170 (see...). Figure 5 ).
[0083] The data driver circuit 150 can be electrically connected to the data line DL. The data signal of the data driver circuit 150 can be provided to each pixel P through the connection line 151 connected to the pad portion 140 and the data line DL connected to the connection line 151. Figure 2 The diagram shows the data driver circuitry 150 arranged on a printed circuit board (PCB); however, according to some example embodiments, the data driver circuitry 150 may be arranged on the substrate 100. For example, the data driver circuitry 150 may be arranged between the pad portion 140 and the first power line 160.
[0084] The first power line 160 may include a first sub-line 162 and a second sub-line 163, which extend parallel to each other in the x-direction, with the display area DA located between the first sub-line 162 and the second sub-line 163. The second power line 170 may partially surround the display area DA in a ring shape with an opening on one side.
[0085] The display area DA can be covered by a thin-film encapsulation layer 300 to protect it from external air or moisture. The thin-film encapsulation layer 300 can cover the display area DA and extend to the peripheral area PA to overlap with the first scan drive circuit 110 and the second scan drive circuit 120, as well as the first power line 160 and the second power line 170. The thin-film encapsulation layer 300 extending to the peripheral area PA can be arranged to be spaced a certain distance from the edge of the substrate 100. For example... Figure 5 As shown, the thin-film encapsulation layer 300 may include a multilayer structure, which includes at least one first encapsulation layer 310, at least one organic encapsulation layer 320, and at least one second encapsulation layer 330. (Refer to...) Figure 5 The thin-film encapsulation layer 300 is described in more detail.
[0086] Figure 3 This is an equivalent circuit diagram of pixels that can be included in a display device according to some example embodiments.
[0087] Reference Figure 3 and Figure 6Each pixel P may include a pixel circuit PC connected to the scan line SL and the data line DL, and an organic light-emitting diode (OLED) connected to the pixel circuit PC.
[0088] The pixel circuit PC may include a driving thin-film transistor Td, a switching thin-film transistor Ts, and a storage capacitor Cst. The switching thin-film transistor Ts may be connected to the scan line SL and the data line DL, and may be configured to transmit the data signal Dm input through the data line DL to the driving thin-film transistor Td according to the scan signal Sn input through the scan line SL.
[0089] The storage capacitor Cst can be connected to the switching thin-film transistor Ts and the drive voltage line PL, and can store the voltage corresponding to the difference between the voltage received from the switching thin-film transistor Ts and the first power supply voltage ELVDD (or drive voltage) supplied to the drive voltage line PL.
[0090] The driving thin-film transistor Td can be connected to the driving voltage line PL and the storage capacitor Cst, and can control the driving current flowing from the driving voltage line PL through the organic light-emitting diode (OLED) in response to the voltage value stored in the storage capacitor Cst. The OLED can then emit light with a specific brightness based on the driving current. According to some example embodiments, it is possible to... Figure 2 The emitter control line EL shown is used to control the input and output electrodes of the thin-film transistor Td.
[0091] although Figure 3 The illustration shows a pixel circuit PC comprising two thin-film transistors and a storage capacitor, but embodiments of this disclosure are not limited thereto. Therefore, according to some example embodiments, the pixel circuit PC may include additional transistors, capacitors, and / or other electronic circuit components without departing from the spirit and scope of embodiments of this disclosure. According to some example embodiments, the pixel circuit PC may include seven thin-film transistors and a storage capacitor. In another embodiment, the pixel circuit PC may include two or more storage capacitors.
[0092] Figure 4 This is a plan view illustrating a portion of a display device according to some example embodiments, and Figure 5 This is a cross-sectional view showing a portion of a display device according to some example embodiments. Figure 4 Corresponding to Figure 2 Region II, and Figure 5 Corresponding to Figure 2 The cross section B-B'.
[0093] Reference Figure 4The thin-film encapsulation layer 300 can extend to the peripheral region PA. A first partition wall PW1 and a second partition wall PW2 extending along the periphery of the display region DA can be disposed in the peripheral region PA. The first partition wall PW1 and the second partition wall PW2 can be arranged to surround the periphery of the display region DA. The first partition wall PW1 and the second partition wall PW2 can be provided to prevent or reduce overflow of the organic encapsulation layer 320 of the thin-film encapsulation layer 300, as will be described below. The first partition wall PW1 and the second partition wall PW2 can be arranged to be spaced apart from each other.
[0094] The second power line 170 may at least partially overlap with the first partition wall PW1 and the second partition wall PW2. Although Figure 4 The illustration shows the second power line 170 completely overlapping the first partition wall PW1 and partially overlapping the second partition wall PW2, but this is merely an example and embodiments according to this disclosure are not limited thereto. The width of the second power line 170, as well as the widths of the first partition wall PW1 and the second partition wall PW2, can be modified according to different designs.
[0095] The end 300E of the thin-film encapsulation layer 300 can be arranged to be spaced apart from the edge 100E of the substrate 100 by a certain distance d. According to some example embodiments, an inorganic insulating layer can be disposed below the thin-film encapsulation layer 300. The end 300E of the thin-film encapsulation layer 300 can prevent external moisture from flowing into the thin-film encapsulation layer 300 through the contact between the inorganic layers.
[0096] Reference Figure 5 The cross-sectional structure of the display device according to some example embodiments is described in more detail.
[0097] Reference Figure 5 The display area DA, substrate 100 may include a glass material or a polymer resin. According to some example embodiments, substrate 100 may include multiple sublayers. The multiple sublayers may be a structure in which organic and inorganic layers are alternately stacked. When substrate 100 includes a polymer resin, substrate 100 may include polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, or cellulose acetate propionate.
[0098] A display layer 200, including a display element such as an organic light-emitting diode, and a thin-film encapsulation layer 300 covering the display layer 200 can be disposed on the substrate 100. The display layer 200 will be described in more detail below.
[0099] A buffer layer 201 may be formed on the substrate 100 to prevent or reduce the penetration of impurities into the semiconductor layer Act of the thin-film transistor (TFT). The buffer layer 201 may include an inorganic insulating material such as silicon nitride, silicon oxynitride, and silicon oxide, and may be a single layer or multiple layers comprising the inorganic insulating material.
[0100] Pixel circuitry PC can be disposed on buffer layer 201. Pixel circuitry PC may include thin-film transistors (TFTs) and storage capacitors (Cst). Thin-film transistors (TFTs) may include a semiconductor layer (Act), a gate electrode (GE), a source electrode (SE), and a drain electrode (DE).
[0101] According to some example embodiments, the data line DL of the pixel circuit PC can be electrically connected to a switching thin-film transistor included in the pixel circuit PC. According to some example embodiments, a top-gate type is shown where the gate electrode GE is disposed above the semiconductor layer Act and the gate insulating layer 203 is located between the gate electrode GE and the semiconductor layer Act; however, according to some example embodiments, the thin-film transistor TFT can be a bottom-gate type.
[0102] The semiconductor layer Act may include polycrystalline silicon. Alternatively, the semiconductor layer Act may include amorphous silicon, may include oxide semiconductors, or may include organic semiconductors, etc. The gate electrode GE may include a low-resistance metallic material. The gate electrode GE may include a conductive material, including molybdenum (Mo), aluminum (Al), copper (Cu), or titanium (Ti), and may include a single layer or multiple layers containing the above materials.
[0103] The gate insulating layer 203 between the semiconductor layer Act and the gate electrode GE may include inorganic insulating materials such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, and hafnium oxide. The gate insulating layer 203 may include a single layer or multiple layers containing the above materials.
[0104] The source electrode SE and drain electrode DE can be located on the same layer as the data line DL and can comprise the same material. The source electrode SE, drain electrode DE, and data line DL can comprise highly conductive materials. The source electrode SE and drain electrode DE can comprise conductive materials containing molybdenum (Mo), aluminum (Al), copper (Cu), or titanium (Ti), and can comprise a single layer or multiple layers containing these materials. In an embodiment, the source electrode SE, drain electrode DE, and data line DL can comprise multiple layers of Ti / Al / Ti.
[0105] The storage capacitor Cst may include a lower electrode CE1 and an upper electrode CE2 that overlap each other, with a first interlayer insulating layer 205 located between the lower electrode CE1 and the upper electrode CE2. The storage capacitor Cst may overlap with a thin-film transistor (TFT). In this respect, Figure 5The diagram shows that the gate electrode GE of the thin-film transistor TFT is the lower electrode CE1 of the storage capacitor Cst. According to some example embodiments, the storage capacitor Cst may not overlap with the thin-film transistor TFT. The storage capacitor Cst may be covered by a second interlayer insulating layer 207. The upper electrode CE2 of the storage capacitor Cst may include a conductive material comprising molybdenum (Mo), aluminum (Al), copper (Cu), or titanium (Ti), and may comprise a single layer or multiple layers comprising the above materials.
[0106] The first interlayer insulation layer 205 and the second interlayer insulation layer 207 may include inorganic insulating materials, such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, or hafnium oxide. The first interlayer insulation layer 205 and the second interlayer insulation layer 207 may include a single layer or multiple layers containing the above materials.
[0107] The pixel circuit PC, including a thin-film transistor (TFT) and a storage capacitor (Cst), can be covered by a first organic insulating layer 209. The first organic insulating layer 209 may include a substantially flat upper surface.
[0108] According to some example embodiments, a third interlayer insulation layer may also be disposed below the first organic insulating layer 209. The third interlayer insulation layer may include an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride.
[0109] The pixel circuit PC can be electrically connected to the pixel electrode 221. For example, as... Figure 5 As shown, the contact metal layer CM can be positioned between the thin-film transistor TFT and the pixel electrode 221. The contact metal layer CM can be connected to the thin-film transistor TFT through contact holes formed in the first organic insulating layer 209, and the pixel electrode 221 can be connected to the contact metal layer CM through contact holes formed in the second organic insulating layer 211 located on the contact metal layer CM. The contact metal layer CM can include a conductive material comprising molybdenum (Mo), aluminum (Al), copper (Cu), or titanium (Ti), and can include a single layer or multiple layers comprising the above materials. In an embodiment, the contact metal layer CM can include multiple layers of Ti / Al / Ti.
[0110] The first organic insulating layer 209 and the second organic insulating layer 211 may comprise organic insulating materials, such as general polymers like polymethyl methacrylate (PMMA) or polystyrene (PS), polymer derivatives having phenolic groups, acrylic polymers, imide polymers, aryl ether polymers, amide polymers, fluoropolymers, p-xylyl polymers, vinyl alcohol polymers, or any mixtures thereof. According to some example embodiments, the first organic insulating layer 209 and the second organic insulating layer 211 may comprise polyimide.
[0111] Pixel electrode 221 may be formed on the second organic insulating layer 211. Pixel electrode 221 may include a conductive oxide, such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), or aluminum zinc oxide (AZO). According to some example embodiments, pixel electrode 221 may include a reflective layer comprising silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or any compound thereof. According to some example embodiments, pixel electrode 221 may also include a layer formed of ITO, IZO, ZnO, or In2O3 above / below the aforementioned reflective layer.
[0112] A pixel defining layer 215 may be formed on the pixel electrode 221. The pixel defining layer 215 may include an opening exposing the upper surface of the pixel electrode 221 and may cover the edge of the pixel electrode 221. The pixel defining layer 215 may include an organic insulating material. Alternatively, the pixel defining layer 215 may include an inorganic insulating material such as silicon nitride, silicon oxynitride, or silicon oxide. Alternatively, the pixel defining layer 215 may include both organic and inorganic insulating materials.
[0113] The intermediate layer 222 may include an emitting layer 222b. The intermediate layer 222 may include a first functional layer 222a disposed below the emitting layer 222b and / or a second functional layer 222c disposed above the emitting layer 222b. The emitting layer 222b may include a high molecular weight or low molecular weight organic material for emitting light of a certain color.
[0114] The first functional layer 222a may comprise a single layer or multiple layers. For example, when the first functional layer 222a is formed of a high molecular weight material, it may comprise a single-layer hole transport layer (HTL) and may be formed of polyethylene dihydroxythiophene (PEDOT, poly-(3,4)-ethylene-dihydroxythiophene) or polyaniline (PANI). When the first functional layer 222a is formed of a low molecular weight material, it may comprise a hole injection layer (HIL) and a hole transport layer (HTL).
[0115] The second functional layer 222c may not always be provided. For example, the second functional layer 222c may be formed when the first functional layer 222a and the emitter layer 222b are formed of a high molecular weight material. The second functional layer 222c may comprise a single layer or multiple layers. The second functional layer 222c may comprise an electron transport layer (ETL) and / or an electron injection layer (EIL).
[0116] An emitter layer 222b of intermediate layer 222 can be arranged for each pixel in display area DA. The emitter layer 222b can be patterned to correspond to pixel electrode 221. Unlike emitter layer 222b, the first functional layer 222a and / or the second functional layer 222c of intermediate layer 222 can extend toward peripheral area PA so that they are located not only in display area DA but also in a portion of peripheral area PA.
[0117] The counter electrode 223 may comprise a conductive material having a low work function. For example, the counter electrode 223 may comprise a (semi-)transparent layer comprising silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), or any alloy thereof. Alternatively, the counter electrode 223 may further comprise a layer such as ITO, IZO, ZnO, or In2O3 on the (semi-)transparent layer comprising the above materials. The counter electrode 223 may be formed on the peripheral region PA and on the display region DA. The counter electrode 223 extending toward the peripheral region PA may be electrically connected to the second power line 170.
[0118] The first functional layer 222a, the second functional layer 222c, and the relative electrode 223 can be formed by thermal evaporation.
[0119] According to some example embodiments, a capping layer may be disposed on the opposing electrode 223. For example, the capping layer may be provided as a single layer or multiple layers, comprising materials selected from organic materials, inorganic materials, and mixtures thereof. According to some example embodiments, a LiF layer may be positioned on the capping layer.
[0120] Spacers 217 may be formed on pixel defining layer 215. Spacers 217 may include organic insulating materials such as polyimide. Alternatively, spacers 217 may include inorganic insulating materials, or may include both organic and inorganic insulating materials.
[0121] The spacer 217 may comprise a different material than the pixel defining layer 215, or it may comprise the same material as the pixel defining layer 215. According to some example embodiments, the pixel defining layer 215 and the spacer 217 may comprise polyimide. The pixel defining layer 215 and the spacer 217 may be formed together in a masking process using a halftone mask.
[0122] An organic light-emitting diode (OLED) can be covered by a thin-film encapsulation layer 300. The OLED can be sealed using the thin-film encapsulation layer 300 to isolate it from external air. The thin-film encapsulation layer 300 can be provided as a multilayer structure in which multiple layers are stacked. According to some example embodiments, the thin-film encapsulation layer 300 may include a first encapsulation layer 310, a second encapsulation layer 330, and an organic encapsulation layer 320 positioned between the first encapsulation layer 310 and the second encapsulation layer 330. According to some example embodiments, the number of organic encapsulation layers, the number of first encapsulation layers, the number of second encapsulation layers, and the stacking order of the organic encapsulation layers, the first encapsulation layers, and the second encapsulation layers can be modified.
[0123] The first encapsulation layer 310 may include one or more inorganic materials selected from aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and silicon oxynitride. According to some example embodiments, the first encapsulation layer 310 may include silicon nitride. The first encapsulation layer 310 may include a single layer or multiple layers comprising the above materials.
[0124] The organic encapsulation layer 320 may include monomer-based materials and / or polymer-based materials. Polymer-based materials may include acrylic resins, epoxy resins, polyimides, or polyethylene, etc. According to some example embodiments, the organic encapsulation layer 320 may include acrylates.
[0125] The organic encapsulation layer 320 can be externally sealed by the first encapsulation layer 310 and the second encapsulation layer 330. (See reference...) Figure 5 In the peripheral region PA, the organic encapsulation layer 320 can be blocked by the first partition wall PW1 to prevent or reduce the overflow of the organic encapsulation layer 320 toward the edge 100E of the substrate 100. Figure 5 The diagram shows that the end 320E of the organic encapsulation layer 320 extends to the inner wall of the first partition wall PW1; however, in some cases, the end 320E of the organic encapsulation layer 320 may extend to the inner wall of the second partition wall PW2.
[0126] The second encapsulation layer 330 can be disposed above the first encapsulation layer 310, and the organic encapsulation layer 320 is located between the second encapsulation layer 330 and the first encapsulation layer 310. For example... Figure 5 As shown, the organic encapsulation layer 320 can be sealed from the outside by the first encapsulation layer 310 and the second encapsulation layer 330.
[0127] Because it is possible Figure 1BThe shape of the display device 1 can be freely modified as shown, which may cause reliability issues with the thin-film encapsulation layer 300. As a comparative example, when a second inorganic encapsulation layer is stacked on top of an organic encapsulation layer and thus the thin-film encapsulation layer has a structure of first inorganic encapsulation layer / organic encapsulation layer / second inorganic encapsulation layer, the second inorganic encapsulation layer positioned on the organic encapsulation layer may be subjected to greater stress than the underlying layer due to the bending of the substrate, and therefore cracks may occur therein, which may lead to failures such as the penetration of moisture or other contaminants.
[0128] Therefore, in the display device 1 according to some example embodiments, the thin-film encapsulation layer 300 may include, for example, Figure 5 The second encapsulation layer 330 shown, and therefore, due to the reduced stress in the case of bending, the thin film encapsulation layer 300 can be formed to be robustly resistant to cracks.
[0129] The second encapsulation layer 330 may include a plurality of inorganic thin layers 330a and a plurality of organic thin layers 330b. The plurality of inorganic thin layers 330a and the plurality of organic thin layers 330b may be stacked alternately on top of each other. According to some example embodiments, the plurality of inorganic thin layers 330a and the plurality of organic thin layers 330b can be formed by hybrid layer deposition (HLD). This is a process that can form ultrathin organic / inorganic composite layers, and can be used to form ultrathin organic / inorganic composite layers.
[0130] According to hybrid layer deposition (HLD), and according to some example embodiments, multiple inorganic thin layers 330a can be formed by atomic layer deposition (ALD). The multiple inorganic thin layers 330a formed by this process can have a higher density than those formed by chemical vapor deposition (CVD). Therefore, the thickness of the multiple inorganic thin layers 330a can be relatively reduced, while simultaneously achieving more robust barrier properties. The multiple inorganic thin layers 330a may include, for example, silicon nitride (SiN). x ).
[0131] According to hybrid layer deposition (HLD), and according to some example embodiments, multiple organic thin layers 330b can be formed by chemical vapor deposition (CVD). Therefore, the multiple organic thin layers 330b can have a lower density than the multiple inorganic thin layers 330a. The multiple organic thin layers 330b can include, for example, silicon oxycarbide (SiOC). x ).
[0132] The first encapsulation layer 310 may have an elastic modulus of approximately 60 GPa to approximately 80 GPa. On the other hand, the second encapsulation layer 330 may have an elastic modulus of approximately 5 GPa to approximately 10 GPa, and for example, an elastic modulus of approximately 5 GPa to approximately 7 GPa. Because the second encapsulation layer 330 is disposed above the thin-film encapsulation layer 300 compared to the first encapsulation layer 310, the second encapsulation layer 330 is more susceptible to stress than the first encapsulation layer 310. Moreover, because the organic encapsulation layer 320 is disposed below the second encapsulation layer 330, when a crack occurs in the second encapsulation layer 330, external air and moisture can immediately penetrate into the organic encapsulation layer 320, which may lead to more fatal failures. Therefore, because the second encapsulation layer 330 has an elastic modulus that is approximately 5 to 10 times lower than that of the first encapsulation layer 310, the thin-film encapsulation layer 300 can be made to be robustly resistant to stress.
[0133] According to some example embodiments, the display device according to some example embodiments of this disclosure may have Figure 16 or Figure 17 The structure shown. Figure 16 Display device 1-1' and Figure 17 The display device 1-1" can be structurally similar to the thin-film encapsulation layer 300. Figure 5 The above embodiments differ from the above. Other configurations are the same as... Figure 5 Their configurations are the same, and therefore, the differences between them will be described below.
[0134] Reference Figure 16 The first encapsulation layer 310 may include a plurality of alternately stacked inorganic thin layers 310a and a plurality of organic thin layers 310b. The plurality of inorganic thin layers 310a and the plurality of organic thin layers 310b may be in accordance with the above-mentioned reference. Figure 5 The multiple inorganic thin layers 330a and multiple organic thin layers 330b described are identical, and therefore, will utilize Figure 5 The description of multiple inorganic thin layers 330a and multiple organic thin layers 330b is used instead of the description of multiple inorganic thin layers 310a and multiple organic thin layers 310b.
[0135] Reference Figure 17 The first encapsulation layer 310 may include a plurality of inorganic thin layers 310a and a plurality of organic thin layers 310b, and the second encapsulation layer 330 may include a plurality of inorganic thin layers 330a and a plurality of organic thin layers 330b. The plurality of inorganic thin layers 310a and 330b may be formed with the same physical properties and by the same manufacturing method, and the plurality of organic thin layers 310b and 330b may be formed with the same physical properties and by the same manufacturing method. Figure 17In the display device 1-1", because both the first encapsulation layer 310 and the second encapsulation layer 330 include a "hybrid composite layer", therefore... Figure 5 Display device 1-1 and Figure 16 Compared to the display device 1-1', the thin film encapsulation layer 300 can be made thinner.
[0136] Figure 16 or Figure 17 The structure of the thin-film encapsulation layer 300 can also be similarly applied to structures having the groove G and dam D described below. Figure 7 , Figure 9 , Figure 14 and Figure 15 The corresponding structure.
[0137] Referring to the peripheral region PA, the thin-film encapsulation layer 300 can extend from the display region DA to the peripheral region PA. The first partition wall PW1 and the second partition wall PW2, which will be described in more detail below, can be disposed on the peripheral region PA, and a portion of the thin-film encapsulation layer 300 (i.e., the first encapsulation layer 310 and the second encapsulation layer 330) can extend to the edge region EA outside the second partition wall PW2.
[0138] The first partition wall PW1 and the second partition wall PW2 can be positioned on the outer perimeter of the display area DA in the outer perimeter of the outer perimeter of the display area DA. The first partition wall PW1 can be arranged adjacent to the display area DA, and the second partition wall PW2 can be arranged spaced apart from the first partition wall PW1.
[0139] The first partition wall PW1 may be disposed above the first organic insulating layer 209 extending into the peripheral region PA, and thus may include a portion 215P of the pixel defining layer 215 and a portion 217P of the spacer 217. However, this is merely an example, and the layers constituting the first partition wall PW1 may include some layers disposed in the display region DA. Similarly, the second partition wall PW2 may include a portion 211P of the second organic insulating layer 211, a portion 215P of the pixel defining layer 215, and a portion 217P of the spacer 217. According to some example embodiments, some of the portions 209P of the first organic insulating layer 209, 211P of the second organic insulating layer 211, 215P of the pixel defining layer 215, and 217P of the spacer 217 constituting the second partition wall PW2 may be omitted.
[0140] According to some example embodiments, the height h2 of the second partition wall PW2 may be greater than the height h1 of the first partition wall PW1. In this case, the term "height" can be understood as the distance from the same reference plane (e.g., the upper surface of the substrate 100) to the upper surfaces of the first partition wall PW1 and the second partition wall PW2. Figure 5 The illustration shows a case where a first partition wall PW1 and a second partition wall PW2 are provided in the peripheral region PA; however, according to some example embodiments, the first partition wall PW1 or the second partition wall PW2 may be omitted.
[0141] The second power line 170 can be arranged below the first partition wall PW1 and the second partition wall PW2. (Refer to...) Figure 4 The second power line 170 may overlap with the first partition wall PW1 and may overlap with at least a portion of the second partition wall PW2. A connecting line 172 may be arranged on the second power line 170. The second power line 170 may be arranged to supply a second power supply voltage to the opposite electrode 223 by contacting the connecting line 172 with one side of the contact opposite electrode 223. Although described in more detail below... Figure 5 and Figure 7 It is shown that one end of the second power line 170 is positioned between a portion 209P of the first organic insulating layer 209 and a portion 211P of the second organic insulating layer 211 constituting the second partition wall PW2, and one end of the connecting line 172 is positioned between a portion 211P of the second organic insulating layer 211 constituting the second partition wall PW2 and a portion 215P of the pixel defining layer 215, but the embodiments according to this disclosure are not limited thereto.
[0142] The first encapsulation layer 310 and the second encapsulation layer 330 of the aforementioned thin-film encapsulation layer 300 can extend to the peripheral region PA. Figure 5 In this configuration, because the organic encapsulation layer 320 is arranged to extend to the first partition wall PW1, the first encapsulation layer 310 and the second encapsulation layer 330 can be in direct contact with each other in areas where the organic encapsulation layer 320 is not provided. The first encapsulation layer 310 and the second encapsulation layer 330 can be in direct contact with each other in areas extending on the upper surface of the first partition wall PW1, in areas extending between the first partition wall PW1 and the second partition wall PW2, and in areas extending on the lower insulating layer 210 outside the second partition wall PW2.
[0143] As described above, the thin-film encapsulation layer 300 can extend from the display area DA to the peripheral area PA. The first encapsulation layer 310 and the second encapsulation layer 330 of the thin-film encapsulation layer 300 can extend to the edge area EA outside the second partition wall PW2. The end 300E of the thin-film encapsulation layer 300 (i.e., the end of the first encapsulation layer 310 and the second encapsulation layer 330) can be positioned at a portion of the edge area EA. The second encapsulation layer 330 can have a structure that covers the first encapsulation layer 310 at the end 300E of the thin-film encapsulation layer 300. Reference will be made below. Figure 6 To describe this in more detail.
[0144] Figure 6This is a schematic cross-sectional view illustrating the process of manufacturing a display device according to some example embodiments. Figure 6 Corresponding to Figure 5 Region V.
[0145] Figure 6 The process for manufacturing the first encapsulation layer 310 and the second encapsulation layer 330 of the thin-film encapsulation layer 300 is shown. (Refer to...) Figure 6 A first encapsulation layer 310 can be formed on the substrate 100, and then a second encapsulation layer 330 can be formed on the first encapsulation layer 310.
[0146] For ease of description, Figure 6 The diagram shows that a first encapsulation layer 310 can be disposed on the substrate 100; however, according to some example embodiments, such as Figure 5 As shown, a lower insulating layer 210 can be disposed between the substrate 100 and the first encapsulation layer 310, and the first encapsulation layer 310 can be positioned on the lower insulating layer 210. Furthermore, Figure 6 A thin-film encapsulation layer 300 disposed on the peripheral region PA is shown, and a second encapsulation layer 330 disposed directly on the first encapsulation layer 310 is shown; however, as Figure 5 As shown, an organic encapsulation layer 320 may be arranged between the first encapsulation layer 310 and the second encapsulation layer 330 in a portion of the peripheral region PA and the display region DA.
[0147] According to some example embodiments, the thickness t2 of the second encapsulation layer 330 can be less than the thickness t1 of the first encapsulation layer 310. For example, the first encapsulation layer 310 can have a thickness t1 of about 0.5 μm to about 1 μm, and the second encapsulation layer 330 can have a thickness t2 of about 0.25 μm to about 0.45 μm. That is, because the second encapsulation layer 330 is formed of an ultrathin organic / inorganic composite layer, the second encapsulation layer 330 can be formed to be thinner than the first encapsulation layer 310. Therefore, the reliability of the thin-film encapsulation layer 300 can be relatively improved when the display device is bent.
[0148] In some exemplary embodiments of the manufacturing method according to this disclosure, the first encapsulation layer 310 and the second encapsulation layer 330 can be formed using the same mask M. The mask M may have an opening M-OP, and the deposition material for forming the first encapsulation layer 310 and the second encapsulation layer 330 can be deposited on the substrate 100 along direction "a" through the opening M-OP. Therefore, the first encapsulation layer 310 and the second encapsulation layer 330 should be designed to be formed only in the region corresponding to the opening M-OP of the mask M. However, according to some exemplary embodiments, the deposition material can diffuse into the space between the substrate 100 and the mask M, and thus, regions where the deposition material partially stacks (hereinafter referred to as the shadow region SDA) can be formed in the region overlapping with the mask M. In this case, the deposition material forming the shadow region SDA can diffuse in direction "b" intersecting direction "a".
[0149] In the case of the first encapsulation layer 310, the thickness t1' of the portion positioned on the shadow region SDA can be less than the thickness t1 of the portion formed through the opening M-OP of the mask M. Similarly, in the case of the second encapsulation layer 330, the thickness t2' of the portion positioned on the shadow region SDA can be less than the thickness t2 of the portion formed through the opening M-OP of the mask M.
[0150] In the second encapsulation layer 330, a plurality of inorganic thin layers 330a and a plurality of organic thin layers 330b can be stacked alternately, and the shaded region SDA1 of the plurality of inorganic thin layers 330a can have a larger width than the shaded region SDA2 of the plurality of organic thin layers 330b. This is because a difference in diffusion rate occurs due to the atomic weight difference between the inorganic material forming the plurality of inorganic thin layers 330a and the organic material forming the plurality of organic thin layers 330b. Thus, due to the width difference between the shaded regions SDA1 and SDA2, a first inorganic contact portion ICP1 in which the plurality of inorganic thin layers 330a are in direct contact with each other can be provided. Through the first inorganic contact portion ICP1, the plurality of organic thin layers 330b can be sealed from the outside, and moisture penetration due to external air can be prevented.
[0151] According to some example embodiments, the second encapsulation layer 330 may include an inorganic thin layer 330a disposed on its bottom and organic thin layers 300b / inorganic thin layers 330a disposed in pairs on the inorganic thin layer 330a. Therefore, the first encapsulation layer 310 may contact the surface of the inorganic thin layer 330a of the second encapsulation layer 330.
[0152] Figure 7 This is a schematic cross-sectional view of a portion of a display device according to some example embodiments, and Figure 8 yes Figure 7 Enlarged cross-sectional view of region VIII.
[0153] Reference Figure 7 According to some example embodiments, the display device 1-2 may include at least two dams D arranged in an edge region EA located outside the second partition wall PW2, and a groove G positioned between the at least two dams D. The configuration of the edge region EA is the same as the corresponding configuration of the display device 1-1 described above, except for the structure of the edge region EA. Therefore, the structure of the edge region EA will be described primarily below.
[0154] The dam section D can be arranged on the lower insulation layer 210. Although Figure 7 The lower insulating layer 210 is shown to include a buffer layer 201, a gate insulating layer 203, a first interlayer insulating layer 205, and a second interlayer insulating layer 207. However, some of these layers may be omitted, or another layer may be added. Figure 7 In the middle, the dam part D is positioned on the second interlayer insulation layer 207.
[0155] For example, refer to Figure 8 Each dam section D may include a lower layer LL and an upper layer UL. The lower layer LL of each dam section D may include an organic insulating material, and the upper layer UL of each dam section D may include a conductive material. Figure 7 and Figure 8 In this embodiment, each of the lower LL and the upper UL is provided as a single-layer structure; however, according to some example embodiments, the lower LL and / or the upper UL may be provided as a multi-layer structure.
[0156] According to some example embodiments, the lower LL may include and Figure 7 The second organic insulating layer 211 is made of the same material, and the upper UL layer may include the same material as the second organic insulating layer 211. Figure 7 The pixel electrode 221 is made of the same material. However, embodiments according to this disclosure are not limited thereto, and the lower layer LL and the upper layer UL can be provided by using layers comprising organic insulating materials or conductive materials disposed on the lower insulating layer 210.
[0157] At the surfaces where the lower LL and upper UL contact each other, the width LLW of the lower LL (specifically, the width of the bottom surface of the lower LL) can be smaller than the width ULW of the upper UL (specifically, the width of the upper surface of the upper UL). This indicates that the grooves G formed between the dams D have an undercut cross-section structure. That is, since the width LLW of the lower LL of each dam D is smaller than the width ULW of the upper UL, the distance d1 between the lower LLs can be greater than the distance d2 between the upper ULs.
[0158] From the perspective of the groove G, the groove G can represent the space between the dams D formed in the process of forming the dams D, and can be formed by removing a portion of the lower layer LL and a portion of the upper layer UL of each dam D. The hole H2 passing through the upper layer UL and the hole H1 passing through the lower layer LL can be spatially connected to form a groove G that is recessed in the -z direction.
[0159] The portion of the groove G that passes through the upper layer UL (e.g., the width (or distance) d2 of the hole H2) can be smaller than the portion of the groove G that passes through the lower layer LL (e.g., the width (or distance) d1 of the hole H1). The width (or distance) d2 of the hole H2 can be smaller than the width (or distance) d1 of the hole H1, and due to this structure, the groove G can have an undercut section.
[0160] The side surface of the upper UL defining hole H2 may protrude more toward the center of the groove G than the side surface of the lower LL defining hole H1. The portion of the upper UL protruding toward the center of the groove G may form a pair of eaves (or a pair of protruding tips or tips PT).
[0161] A thin-film encapsulation layer 300 can be positioned on the dam D, and the thin-film encapsulation layer 300 is the first encapsulation layer 310 and the second encapsulation layer 330. The dam D and the groove G can be formed prior to the process of forming the thin-film encapsulation layer 300. The first encapsulation layer 310 can be continuously formed along the upper surface and side surface of the dam D (i.e., the inner surface of the groove G).
[0162] The second encapsulation layer 330 can be disposed on the first encapsulation layer 310. In this case, as with the first encapsulation layer 310 described above, a plurality of inorganic thin layers 330a of the second encapsulation layer 330 can be continuously formed. On the other hand, the plurality of organic thin layers 330b of the second encapsulation layer 330 can be interrupted around the groove G. Figure 8 As shown, a plurality of organic thin layers 330b cover the dam portion D. Each of the plurality of organic thin layers 330b has a discontinuous structure due to the groove G; in other words, the plurality of organic thin layers 330b are arranged discontinuously in at least a partial area. That is, when the lower layer LL of the dam portion D fails to cover the side surface but covers the upper surface and side surface of the upper layer UL of the dam portion D, the plurality of organic thin layers 330b can be broken by a pair of tips PT formed in the upper layer UL. The length c of each tip PT in the pair of tips PT can be less than about 2.0 μm. According to some example embodiments, the length c can be from about 1.0 μm to about 1.8 μm.
[0163] Therefore, since no organic thin layers 330b are formed on the sides of the lower layer LL, the multiple inorganic thin layers 330a can contact each other to form the second inorganic contact portion ICP2. Because the inorganic insulating material has a better step coverage than the organic insulating material, the first encapsulation layer 310 and the multiple inorganic thin layers 330a including the inorganic insulating material can be arranged continuously along the structure of the dam D and the groove G; however, the multiple organic thin layers 330b can be interrupted around the groove G.
[0164] The first encapsulation layer 310 and the plurality of inorganic thin layers 330a can be formed continuously along the outer surface of the dam portion D (i.e., the inner surface of the groove G) without interruption. The plurality of organic thin layers 330b can be interrupted around the groove G, and a portion 330b' of the plurality of organic thin layers 330b can be stacked in the groove G. At the interrupted portions of the plurality of organic thin layers 330b, the plurality of inorganic thin layers 330a can contact each other to form a second inorganic contact portion ICP2.
[0165] Figure 7 and Figure 8 The bottom surface of the recess G is shown to be positioned on the same plane as the upper surface of the second interlayer insulating layer 207; however, according to some example embodiments, the bottom surface of the recess G may be positioned on a virtual plane located between the bottom and upper surfaces of the lower insulating layer 210. For example, because the depth dp of the recess G can reduce the thickness of the first encapsulation layer 310, the depth dp of the recess G may be substantially less than the thickness t of the lower layer LL. The depth dp of the recess G may be about 2.0 μm or greater. According to some example embodiments, when the bottom surface of the recess G is positioned on a virtual plane located between the bottom and upper surfaces of the lower insulating layer 210, the depth dp of the recess G may be equal to the thickness t of the lower layer LL.
[0166] Figure 9 This is a schematic cross-sectional view of a portion of a display device according to some example embodiments, and Figure 10 yes Figure 9 An enlarged cross-sectional view of region X.
[0167] Reference Figure 9 According to some example embodiments, the display device 1-3 may include at least two dams D arranged in an edge region EA located outside the second partition wall PW2 and a groove G located between the at least two dams D. The configuration other than the structure of the edge region EA is the same as the corresponding configuration of the display device 1-1 described above, and therefore, the structure of the edge region EA will be described primarily below.
[0168] The dam portion D can be disposed on the substrate 100. In this case, the dam portion D may comprise the same material as some or all of the lower insulating layers 210. The fact that the dam portion D comprises the same material as some or all of the lower insulating layers 210 indicates that the dam portion D is formed by patterning some or all of the lower insulating layers 210. Figure 9 The groove G located between the dam sections D exposes the upper surface of the substrate 100; however, according to some example embodiments, the groove G may expose at least a portion of the layers included in the lower insulating layer 210. Although Figure 9 The lower insulating layer 210 is shown to include a buffer layer 201, a gate insulating layer 203, a first interlayer insulating layer 205, and a second interlayer insulating layer 207. However, some of the above layers may be omitted, or another layer may be added.
[0169] Reference Figure 9 and Figure 10 Each dam D may include a lower layer LL and an upper layer UL. According to some example embodiments, the lower layer LL of each dam D may include an inorganic insulating material, and the upper layer UL of each dam D may include a conductive material. For example, the lower layer LL may include the same material as all or some of the lower insulating layers 210, and the upper layer UL may include the same material as the pixel electrode 221.
[0170] According to some example embodiments, the upper UL can be provided by using "layers including conductive material" among the layers arranged on the lower insulating layer 210. The "layers including conductive material" can be the source electrode SE, drain electrode DE, contact metal layer CM, and pixel electrode 221. The upper UL can be formed as a single-layer or multi-layer structure including some or all of the "layers including conductive material".
[0171] At the surface where the lower LL contacts the upper UL, the width LLW of the lower LL can be smaller than the width ULW of the upper UL. This indicates that the groove G formed between the dams D has an undercut cross-section structure. That is, since the width LLW of the lower LL of each dam D is smaller than the width ULW of the upper UL, the distance d1 between the lower LLs can be greater than the distance d2 between the upper ULs.
[0172] From the perspective of the groove G, the groove G can represent the space between the dams D formed in the process of forming the dams D, and can be formed by removing a portion of the lower layer LL and a portion of the upper layer UL of each dam D. The hole H2 passing through the upper layer UL and the hole H1 passing through the lower layer LL can be spatially connected to form a groove G that is recessed in the -z direction.
[0173] The portion of the groove G that passes through the upper layer UL (e.g., the width (or distance) d2 of the hole H2) can be smaller than the portion of the groove G that passes through the lower layer LL (e.g., the width (or distance) d1 of the hole H1). The width (or distance) d2 of the hole H2 can be smaller than the width (or distance) d1 of the hole H1, and due to this structure, the groove G can have an undercut section.
[0174] The side surface of the upper UL defining the hole H2 may protrude more toward the center of the groove G than the side surface of the lower LL defining the hole H1. The portion of the upper UL protruding toward the center of the groove G may form a pair of eaves (or a pair of protruding tips or tips PT). For example, the length l of each of the pair of tips PT may be less than about 2.0 μm. In an embodiment, the length l may be from about 1.0 μm to about 1.8 μm.
[0175] A thin-film encapsulation layer 300 can be positioned on the dam D, and the thin-film encapsulation layer 300 is the first encapsulation layer 310 and the second encapsulation layer 330. The dam D and the groove G can be formed prior to the process of forming the thin-film encapsulation layer 300. The first encapsulation layer 310 can be continuously formed along the upper surface and side surface of the dam D (i.e., the inner surface of the groove G).
[0176] The second encapsulation layer 330 can be disposed on the first encapsulation layer 310. In this case, as with the first encapsulation layer 310 described above, a plurality of inorganic thin layers 330a of the second encapsulation layer 330 can be continuously formed. On the other hand, a plurality of organic thin layers 330b of the second encapsulation layer 330 can be interrupted around the groove G. Because inorganic insulating materials have a better step coverage than organic insulating materials, the first encapsulation layer 310 and the plurality of inorganic thin layers 330a including the inorganic insulating material can be continuously arranged along the structure of the dam section D and the groove G; however, the plurality of organic thin layers 330b can be interrupted around the groove G.
[0177] When the upper surface and side surface of the upper UL of the dam section D are covered instead of the side surface of the lower LL, the multiple organic thin layers 330b can be broken by a pair of tips PT formed in the upper UL. Therefore, since the multiple organic thin layers 330b are not formed at the side surface of the lower LL, the multiple inorganic thin layers 330a can contact each other to form a second inorganic contact portion ICP2.
[0178] In other words, the first encapsulation layer 310 and the plurality of inorganic thin layers 330a can be formed continuously along the outer surface of the dam D (i.e., the inner surface of the groove G) without interruption. The plurality of organic thin layers 330b can be interrupted around the groove G, and a portion 330b' of the plurality of organic thin layers 330b can be stacked in the groove G. At the interrupted portions of the plurality of organic thin layers 330b, the plurality of inorganic thin layers 330a can contact each other to form a second inorganic contact portion ICP2.
[0179] Figure 9 and Figure 10 The bottom surface of the groove G is shown to be positioned on the same plane as the upper surface of the substrate 100; however, according to some example embodiments, the bottom surface of the groove G may be positioned on a virtual plane located between the bottom and upper surfaces of the substrate 100. Alternatively, according to some example embodiments, the bottom surface of the groove G may be positioned on a virtual plane located between the bottom and upper surfaces of the lower insulating layer 210.
[0180] According to some example embodiments, because the depth dp of the recess G can reduce the thickness of the first encapsulation layer 310, the depth dp of the recess G can be substantially smaller than the thickness t of the underlying layer LL. The depth dp of the recess G can be about 2.0 μm or greater.
[0181] Figure 11 This is a schematic plan view of a portion of the input sensing layer according to some example embodiments. Figure 11 It is a part of the input sensing layer that corresponds to the display area DA.
[0182] Reference Figure 11 The input sensing layer 400 may include a first sensing electrode SP1 and a second sensing electrode SP2 positioned in the display area DA. The first sensing electrode SP1 may be arranged in the x-direction, and the second sensing electrode SP2 may be arranged in the y-direction intersecting the first sensing electrode SP1. The first sensing electrode SP1 and the second sensing electrode SP2 may intersect each other perpendicularly.
[0183] The corners of the first sensing electrode SP1 and the second sensing electrode SP2 can be adjacent to each other. The adjacent first sensing electrodes SP1 can be electrically connected to each other through the first connecting electrode CP1, and the adjacent second sensing electrodes SP2 can be electrically connected to each other through the second connecting electrode CP2.
[0184] Figure 12A and Figure 12B These are plan views showing the first and second conductive layers of the input sensing layer according to some example embodiments, and Figure 12C This is a cross-sectional view illustrating the input sensing layer according to some example embodiments, which can be compared with the cross-sectional view along... Figure 11 The section cut by line XI-XI' corresponds to the section cut by line XI-XI'.
[0185] Reference Figure 12A and Figure 12B The first sensing electrode SP1 and the second sensing electrode SP2 can be arranged on the same layer. The first conductive layer 410 may include a first connecting electrode CP1 (see...). Figure 12A The second conductive layer 420 may include a first sensing electrode SP1, a second sensing electrode SP2, and a second connection electrode CP2 (see...). Figure 12B ).
[0186] The second sensing electrode SP2 can be connected via a second connecting electrode CP2 arranged on the same layer. The first sensing electrode SP1 can be arranged in the x-direction and can be connected via a first connecting electrode CP1 arranged on a different layer.
[0187] Reference Figure 12C An intermediate insulating layer 403 can be positioned between the first conductive layer 410 and the second conductive layer 420. A first sensing electrode SP1 disposed in the second conductive layer 420 can be connected to a first connecting electrode CP1 disposed in the first conductive layer 410 through a contact hole CNT in the intermediate insulating layer 403. The second conductive layer 420 can be covered by an upper insulating layer 405, and a lower insulating layer 401 can be disposed below the first conductive layer 410. The lower insulating layer 401 can be an inorganic insulating layer such as silicon nitride. The intermediate insulating layer 403 and the upper insulating layer 405 can be organic or inorganic insulating layers.
[0188] The first conductive layer 410 and the second conductive layer 420 may comprise a metal layer or a transparent conductive layer. The metal layer may comprise molybdenum (Mo), silver (Ag), titanium (Ti), copper (Cu), aluminum (Al), or any alloy thereof. The transparent conductive layer may comprise a transparent conductive oxide, such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium tin zinc oxide (ITZO). Alternatively, the transparent conductive layer may comprise a conductive polymer, such as poly(3,4-ethylenedioxythiophene) (PEDOT), metal nanowires, or graphene.
[0189] Figure 12C The lower insulating layer 401 is shown positioned between the thin-film encapsulation layer 300 and the first conductive layer 410; however, according to some example embodiments, the lower insulating layer 401 may be omitted, and the first conductive layer 410 may be positioned directly on the thin-film encapsulation layer 300.
[0190] Figure 13A and Figure 13B These are plan views showing the first and second conductive layers of the input sensing layer according to some example embodiments, and Figure 13C This is a cross-sectional view illustrating the input sensing layer according to some example embodiments, which can be compared with the cross-sectional view along... Figure 11 The section cut by line XI-XI' corresponds to the section cut by line XI-XI'.
[0191] Reference Figure 13A and Figure 13B The first conductive layer 410 may include a first sensing electrode SP1 and a first connecting electrode CP1 connected to the first sensing electrode SP1, and the second conductive layer 420 may include a second sensing electrode SP2 and a second connecting electrode CP2 connected to the second sensing electrode SP2. The first conductive layer 410 may also include a second auxiliary sensing electrode S-SP2 connected to the second sensing electrode SP2, and the second conductive layer 420 may also include a first auxiliary sensing electrode S-SP1 connected to the first sensing electrode SP1.
[0192] Reference Figure 13A The enlarged view shows that each first sensing electrode SP1 can have a mesh structure including multiple holes H. The holes H can be arranged to overlap with the emission region PE of the pixel. According to some example embodiments, the second sensing electrode SP2, the first auxiliary sensing electrode S-SP1, and the second auxiliary sensing electrode S-SP2 can also have features such as those shown in the image. Figure 13A The magnified image shows the grid structure of multiple holes corresponding to the emission region PE of the pixel.
[0193] Reference Figure 13C The first auxiliary sensing electrode S-SP1 can be connected to the first sensing electrode SP1 through the contact hole CNT of the intermediate insulating layer 403, and this structure can reduce the resistance of the first sensing electrode SP1. Similarly, the second sensing electrode SP2 can be connected to the second auxiliary sensing electrode S-SP2 through the contact hole of the intermediate insulating layer 403.
[0194] The lower insulating layer 401 may be an inorganic insulating layer such as silicon nitride, and the middle insulating layer 403 and the upper insulating layer 405 may be organic or inorganic insulating layers. The first conductive layer 410 and the second conductive layer 420 may include metal layers or transparent conductive layers. The metal layer may include molybdenum (Mo), silver (Ag), titanium (Ti), copper (Cu), aluminum (Al), or any alloy thereof, and may include a single layer or multiple layers containing the above metals. For example, the first conductive layer 410 and the second conductive layer 420 may include a metal layer comprising three sublayers of Ti / Al / Ti. The transparent conductive layer may include the aforementioned transparent conductive oxides, conductive polymers, metal nanowires, and / or graphene.
[0195] Figure 14 and Figure 15 This is a schematic cross-sectional view of a display device according to some example embodiments. Figure 14 Display devices 1-4 and Figure 15 The display devices 1-5 may include the above-mentioned Figure 11 The input sensing layer. Furthermore, it is included in... Figure 14 Display devices 1-4 and Figure 15 The input sensing layer in the display devices 1-5 may have the above-mentioned Figures 12A to 12C or Figures 13A to 13C The structure.
[0196] Reference Figure 14 The input sensing layer 400 can be arranged on the display area DA. According to some example embodiments, Figure 14 This illustrates that the input sensing layer 400 directly contacts the thin-film encapsulation layer 300 and is formed directly on the thin-film encapsulation layer 300. Besides the structure of the input sensing layer 400... Figure 14 The embodiments shown can be related to those described above. Figure 7 The structure is the same as that of the input sensing layer 400, and therefore, the input sensing layer 400 will be mainly described below.
[0197] Reference Figure 14 The lower insulating layer 401 of the input sensing layer 400 can extend outside the display area DA to be positioned on the peripheral area PA. The lower insulating layer 401 can cover the first partition wall PW1 and the second partition wall PW2, and can extend to the edge area EA. The lower insulating layer 401 can be arranged to cover the dam D positioned in the edge area EA and the groove G located between the dams D. For example, the lower insulating layer 401 can be directly disposed on the second encapsulation layer 330 of the thin film encapsulation layer 300 to cover the dam D and the groove G located between the dams D. The lower insulating layer 401 can extend further toward the edge 100E of the substrate 100 than the thin film encapsulation layer 300 to be arranged to cover the end 330E of the second encapsulation layer 330.
[0198] In this case, the lower insulating layer 401 may comprise an inorganic insulating material such as silicon nitride, silicon oxide, or silicon oxynitride. Since the lower insulating layer 401 is provided as an inorganic layer to cover the second encapsulation layer 330 located in the edge region EA, a more robust structure can be achieved that resists moisture penetration due to external air.
[0199] According to some example embodiments, when the input sensing layer 400 does not include the lower insulating layer 401 and the first conductive layer 410 is disposed directly on the thin-film encapsulation layer 300, the intermediate insulating layer 403 or the upper insulating layer 405 may extend to the peripheral region PA to cover the dam D located in the edge region EA and the groove G located between the dams D. In this case, the intermediate insulating layer 403 or the upper insulating layer 405 may comprise an inorganic insulating material such as silicon nitride, silicon oxide, or silicon oxynitride.
[0200] Reference Figure 15 The inorganic capping layer ICL can be disposed above the dam D located in the edge region EA and the groove G located between the dams D. The inorganic capping layer ICL can be disposed to cover the dam D located in the edge region EA and the groove G located between the dams D. The inorganic capping layer ICL can be disposed directly on the second encapsulation layer 330 of the thin film encapsulation layer 300 to cover the dam D and the groove G located between the dams D.
[0201] The inorganic cover layer ICL may include an inorganic insulating material, such as silicon nitride, silicon oxide, or silicon oxynitride. For example, the inorganic cover layer ICL may include the same material as at least one of the lower insulating layer 401, the middle insulating layer 403, and the upper insulating layer 405 of the input sensing layer 400. Thus, since the inorganic cover layer ICL covers the end 330E of the second encapsulation layer 330 located in the edge region EA, a more robust structure can be achieved against moisture penetration caused by external air.
[0202] Although the display device has been described primarily above, the embodiments according to this disclosure are not limited thereto. For example, methods of manufacturing the display device will also be within the scope of the embodiments according to this disclosure.
[0203] According to some example embodiments, it may be possible to achieve a display device that is relatively robust against moisture penetration while having relatively improved flexibility. However, the scope of the embodiments according to this disclosure is not limited to these effects.
[0204] It should be understood that the exemplary embodiments described herein should be considered in a descriptive sense only and not for limiting purposes. The description of features or aspects within each exemplary embodiment should generally be considered applicable to other similar features or aspects in other embodiments. Although one or more exemplary embodiments have been described with reference to the accompanying drawings, those skilled in the art will understand that various changes in form and detail may be made therein without departing from the spirit and scope defined by this disclosure and its equivalents.
Claims
1. A display device, wherein, The display device includes: A substrate, including a display area and a peripheral area surrounding the display area, the substrate having a curved portion; Multiple display elements are located in the display area of the substrate; A thin-film encapsulation layer, located above the plurality of display elements, includes a first encapsulation layer, a second encapsulation layer located above the first encapsulation layer, and an organic encapsulation layer located between the first encapsulation layer and the second encapsulation layer. The second encapsulation layer is disposed on the upper part of the thin-film encapsulation layer. The dam section, located in the peripheral region, includes a lower layer having a first width and an upper layer disposed on the lower layer and having a second width greater than the first width, wherein the first width is the width of the upper surface of the lower layer and the second width is the width of the bottom surface of the upper layer. Wherein, at least the second encapsulation layer, of the first encapsulation layer and the second encapsulation layer, comprises a plurality of inorganic thin layers and a plurality of organic thin layers arranged alternately. The second encapsulation layer has an elastic modulus that is 5 to 10 times lower than that of the first encapsulation layer.
2. The display device according to claim 1, wherein, Each of the plurality of organic thin layers comprises silicon dioxide.
3. The display device according to claim 1, in, The thickness of the second encapsulation layer is equal to or less than the thickness of the first encapsulation layer.
4. The display device according to claim 3, wherein, Each of the plurality of organic thin layers comprises silicon dioxide.
5. The display device according to claim 3, wherein, The elastic modulus of the second encapsulation layer is 5 GPa to 10 GPa.
6. The display device according to claim 3, wherein, The plurality of inorganic thin layers are in contact with each other at the ends of the second encapsulation layer.
7. The display device according to claim 3, wherein, The display device further includes: a first partition wall located in the peripheral region of the substrate and extending along the periphery of the display region, and a second partition wall spaced apart from the first partition wall. The first encapsulation layer and the second encapsulation layer are in contact with each other on the second partition wall.
8. The display device according to claim 7, wherein, The upper surface of the first encapsulation layer contacts one of the plurality of inorganic thin layers of the second encapsulation layer.
9. The display device according to claim 3, wherein, The display device further includes at least two dam sections located in the peripheral region and a groove positioned between the dam sections.
10. The display device according to claim 9, wherein, The groove has an undercut cross-section structure.
11. The display device according to claim 9, wherein, The upper layer includes a pair of pointed tips protruding toward the center of the groove.
12. The display device according to claim 1, wherein, The plurality of inorganic thin layers are in contact with each other at the side surface of the lower layer.
13. The display device according to claim 1, wherein, The lower layer comprises an organic insulating material.
14. The display device according to claim 1, wherein, The lower layer comprises inorganic insulating material.
15. The display device according to claim 14, wherein, The lower layer comprises multiple inorganic layers.
16. The display device according to claim 14, wherein, The upper layer includes a conductive material.
17. The display device according to claim 14, wherein, Each of the plurality of display elements includes: a pixel electrode, a counter electrode facing the pixel electrode, and an intermediate layer located between the pixel electrode and the counter electrode. The upper layer comprises the same material as the pixel electrode.
18. The display device according to claim 9, wherein, Each of the plurality of organic thin layers has a discontinuous structure due to the grooves.
19. The display device according to claim 9, wherein, The plurality of inorganic thin layers are in contact with each other at the inner surface of the groove.
20. The display device according to claim 9, wherein, The display device further includes: a first partition wall located in the peripheral region of the substrate and extending along the periphery of the display region, and a second partition wall spaced apart from the first partition wall. The second partition wall is located between the first partition wall and the dam section.
21. The display device according to claim 1, wherein, The display device further includes: an input sensing layer located on the thin-film encapsulation layer and comprising an inorganic insulating layer. The inorganic insulating layer extends into the peripheral region and covers the thin-film encapsulation layer.
22. The display device according to claim 21, wherein, The input sensing layer is located directly on the thin-film encapsulation layer.
23. The display device according to claim 21, wherein, The inorganic insulating layer covers the end of the second encapsulation layer.
24. The display device according to claim 1, in, The plurality of inorganic thin layers cover the dam section and are in contact with each other in at least a portion of the area.
25. The display device according to claim 24, wherein, The plurality of organic thin layers cover the dam section and are arranged discontinuously in at least some areas.
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