Plasma sheath control for rf plasma reactors

Abstract

Some embodiments include a plasma sheath control system comprising: an RF power source generating a sinusoidal waveform having a frequency greater than 20 kHz and a peak voltage greater than 1 kV; and a plasma chamber electrically coupled with the RF power source, the plasma chamber having a plurality of ions accelerated into a deployed surface by an energy greater than about 1 kV, and the plasma chamber generating a plasma sheath within the plasma chamber from the sinusoidal waveform. The plasma sheath control system includes: a blocking diode electrically connected between the RF power source and the plasma chamber; and a capacitive discharge circuit electrically coupled with the RF power source, the plasma chamber, and the blocking diode; the capacitive discharge circuit discharging a capacitive charge within the plasma chamber by a peak voltage greater than 1 kV and by a discharge time less than 250 nanoseconds.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to U.S. Provisional Patent Application No. 62 / 717,523, filed August 10, 2018, entitled “PLASMA SHEATH CONTROL FOR RF PLASMA REACTORS”, which is incorporated herein by reference in its entirety.

[0003] This application claims priority to U.S. Provisional Patent Application No. 62 / 774,078, filed November 30, 2018, entitled “VARIABLE OUTPUT IMPEDANCE RF GENERATOR”, which is incorporated herein by reference in its entirety.

[0004] This application claims priority to U.S. Provisional Patent Application No. 62 / 789,523, filed January 8, 2019, entitled “EFFICIENT ENERGY RECOVERY IN A NANOSECOND PULSERCIRCUIT”, which is incorporated herein by reference in its entirety.

[0005] This application claims priority to U.S. Provisional Patent Application No. 62 / 789,526, filed January 8, 2019, entitled “EFFICIENT NANOSECOND PULSER WITH SOURCE AND SINKCAPABILITY FOR PLASMA CONTROL APPLICATIONS”, which is incorporated herein by reference in its entirety. Background Technology

[0006] The application of RF-excited gas discharge in thin-film fabrication technology has become standard. The most commonly used and simplest geometry is that of two planar electrodes to which a voltage is applied. Figure 1 The diagram shows a schematic representation of this planar RF plasma reactor. A plasma sheath separates the plasma from each electrode.

[0007] Positive ions generated in the plasma layer are accelerated across the plasma sheath and reach the electrodes by an ion energy distribution function (IEDF) determined by the magnitude and waveform of the time-dependent potential difference across the sheath, gas pressure, reactor geometry, and / or other factors. This ion bombardment energy distribution can determine the degree of anisotropy in the amount of thin-film etched by ions due to surface damage. Summary of the Invention

[0008] Some embodiments include a plasma sheath control system comprising: an RF power supply that generates an RF sinusoidal waveform having a frequency greater than 20 kHz and a peak voltage greater than 1 kV; and a plasma chamber electrically coupled to the RF power supply, the plasma chamber having a plurality of ions accelerated to a deployed surface by an energy greater than approximately 1 kV, and the plasma chamber generating a plasma sheath from the RF sinusoidal waveform within the plasma chamber. The plasma sheath control system includes: a choke diode electrically connected between the RF power supply and the plasma chamber; and a capacitor discharge circuit electrically coupled to the RF power supply, the plasma chamber, and the choke diode; the capacitor discharge circuit discharging capacitive charges within the plasma chamber by a peak voltage greater than 1 kV and a discharge time less than 250 nanoseconds.

[0009] In some embodiments, the capacitor discharge circuit includes a resistive output stage comprising a resistor and an inductor arranged in series, the resistive output stage being deployed between a point on the plasma sheath control system between the choke diode and the plasma chamber and ground. In some embodiments, the capacitor discharge circuit includes an energy recovery circuit comprising a diode and an inductor arranged in series, the energy recovery circuit being deployed between the choke diode and the plasma chamber and the DC power supply.

[0010] In some embodiments, the plasma sheath control system may include a bias capacitor arranged in series between the choke diode and the plasma chamber. In some embodiments, the plasma sheath control system may include a bias compensation circuit comprising a DC power supply, a resistor, a diode, and a high-voltage switch, the bias compensation circuit being arranged between points on the plasma sheath control system between the choke diode and the RF power supply.

[0011] In some embodiments, the plasma sheath control system may include a matching network electrically coupled to the plasma chamber, the matching network matching the reactance impedance of the plasma load within the plasma chamber with the output impedance of the RF power supply.

[0012] In some embodiments, the choke diode rectifies the sinusoidal waveform to create a sinusoidal waveform with a substantially flat portion of at least 25% of each cycle.

[0013] Some embodiments include a plasma sheath control system. The plasma sheath control system may include a high-voltage DC power supply that generates a DC voltage greater than 200V. The plasma sheath control system may include a resonant circuit driver comprising a plurality of high-voltage switches coupled to a resonant load, the high-voltage switches alternately switching on and off to generate a sinusoidal waveform having a frequency greater than 20kHz and a peak voltage greater than 1kV; the plasma sheath control system may include a plasma chamber electrically coupled to the resonant circuit driver, the plasma chamber having a plurality of ions accelerated to a surface deployed within the plasma chamber by an energy greater than approximately 1kV, and the plasma chamber generating a plasma sheath from the sinusoidal waveform within the plasma chamber. The plasma sheath control system may include a choke diode electrically connected between the resonant circuit driver and the plasma chamber, the choke diode rectifying the sinusoidal waveform.

[0014] In some embodiments, the choke diode rectifies the sinusoidal waveform to create a waveform with a substantially flat portion of at least 25% of each cycle.

[0015] In some embodiments, the plasma sheath control system may include a resistor output stage comprising a resistor and an inductor arranged in series, the resistor output stage being deployed between a point on the plasma sheath control system between the current-blocking diode and the plasma chamber and ground.

[0016] In some embodiments, the plasma sheath control system may include an energy recovery circuit comprising a diode and an inductor arranged in series, the energy recovery circuit being deployed between the current-blocking diode and the plasma chamber and the DC power supply.

[0017] In some embodiments, the plurality of switches includes a first switch, a second switch, a third switch, and a fourth switch. In some embodiments, the first switch and the fourth switch are closed during a first time period to allow current to flow in a first direction; and the second switch and the third switch are closed during a second time period to allow current to flow in a second direction opposite to the first direction.

[0018] In some embodiments, the plurality of switches includes a first switch and a second switch. In some embodiments, the first switch is closed during a first time period to allow current to flow in a first direction; and the second switch is closed during a second time period to allow current to flow in a second direction opposite to the first direction.

[0019] In some embodiments, the plurality of switches switch at a frequency according to the following formula: Where f is greater than 10kHz, L represents the inductance of the load in the plasma chamber, and C represents the capacitance of the capacitor in the resonant circuit driver.

[0020] In some embodiments, the plurality of switches switch at a frequency according to the following formula: Where f is greater than 10kHz, L represents the inductance of the inductor in the resonant circuit driver, and C represents the capacitance of the load in the plasma chamber.

[0021] In some embodiments, the plurality of switches switch at a frequency according to the following formula: Where f is greater than 10kHz, L represents the inductance of the inductor in the resonant circuit driver, and C represents the capacitance of the capacitor in the resonant circuit driver.

[0022] In some embodiments, while the resonant circuit driver is generating the sinusoidal waveform, the plasma sheath control system generates a voltage greater than approximately 1 kV across the plasma sheath.

[0023] In some embodiments, the plasma sheath control system may include a controller that adjusts one or both of the frequency or power of the sinusoidal waveform generated by the resonant circuit on a time scale of less than about 1 ms.

[0024] In some embodiments, the plasma sheath control system may include a controller that measures the frequency of a sinusoidal waveform at a point preceding the plasma chamber and adjusts the frequency of the sinusoidal waveform generated by the resonant circuit driver if the frequency of the sinusoidal waveform at the point preceding the plasma chamber does not match the resonant frequency.

[0025] In some embodiments, the plasma sheath control system may include a controller that measures the power of a sinusoidal waveform at a point preceding the plasma chamber and adjusts the power of the sinusoidal waveform generated by the resonant circuit driver if the power of the sinusoidal waveform at the point preceding the plasma chamber does not match the required power.

[0026] Some embodiments of the present invention include a plasma sheath control system comprising: an RF power supply that generates a high-voltage and high-frequency sinusoidal waveform; a resistive output stage that includes a resistor and an inductor; and a choke diode disposed between the RF power supply and the resistive output stage. In some embodiments, a plasma reactor may be included, which may include, for example, a gas feed system, a control system, a plasma generation system, a vacuum pump, a wafer transfer system, etc. In some embodiments, the resistive output stage has a capacitance of less than approximately 200 pF. In some embodiments, the plasma sheath control system further includes an output configured to be coupled to a wafer deposition apparatus. In some embodiments, the plasma sheath control system further includes an output configured to output a high-voltage sinusoidal waveform having an amplitude greater than 2 kV and a frequency greater than 1 kHz.

[0027] Some embodiments of the present invention include a plasma sheath control system comprising: an RF power supply; a bias capacitor; and a high-voltage switch coupled across the choke diode, wherein the high-voltage switch is configured to be off when the high-voltage power supply is on, and to be on when the high-voltage power supply is not pulsed. In some embodiments, the plasma sheath control system further includes an output configured to be coupled to a wafer deposition apparatus. In some embodiments, the plasma sheath control system further includes an output configured to output a high-voltage sinusoidal waveform having an amplitude greater than 2 kV and a frequency greater than 1 kHz.

[0028] Some embodiments of the present invention include a plasma sheath control system that generates an output that creates plasma within a wafer deposition chamber, such that the voltage potential between the wafer and the clip is approximately 2 kV during periods when the plasma sheath control system is on and off.

[0029] In some embodiments, the resistive output stage may include a series or parallel network of passive components. For example, the resistive output stage may include a resistor, a capacitor, and an inductor connected in series. As another example, the resistive output stage may include a capacitor connected in parallel with an inductor and a capacitor-inductor combination connected in series with a resistor. Regardless of the arrangement, component values ​​can be selected to match the RF frequency of the RF source.

[0030] The reference to these illustrative embodiments is not intended to limit or restrict this disclosure, but rather to provide examples to aid in understanding it. Additional embodiments are discussed in the detailed description and are further described herein. The advantages provided by one or more of the various embodiments can be further understood by examining this specification or by practicing one or more of the embodiments presented. Attached Figure Description

[0031] These and other features, aspects and advantages of this disclosure will be better understood when reading the following detailed description with reference to the accompanying drawings.

[0032] Figure 1 This is a schematic representation of an RF plasma reactor according to some embodiments.

[0033] Figure 2 This is a schematic diagram of an RF driver for an RF plasma chamber according to some embodiments.

[0034] Figure 3 The voltage V across the plasma chamber is shown. r And the plasma potential V for target electrodes and substrate electrodes of equal area P The waveform.

[0035] Figure 4 This shows the potential V across the plasma sheath adjacent to the target electrode within the plasma chamber. ST and the potential V across the substrate electrode ss The waveform.

[0036] Figure 5 This is a schematic diagram of a plasma sheath control system for an RF chamber according to some embodiments.

[0037] Figure 6 The waveform is shown across the sheath (e.g., C3) and at the clip (e.g., C2).

[0038] Figure 7 This is another schematic diagram of a plasma sheath control system for an RF chamber with a resistive output stage, according to some embodiments.

[0039] Figure 8 Shown from Figure 7 The circuit shown crosses the sheath (e.g., C3) and the waveform at the clip (e.g., C2).

[0040] Figure 9 yes Figure 8 The waveform shown is an enlarged view of three cycles.

[0041] Figure 10 Shown from Figure 7 The circuit shown crosses the sheath (e.g., C3) and the waveform at the clip (e.g., C2).

[0042] Figure 11 Shown from Figure 7 The circuit shown crosses the sheath (e.g., C3) and the waveform at the clip (e.g., C2).

[0043] Figure 12This is another schematic diagram of a plasma sheath control system for an RF chamber having a resistive output stage and a high-voltage switching bias compensation stage, according to some embodiments.

[0044] Figure 13 Shown from Figure 12 The circuit shown crosses the sheath (e.g., C3) and the waveform at the clip (e.g., C2).

[0045] Figure 14 yes Figure 12 The waveform shown is an enlarged view of three cycles.

[0046] Figure 15 This indicates the end of the burst waveform where the voltage on the card holder returns to zero.

[0047] Figure 16 This is a schematic diagram of a plasma sheath control system for an RF chamber with a resonant full-bridge driver, according to some embodiments.

[0048] Figure 17 This is a circuit diagram of a plasma sheath control system with an energy recovery circuit according to some embodiments.

[0049] Figure 18 This is a block diagram of a high-voltage switch with an isolated power supply according to some embodiments.

[0050] Figure 19 This is a circuit diagram of a plasma sheath control system with a half-bridge resonant circuit according to some embodiments. Detailed Implementation

[0051] A plasma sheath control system is disclosed, comprising one or both of a diode and capacitor discharge circuit (e.g., a resistive output stage or energy recovery circuit) and / or a high-voltage switch with a choke diode. In some embodiments, the plasma sheath control circuit may include an RF bias power supply with a plasma chamber for fabricating semiconductors or similar devices. In some embodiments, the plasma sheath control circuit may generate an output that creates plasma within a semiconductor fabrication apparatus. For example, to enable a more controllable and constant plasma sheath potential to be generated between the plasma and a target electrode or wafer. Enhanced control may allow for peaking and / or adjustable ion energy distribution of bombarding ions from the plasma, which may result in, for example, higher application performance (e.g., in etching, thin film deposition, ion deposition, solar panel and / or display panel fabrication, etc.). Additionally or alternatively, a substantially constant potential between the wafer and the clip may be maintained at approximately 2 kV during periods when the plasma sheath control circuit is on and when the plasma sheath control is off. In some embodiments, the RF power system may generate a sinusoidal waveform with a peak amplitude greater than approximately 1 kV–10 kV.

[0052] Figure 2 This is a schematic diagram of the RF plasma power supply and the RF driver for the reactor. Here, V... RF It is the voltage of a sinusoidal waveform applied from the matched RF power supply. V T and V P These are the potentials of the target electrode and the plasma, respectively. Furthermore, V SS =V P and V ST =V T -V P These are the voltages across the plasma sheath on the substrate or chamber wall and the target plasma sheath, respectively. The choke capacitor is represented by C. B C ST and I T Let C represent the capacitance and conduction current through the sheath adjacent to the target electrode, respectively. ss and I S This indicates the corresponding value used for the sheath adjacent to the substrate electrode.

[0053] The resistance of the plasma is small relative to the sheath resistance for the plasma electron density and voltage frequency range considered in this discussion. However, including the plasma resistance does not introduce any complexity regarding the circuit model.

[0054] Figure 3 The voltage V across the plasma chamber is shown. r And the plasma potential V for target electrodes and substrate electrodes of equal area P The waveform.

[0055] Figure 4 Showing for A T / A S =0.2, the potential V across the plasma sheath adjacent to the target electrode ST and the potential V across the substrate electrode sheath ss The waveform. Figure 4 This shows a half-sine wave of the sheath potential from 0 to -450V.

[0056] Figure 5This is a schematic diagram of a plasma sheath control system 500 for an RF chamber according to some embodiments. The plasma sheath control system 500 includes circuitry representing a wafer plasma sheath 505 deployed on a wafer and circuitry representing a wall plasma sheath 510 on the walls of the plasma chamber. Capacitor C3 represents the sheath capacitance between the plasma and the wafer, which can be a function of both the physical geometry of the sheath and plasma parameters. RF power supply V5 is an RF voltage supply providing a high-voltage sinusoidal waveform. Switch S2 can be used to turn the RF power supply V5 on and off, and can be an element used to model the turning on and off of the RF power supply V5. Various other components represent stray capacitance, inductance, and / or resistance.

[0057] In some embodiments, lead stage 103 may represent one or both of the leads or traces between RF generator 515 and DC bias circuit 104. Inductor L2 or inductor L6 may represent inductance for one or both of the leads or traces.

[0058] In this example, the DC bias circuit 104 does not include any bias compensation. The DC bias circuit 104 includes an offset supply voltage V1, which can bias the output voltage, for example, in a positive or negative manner. In some embodiments, the offset supply voltage V1 can be adjusted to change the offset between the wafer voltage and the clip voltage. In some embodiments, the offset supply voltage V1 can have a voltage of approximately ±5kV, ±4kV, ±3kV, ±2kV, ±1kV, etc.

[0059] In some embodiments, bias capacitor C12 can isolate (or separate) the DC bias voltage from one or both of the resistive output stage or other circuit elements. For example, bias capacitor C12 can allow potential transfer from one part of the circuit to another. In some embodiments, this potential transfer can ensure that the electrostatic force holding the wafer in place on the clip remains below a voltage threshold. Resistor R2 can isolate the DC bias supply from the high-voltage sinusoidal waveform output from RF generator 515.

[0060] For example, the bias capacitor C12 is 100pF, 10pF, 1pF, 100μF, 10μF, 1μF, etc. For example, the resistor R2 can have a high resistance (e.g., such as about 1kOhm, 10kOhm, 100kOhm, 1MOhm, 10MOhm, 100MOhm, etc.).

[0061] The second lead stage 105 represents the circuit elements between the RF power circuit and the load stage 106. For example, resistor R13 can represent the stray resistance of a lead or transmission line connecting the output of the high-voltage power system to the electrode (e.g., load stage 106). For example, capacitor C1 can represent the stray capacitance in the lead or transmission line.

[0062] In some embodiments, load stage 106 may represent an idealized or effective circuit for a semiconductor processing chamber (e.g., a plasma deposition system, a semiconductor manufacturing system, a plasma sputtering system, etc.). For example, capacitor C2 may represent the capacitance of a clip on which the wafer can be mounted. For example, the clip may include a dielectric material. For example, capacitor C1 may have a small capacitance (e.g., approximately 10 pF, 100 pF, 500 pF, 1 nF, 10 nF, 100 nF, etc.).

[0063] For example, capacitor C3 can represent the sheath capacitance between the plasma and the wafer. For example, resistor R6 can represent the sheath resistance between the plasma and the wafer. For example, inductor L2 can represent the sheath inductance between the plasma and the wafer. For example, current source I2 can represent the ion current passing through the sheath. For example, capacitor C1 or capacitor C3 can have small capacitances (e.g., approximately 10pF, 100pF, 500pF, 1nF, 10nF, 100nF, etc.).

[0064] Capacitor C9 can, for example, represent the capacitance within the plasma between the chamber wall and the plasma. Resistor R7 can, for example, represent the resistance within the plasma between the chamber wall and the top surface of the wafer. Current source I1 can, for example, represent the ion current in the plasma. Capacitor C1 or capacitor C9 can, for example, have small capacitances (e.g., approximately 10 pF, 100 pF, 500 pF, 1 nF, 10 nF, 100 nF, etc.).

[0065] As used in this document, plasma voltage is the voltage measured from ground to circuit point 123; wafer voltage is the voltage measured from ground to circuit point 122 and may represent the voltage at the surface of the wafer; clamp voltage is the voltage measured from ground to circuit points 121 and 122; electrode voltage is the voltage measured from ground to circuit point 121 and ground; and input voltage is the voltage measured from ground to circuit point 125.

[0066] Figure 6The waveforms are shown across the sheath (e.g., across capacitor C3) between circuit points 122 and 123, and at the clip (e.g., across capacitor C2) at circuit point 121. Waveform 605 shows the voltage across the plasma sheath (e.g., wafer plasma sheath 505 and / or wall plasma sheath 510). Waveform 605 is a full sine wave slightly clamped at zero due to the diode (D3), which is part of the plasma effect. Waveform 610 shows the voltage at the electrode (or across the clip). In some embodiments, the difference between the clip voltage and the wafer voltage (e.g., the difference between the waveforms) can be maintained at around 2 kV or slightly less. When closed, this difference returns to -2 kV. A difference of approximately 2 kV may be sufficient to electrostatically couple the wafer to the clip, while a difference greater than 2 kV may cause this operation while being damaging to the wafer.

[0067] Figure 7 This is another schematic diagram of a plasma sheath control system 700 for an RF plasma reactor with a resistive output stage 705, according to some embodiments. In this example, the plasma sheath control system 700 includes a choke diode D7. The choke diode D7 can rectify the sinusoidal waveform, thus producing, for example, a flat top on each sinusoidal waveform, such as... Figure 9 As shown. For example, the choke diode D7 can rectify a sinusoidal waveform, creating a sinusoidal waveform with a substantially flat portion of at least 10%, 15%, 20%, 25%, 30%, etc., per cycle.

[0068] Resistive output stage 705 may include one or more inductors L1 and one or more resistors R1. Resistive output stage 705 may include any type of resistive output stage (e.g., the resistive output stage described in U.S. Patent Application No. 15 / 941,731 entitled "HIGH VOLTAGE RESISTIVE OUTPUTSTAGE CIRCUIT", which is incorporated herein by reference in its entirety for all purposes).

[0069] In some embodiments, resistor R1 may have a resistance of less than approximately 500 ohms, 200 ohms, 100 ohms, etc.

[0070] In some embodiments, the resistive output stage 705 may be electrically coupled in parallel with the load stage 106 (e.g., a plasma chamber) and a high-voltage switching power supply. In some embodiments, the resistive output stage may include at least one resistor (e.g., R1) that discharges the load (e.g., from a wafer plasma sheath or wall plasma sheath 510). In some embodiments, the resistive output stage may be configured to discharge an average power of more than about 1 kilowatt during each sine wave cycle, and / or discharge one joule or less of energy during each sine wave cycle. In some embodiments, the resistance of resistor R1 in the resistive output stage may be less than 200 ohms. In some embodiments, resistor R1 may include a plurality of resistors arranged in series or parallel, having a combined capacitance (e.g., C11) of less than about 200 pF.

[0071] In some embodiments, the resistor output stage 705 may include a collection of circuit elements that can be used to control the shape of a voltage waveform across a load. In some embodiments, the resistor output stage 705 may include only passive elements (e.g., resistors, capacitors, inductors, etc.). In some embodiments, the resistor output stage 705 may include active circuit elements (e.g., switches) as well as passive circuit elements. In some embodiments, for example, the resistor output stage 705 may be used to control the voltage rise time and / or voltage fall time of a waveform.

[0072] In some embodiments, the resistive output stage 705 can discharge capacitive loads (e.g., capacitive charges from the wafer plasma sheath 505 and / or the wall plasma sheath 510). For example, these capacitive loads may have small capacitances (e.g., approximately 10 pF, 100 pF, 500 pF, 1 nF, 10 nF, 100 nF, etc.).

[0073] In some embodiments, the resistive output stage can be used in circuits having a sinusoidal waveform with a high peak voltage (e.g., a voltage greater than 1kV, 10kV, 20kV, 50kV, 100kV, etc.) and / or a high frequency (e.g., a frequency greater than 1kHz, 10kHz, 100kHz, 200kHz, 500kHz, 1MHz, etc.).

[0074] In some embodiments, the resistive output stage 705 can be selected to handle high average power, high peak power, fast rise time and / or fast / fall time. For example, the average rated power may be greater than about 0.5kW, 1.0kW, 10kW, 25kW, etc., and / or the peak rated power may be greater than about 1kW, 10kW, 100kW, 1MW, etc.

[0075] In some embodiments, the resistor output stage 705 may include a series or parallel network of passive components. For example, the resistor output stage 705 may include a resistor R5, a capacitor C11, and an inductor L7 connected in series. As another example, the resistor output stage may include a capacitor connected in parallel with an inductor and a capacitor-inductor combination connected in series with a resistor. Regardless of the arrangement, component values ​​can be selected to match the RF frequency of the RF source. The choke diode D7 may rectify the output of the RF generator 515. For example, the choke diode D7 may rectify a sine wave, creating a sine wave with a substantially flat portion of at least 10%, 15%, 20%, 25%, 30%, etc., per cycle.

[0076] In some embodiments, the resistive output stage 705 can rapidly discharge a high-voltage capacitive load (e.g., capacitive charge from the wafer plasma sheath 505 and / or wall plasma sheath 510) at the load stage 106 via a rapid discharge time. The high-voltage load can be a load having a voltage greater than approximately 1 kV, 10 kV, 20 kV, 50 kV, 100 kV, etc. The rapid discharge time can be less than approximately 1 ns, 10 ns, 50 ns, 100 ns, 250 ns, 500 ns, 1,000 ns, etc.

[0077] The plasma sheath control system 700 may include an RF generator 515, a resistor output stage 705, a lead stage 103, a DC bias circuit 104, and a second lead stage 105. The plasma sheath control system may include a plasma sheath control circuit and a load stage 106, which may include a plasma chamber.

[0078] Figure 8 The waveforms are shown across the sheath (e.g., across capacitor C3) between circuit point 122 and circuit point 123 and at the clip (e.g., across capacitor C2) at circuit point 121. Figure 9 yes Figure 8 The diagram shows a magnified view of three cycles of the waveform. Waveform 805 shows the voltage across the sheath (e.g., the capacitive charge from the wafer plasma sheath 505 and / or the wall plasma sheath 510). Waveform 805 is a full sine wave slightly clamped at zero because of the diode (D3), which is part of the plasma effect. Waveform 810 shows the voltage at the pole (or across the clamp).

[0079] When the RF source V5 is continuously on, flatness can be a result of the values ​​of the choke diode D7 and / or all relevant capacitances in the circuit, including the plasma sheath capacitor. The resistor output stage 705 can reset the sheath capacitor during half a cycle of the RF sine wave. Waveform 805 is far flatter around -2.5kV. For example, the flatness of waveform 805 can be better used to keep ions at a constant potential during etching. For example, the resistor output stage 705 and / or the choke diode D7 can produce this flatness. Component values ​​can be adjusted to change the rise time, fall time, and / or degree of flatness of portions of the output waveform.

[0080] In some embodiments, the choke diode D7 can be replaced by a switch (e.g., a high-voltage switch). The high-voltage switch may include... Figure 18 The high-voltage switch 1800 is shown. For example, the high-voltage switch can be closed during forward conduction (e.g., when the output of RF generator 515 is above a voltage threshold) and opened during reverse bias (e.g., when the output of RF generator 515 is below a voltage threshold).

[0081] The card clip voltage can be around 500V during a burst and approximately 2kV when off, which is acceptable. Increasing the RF output voltage to around 4kV would result in a difference of approximately 2kV between the on and off cycles. Figure 10 As shown. Increasing the RF output voltage to around 6kV can result in a difference of approximately 3kV or more during the turn-on period (which may not be acceptable), and approximately 2kV during the turn-off period, as... Figure 11 As shown, wafer damage may occur under a 3kV voltage difference.

[0082] Figure 12 This is another schematic diagram of a plasma sheath control system 1200 for an RF plasma reactor having a resistive output stage 705 and a DC bias circuit 1204, according to some embodiments.

[0083] DC bias circuit 1204 may include the components shown in DC bias circuit 104. DC bias circuit 1204 may also include a high-voltage switch S1 and / or a choke diode D2. In some embodiments, high-voltage switch S1 may include a plurality of switches arranged in series to collectively open and close a high voltage. High-voltage switch S1 may include a high-voltage switch (e.g., such as...) Figure 18 The high-voltage switch 1800 shown is illustrated.

[0084] In some embodiments, the high-voltage switch S1 can be opened when the RF power supply V5 voltage waveform is positive and closed when it is negative. When closed, for example, the high-voltage switch S1 can short-circuit the current across the choke diode D2. Short-circuiting this current allows the bias between the wafer and the clip to be maintained at approximately 2kV, which can be within acceptable tolerances and / or can be adjusted by changing the DC bias supply voltage V1.

[0085] Figure 13 Shown from Figure 12 The circuit shown crosses the sheath (e.g., C3) and the waveform at the clip (e.g., C2). As shown, the voltage difference between the wafer and the clip remains very close to -2kV, regardless of whether the RF power supply is on or off.

[0086] Figure 14 yes Figure 12 The waveform shown is an enlarged view of three cycles.

[0087] Figure 15 This indicates the end of the burst waveform where the voltage on the card holder returns to zero.

[0088] Figure 16 This is a circuit diagram of a plasma sheath control system 1600 according to some embodiments. In this example, the plasma sheath control system 1600 may include a full-bridge driver 1605. The full-bridge driver 1605 may include an input voltage source V1, which may be a DC voltage source (e.g., a capacitor source, an AC-DC converter, etc.). In some embodiments, the full-bridge driver 1605 may include four switches. In some embodiments, the driver may include multiple switches connected in series or in parallel. For example, these switches may include any type of solid-state switch (e.g., IGBT, MOSFET, SiC MOSFET, SiC junction transistor, FET, SiC switch, GaN switch, optoelectronic switch, etc.). These switches may switch at high frequencies and / or may generate high-voltage sinusoidal waveforms. For example, these frequencies may include approximately 400 kHz, 0.5 MHz, 2.0 MHz, 4.0 MHz, 13.56 MHz, 27.12 MHz, 40.68 MHz, 50 MHz, etc.

[0089] In some embodiments, the full-bridge driver is coupled to a resonant circuit 1610. The resonant circuit 1610 may include a resonant inductor L5 and / or a resonant capacitor C2 coupled to a transformer T1. In some embodiments, the transformer T1 may be removed. The resonant circuit may also include a stray resistance R5, which may include, for example, the resistance of any lead between the full-bridge driver and the resonant circuit 1610 and / or any components within the resonant circuit 1610 (e.g., transformer T1, capacitor C2, inductor L5, and resistor R5).

[0090] While the inductance and / or capacitance of other circuit components can affect the drive frequency, the drive frequency can be significantly set by selecting the resonant inductor L5 and / or resonant capacitor C2. Further refinement and / or tuning may be required to create an appropriate drive frequency. Furthermore, the rise time across transformer T1 can be adjusted by changing the inductance of inductor L5 and / or the capacitance of capacitor C2, assuming:

[0091]

[0092] For example, capacitor C2, resistor R5, or inductor L5 can be tunable so that the values ​​used in the device can be tuned or modified to ensure that the frequency remains constant as other components change over time.

[0093] In some embodiments, a large inductance value for inductor L5 may result in a slower or shorter rise time. These values ​​may also affect the burst envelope. Each burst may include transient and steady-state sine waves. The transient sine wave within each burst is set by L5 and / or the Q of the system until the full voltage is reached during the steady-state sine wave.

[0094] If the switch in the driver circuit operates at the resonant frequency f resonant When the switch is turned on, the output voltage at the transformer will be amplified. In some embodiments, the resonant frequency can be approximately 20Hz, 50Hz, 100Hz, 250Hz, 400kHz, 0.5MHz, 2.0MHz, 4.0MHz, 13.56MHz, 27.12MHz, 40.68MHz, 50MHz, 100MHz, etc.

[0095] In some embodiments, the resonant capacitor C2 includes the stray capacitance of the transformer T1 and / or a physical capacitor. In some embodiments, the resonant capacitor C2 may have a capacitance of approximately 10 μF, 1 μF, 100 nF, 10 nF, etc. In some embodiments, the resonant inductor L5 may include the stray inductance of the transformer T1 and / or a physical inductor. In some embodiments, the resonant inductor L5 may have an inductance of approximately 50 nH, 100 nH, 150 nH, 500 nH, 1000 nH, etc. In some embodiments, the resonant resistor R5 may have a resistance of approximately 10 ohms, 25 ohms, 50 ohms, 100 ohms, 150 ohms, 500 ohms, etc.

[0096] In some embodiments, the plasma load within the plasma chamber can be a time-varying load. This time-varying nature may affect one or both of the inductance or capacitance of the resonant circuit, which may affect the resonant frequency f. resonantThe offset. In some embodiments, the plasma sheath control system may include a controller (e.g., a microcontroller, FPGA, or any control device). In some embodiments, the controller may, for example, measure the output voltage and / or current of the plasma sheath control system at point 121. In some embodiments, this voltage or current measurement may be used to determine whether the plasma sheath control system is operating at a resonant frequency. In some embodiments, if the system is not operating at a resonant frequency, the controller may, for example, change the operating frequency of the plasma sheath control system to match the resonant frequency by adjusting the inductance or capacitance value in the resonant circuit 1610.

[0097] In some embodiments, for example, the amplitude of the current or voltage waveform generated by the plasma sheath control system at points 121, 122, 124, 125 or any point in the circuit can be measured by the controller. In some embodiments, the measured current and / or voltage can be used to determine the output power of the plasma sheath control system. In some embodiments, the controller can change the operating frequency, voltage, or duty cycle in response to the measurement to achieve a desired output voltage, current, or power level.

[0098] In some embodiments, one or both of the operating frequency and output power of the plasma sheath control system may be controlled by a controller. In some embodiments, the controller may detect changes in the output waveform and adjust the operating frequency and / or power level on a fast time scale (e.g., less than about 100 ms, less than about 1 ms, less than about 10 μs, less than about 500 ns, etc.).

[0099] In some embodiments, resistor R5 may represent stray resistance of wires, traces, and / or transformer windings within a physical circuit. In some embodiments, resistor R5 may have a resistance of approximately 10 mohm, 50 mohm, 100 mohm, 200 mohm, 500 mohm, etc.

[0100] In some embodiments, transformer T2 may include the transformer disclosed in U.S. Patent Application No. 15 / 365,094 entitled “High Voltage Transformer,” which is incorporated herein for all purposes.

[0101] In some embodiments, the output voltage of the resonant circuit 1610 can be changed by altering the duty cycle of switches S1, S2, S3, and / or S4 (e.g., the "on" time of the switches or the time the switches are conducting). For example, a longer duty cycle results in a higher output voltage, and a shorter duty cycle results in a shorter output voltage. In some embodiments, the output voltage of the resonant circuit 1610 can be changed or tuned by adjusting the duty cycle of the switches in the full-bridge driver. For example, the output voltage of the driver can be adjusted by adjusting the duty cycle of the signals (e.g., Sig1 and Sig2) that open and close switches S1, S2, S3, and S4.

[0102] In some embodiments, each switch in the resonant circuit (e.g., S1, S2, S3 and / or S4) can switch independently or in combination with one or more other switches.

[0103] In some embodiments, the resonant circuit 1610 may be coupled to the half-wave rectifier 1615 and / or the choke diode D7. In some embodiments, the choke diode D7 may be replaced by a switch (e.g., a high-voltage switch). The high-voltage switch may include... Figure 18 The high-voltage switch 1800 is shown. For example, the high-voltage switch can be closed during forward conduction (e.g., when the output of RF generator 515 is above a voltage threshold) and opened during reverse bias (e.g., when the output of RF generator 515 is below a voltage threshold).

[0104] In some embodiments, the choke diode D7 can rectify the sinusoidal waveform from the full-bridge driver 1605. For example, the choke diode D7 can rectify the sinusoidal waveform to create a rectified sinusoidal waveform with a substantially flat portion of at least 10%, 15%, 20%, 25%, 30%, etc., per cycle.

[0105] In some embodiments, the half-wave rectifier 1615 or the choke diode D7 may be coupled to the resistor output stage 1620. The resistor output stage 1620 may include any resistor output stage known in the art. For example, the resistor output stage 1620 may include any resistor output stage described in U.S. Patent Application No. 16 / 178,538 entitled “HIGH VOLTAGE RESISTIVE OUTPUT STAGE CIRCUIT,” which is incorporated herein by reference in its entirety for all purposes. For example, the resistor output stage 1620 may include elements from resistor output stage 705.

[0106] In some embodiments, the resistive output stage may include at least one resistor (e.g., R1) for discharging a load (e.g., a plasma sheath capacitor). In some embodiments, the resistive output stage may be configured to discharge an average power of more than about 1 kilowatt during each sine wave cycle, and / or discharge one joule or less of energy during each sine wave cycle. In some embodiments, the resistance of resistor R1 in the resistive output stage may be less than 200 ohms. In some embodiments, resistor R1 may include multiple resistors arranged in series or parallel, having a combined capacitance of less than about 200 pF (e.g., C11).

[0107] In some embodiments, the resistor output stage 1620 may include a collection of circuit elements that can be used to control the shape of a voltage waveform across a load. In some embodiments, the resistor output stage 1620 may include only passive elements (e.g., resistors, capacitors, inductors, etc.). In some embodiments, the resistor output stage 1620 may include active circuit elements (e.g., switches) as well as passive circuit elements. In some embodiments, for example, the resistor output stage 1620 may be used to control the voltage rise time and / or voltage fall time of a waveform.

[0108] In some embodiments, the resistive output stage 705 can discharge capacitive loads (e.g., capacitive charges from the wafer plasma sheath 505 and / or the wall plasma sheath 510). For example, these capacitive loads may have small capacitances (e.g., approximately 10 pF, 100 pF, 500 pF, 1 nF, 10 nF, 100 nF, etc.).

[0109] In some embodiments, the resistor output stage 1620 can be used in circuits having a sinusoidal waveform with a high peak voltage (e.g., a voltage greater than 1kV, 10kV, 20kV, 50kV, 100kV, etc.) and / or a high frequency (e.g., a frequency greater than 1kHz, 10kHz, 100kHz, 200kHz, 500kHz, 1MHz, etc.) and / or a frequency of approximately 400kHz, 0.5MHz, 2.0MHz, 4.0MHz, 13.56MHz, 27.12MHz, 40.68MHz, 50MHz, etc.

[0110] In some embodiments, the resistive output stage 1620 can be selected to handle high average power, high peak power, fast rise time and / or fast / fall time. For example, the average rated power can be greater than about 0.5kW, 1.0kW, 10kW, 25kW, etc., and / or the peak rated power can be greater than about 1kW, 10kW, 100kW, 1MW, etc.

[0111] In some embodiments, the resistor output stage 1620 may include a series or parallel network of passive components. For example, the resistor output stage may include a resistor, a capacitor, and an inductor connected in series. As another example, the resistor output stage may include a capacitor in parallel with an inductor and a capacitor-inductor combination in series with a resistor. For example, L11 may be chosen to be large enough that no significant energy is injected into the resistor output stage when a voltage outside the rectifier is present. The values ​​of R3 and R1 may be chosen such that the L / R time can deplete the appropriate capacitor in the load faster than the RF frequency.

[0112] In some embodiments, the resistor output stage 1620 may be coupled to the bias compensation circuit 1625.

[0113] The bias compensation circuit 1625 may include any bias and / or bias compensation circuit known in the art. For example, the bias compensation circuit 1625 may include any bias and / or bias compensation circuit described in U.S. Patent Application No. 162 / 711,406 entitled “NANOSECOND PULSER BIAS COMPENSATION”, which is incorporated herein in its entirety for all purposes.

[0114] In some embodiments, the bias compensation circuit 1625 may include a bias capacitor C7, a choke capacitor C12, a choke diode D8, a switch S8 (e.g., a high-voltage switch), an offset supply voltage V1, a resistor R2, and / or a resistor R4. In some embodiments, the switch S8 includes a high-voltage switch (e.g., such as...). Figure 18 The high-voltage switch 1800 shown is illustrated.

[0115] In some embodiments, the offset supply voltage V5 may include a DC voltage source that can bias the output voltage positively or negatively. In some embodiments, capacitor C12 may isolate / disconnect the offset supply voltage V5 from the resistive output stage 1620 and / or other circuit elements. In some embodiments, the bias compensation circuit 1625 may allow potential transfer of power from one part of the circuit to another. In some embodiments, the bias compensation circuit 1625 may be used to hold the wafer in place because a high-voltage sinusoidal waveform is active within the cavity. Resistor R2 may protect / isolate the DC bias supply from the bridge driver.

[0116] In some embodiments, switch S8 can be opened while the full-bridge driver 1605 is pulsed, and closed when the full-bridge driver 1605 is not pulsed. Simultaneously, switch S8 can, for example, short-circuit the current across the choke diode D8. Short-circuiting this current allows the bias between the wafer and the clip to be less than 2kV, which can be within acceptable tolerances.

[0117] In some embodiments, the plasma sheath control system 1600 may or may not include a conventional matching network (e.g., a 50-ohm matching network, an external matching network, or a standalone matching network). The embodiments described herein may or may not require a 50-ohm matching network to tune the switching power applied to the wafer cavity. Typically, tuning the matching network may take at least 100-200 μs. In some embodiments, power changes may occur within one or two RF cycles (e.g., 2.5-5.0 μs) at 400 kHz.

[0118] Figure 17 This is a circuit diagram of a plasma sheath control system 1700 according to some embodiments. The plasma sheath control system 1700 includes a waveform generator 1745 that generates high-voltage and high-frequency sinusoidal waveforms, for example, to drive a plasma chamber. In some embodiments, the waveform generator 1745 may include any device that generates sinusoidal waveforms having peak voltages greater than 1kV, 10kV, 20kV, 50kV, 100kV, etc., and high frequencies greater than 1kHz, 10kHz, 100kHz, 200kHz, 500kHz, 1MHz, etc.

[0119] In some embodiments, waveform generator 1745 may include RF generator 515, full-bridge driver 1605, or half-bridge driver 1905. In some embodiments, waveform generator 1745 may or may not include a transformer.

[0120] In some embodiments, waveform generator 1745 may be coupled to energy recovery circuit 1705. If waveform generator 1745 includes a transformer, energy recovery circuit 1705 may be located on or electrically coupled to the secondary side of transformer T1.

[0121] For example, energy recovery circuit 1705 may include a diode 1730 (e.g., a crowbar diode) spanning the secondary side of transformer T1. Energy recovery circuit 1705 may also include a diode 1710 and an inductor 1715 (arranged in series) that allow current to flow from the load stage 106 (e.g., a capacitive load) to charge power supply C7. Diode 1710 and inductor 1715 may be electrically connected to load stage 106 and power supply C7.

[0122] In some embodiments, the energy recovery circuit 1705 may include a choke diode 1735. The choke diode 1735 may be similar to, or can be operated in a similar manner to, choke diode D7. For example, the choke diode 1735 may rectify a sinusoidal waveform, thereby producing, for example, a flat top on each sinusoidal waveform (e.g., as shown in the image). Figure 9 (As shown). For example, the choke diode 1735 can rectify a sinusoidal waveform, creating a sinusoidal waveform with a substantially flat portion of at least 10%, 15%, 20%, 25%, 30%, etc., per cycle.

[0123] In some embodiments, the current-blocking diode 1735 can be replaced by a switch (e.g., a high-voltage switch). The high-voltage switch may include... Figure 18 The high-voltage switch 1800 is shown. For example, the high-voltage switch can be closed during forward conduction (e.g., when the output of RF generator 515 is above a voltage threshold) and opened during reverse bias (e.g., when the output of RF generator 515 is below a voltage threshold).

[0124] In some embodiments, the energy recovery circuit 1705 may include an inductor 1740 that can be electrically coupled to the load stage 106. The inductor 1740 may represent the stray inductance of the transformer within the waveform generator 1745, and / or may include the stray inductance between the waveform generator 1745 and the energy recovery circuit 1705 (e.g., the inductor transformer T1).

[0125] When waveform generator 1745 is turned on, current can charge load stage 106 (e.g., capacitor C3, capacitor C2, or capacitor C9). For example, when the voltage on the secondary side of transformer T1 rises above the charging voltage on power supply C7, some current can flow through inductor 1715. When waveform generator 1745 is turned off, current can flow from the capacitors within load stage 106 through inductor 1715 to charge power supply C7 until the voltage across inductor 1715 is zero. Diode 1730 prevents the capacitors within load stage 106 from forming a loop with the inductors in load stage 106 or DC bias circuit 104.

[0126] For example, diode 1710 can prevent charge from flowing from power supply C7 to the capacitor within load stage 106.

[0127] The value of inductor 1715 can be selected to control the current drop time. In some embodiments, inductor 1715 may have an inductance value between 1 μH and 500 μH.

[0128] In some embodiments, the energy recovery circuit 1705 may include a switch that can be used to control the flow of current through the inductor 1715. For example, the switch may be placed in series with the inductor 1715. In an embodiment, the switch may close when the switch S1 is open and / or when the pulse ceases to occur, to allow current to flow from the load stage 106 back to the high-voltage load C7. For example, the switch may include a high-voltage switch (e.g., such as high-voltage switch 1800).

[0129] Energy recovery circuit 1705 can be added to plasma sheath control system 500, plasma sheath control system 700, plasma sheath control system 1200, plasma sheath control system 1600, or plasma sheath control system 1900. In some embodiments, energy recovery circuit 1705 can replace a resistor output stage (e.g., resistor output stage 705 or resistor output stage 1620).

[0130] DC bias circuit 1704 may include DC bias circuit 1704, bias compensation circuit 1625, DC bias circuit 1204 or DC bias circuit 104.

[0131] The second lead stage 105 can represent the circuit elements between the waveform generator 1745 and the load stage 106.

[0132] In this example, the plasma sheath control system 1700 can be coupled to the load stage 106 (which may include, for example, any element of the load stage 106) and provided to it with a sine wave.

[0133] Figure 18 This is a block diagram of a high-voltage switch 1800 with an isolated power supply according to some embodiments. The high-voltage switch 1800 may include a plurality of switch modules 1805 (commonly or individually 1805, and individually 1805A, 1805B, 1805C, and 1805D), which can switch a voltage from a high-voltage source 1860 by means of a fast rise time and / or a high frequency and / or by means of a variable pulse width. Each switch module 1805 may include a switch 1810 (e.g., such as a solid-state switch).

[0134] In some embodiments, switch 1810 may be electrically coupled to gate driver circuitry 1830, which may include power supply 1840 (e.g., 1840A, 1840B, 1840C, or 1840D) and / or isolated fiber optic trigger 1845 (e.g., 1845A, 1845B, 1845C, or 1845D) (also referred to as a gate trigger or switch trigger). For example, switch 1810 may include a collector, emitter, and gate (or drain, source, and gate), and power supply 1840 may drive the gate of switch 1810 via gate driver circuitry 1830. For example, gate driver circuitry 1830 may be isolated from other components of high-voltage switch 1800.

[0135] In some embodiments, for example, an isolation transformer can be used to isolate the power supply 1840. The isolation transformer may include a low-capacitance transformer. For example, the low capacitance of the isolation transformer can allow the power supply 1840 to charge on a fast time scale without requiring significant current. For example, the isolation transformer may have a capacitance of less than approximately 100 pF. As another example, the isolation transformer may have a capacitance of less than approximately 30-100 pF. In some embodiments, the isolation transformer can provide voltage isolation up to 1 kV, 5 kV, 10 kV, 25 kV, 50 kV, etc.

[0136] In some embodiments, the isolation transformer may have low stray capacitance. For example, the isolation transformer may have stray capacitance of less than approximately 1,000 pF, 100 pF, 10 pF, etc. In some embodiments, low capacitance can minimize electrical coupling to low-voltage components (e.g., sources of input control power supplies) and / or can reduce EMI generation (e.g., electrical noise generation). In some embodiments, the transformer stray capacitance of the isolation transformer may include the capacitance measured between the primary and secondary windings.

[0137] In some embodiments, the isolation transformer may be a DC-to-DC converter or an AC-to-DC transformer. In some embodiments, for example, the transformer may include a 110V AC transformer. In any case, the isolation transformer can provide a power supply isolated from other components in the high-voltage switch 1800. In some embodiments, the isolation may be galvanic, such that conductors on the primary side of the isolation transformer do not pass through or come into contact with the secondary side of the isolation transformer.

[0138] In some embodiments, the transformer may include a primary winding that can be tightly wound or coiled around the transformer core. In some embodiments, the primary winding may include conductive sheets coiled around the transformer core. In some embodiments, the primary winding may include one or more windings.

[0139] In some embodiments, the secondary winding may be wound around the core as far away from it as possible. For example, the winding bundle including the secondary winding may be wound through the center of an aperture in the transformer core. In some embodiments, the secondary winding may include one or more windings. In some embodiments, the wire bundle including the secondary winding may include a circular or square cross-section, for example, to minimize stray capacitance. In some embodiments, an insulator (e.g., oil or air) may be deployed between the primary winding, the secondary winding, or the transformer core.

[0140] In some embodiments, keeping the secondary winding away from the transformer core can have several benefits. For example, it can reduce stray capacitance between the primary and secondary sides of the isolation transformer. As another example, it can allow high voltage isolation between the primary and secondary sides of the isolation transformer, so that corona and / or breakdown do not occur during operation.

[0141] In some embodiments, the spacing between the primary side (e.g., primary winding) and the secondary side (e.g., secondary winding) of the isolation transformer can be approximately 0.1 inch, 0.5 inch, 1 inch, 5 inch, or 10 inches. In some embodiments, a typical spacing between the core of the isolation transformer and the secondary side (e.g., secondary winding) of the isolation transformer can be approximately 0.1 inch, 0.5 inch, 1 inch, 5 inch, or 10 inches. In some embodiments, the gaps between the windings can be filled with the lowest possible dielectric material (e.g., a vacuum, air, any insulating gas or liquid, or a solid material having a relative permittivity of less than 3).

[0142] In some embodiments, power supply 1840 may include any type of power supply that can provide high-voltage isolation or has low capacitance (e.g., less than about 1,000 pF, 100 pF, 10 pF, etc.). In some embodiments, the control voltage power supply may provide 1820 V AC or 240 V AC at 60 Hz.

[0143] In some embodiments, each power supply 1840 may be electrically coupled inductively to a single control voltage power supply. For example, power supply 1840A may be electrically coupled to a power supply via a first transformer; power supply 1840B may be electrically coupled to a power supply via a second transformer; power supply 1840C may be electrically coupled to a power supply via a third transformer; and power supply 1840D may be electrically coupled to a power supply via a fourth transformer. For example, any type of transformer that can provide voltage isolation between the various power supplies can be used.

[0144] In some embodiments, the first transformer, second transformer, third transformer, and fourth transformer may include different secondary windings around the core of a single transformer. For example, the first transformer may include a primary secondary winding, the second transformer may include a secondary secondary winding, the third transformer may include a tertiary secondary winding, and the fourth transformer may include a fourth secondary winding. Each of these secondary windings may be wound around the core of a single transformer. In some embodiments, the primary, secondary, tertiary, and fourth secondary windings or the primary winding may include a single winding or multiple windings wound around the transformer core.

[0145] In some embodiments, power supplies 1840A, 1840B, 1840C, and / or 1840D may not share a return to reference ground or local ground.

[0146] For example, the isolated fiber optic trigger 1845 can also be isolated from other components of the high-voltage switch 1800. The isolated fiber optic trigger 1845 may include a fiber optic receiver that allows each switch module 1805 to float relative to other switch modules 1805 and / or other components of the high-voltage switch 1800, and / or, for example, simultaneously allow active control of the gate of each switch module 1805.

[0147] In some embodiments, for example, the return reference ground, local ground, or public ground for each switch module 1805 can be isolated from each other, for example, using an isolation transformer.

[0148] For example, electrical isolation of each switch module 1805 from the common ground allows multiple switches to be arranged in series for accumulating high-voltage switching. In some embodiments, a certain hysteresis in the timing of the switch modules can be permitted or designed. For example, each switch module 1805 can be configured or rated to switch 1kV, each switch module can be electrically isolated from each other, and / or the timing of closing each switch module 1805 does not need to be perfectly aligned to the time period defined by the capacitance of the buffer capacitor and / or the rated voltage of the switch.

[0149] In some embodiments, electrical isolation can provide numerous advantages. For example, one possible advantage may include minimizing switch-to-switch jitter and / or allowing arbitrary switch timing. For instance, each switch 1810 may have switch transition jitter of less than approximately 500 ns, 50 ns, 20 ns, 5 ns, etc.

[0150] In some embodiments, electrical isolation between two components (or circuits) may imply extremely high resistance between the two components, and / or may imply small capacitance between the two components.

[0151] Each switch 1810 may include any type of solid-state switching device (e.g., IGBT, MOSFET, SiCMOSFET, SiC junction transistor, FET, SiC switch, GaN switch, opto-switch, etc.). For example, switch 1810 may be able to switch high voltages (e.g., voltages greater than approximately 1 kV) at high speeds (e.g., repetition rates greater than approximately 500 kHz) through high frequencies (e.g., greater than 1 kHz) and / or through fast rise times (e.g., rise times less than approximately 25 ns). In some embodiments, each switch may be individually rated for switching 1,200 V–1,700 V, while in combination it may be able to switch greater than 4,800 V–6,800 V (for four switches). Switches with a variety of other voltage ratings may be used.

[0152] Using a large number of lower-voltage switches instead of a few higher-voltage switches can have several advantages. For example, lower-voltage switches typically have better performance: they can switch faster, have quicker transition times, and / or switch more efficiently than higher-voltage switches. However, the larger the number of switches, the greater the potential timing issues that may arise.

[0153] Figure 18 The high-voltage switch 1800 shown comprises four switch modules 1805. Although four are shown in the figure, any number of switch modules 1805 can be used (e.g., two, eight, twelve, sixteen, twenty, twenty-four, etc.). For example, if each switch in each switch module 1805 is rated at 1200V, and sixteen switches are used, the high-voltage switch can operate up to 19.2kV. As another example, if each switch in each switch module 1805 is rated at 1700V, and sixteen switches are used, the high-voltage switch can operate up to 27.2kV.

[0154] In some embodiments, the high-voltage switch 1800 may include a fast capacitor 1855. For example, the fast capacitor 1855 may include one or more capacitors arranged in series and / or parallel. For example, these capacitors may include one or more polypropylene capacitors. The fast capacitor 1855 may store energy from the high-voltage source 1860.

[0155] In some embodiments, the fast capacitor 1855 may have a low capacitance. In some embodiments, the fast capacitor 1855 may have a capacitance value of about 1 μF, about 5 μF, between about 1 μF and about 5 μF, between about 100 nF and about 1,000 nF, etc.

[0156] In some embodiments, the high-voltage switch 1800 may or may not include a crowbar diode 1850. The crowbar diode 1850 may comprise multiple diodes arranged in series or parallel, which may be advantageous for driving inductive loads. In some embodiments, the crowbar diode 1850 may include one or more Schottky diodes (e.g., silicon carbide Schottky diodes). For example, the crowbar diode 1850 may sense whether the voltage from the switch in the high-voltage switch is higher than a certain threshold. If so, the crowbar diode 1850 may short-circuit the power from the switch module to ground. For example, the crowbar diode may allow alternating current paths to dissipate energy stored in the inductive load after the switch. For example, this may prevent large inductive voltage spikes. In some embodiments, the crowbar diode 1850 may have low inductance (e.g., 1nH, 10nH, 100nH, etc.). In some embodiments, the crowbar diode 1850 may have low capacitance (e.g., 100pF, 1nF, 10nF, 100nF, etc.).

[0157] In some embodiments, such as when the load 1865 is primarily resistive, the crowbar diode 1850 may not be used.

[0158] In some embodiments, each gate driver circuit 1830 may generate jitter of less than approximately 1000 ns, 100 ns, 10.0 ns, 5.0 ns, 3.0 ns, 1.0 ns, etc. In some embodiments, each switch 1810 may have a minimum on-time (e.g., less than approximately 10 μs, 1 μs, 500 ns, 100 ns, 50 ns, 10 ns, 5 ns, etc.) and a maximum on-time (e.g., greater than 25 s, 10 s, 5 s, 1 s, 500 ms, etc.).

[0159] In some embodiments, during operation, each of the high-voltage switches can be turned on and / or off within 1 ns of each other.

[0160] In some embodiments, each switch module 1805 may have the same or substantially the same (±5%) stray inductance. Stray inductance may include any inductance within the switch module 1805 that is not associated with an inductor (e.g., inductance in leads, diodes, resistors, switches 1810, and / or board traces, etc.). Stray inductance within each switch module 1805 may include low inductance (e.g., inductance less than approximately 300nH, 100nH, 10nH, 1nH, etc.). Stray inductance between each switch module 1805 may include low inductance (e.g., inductance less than approximately 300nH, 100nH, 10nH, 1nH, etc.).

[0161] In some embodiments, each switch module 1805 may have the same or substantially the same (±5%) stray capacitance. Stray capacitance may include any capacitance within the switch module 1805 that is not associated with a capacitor (e.g., capacitance in leads, diodes, resistors, switches 1810, and / or circuit board traces, etc.). Stray capacitance within each switch module 1805 may include low capacitance (e.g., less than approximately 1,000 pF, 100 pF, 10 pF, etc.). Stray capacitance between each switch module 1805 may include low capacitance (e.g., less than approximately 1,000 pF, 100 pF, 10 pF, etc.).

[0162] For example, voltage distribution defects can be addressed using passive snubber circuits (e.g., snubber diode 1815, snubber capacitor 1820, and / or freewheeling diode 1825). For instance, small timing differences or variations in inductance or capacitance between each of the on / off states in switch 1810 can cause voltage spikes. These spikes can be mitigated using various snubber circuits (e.g., snubber diode 1815, snubber capacitor 1820, and / or freewheeling diode 1825).

[0163] For example, a buffer circuit may include a buffer diode 1815, a buffer capacitor 1820, a buffer resistor 1816, and / or a freewheeling diode 1825. In some embodiments, the buffer circuit may be arranged in parallel with the switch 1810. In some embodiments, the buffer capacitor 1820 may have a low capacitance (e.g., less than about 100 pF).

[0164] In some embodiments, the high-voltage switch 1800 may be electrically coupled to or include a load 1865 (e.g., a resistive, capacitive, or inductive load). For example, the load 1865 may have a resistance from 50 ohms to 500 ohms. Alternatively or additionally, the load 1865 may be an inductive or capacitive load.

[0165] Figure 19 This is a circuit diagram of a plasma sheath control system 1900 according to some embodiments. In this example, the plasma sheath control system 1900 may include a half-bridge driver 1905 instead of... Figure 16 The full-bridge driver 1605 is shown. Switches S1 and S2 can be opened alternately to allow current to flow through the load in one direction during a first time period and to allow current to flow through the load in the opposite direction during a second time period.

[0166] In some embodiments, a matching network may be included to match the impedance of the plasma chamber with the impedance of the RF generator to, for example, deliver maximum power to the plasma. This may be advantageous, for example, when using a 50-ohm system. For example, plasma sheath control system 500, plasma sheath control system 700, or plasma sheath control system 1200 may include a matching network near resistor R13. As another example, plasma sheath control system 1600, plasma sheath control system 1700, or plasma sheath control system 1900 may include a matching network preceding inductor L2.

[0167] Unless otherwise specified, the term "substantially" means within 5% or 10% of the value referred to or within manufacturing tolerances. Unless otherwise specified, the term "approximately" means within 5% or 10% of the value referred to or within manufacturing tolerances.

[0168] As used in this document, the conjunction “or” is inclusive.

[0169] This document sets forth numerous specific details to provide a thorough understanding of the claimed subject matter. However, those skilled in the art will understand that the claimed subject matter can be practiced without these specific details. In other instances, methods, apparatus, or systems well-known to those skilled in the art have not been described in detail so as not to obscure the claimed subject matter.

[0170] The use of “applies to” or “configured to” in this document indicates an open and inclusive language that does not exclude applicability to or configuration for devices performing additional tasks or steps. Furthermore, the use of “based on” is open and inclusive in that a process, step, calculation, or other action “based on” one or more stated conditions or values ​​may actually be based on additional conditions or values ​​beyond those stated. The headings, lists, and numbering included in this document are for ease of interpretation only and are not intended to be limiting.

[0171] While this subject matter has been described in detail with respect to specific embodiments thereof, it should be understood that modifications, variations, and equivalents of these embodiments can be readily made by those skilled in the art in implementing the foregoing understanding. Accordingly, it should be understood that this disclosure has been made for purposes of illustration rather than limitation, and does not exclude the inclusion of such modifications, variations, and / or additions to this subject matter as will be readily apparent to those skilled in the art.

Claims

1. A plasma sheath control system, comprising: RF power supply, which generates a sinusoidal waveform with a frequency greater than 20kHz and a peak voltage greater than 1kV; A plasma chamber electrically coupled to the RF power supply, the plasma chamber having multiple ions accelerated to a surface deployed within the plasma chamber by an energy greater than 1 kV, and the plasma chamber generating a plasma sheath from the sinusoidal waveform within the plasma chamber; A choke diode, electrically connected between the RF power supply and the plasma chamber, rectifies the sinusoidal waveform to produce a sinusoidal waveform with a flat portion. A capacitor discharge circuit is electrically coupled to the RF power supply, the plasma chamber, and the choke diode; the capacitor discharge circuit discharges the capacitive charge in the plasma chamber through a peak voltage greater than 1 kV and a discharge time of less than 250 nanoseconds. A controller that adjusts the frequency and / or power of the sinusoidal waveform generated by the resonant circuit on a time scale of less than 1 ms.

2. The plasma sheath control system as described in claim 1, wherein, The capacitor discharge circuit includes a resistor output stage comprising resistors and inductors arranged in series, the resistor output stage being deployed between a point on the plasma sheath control system between the choke diode and the plasma chamber and ground.

3. The plasma sheath control system as described in claim 1, wherein, The capacitor discharge circuit includes an energy recovery circuit comprising a diode and an inductor arranged in series, the energy recovery circuit being deployed between the current-blocking diode and the plasma chamber and the RF power supply.

4. The plasma sheath control system of claim 1 further includes a bias capacitor arranged in series between the current-blocking diode and the plasma chamber.

5. The plasma sheath control system of claim 1 further includes a bias compensation circuit comprising a DC power supply, a resistor, a diode, and a high-voltage switch, the bias compensation circuit being deployed between points on the plasma sheath control system between the current-blocking diode and the RF power supply.

6. The plasma sheath control system of claim 1 further includes a matching network electrically coupled to the plasma chamber, the matching network matching the reactance impedance of the plasma load in the plasma chamber with the output impedance of the RF power supply.

7. The plasma sheath control system as described in claim 1, wherein, The current-blocking diode rectifies the sinusoidal waveform to create a sinusoidal waveform with a substantially flat portion of at least 25% of each cycle.

8. A plasma sheath control system, comprising: A high-voltage DC power supply that generates a DC voltage greater than 200V; A resonant circuit driver includes a plurality of high-voltage switches that are alternately turned on and off to generate a sinusoidal waveform with a frequency greater than 20 kHz and a peak voltage greater than 1 kV. A plasma chamber electrically coupled to the resonant circuit driver, the plasma chamber having multiple ions accelerated to a surface deployed within the plasma chamber by an energy greater than 1 kV, and the plasma chamber generating a plasma sheath from the sinusoidal waveform within the plasma chamber; A choke diode, electrically connected between the resonant circuit driver and the plasma cavity, rectifies the sinusoidal waveform to produce a sinusoidal waveform with a flat portion. An energy recovery circuit includes a diode and an inductor arranged in series, the energy recovery circuit being deployed between the current-blocking diode and the plasma chamber and the high-voltage DC power supply.

9. The plasma sheath control system as described in claim 8, wherein, The choke diode rectifies the sinusoidal waveform, creating a substantially flat portion of at least 25% of each cycle.

10. The plasma sheath control system of claim 8, further comprising a resistor output stage including resistors and inductors arranged in series, the resistor output stage being deployed between a point on the plasma sheath control system between the current-blocking diode and the plasma chamber and ground.

11. The plasma sheath control system as described in claim 8, in, The plurality of high-voltage switches includes a first switch, a second switch, a third switch, and a fourth switch; Wherein, the first switch and the fourth switch are closed during a first time period to allow current to flow in a first direction; and The second and third switches are closed during the second time period to allow current to flow in a second direction opposite to the first direction.

12. The plasma sheath control system as described in claim 8, in, The plurality of high-voltage switches includes a first switch and a second switch; Wherein, the first switch is closed during the first time period to allow current to flow in the first direction; and The second switch is closed during the second time period to allow current to flow in a second direction opposite to the first direction.

13. The plasma sheath control system as claimed in claim 8, wherein, The plurality of high-voltage switches switch at a frequency according to the following formula: ,in, Greater than 10kHz, where L represents the inductance of the load in the plasma chamber and C represents the capacitance of the capacitor in the resonant circuit driver.

14. The plasma sheath control system as claimed in claim 8, wherein, The plurality of high-voltage switches switch at a frequency according to the following formula: ,in, Greater than 10kHz, where L represents the inductance of the inductor in the resonant circuit driver and C represents the capacitance of the load in the plasma chamber.

15. The plasma sheath control system as claimed in claim 8, wherein, The plurality of high-voltage switches switch at a frequency according to the following formula: ,in, Greater than 10kHz, where L represents the inductance of the inductor in the resonant circuit driver and C represents the capacitance of the capacitor in the resonant circuit driver.

16. The plasma sheath control system as claimed in claim 8, wherein, While the resonant circuit driver is generating the sinusoidal waveform, the plasma sheath control system generates a voltage greater than 1 kV across the plasma sheath.

17. The plasma sheath control system of claim 8, further comprising a controller that adjusts one or both of the frequency or power of the sinusoidal waveform generated by the resonant circuit on a time scale of less than 1 ms.

18. The plasma sheath control system of claim 8, further comprising a controller that measures the frequency of a sinusoidal waveform at a point preceding the plasma chamber, and adjusts the frequency of the sinusoidal waveform generated by the resonant circuit driver if the frequency of the sinusoidal waveform at the point preceding the plasma chamber does not match the resonant frequency.

19. The plasma sheath control system of claim 8, further comprising a controller that measures the power of a sinusoidal waveform at a point preceding the plasma chamber, and adjusts the power of the sinusoidal waveform generated by the resonant circuit driver if the power of the sinusoidal waveform at the point preceding the plasma chamber does not match the required power.

20. A plasma sheath control system, comprising: RF power supply, which generates a sinusoidal waveform with a frequency greater than 20kHz and a peak voltage greater than 1kV; A plasma chamber electrically coupled to the RF power supply, the plasma chamber having multiple ions accelerated to a surface deployed within the plasma chamber by an energy greater than 1 kV, and the plasma chamber generating a plasma sheath from the sinusoidal waveform within the plasma chamber; A choke diode, electrically connected between the RF power supply and the plasma chamber, rectifies the sinusoidal waveform to produce a sinusoidal waveform with a flat portion. A resistive output stage circuit comprising resistors and inductors arranged in series, the resistive output stage circuit being deployed between a point on the plasma sheath control system between the current-blocking diode and the plasma chamber and ground; A controller that adjusts the frequency and / or power of the sinusoidal waveform generated by the resonant circuit on a time scale of less than 1 ms.

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