Semiconductor packaging structure and manufacturing method
By using transparent panels and spacers to seal the optical structure of electronic devices in a semiconductor packaging structure, and by designing conductive lines and a cover with an adhesive layer, the impact of dust and particles on the packaging structure is solved, achieving stability and performance protection in extreme environments.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-04-17
- Publication Date
- 2026-04-03
AI Technical Summary
External substances such as dust and particles can adversely affect the performance of semiconductor packaging structures, especially in extreme environments, leading to performance degradation and reliability issues.
The optical structure of the electronic device is sealed with a transparent panel and spacers. The conductive wires are exposed to air but are not affected by stress. The cover encloses the electronic device and contacts the transparent panel through an adhesive layer, forming an airtight sealed space to protect the internal structure.
It effectively prevents external particles from entering the sealed space, reduces the popcorn effect, and ensures the stability and performance of the encapsulation structure under extreme temperature changes, making it suitable for extreme environments such as lidar systems.
Smart Images

Figure CN113013264B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to semiconductor packaging structures. Background Technology
[0002] Semiconductor package structures may include semiconductor devices disposed on a carrier. The semiconductor devices can detect environmental conditions (such as light).
[0003] However, dust, particles, and other contaminants can negatively impact the performance of semiconductor packaging structures. Summary of the Invention
[0004] In some embodiments, the present invention provides a semiconductor package structure comprising a carrier, an electronic device, a spacer, a transparent panel, and conductive lines. The electronic device has a first surface and an optical structure on the first surface. The spacer is disposed on the first surface to enclose the optical structure of the electronic device. The transparent panel is disposed on the spacer. The conductive lines electrically connect the electronic device to the carrier and expose it to air.
[0005] In some embodiments, the present invention provides a semiconductor package structure comprising an electronic device, a cover, a transparent panel, and a first adhesive layer. The cover surrounds the electronic device. The transparent panel is disposed on the cover. The first adhesive layer is disposed in direct contact with the cover and the electronic device. The electronic device, the cover, the transparent panel, and the first adhesive layer seal a space.
[0006] In some embodiments, the present invention provides a semiconductor package structure comprising a carrier, an electronic device, a spacer, a transparent panel, and conductive lines. The electronic device is disposed on the carrier. The spacer is disposed on the electronic device. The transparent panel is disposed on the spacer to define a gap between the electronic device and the spacer. The conductive lines electrically connect the electronic device to the carrier and are unaffected by stress. Attached Figure Description
[0007] When read in conjunction with the accompanying drawings, aspects of the invention will be readily understood from the following detailed description. It should be noted that various features may not be drawn to scale. In fact, for clarity of explanation, the dimensions of various features may be arbitrarily increased or decreased.
[0008] Figure 1 A cross-sectional view of a semiconductor package structure according to some embodiments of the present invention is shown.
[0009] Figure 1A Illustrations of some other embodiments according to the present invention, such as Figure 1 An enlarged view of the spacer 13 shown.
[0010] Figure 1BIllustrations of some other embodiments according to the present invention, such as Figure 1 Another enlarged view of the spacer 13 shown.
[0011] Figure 1C Illustrations of some embodiments according to the present invention, such as Figure 1 The top view of the adhesive layer 15 shown.
[0012] Figure 2 Cross-sectional views of semiconductor package structures according to some other embodiments of the present invention are shown.
[0013] Figure 3 Cross-sectional views of semiconductor package structures according to some other embodiments of the present invention are shown.
[0014] Figure 4 Cross-sectional views of semiconductor package structures according to some other embodiments of the present invention are shown.
[0015] Figure 5 Cross-sectional views of semiconductor package structures according to some other embodiments of the present invention are shown.
[0016] Figure 6A A top view illustrating a semiconductor package structure according to some other embodiments of the present invention is shown.
[0017] Figure 6B Drawing across Figure 6A The cross-sectional view of the semiconductor package structure shown by line AA'.
[0018] Figure 7 Cross-sectional views of semiconductor package structures according to some other embodiments of the present invention are shown.
[0019] Figure 8 Cross-sectional views of semiconductor package structures according to some other embodiments of the present invention are shown.
[0020] Figure 9 Cross-sectional views of semiconductor package structures according to some other embodiments of the present invention are shown.
[0021] Figure 10 Cross-sectional views of semiconductor package structures according to some other embodiments of the present invention are shown. Detailed Implementation
[0022] Common reference numerals are used throughout the drawings and detailed description to indicate the same or similar components. Embodiments of the invention will be readily understood from the following detailed description taken in conjunction with the accompanying drawings.
[0023] For the orientation of components as shown in the associated diagrams, spatial descriptions are specified with respect to a particular component or group of components, or a plane of a component or group of components, such as "above," "below," "upper," "left," "right," "lower," "top," "bottom," "vertical," "horizontal," "side," "higher," "lower," "upper," "above," "below," etc. It should be understood that the spatial descriptions used herein are for illustrative purposes only, and actual embodiments of the structures described herein can be arranged in space in any orientation or manner, provided that the advantages of the embodiments of the invention are not deviated from by such arrangement.
[0024] Figure 1 A cross-sectional view of a semiconductor package structure 1 according to some embodiments of the present invention is shown.
[0025] refer to Figure 1 The semiconductor package structure 1 may include a carrier 10, an electronic device 11 (or a semiconductor device 11), a conductive line 12, a spacer 13, a transparent panel 14, an adhesive layer 15, and a cover 16.
[0026] The carrier 10 may include, for example, but not limited to, lead frames, substrates, inserts, etc. The carrier 10 may have a redistribution layer (RDL) structure, which may include a passivation layer and a patterned conductive layer. The carrier 10 may have circuitry, which may include conductive traces, vias, pads, etc. Figure 1 (Not shown in the diagram). The carrier 10 may have a single-layer structure. The carrier 10 may have a multi-layer structure.
[0027] Electronic device 11 may include semiconductor dies or semiconductor chips. Electronic device 11 may include, for example, but not limited to, microelectromechanical systems (MEMS) dies or chips. Electronic device 11 may include light-sensitive sensor dies. For example, electronic device 11 may include optical sensor or detector dies (e.g., complementary metal-oxide-semiconductor (CMOS) image sensor dies).
[0028] although Figure 1 The electronic device 11 shown has a wire-connected structure; however, it is anticipated that in some other embodiments of the invention, the semiconductor package structure 1 may include a flip-chip structure. The electronic device 11 has a surface 111. The electronic device 11 may have circuitry on the surface 111. Figure 1 (Not shown in the image). The electronic device 11 may have an optical structure 112 adjacent to the surface 111. The optical structure 112 may include, for example, but not limited to, lenses, microlens arrays, or other optical components. The optical structure 112 may be susceptible to particle influence.
[0029] Electronic device 11 is mounted on carrier 10. Electronic device 11 can be attached to carrier 10 by an adhesive layer. Figure 1(Not shown in the diagram), the adhesive layer may comprise, for example, but not limited to, adhesives, gels, films, or other types of adhesives. The electronic device 11 may be electrically connected to the carrier 10 via conductive wires 12.
[0030] The conductive wire 12 can electrically connect the electronic device 11 to the carrier 10. The conductive wire 12 can be exposed to air. The entire conductive wire 12 can be exposed to air. The conductive wire 12 can be unaffected by stress. The conductive wire 12 can be unaffected by stress from changes in the environment. The conductive wire 12 can be unaffected by stress from changes in temperature. The conductive wire 12 can be unaffected by stress from changes in humidity. The conductive wire may have terminals that directly contact the electronic device 11. Figure 1 (not shown in the image) and another terminal that is in direct contact with the carrier 10 ( Figure 1 (not shown in the text), and the main body between the two terminals ( Figure 1 (Not shown in the image), and the main body of the conductive wire 12 is separated from the electronic device 11 only by air. The entire main body of the conductive wire 12 can be exposed to air.
[0031] The conductive wire 12 can be subjected to relatively extreme environmental changes, such as changes in temperature or humidity, because the conductive wire 12 is not affected by the stress caused by these changes.
[0032] Despite Figure 1 As illustrated, the entire conductive wire 12 is exposed to air; however, it is anticipated that in some other embodiments of the invention, a portion of the conductive wire 12 may be encapsulated by an encapsulant, while another portion of the conductive wire 12 may be exposed to air.
[0033] Spacer 13 may comprise, for example, but not limited to, adhesive materials, epoxy materials, polymeric materials, metals, alloys, oxides, or other suitable materials. From a top view perspective, spacer 13 may have a circular shape. From a top view perspective, spacer 13 may have a near-circular shape. From a top view perspective, spacer 13 may have a rectangular shape. From a top view perspective, spacer 13 may have a near-rectangular shape. From a top view perspective, the shape of spacer 13 may vary according to design requirements. From a top view perspective, spacer 13 may have a ring structure. From a top view perspective, spacer 13 may have a ring-like structure.
[0034] Spacer 13 is disposed on surface 111 of electronic device 11. Spacer 13 may surround optical structure 112 of electronic device 11. Spacer 13 may enclose optical structure 112 of electronic device 11. Spacer 13 may be in direct contact with electronic device 11. Spacer 13 may be in direct contact with surface 111 of electronic device 11. Spacer 13 may be in direct contact with transparent panel 14. Spacer 13 may be spaced apart from optical structure 112.
[0035] The transparent panel 14 can be hermetically sealed to the electronic device 11 by the spacer 13. The transparent panel 14 can be hermetically sealed to the surface 111 of the electronic device 11 by the spacer 13.
[0036] The spacer 13 may have a single-layer structure, such as, but not limited to, an adhesive layer or an adhesive film.
[0037] Spacer 13 may have a multi-layer structure, for example, reference Figure 1A The figures illustrate some other embodiments of the present invention, such as Figure 1 The enlarged view of the spacer 13 shown is shown. The spacer 13 may include a lower layer 131 and an upper layer 132. Layer 131 may contain, for example, but not limited to, polymers, metals, alloys, oxides, or other suitable materials. Layer 132 may contain a material similar to layer 131. Layer 132 may contain a material that has a relatively strong adhesion to layer 131. For example, layer 131, which may contain copper (Cu), may be formed on surface 111 of electronic device 11, and layer 132, which may contain Cu, may be formed on transparent panel 14. Layers 131 and 132 may be bonded together by heat and pressing.
[0038] Figure 1B Illustrations of some other embodiments according to the present invention, such as Figure 1 Another enlarged view of the spacer 13 shown. (See reference) Figure 1B Layer 133 may be disposed between layers 131 and 132. Layer 133 may contain bonding materials, such as, but not limited to, welding materials, adhesives or other suitable materials.
[0039] Return to reference Figure 1A A transparent panel 14 is disposed on the spacer 13. The transparent panel 14 may comprise, for example, but not limited to, glass, plastic, or other suitable materials. The transparent panel 14 may comprise a material that allows light to pass through. The transparent panel 14 may comprise a material that allows light of a certain wavelength range to pass through. The transparent panel 14 may comprise a filter material. The transparent panel 14 protects the optical structure 112 from damage.
[0040] The transparent panel 14 may have a surface 141. The transparent panel 14 may have another surface 142 (e.g., a side surface or side face 142) adjacent to surface 141. Surface 142 may have a portion 142a and another portion 142b adjacent to portion 142a. The transparent panel 14 may be exposed to air. Surface 142 of the transparent panel 14 may be exposed to air. A portion 142b of surface 142 of the transparent panel 14 may be exposed to air. The transparent panel 14 may have a width substantially the same as that of the spacer 13.
[0041] The lid 16 can be placed on the carrier 10. The lid 16 can be made of an adhesive layer ( Figure 1 (Not shown in the diagram) Attached to carrier 10.
[0042] The lid 16 may contain, for example, but not limited to, polymers, plastics, or other suitable materials. The lid 16 may contain an opaque material. The lid 16 may contain a light-absorbing material.
[0043] The cover 16 may surround the electronic device 11. The cover 16 may enclose the electronic device 11. The cover 16 may surround the conductive wire 12. The cover 16 may enclose the conductive wire 12. The cover 16 may surround the spacer 13. The cover 16 may enclose the spacer 13. The cover 16 may surround the transparent panel 14. The cover 16 may enclose the transparent panel 14. The cover 16 may surround the adhesive layer 15. The cover 16 may enclose the adhesive layer 15.
[0044] The cover 16 may define an opening 16h in the transparent panel 14. The cover 16 may define an opening 16h to expose the transparent panel 14. The cover 16a may define an opening 16ah with a relatively larger width compared to the transparent panel 14.
[0045] The cover 16 protects the conductive wire 12 from damage. The cover 16 may include a bevel 161. The bevel 161 may be positioned adjacent to the conductive wire 12. The bevel 161 is designed to prevent the cover 16 from touching or damaging the conductive wire 12 during assembly.
[0046] The cover 16 may include a surface 162. Surface 162 may differ in height from the transparent panel 14. Surface 162 may be greater in height than the transparent panel 14. The cover 16 may include an upper surface 162 and a lower surface 163. From a cross-sectional view, the cover 16 may include a step (…). Figure 1 (Not shown in the image). The cover 16 may include a surface 164. Surface 164 may be disposed adjacent to surface 163. Surface 164 may be disposed adjacent to inclined surface 161. Surface 164 may be disposed between surface 163 and inclined surface 161. Surface 164 may include a side surface or a side surface.
[0047] The adhesive layer 15 can be applied to the surface 163 of the cover 16. The adhesive layer 15 can be in direct contact with the surface 163 of the cover 16. The adhesive layer 15 can cover the surface 163 of the cover 16.
[0048] The adhesive layer 15 can be disposed on the surface 141 of the transparent panel 14. The adhesive layer 15 can be in direct contact with the transparent panel 14. The adhesive layer 15 can be in direct contact with the surface 141 of the transparent panel 14. The adhesive layer 15 can cover the transparent panel 14. The adhesive layer 15 can cover the surface 141 of the transparent panel 14.
[0049] The adhesive layer 15 can be disposed on the surface 142 of the transparent panel 14. The adhesive layer 15 can be in direct contact with the surface 142 of the transparent panel 14. The adhesive layer 15 can be in direct contact with a portion 142a of the surface 142 of the transparent panel 14. The adhesive layer 15 can cover a portion 142a of the surface 142 of the transparent panel 14.
[0050] The adhesive layer 15 can be in direct contact with the surface 164 of the cover 16.
[0051] The adhesive layer 15 may contain, for example, but not limited to, adhesives, gels, films, or other types of adhesives. The adhesive layer 15 may contain opaque materials. The adhesive layer 15 may contain light-absorbing materials.
[0052] refer to Figure 1C It illustrates some embodiments of the present invention, such as Figure 1 The adhesive layer 15 is shown in top view. The adhesive layer 15 defines the opening 15h. Although the opening 15h is... Figure 1C The opening 15h is formed around the corner of the adhesive layer 15; however, it is anticipated that the position of the opening 15h may vary in some other embodiments of the invention. Although the adhesive layer 15 is... Figure 1C Only one opening 15h is defined in this specification; however, it is anticipated that in some other embodiments of the invention, multiple openings in addition to opening 15h may be defined. The size of opening 15h may be varied as needed.
[0053] Return to reference Figure 1 The semiconductor package structure 1 defines a chamber or space S1. Space S1 may be defined or enclosed by the electronic device 11, the transparent panel 14, and the spacer 13. The semiconductor package structure 1 defines another chamber or space S2.
[0054] When manufacturing the final product containing the semiconductor package structure 1, various technologies may be involved, such as, but not limited to, cutting techniques, cleaning techniques (e.g., by an air gun), heating techniques, etc. Particles generated from the cutting operation can be pushed through an opening 15h (e.g., Figure 1C As shown in the diagram, particles can enter space S2. However, particles cannot enter the hermetically sealed space S1. Therefore, the optical structure 112 in the sealed space S1 is protected. In other words, even when external particles are forced into space S2, the performance of the semiconductor package structure 1 is not affected.
[0055] Furthermore, even when air expands during heating operation, the air in the relatively small space S1 may not have sufficient force or power to break the sealing structure. For example, the relatively small amount of air in space S1 may still not have enough pressure to break the bond between the transparent panel 14 and the spacer 13, or to break the bond between the electronic device 11 and the spacer 13. In other words, the sealing structure mitigates the popcorn effect.
[0056] Even during heating operation, the opening 15h of the adhesive layer 15 allows air to escape from space S2. Therefore, the connection between the lid 16 and the carrier 10 can be maintained during heating operation. In other words, the opening 15h of the adhesive layer 15 mitigates the popcorn effect.
[0057] The semiconductor package structure 1 can be integrated into, for example but not limited to, a lidar system for vehicles, which can withstand extreme conditions or environments (e.g., temperatures up to 60 degrees Celsius or down to -20 degrees Celsius).
[0058] A method for manufacturing a semiconductor package structure 1 according to some embodiments of the present invention may include: placing an electronic device 11 on a carrier 10; forming a spacer 13 on the electronic device 11; bonding a conductive line 12 to the carrier 10 and the electronic device 11; attaching a transparent panel 14 to the spacer 13; attaching a cover 16 to the carrier 10 and forming an adhesive layer 15.
[0059] Figure 2 Cross-sectional views of semiconductor package structures according to some other embodiments of the present invention are shown.
[0060] refer to Figure 2 Apart from eliminating the adhesive layer 15, the semiconductor package structure 2 is similar to that in the reference 15. Figure 1 The semiconductor package structure shown and described 1.
[0061] Figure 3 Cross-sectional views of semiconductor package structures according to some other embodiments of the present invention are shown.
[0062] refer to Figure 3 Except that the cover 16 of the semiconductor package structure 2 is replaced by the cover 16a to form the semiconductor package structure 3, the semiconductor package structure 3 is similar to that shown in the reference. Figure 2 The semiconductor package structure shown and described 2.
[0063] The lid 16a can define the opening 16ah, which is compared to... Figure 1 or Figure 2 The opening 16h shown has a relatively small width. The cover 16a defines an opening 16ah that has a relatively small width compared to the transparent panel 14.
[0064] The cover 16a can cover a portion of the transparent panel 14. The cover 16a can cover the periphery of the transparent panel 14. The cover 16a can surround the electronic device 11. The cover 16a can enclose the electronic device 11. The cover 16a can surround the conductive wire 12. The cover 16a can enclose the conductive wire 12. The cover 16a can surround the spacer 13. The cover 16a can enclose the spacer 13. The cover 16a can surround the transparent panel 14. The cover 16a can enclose the transparent panel 14. The cover 16a can surround the adhesive layer 15. The cover 16a can enclose the adhesive layer 15.
[0065] Figure 4 Cross-sectional views of semiconductor package structures according to some other embodiments of the present invention are shown.
[0066] refer to Figure 4 The semiconductor package structure 4 may include a carrier 10, an electronic device 11 (or a semiconductor device 11), conductive lines 12 and 12a, a spacer 13, a transparent panel 14', a cover 16, a spacer 17, and an electronic device 18 (or a semiconductor device 18).
[0067] The details of the carrier 10, electronic device 11, conductive wire 12, spacer 13 and cover 16 have been described above and will therefore not be discussed again in the following paragraphs.
[0068] Electronic device 18 may include, for example, but not limited to, controller dies, application-specific integrated circuit (ASIC) dies, etc. Electronic device 18 may be mounted on carrier 10. Electronic device 18 may be attached to an adhesive layer ( Figure 4 (Not indicated in the text) Attached to carrier 10.
[0069] Conductive wire 12a may be the same as or similar to conductive wire 12. Conductive wire 12a may be different from conductive wire 12. Conductive wire 12a electrically connects electronic device 18 to carrier 10.
[0070] Spacer 17 can be disposed between electronic device 18 and electronic device 11. Spacer 17 can be made of an adhesive layer ( Figure 4 (Not indicated in the text) Attached to electronic device 18.
[0071] Electronic device 11 can be mounted on spacer 17. Electronic device 11 can be made of adhesive layer ( Figure 4 (Not indicated in the text) Attached to spacer 17.
[0072] Apart from having a relatively large width, the transparent panel 14' can be similar to that shown in the reference. Figure 1 The transparent panel 14 shown and described.
[0073] A transparent panel 14' can be mounted on the cover 16. A transparent panel 14' can be mounted on the surface 163 of the cover 16. A transparent panel 14' can be in direct contact with the cover 16. A transparent panel 14' can be in direct contact with the surface 163 of the cover 16. A transparent panel 14' can be mounted on the spacer 13. A transparent panel 14' can be in direct contact with the spacer 13. A transparent panel 14' can have a width generally larger than that of the spacer 13.
[0074] Although not shown, it is expected that it may be the same as or similar to the reference. Figure 1 The adhesive layer 15 shown and described can be placed between the transparent panel 14' and the cover 16.
[0075] Figure 5 Cross-sectional views of semiconductor package structures according to some other embodiments of the present invention are shown.
[0076] refer to Figure 5 Except that the semiconductor package structure 5 may further include an adhesive layer 15 and another adhesive layer 15a, the semiconductor package structure 5 is similar to that shown in the reference. Figure 4 The semiconductor package structure shown and described is 4.
[0077] The adhesive layer 15 can be disposed between the transparent panel 14' and the cover 16. The adhesive layer 15 can be disposed between the transparent panel 14' and the surface 163 of the cover 16. The adhesive layer 15 can be in direct contact with the transparent panel 14'. The adhesive layer 15 can be in direct contact with the cover 16. The adhesive layer 15 can be in direct contact with the surface 163 of the cover 16.
[0078] The adhesive layer 15a can be disposed on the electronic device 11. The adhesive layer 15a can be disposed on the surface 111 of the electronic device 11. The adhesive layer 15a can be in direct contact with the electronic device 11. The adhesive layer 15a can be in direct contact with the surface 111 of the electronic device 11.
[0079] The adhesive layer 15a can surround the optical structure 112. The adhesive layer 15a can enclose the optical structure 112.
[0080] The adhesive layer 15a can be in direct contact with the lid 16. The adhesive layer 15a can be in direct contact with the bevel 161 of the lid 16. The adhesive layer 15a can be in direct contact with the surface 164 of the lid 16.
[0081] Adhesive layer 15a may be the same as or similar to adhesive layer 15. Adhesive layer 15a may be different from adhesive layer 15.
[0082] From a top view perspective, adhesive layer 15a may have an enclosure pattern. From a top view perspective, adhesive layer 15a may have a ring structure. From a top view perspective, adhesive layer 15a may have a ring-like structure. From a top view perspective, adhesive layer 15a may have a circular structure. From a top view perspective, adhesive layer 15a may have a near-circular structure. From a top view perspective, adhesive layer 15a may have a rectangular structure. From a top view perspective, adhesive layer 15a may have a near-rectangular structure.
[0083] Figure 6A A top view illustrating a semiconductor package structure according to some other embodiments of the present invention is shown.
[0084] The semiconductor package structure 6 may have: a cover 16 having a surface 162 and another surface 163 below the surface 162; a transparent panel 14' disposed on the surface 163; and an adhesive layer 15b disposed between the transparent panel 14' and the surface 163.
[0085] The adhesive layer 15b may have a beveled surface 15b1. From a top view perspective, the adhesive layer 15b may have an enclosure pattern. From a top view perspective, the adhesive layer 15b may have a ring structure. From a top view perspective, the adhesive layer 15b may have a quasi-ring structure. From a top view perspective, the adhesive layer 15b may have a circular structure. From a top view perspective, the adhesive layer 15b may have a near-circular structure. From a top view perspective, the adhesive layer 15b may have a rectangular structure. From a top view perspective, the adhesive layer 15b may have a near-rectangular structure.
[0086] Adhesive layer 15b defines opening CH. Adhesive layer 15b can be positioned across both sides of surface 163 to define opening CH. Bevel 15b1 defines opening CH.
[0087] Figure 6B Drawing across Figure 6A The cross-sectional view of the semiconductor package structure shown by line AA'.
[0088] refer to Figure 6B Except that the adhesive layers 15 and 15a of the semiconductor package structure 5 are replaced by adhesive layers 15b and 15c respectively to form the semiconductor package structure 6, the semiconductor package structure 6 is similar to that shown in the reference. Figure 5 The semiconductor package structure shown and described is 5.
[0089] Adhesive layer 15c may have the same or similar structure as adhesive layer 15b. Adhesive layer 15c may have a different structure from adhesive layer 15b. Adhesive layer 15c may have a bevel 15c1. From a top view perspective, adhesive layer 15c may have a pattern that is generally the same as adhesive layer 15b. From a top view perspective, adhesive layer 15c may have a pattern that is generally similar to adhesive layer 15b.
[0090] Adhesive layer 15c can be in direct contact with adhesive layer 15b. The inclined surface 15c1 of adhesive layer 15c can be in direct contact with the inclined surface 15b1 of adhesive layer 15b.
[0091] The adhesive layer 15c can directly contact the cover 16. The adhesive layer 15c can directly contact the bevel 161 of the cover 16. The adhesive layer 15c can directly contact the surface 164 of the cover 16.
[0092] The adhesive layer 15b can be disposed between the transparent panel 14' and the cover 16. The adhesive layer 15b can be disposed between the transparent panel 14' and the surface 163 of the cover 16. The adhesive layer 15b can be in direct contact with the transparent panel 14'. The adhesive layer 15b can be in direct contact with the cover 16. The adhesive layer 15b can be in direct contact with the surface 163 of the cover 16.
[0093] Semiconductor package structure 6 defines a chamber or space S1. Space S1 may be defined or enclosed by electronic device 11, transparent panel 14', cover 16, adhesive layer 15b, and adhesive layer 15c. Semiconductor package structure 6 defines another chamber or space S2.
[0094] When manufacturing the final product containing the semiconductor package structure 6, various technologies may be involved, such as, but not limited to, cutting techniques, cleaning techniques (e.g., by an air gun), heating techniques, etc. Particles generated from the cutting operation can be propelled through the opening CH (e.g., ... Figure 6B As shown in the diagram, particles can enter space S2. However, particles cannot enter the hermetically sealed space S1. Therefore, the optical structure 112 in the sealed space S1 is protected. In other words, even when external particles are forced into space S2, the performance of the semiconductor package structure 6 is not affected.
[0095] Furthermore, the air in the relatively small space S1 may not possess sufficient force or power to break the sealing structure, even during air expansion during heating operation. For example, the relatively small amount of air in space S1 may still not have sufficient pressure to break the bond between the transparent panel 14' and the adhesive layer 15b, or the bond between the electronic device 11 and the adhesive layer 15c, or the bond between the adhesive layers 15b and 15c, or the bond between the cover 16 and the adhesive layer 15c, or the bond between the cover 16 and the adhesive layer 15b. In other words, the sealing structure mitigates the popcorn effect.
[0096] Even during heating operation, the opening CH allows air to escape from space S2. Therefore, the connection between the lid 16 and the carrier 10 can be maintained during heating operation. In other words, the opening CH mitigates the popcorn effect.
[0097] The semiconductor package structure 6 can be integrated into, for example but not limited to, lidar systems for vehicles, which can withstand extreme conditions or environments (e.g., temperatures up to 60 degrees Celsius or down to -20 degrees Celsius).
[0098] Figure 7 Cross-sectional views of semiconductor package structures according to some other embodiments of the present invention are shown.
[0099] refer to Figure 7 Except that the adhesive layer 15 and the cover 16 of the semiconductor package structure 5 are replaced by adhesive layer 15a and cover 16' respectively to form the semiconductor package structure 7, the semiconductor package structure 7 is similar to that shown in the reference. Figure 5 The semiconductor package structure shown and described is 5.
[0100] From a top view perspective, adhesive layer 15a may have an enclosure pattern. From a top view perspective, adhesive layer 15a may have a ring structure. From a top view perspective, adhesive layer 15a may have a ring-like structure. From a top view perspective, adhesive layer 15a may have a circular structure. From a top view perspective, adhesive layer 15a may have a near-circular structure. From a top view perspective, adhesive layer 15a may have a rectangular structure. From a top view perspective, adhesive layer 15a may have a near-rectangular structure.
[0101] A cover 16' may define an opening 16h on the electronic device 11. A cover 16' may define an opening 16h on the transparent panel 14'. A cover 16' may define an opening 16h to expose the transparent panel 14'. A cover 16' may define another opening 16h' different from the opening 16h. The opening 16h' may include a through hole.
[0102] When manufacturing the final product containing the semiconductor package structure 7, various techniques may be involved, such as, but not limited to, cutting techniques, cleaning techniques (e.g., by an air gun), heating techniques, etc. Particles generated from the cutting operation can be pushed through the opening 16h' to enter the space S2. However, the particles cannot enter the hermetically sealed space S1. Therefore, the optical structure 112 in the sealed space S1 is protected. In other words, even when external particles are forced into the space S2, the performance of the semiconductor package structure 6 is not affected.
[0103] Furthermore, even when air expands during heating operation, the air in the relatively small space S1 may not possess sufficient force or power to break the sealing structure. For example, the relatively small amount of air in space S1 may still not have sufficient pressure to break the bond between the transparent panel 14' and the adhesive layer 15a, or the bond between the electronic device 11 and the adhesive layer 15a, or the bond between adhesive layers 15a and adhesive layers 15a, or the bond between the cover 16 and the adhesive layer 15a. In other words, the sealing structure mitigates the popcorn effect.
[0104] Even during heating operation, the opening 16h' allows air to escape from space S2. Therefore, the connection between the lid 16' and the carrier 10 can be maintained during heating operation. In other words, the opening CH mitigates the popcorn effect.
[0105] The semiconductor package structure 7 can be integrated into, for example but not limited to, lidar systems for vehicles, which can withstand extreme conditions or environments (e.g., temperatures up to 60 degrees Celsius or down to -20 degrees Celsius).
[0106] Figure 8 Cross-sectional views of semiconductor package structures according to some other embodiments of the present invention are shown.
[0107] refer to Figure 8 The semiconductor package structure 8 may include a carrier 10, an electronic device 11, a conductive line 12, a transparent panel 14', an adhesive layer 15, and a cover 16.
[0108] The adhesive layer 15, placed between the transparent panel 14' and the cover 16, can be defined as follows: Figure 1C The opening shown is 15h.
[0109] When manufacturing the final product containing the semiconductor package structure 8, various techniques may be involved, such as, but not limited to, cutting techniques, cleaning techniques (e.g., by an air gun), heating techniques, etc. Particles P generated from the cutting operation may be propelled (e.g., by relatively high air pressure) through the opening 15h into the space S3, which may adversely affect the performance of the semiconductor package structure 8.
[0110] Figure 9 Cross-sectional views of semiconductor package structures according to some other embodiments of the present invention are shown.
[0111] refer to Figure 9 Except that the adhesive layer 15 of the semiconductor package structure 8 is replaced by adhesive layer 15a to form the semiconductor package structure 9, the semiconductor package structure 9 is similar to that shown in the reference. Figure 8 The semiconductor package structure shown and described is 8.
[0112] From a top-view perspective, the adhesive layer 15a has an enclosure pattern or structure. The adhesive layer 15a seals space S4 to prevent or stop particles from entering space S4.
[0113] When manufacturing the final product containing the semiconductor package structure 9, various techniques may be involved, such as, but not limited to, cutting techniques, cleaning techniques (e.g., by an air gun), heating techniques, etc. Particles generated from the cutting operation cannot enter the space S4. However, when air expands during the heating operation, the air in the relatively large space S4 may have sufficient force or energy to disrupt the sealing structure. For example, the relatively large air in space S4 may have sufficient pressure to disrupt the bond between the transparent panel 14' and the adhesive layer 15a, or the bond between the cover 16 and the adhesive layer 15a, or the bond between the cover 16 and the carrier 10. In other words, the semiconductor package structure 9 may be subjected to a popcorn effect.
[0114] Figure 10 Cross-sectional views of semiconductor package structures according to some other embodiments of the present invention are shown.
[0115] refer to Figure 10 The semiconductor package structure 10 may include a carrier 10, an electronic device 11, a conductive line 12, a spacer 13, a transparent panel 14, and an encapsulant 19.
[0116] The semiconductor package structure 10 can be integrated into, for example but not limited to, lidar systems for vehicles, which can withstand extreme conditions or environments (e.g., temperatures up to 60 degrees Celsius or down to -20 degrees Celsius).
[0117] Encapsulator 19 encapsulates conductive wire 12. Encapsulator 19 encapsulates spacer 13. Encapsulator 19 encapsulates the outer side of spacer 13. Encapsulator 19 encapsulates transparent panel 14. Encapsulator 19 encapsulates the side surface or side of transparent panel 14. Encapsulator 19 encapsulates the lower portion of the side surface or side of transparent panel 14.
[0118] Encapsulation 19 may contain epoxy resin. Encapsulation 19 may contain fillers or particles. Encapsulation 19 may have a relatively large coefficient of thermal expansion (CTE) compared to the transparent panel 14. Spacer 13 may have a relatively large CTE compared to the transparent panel 14. CTE mismatch can cause warping when subjected to extreme changes in conditions or thermal cycling, which can damage the transparent panel 14. CTE mismatch can also cause delamination problems at interfaces or boundaries between encapsulation 19 and the transparent panel 14, between encapsulation 19 and spacer 13, between the transparent panel 14 and spacer 13, or between the electronic device 11 and spacer 13.
[0119] During encapsulation, the conductive wire 12 may be damaged or destroyed due to mold flow. During encapsulation, the connection between the conductive wire 12 and the carrier 10 may be damaged or destroyed due to mold flow. During encapsulation, the connection between the conductive wire 12 and the electronic device 11 may be damaged or destroyed due to mold flow.
[0120] The conductive wire 12 encapsulated by the encapsulant 19 can be subjected to stress caused by environmental changes. For example, stress caused by CTS mismatch can cause the encapsulant 19 to warp and damage the conductive wire 12. For example, moisture or relatively high humidity can cause the spacer 13, which may have a relatively high water absorption rate, to expand, which can cause stress on the encapsulant 19 and the conductive wire 12, and the stress can damage the conductive wire 12.
[0121] As used herein and unless otherwise defined, the terms “substantially,” “generally,” “approximately,” and “about” are used to describe and explain small variations. When used in conjunction with an event or situation, the terms may cover situations where the event or situation occurs precisely or very close to occurring. For example, when used in conjunction with numerical values, the terms may cover a range of variation less than or equal to ±10% of the stated value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. The term “substantially coplanar” may refer to two surfaces that lie within a micrometer along the same plane, such as within 40 μm, 30 μm, 20 μm, 10 μm, or 1 μm along the same plane.
[0122] Unless the context clearly specifies otherwise, the singular terms “a” and “described” as used herein may include multiple indicators. In the description of some embodiments, the phrase “on” or “above” one component may cover situations where the preceding component is directly on (e.g., in physical contact with) the following component, as well as situations where one or more intervening components are located between the preceding and following components.
[0123] While the invention has been described and illustrated with reference to specific embodiments thereof, such descriptions and illustrations are not restrictive. Those skilled in the art will understand that various changes and substitutions may be made without departing from the true spirit and scope of the invention as defined by the appended claims. Illustrations may not be drawn to scale. Due to manufacturing processes and limitations, there may be differences between the process reproduction in this invention and actual equipment. Other embodiments of the invention may exist that are not specifically described. This specification and drawings should be considered illustrative rather than restrictive. Modifications may be made to adapt particular circumstances, materials, compositions, methods, or processes to the objectives, spirit, and scope of the invention. All such modifications are intended within the scope of the appended claims. Although the methods disclosed herein have been described with reference to specific operations performed in a particular order, it should be understood that these operations may be combined, subdivided, or reordered to form equivalent methods without departing from the teachings of the invention. Therefore, the order and grouping of operations are not limiting unless specifically indicated herein.
Claims
1. A semiconductor package structure comprising: carrier; A lid is placed on the carrier, and the inner sidewall of the lid defines a first opening and a second opening, wherein the second opening is located above the first opening and the width of the second opening is greater than the width of the first opening; An electronic device disposed on the carrier, the electronic device having a first surface and an optical structure on the first surface; Conductive wires that electrically connect the electronic device to the carrier and are exposed to air; A transparent panel is mounted on the electronic device and located in the first opening of the cover; An adhesive layer that contacts the lid and the transparent panel and is located in the second opening of the lid, wherein the adhesive layer does not protrude from the upper surface of the lid; and A spacer is disposed on the first surface of the electronic device and encloses the optical structure of the electronic device, wherein the optical structure and the spacer overlap in a direction parallel to the carrier; The contact surface between the adhesive layer and the cover is defined as a first interface, and the contact surface between the adhesive layer and the transparent panel is defined as a second interface, wherein the first interface and the second interface are relative to the carrier, and the second interface is higher than the first interface; The cover includes a bevel adjacent to the conductive wire, the bevel and the conductive wire overlapping in a direction perpendicular to the carrier, and the bevel and the spacer overlapping in a direction parallel to the carrier.
2. The semiconductor packaging structure according to claim 1, wherein the cover and the transparent panel are separated by a horizontal gap.
3. The semiconductor packaging structure of claim 2, wherein the adhesive layer covers the horizontal gap, at least a portion of the horizontal gap is exposed from the adhesive layer to form a through-hole, and at least a portion of the adhesive layer is located on the upper surface of the transparent panel and the upper surface of the cover.
4. The semiconductor packaging structure according to claim 3, wherein the via is located at the corner of the adhesive layer.
5. The semiconductor packaging structure according to claim 3, wherein the cover, the transparent panel, the carrier, and the adhesive layer together define a recess, and the recess communicates with the surrounding atmosphere through the through-hole.
6. The semiconductor packaging structure according to claim 3, wherein the vertical projection of the transparent panel does not overlap with the vertical projection of the cover, and the vertical projection of the cover does not overlap with the vertical projection of the electronic device.
7. The semiconductor packaging structure of claim 1, wherein the transparent panel is connected to the cover via the adhesive layer, and the bevel and the adhesive layer overlap in the direction perpendicular to the carrier.
8. The semiconductor packaging structure according to claim 7, wherein the adhesive layer and the conductive lines overlap in a direction perpendicular to the carrier.
9. The semiconductor package structure of claim 2, wherein the cover includes an upper surface and a lower surface, and wherein the adhesive layer is disposed on the lower surface of the cover.
10. The semiconductor packaging structure of claim 9, wherein the adhesive layer covers the upper surface of the transparent panel, and wherein the adhesive layer is in direct contact with the side surface of the transparent panel.
11. The semiconductor packaging structure according to claim 9, wherein the adhesive layer comprises an opaque material or a light-absorbing material.
12. The semiconductor packaging structure of claim 9, wherein, viewed from a top view, the adhesive layer defines an opening.
13. The semiconductor packaging structure of claim 1, wherein the upper surface of the adhesive layer includes a curved surface higher than the second interface.
14. The semiconductor package structure of claim 13, wherein the lower surface of the adhesive layer includes a curved surface below the first interface.
15. The semiconductor packaging structure of claim 1, wherein the adhesive layer and the spacer overlap in the direction perpendicular to the carrier.
16. The semiconductor packaging structure of claim 1, wherein the width of the second opening gradually increases in the direction away from the carrier.
17. The semiconductor package structure of claim 1, wherein the inner sidewall of the cover further defines a third opening below the first opening, and the width of the third opening is greater than the width of the second opening.
18. The semiconductor packaging structure of claim 17, wherein the width of the third opening gradually increases toward the carrier.
19. The semiconductor package structure of claim 17, wherein the transparent panel does not extend into the third opening.
20. The semiconductor package structure of claim 1, wherein the transparent panel is connected to the electronic device via the spacer, and a portion of the spacer is located in the first opening.
21. The semiconductor package structure of claim 1, wherein the spacer comprises different layers, the different layers comprising a first layer, a second layer on the first layer, and a third layer on the second layer, the first layer and the second layer comprising metal, and the third layer comprising solder.
22. The semiconductor package structure of claim 21, wherein the vertical projection of the upper inner surface of the cover is located between the vertical projection of the middle inner surface of the cover and the vertical projection of the lower inner surface of the cover.
23. The semiconductor packaging structure of claim 21, wherein the vertical projection of the side of the electronic device is located between the vertical projection of the side of the transparent panel and the vertical projection of the inner surface of the middle portion of the cover.
24. The semiconductor packaging structure of claim 21, wherein the adhesive layer and the spacer are disposed on different side surfaces of the transparent panel.
25. The semiconductor packaging structure of claim 21, wherein the vertical projection of the upper inner surface of the cover is located between the vertical projection of the middle inner surface of the cover and the vertical projection of the lower inner surface of the cover, wherein the vertical projection of the side of the electronic device is located between the vertical projection of the side of the transparent panel and the vertical projection of the middle inner surface of the cover, and wherein the adhesive layer and the spacer are disposed on different side surfaces of the transparent panel.
Citation Information
Patent Citations
Optoelectronic modules having features for improved alignment and reduced tilt
TW201801331A
Micro-Optical Device Packaging System
US20100164081A1