A method for encoding sine and cosine based on absolute value encoder

CN113091774BActive Publication Date: 2026-09-25ZHEJIANG REAGLE SENSING TECH CO LTD
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Patent Information

Application Number
CN202110286068.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-03-17
Publication Date
2026-09-25
Estimated Expiration
2041-03-17

AI Technical Summary

Benefits of technology

[0009]本发明的主要目的在于提供一种基于绝对值编码器的正余弦编码方法,其通过绝对值编码器进行操作,根据单圈绝对值信息可以生成C、D、R信号,而码盘上不需要有专门的C、D、R码道和光电池的静光栅对齐,把需要用示波器调整多路模拟信号的繁琐工艺,变成生产绝对值编码器的工艺来进行,由于绝对值编码器带有智能控制芯片(如单片机、DSP、FPGA等),生产工艺成熟,可以非常方便的进行自动化生产,保证信号幅值、偏置在全温度及工况条件下满足信号质量要求并可靠输出。

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Abstract

The application discloses a sine-cosine encoding method based on an absolute value encoder, comprising the following steps: S1, the absolute value encoder generates first signal data and transmits the first signal data to a master control chip; S2, the absolute value encoder generates second signal data and transmits the second signal data to the master control chip, so as to output an output signal comprising an A signal and a B signal. The sine-cosine encoding method based on the absolute value encoder disclosed by the application is operated through the absolute value encoder, and C, D and R signals can be generated according to single-turn absolute value information, and the sine-cosine encoding method does not need to have special C, D and R code channels and photoelectric cell static grating alignment on a code disc.
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Description

Technical Field

[0001] This invention belongs to the field of sine and cosine coding technology, specifically relating to a sine and cosine coding method based on an absolute encoder. Background Technology

[0002] With the development of automation technology, various position detection sensors are widely used in the position detection of motor control systems such as CNC machine tools, robots, and elevators, such as photoelectric pulse encoders, rotary transformers, and sine and cosine encoders.

[0003] In comparison, sine and cosine encoders have unique advantages in improving the dynamic characteristics of a system. By subdividing the sine and cosine signals, a much higher resolution can be obtained than that of a single pulse signal, with a total resolution exceeding 18 bits. Examples include Heidenhain's ERN1387 encoder.

[0004] Specifically, sine and cosine encoders can be used in elevator control systems to subdivide sine and cosine signals, enabling the elevator to obtain position and speed information in real time, whether at high or low speeds. This results in excellent system control performance and improved ride quality.

[0005] Sine and cosine rotary encoders output A, B, C, D, and R (zero-position index, also known as Z signal) signals so that the motor driver can use these signals to calculate the motor's running position in real time and obtain position information. Typically, the A and B signals can be subdivided and interpolated to obtain higher resolution incremental angle information. C and D are sine and cosine signals with one cycle per revolution, providing a relatively coarse absolute position signal compared to A and B. Calculating the C and D signals yields absolute position information with a certain resolution within a single revolution, allowing the motor to obtain its current electrical angle information after power-on. The R signal (or Z signal) is a zero-position signal with one cycle per revolution, facilitating rapid counting of the A and B incremental signals during movement and providing a zero-position reference.

[0006] Traditional sine and cosine encoders output A, B, C, D, and R signals, which are generated by corresponding code tracks etched on corresponding code disks and paired with corresponding photocell chips. The static grating on the photocell and each code track (i.e., the moving grating) of the code disk must be strictly aligned to ensure reliable output of A, B, C, D, and R signals, especially R signals. Because the number and narrowness of the R signal code tracks are small, the corresponding light-receiving area on the photocell is also small. If the matching is poor, the amplitude of the R signal will be severely reduced or even lost when the encoder operates at high temperatures and high speeds.

[0007] The C and D signals are generated by a sinusoidally varying light-transmitting area on the code disk. During actual assembly and testing, the light-transmitting area needs to be properly aligned with the static grating on the photovoltaic cell. Due to temperature and rotational speed variations, the amplitude and bias of the C and D signals will also drift due to the temperature drift and frequency response characteristics of the photovoltaic cell's electrical signals. Furthermore, if contamination occurs on the C and D code tracks during production and use, the angle calculation will be significantly deviated, affecting angle recognition upon power-up, and in severe cases, even causing runaway malfunctions.

[0008] The analog signals output by sine and cosine encoders have strict requirements on amplitude, phase, and offset. Therefore, traditional encoders require external oscilloscopes for observation and adjustment during assembly and debugging. Due to the large number of signal channels and high quality requirements, production efficiency is low, and defective products are prone to leaving the factory, affecting end-user use. Summary of the Invention

[0009] The main objective of this invention is to provide a sine and cosine encoding method based on an absolute encoder. This method operates using an absolute encoder, generating C, D, and R signals based on single-turn absolute information. The code disk does not require dedicated C, D, and R code tracks or static grating alignment with the photovoltaic cells. This transforms the cumbersome process of adjusting multiple analog signals using an oscilloscope into a process similar to manufacturing an absolute encoder. Since the absolute encoder incorporates an intelligent control chip (such as a microcontroller, DSP, or FPGA), and the manufacturing process is mature, automated production can be easily achieved. This ensures that the signal amplitude and bias meet signal quality requirements and provide reliable output under all temperature and operating conditions.

[0010] Another objective of this invention is to provide a sine and cosine encoding method based on an absolute encoder. Typically, the output signal amplitude and bias of a sine and cosine encoder are subject to requirements. The amplitude and bias of the output signal are adjusted by an amplitude adjustment variable gain circuit and a bias adjustment variable bias circuit. If necessary, the phase difference of the A / B signals can also be adjusted in the same way.

[0011] Another objective of this invention is to provide a sine and cosine encoding method based on an absolute encoder. The main control chip monitors the precision code signal corresponding to the precision code channel, determines whether there are any abnormalities such as distortion or loss in the current precision code signal, and outputs alarm information separately if such abnormalities exist, so that the main control chip can make timely adjustments.

[0012] To achieve the above objectives, this invention provides a sine / cosine encoding method based on an absolute encoder, comprising the following steps:

[0013] Step S1: The absolute encoder (optical, magnetic, inductive, or other absolute encoders are all acceptable) generates the first signal data and transmits the first signal data to the main control chip;

[0014] Step S2: The absolute encoder generates second signal data and transmits the second signal data to the main control chip to output an output signal including signal A and signal B;

[0015] Step S3: Combine the first signal data and the second signal data to calculate the single-turn absolute position information of the absolute encoder at this time, and construct the C signal, D signal and R signal based on the single-turn absolute position information (including generating the C signal, D signal and R signal simultaneously (defined as the first type of signal), generating only the C signal or the D signal or the R signal (defined as the second type of signal), and generating only the C signal + D signal or the C signal + R signal or the D signal + R signal (defined as the third type of signal)).

[0016] As a further preferred technical solution to the above technical solution, step S1 is specifically implemented as follows:

[0017] Step S1.1: The absolute encoder outputs the coarse code signal (corresponding to the first signal data, which can be after passing through the differential amplifier circuit) to the main control chip (ARM chip, such as the ADC acquisition terminal) to form the input coarse code signal.

[0018] As a further preferred technical solution to the above technical solution, step S2 is specifically implemented as follows:

[0019] Step S2.1: The absolute encoder outputs the precision code signal (corresponding to the second signal data) through the precision code channel, which passes through the amplitude adjustment variable gain circuit, the bias adjustment variable bias circuit, and the second-stage fixed gain amplifier circuit in sequence, and is then input to the ADC acquisition terminal of the main control chip (ARM chip) to form the input precision code signal.

[0020] Step S2.2: Simultaneously input the analog signal into the comparator input terminal of the main control chip and generate a square wave signal (for later feedback adjustment of amplitude and bias);

[0021] Step S2.3: Count the lines of the fine code track through the encoder interface mode of the main control chip, and set the pre-designed value (assuming the fine code track has 2048 lines, then one revolution is 2048 whole pulses, and after four times the frequency is 8192).

[0022] Step S2.4: The main control chip monitors the precision code signal and compares it with the amplitude, phase and offset of the target. Based on the comparison deviation, it generates an adjustment signal and outputs it to the signal processing unit for adjustment.

[0023] As a further preferred technical solution to the above technical solution, step S3 is specifically implemented as follows:

[0024] Step S3.1: Combine the input coarse code signal and the input fine code signal to calculate the single-turn absolute position information of the absolute encoder at this time;

[0025] Step S3.2: The main control chip outputs C and D signals at certain time intervals or position changes.

[0026] Step S3.3: When the timer count value of the precision code signal corresponding to the precision code channel completes a full cycle, the main control chip outputs the R signal.

[0027] As a further preferred technical solution to the above technical solution, step S3.2 is specifically implemented as follows:

[0028] Step S3.2.1: The main control chip outputs the single-cycle absolute position information obtained by sampling and solving at the corresponding time moment through the built-in DA or PWM wave form at a certain time interval or position change, thereby outputting the first C signal (C-sin) and the first D signal (D-cos);

[0029] Step S3.2.2: The first C signal is differentially amplified and filtered to form the second C signal (C-sin- and C-sin+, to improve the anti-interference ability of transmission);

[0030] Step S3.2.3: The first D signal is differentially amplified and filtered to form the second D signal (D-cos- and D-cos+, to improve the anti-interference of transmission).

[0031] As a further preferred technical solution to the above technical solution, step S3.3 is specifically implemented as follows:

[0032] Step S3.3.1: When the timer count value of the precision code signal corresponding to the precision code track for a full cycle is the pre-designed value, and the absolute value is in the zero point region at this time, the first R signal is output (the time width can be required to be the count time of one etched pulse of the precision code track, which is related to the speed of the code disk).

[0033] Step S3.3.2: The first R signal is differentially amplified and filtered to form the second R signal (R- and R+, to improve the anti-interference ability of transmission).

[0034] As a further preferred technical solution to the above technical solution, (based on the second and third signals) the amplitude and bias of the output signal are adjusted by means of an amplitude adjustment variable gain circuit and a bias adjustment variable bias circuit;

[0035] The main control chip acquires the sin and cos signals of the precision code channel and compares them with the target signal, then outputs an adjustment value to adjust the amplification factor of the operational amplifier of the variable gain circuit (which can also be implemented by a digital potentiometer or DA device).

[0036] Meanwhile, the main control chip calculates the bias value based on the acquired signal, compares it with the target bias, and then outputs an adjustment value to adjust the bias.

[0037] The biased signal is passed through a differential amplifier circuit to output a signal that includes signal A (A sin- and A sin+) and signal B (B cos- and B cos+).

[0038] As a further preferred technical solution of the above technical solution, (based on the first signal, the second signal and the third signal) the main control chip monitors the fine code signal corresponding to the fine code channel, and judges whether there is any abnormality such as distortion or loss of the current fine code signal. If so, it outputs alarm information separately (so that the main control chip can make timely adjustments). Attached Figure Description

[0039] Figure 1 This is a schematic diagram of a sine and cosine encoding method based on an absolute encoder according to the present invention.

[0040] Figure 2 This is a schematic diagram of a sine and cosine encoding method based on an absolute encoder according to the present invention.

[0041] Figure 3 This is a schematic diagram of the A, B, C, D, and R signals output by a traditional sine and cosine encoder. Detailed Implementation

[0042] The following description is intended to disclose the present invention and enable those skilled in the art to implement it. The preferred embodiments described below are merely examples, and other obvious variations will occur to those skilled in the art. The basic principles of the invention defined in the following description can be applied to other embodiments, modifications, improvements, equivalents, and other technical solutions that do not depart from the spirit and scope of the invention.

[0043] In the preferred embodiments of the present invention, those skilled in the art should note that the absolute encoders, timers, and ARMs involved in the present invention can be considered as prior art.

[0044] Preferred embodiment.

[0045] This invention provides a sine and cosine encoding method based on an absolute encoder, comprising the following steps:

[0046] Step S1: The absolute encoder (optical, magnetic, inductive, or other absolute encoders are all acceptable) generates the first signal data and transmits the first signal data to the main control chip;

[0047] Step S2: The absolute encoder generates second signal data and transmits the second signal data to the main control chip to output an output signal including signal A and signal B;

[0048] Step S3: Combine the first signal data and the second signal data to calculate the single-turn absolute position information of the absolute encoder at this time, and construct the C signal, D signal and R signal based on the single-turn absolute position information (including generating the C signal, D signal and R signal simultaneously (defined as the first type of signal), generating only the C signal or the D signal or the R signal (defined as the second type of signal), and generating only the C signal + D signal or the C signal + R signal or the D signal + R signal (defined as the third type of signal)).

[0049] This preferred embodiment uses an absolute value photocell. The absolute value photocell's static grating consists of coarse and fine code regions, and the corresponding code disk also has coarse and fine code tracks. The fine code track is the main subdivision code track, with dense etched lines, and can be used as the A / B signal output. Simultaneously, the coarse code track can be used to synthesize single-turn absolute position information. Using this single-turn absolute position information, C, D, and R signals can be constructed. These signals are then differentially transformed and amplified before being output. This method can ensure the stability of the C, D, and R signal amplitude and bias output.

[0050] Since the A / B signal is generated by the precision code channel, and the signal of the precision code channel has been acquired by the main control chip, the amplitude and bias of the A / B signal can be monitored in real time in the main control chip, and compared with the theoretical amplitude and bias to output the correction value of the A / B signal, ensuring high-quality output of the A / B signal.

[0051] Specifically, step S1 is implemented as follows:

[0052] Step S1.1: The absolute encoder outputs the coarse code signal (corresponding to the first signal data, which can be after passing through the differential amplifier circuit) to the main control chip (ARM chip, such as the ADC acquisition terminal) to form the input coarse code signal.

[0053] More specifically, step S2 is implemented as follows:

[0054] Step S2.1: The absolute encoder outputs the precision code signal (corresponding to the second signal data) through the precision code channel, which passes through the amplitude adjustment variable gain circuit, the bias adjustment variable bias circuit, and the second-stage fixed gain amplifier circuit in sequence, and is then input to the ADC acquisition terminal of the main control chip (ARM chip) to form the input precision code signal.

[0055] Step S2.2: Simultaneously input the analog signal into the comparator input terminal of the main control chip and generate a square wave signal (for later feedback adjustment of amplitude and bias);

[0056] Step S2.3: Count the lines of the fine code track through the encoder interface mode of the main control chip, and set the pre-designed value (assuming the fine code track has 2048 lines, then one revolution is 2048 whole pulses, and after four times the frequency is 8192).

[0057] Step S2.4: The main control chip monitors the precision code signal and compares it with the amplitude, phase and offset of the target. Based on the comparison deviation, it generates an adjustment signal and outputs it to the signal processing unit for adjustment.

[0058] Furthermore, step S3 is specifically implemented as follows:

[0059] Step S3.1: Combine the input coarse code signal and the input fine code signal to calculate the single-turn absolute position information of the absolute encoder at this time;

[0060] Step S3.2: The main control chip outputs C and D signals at certain time intervals or position changes.

[0061] Step S3.3: When the timer count value of the precision code signal corresponding to the precision code channel completes a full cycle, the main control chip outputs the R signal.

[0062] Furthermore, step S3.2 is specifically implemented as follows:

[0063] Step S3.2.1: The main control chip outputs the single-cycle absolute position information obtained by sampling and solving at the corresponding time moment through the built-in DA or PWM wave form at a certain time interval or position change, thereby outputting the first C signal (C-sin) and the first D signal (D-cos);

[0064] Step S3.2.2: The first C signal is differentially amplified and filtered to form the second C signal (C-sin- and C-sin+, to improve the anti-interference ability of transmission);

[0065] Step S3.2.3: The first D signal is differentially amplified and filtered to form the second D signal (D-cos- and D-cos+, to improve the anti-interference of transmission).

[0066] Preferably, step S3.3 is specifically implemented as follows:

[0067] Step S3.3.1: When the timer count value of the precision code signal corresponding to the precision code track for a full cycle is the pre-designed value, and the absolute value is in the zero point region at this time, the first R signal is output (the time width can be required to be the count time of one etched pulse of the precision code track, which is related to the speed of the code disk).

[0068] Step S3.3.2: The first R signal is differentially amplified and filtered to form the second R signal (R- and R+, to improve the anti-interference ability of transmission).

[0069] Preferably, (based on the second and third signals) the output signal is amplitude-adjusted and bias-adjusted by an amplitude-adjustment variable gain circuit and a bias-adjustment variable bias circuit;

[0070] The main control chip acquires the sin and cos signals of the precision code channel and compares them with the target signal, then outputs an adjustment value to adjust the amplification factor of the operational amplifier of the variable gain circuit (which can also be implemented by a digital potentiometer or DA device).

[0071] Meanwhile, the main control chip calculates the bias value by collecting the signal, compares it with the target bias, and then outputs an adjustment value to adjust the bias.

[0072] The biased signal passes through a differential amplifier circuit to output a signal that includes signal A (A sin- and A sin+) and signal B (B cos- and B cos+).

[0073] Preferably, (based on the first, second, and third signals) the main control chip monitors the precision code signal corresponding to the precision code channel, determines whether there are any abnormalities such as distortion or loss in the current precision code signal, and outputs alarm information separately if such abnormalities exist (so that the main control chip can make timely adjustments).

[0074] like Figure 2 As shown, a method for implementing sine and cosine encoding using an absolute value photovoltaic cell is described. In the figure, the coarse code signal is amplified and sent to the ADC acquisition port of the ARM chip, where it is used together with the fine code signal to calculate the absolute position of a single turn.

[0075] The signal from the precision code track passes through a variable gain circuit and a bias adjustment circuit, and then is amplified by a second-stage fixed gain amplifier before being sent to the ADC acquisition port of the ARM chip. Simultaneously, the analog signal is fed into the input of the ARM chip's built-in comparator (or an external comparator), forming a square wave signal. The lines of the precision code track are counted using the ARM chip's built-in Encoder Interface mode. Assuming the precision code track has 2048 lines, one revolution consists of 2048 integer pulses, which quadruples to 8192.

[0076] The combination of coarse and fine codes allows for the calculation of the encoder's absolute position information for a single turn. The ARM chip, at regular time intervals or based on position changes, outputs the calculated absolute position information for each turn via a built-in DA or PWM waveform, thus generating C and D signals. To improve transmission interference resistance, the C and D signals are converted from single-ended to differential signals and amplified for output.

[0077] When the timer count reaches 8192 after one full rotation of the precision code track signal, and the absolute value is in the zero region, the R signal is output with a time width equal to the count time of one etched pulse of the precision code track (the specific time depends on the code disk rotation speed). Similarly, the R signal is amplified and converted into a differential signal for external transmission.

[0078] Typically, sine and cosine encoders have requirements for the output signal amplitude and bias. Therefore, the example solution incorporates a variable gain circuit. This circuit can be implemented using a programmable operational amplifier (AEP), such as the AD603. The AEP compares the acquired SIN and COS signals with the target signal and outputs an adjustment value to adjust the AD603's amplification factor. Alternatively, the variable gain circuit can be implemented using a digital potentiometer or a DA device, with the AEP adjusted by the AEP. Simultaneously, the AEP chip calculates the bias value from the acquired signal, compares it with the target bias, outputs an adjustment value, and adjusts the bias. The adjusted output signal is a single-ended signal, which is then converted to a differential signal and amplified before being output.

[0079] In addition, since the ARM chip monitors the main code track signal in real time, it can determine whether the current fine code track signal is distorted or lost, and can output an alarm separately so that the controller can make timely adjustments.

[0080] It is worth mentioning that the technical features such as absolute encoders, timers and ARM involved in this patent application should be regarded as prior art. The specific structure, working principle and possible control methods and spatial arrangement of these technical features can be adopted by conventional choices in the field, and should not be regarded as the inventive point of this patent. This patent will not be further elaborated in detail.

[0081] For those skilled in the art, modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this invention should be included within the protection scope of this invention.

Claims

1. A sine / cosine encoding method based on an absolute encoder, characterized in that, Includes the following steps: Step S1: The absolute encoder generates the first signal data and transmits the first signal data to the main control chip; Step S1.1: The absolute encoder inputs the coarse code signal output from the coarse code channel into the main control chip to form the input coarse code signal; Step S2: The absolute encoder generates second signal data and transmits it to the main control chip to output an output signal including signal A and signal B; Step S2.1: The precision code signal output by the absolute encoder through the precision code track passes sequentially through the amplitude adjustment variable gain circuit, the bias adjustment variable bias circuit, and the second-stage fixed gain amplifier circuit before being input to the ADC acquisition terminal of the main control chip to form the input precision code signal; Step S2.2: Simultaneously, the analog signal is input to the comparator input terminal of the main control chip, and a square wave signal is generated; Step S2.3: The encoder interface mode of the main control chip counts the lines of the precision code track and sets the pre-designed value; Step S2.4: The main control chip monitors the precision code signal and compares it with the target amplitude, phase, and bias. Based on the comparison deviation, an adjustment signal is generated and output to the signal processing unit for adjustment; Step S3: Combining the first signal data and the second signal data, calculate the single-turn absolute position information of the absolute encoder at this time, and construct C signal, D signal and R signal based on the single-turn absolute position information. This includes generating C signal, D signal and R signal simultaneously, generating only C signal, D signal or R signal, or generating only C signal and D signal, C signal and R signal or D signal and R signal; Step S3.1: Combining the input coarse code signal and the input fine code signal, calculate the single-turn absolute position information of the absolute encoder at this time; Step S3.2: The main control chip outputs C signal and D signal at certain time intervals or position changes; Step S3.3: When the timer count value of the fine code signal corresponding to the fine code track for a whole turn is the preset value, the main control chip outputs R signal; The main control chip monitors the fine code signal corresponding to the fine code track and judges whether there is any abnormality such as distortion or loss of the current fine code signal. If so, it outputs alarm information separately.

2. The sine and cosine encoding method based on an absolute encoder according to claim 1, characterized in that, Step S3.2 is specifically implemented as follows: Step S3.2.1: The main control chip outputs the single-cycle absolute position information obtained by sampling and solving at the corresponding time moment through the built-in DA or PWM wave form at a certain time interval or position change, thereby outputting the first C signal and the first D signal; Step S3.2.2: The first C signal is differentially amplified and filtered to form the second C signal; Step S3.2.3: The first D signal is differentially amplified and filtered to form the second D signal.

3. The sine and cosine encoding method based on an absolute encoder according to claim 1, characterized in that, Step S3.3 is specifically implemented as follows: Step S3.3.1: When the timer count value of the precision code signal corresponding to the precision code channel is the pre-designed value for a full cycle, and the absolute value is in the zero region at this time, then output the first R signal; Step S3.3.2: The first R signal is differentially amplified and filtered to form the second R signal.

4. The sine and cosine encoding method based on an absolute encoder according to claim 1, characterized in that, The amplitude and bias of the output signal are adjusted by using an amplitude adjustment variable gain circuit and a bias adjustment variable bias circuit. The main control chip acquires the sin and cos signals of the precision code channel and compares them with the target signal, then outputs an adjustment value to adjust the amplification factor of the operational amplifier in the variable gain circuit. Meanwhile, the main control chip calculates the bias value based on the acquired signal, compares it with the target bias, and then outputs an adjustment value to adjust the bias. The biased signal is passed through a differential amplifier circuit to output a signal that includes both signal A and signal B.

Citation Information

Patent Citations

  • Encoder zero signal loss compensation device and method

    CN111504353A

  • Sine and cosine encoder signal processing device and sine and cosine encoder

    CN209197769U

  • Encoder signal conversion device

    CN210534573U