Display device

Abstract

A display device is provided. The display device includes a first thin-film transistor (TFT), a second TFT, an insulating layer, a first pixel electrode, and a second pixel electrode. The first and second TFTs are located on a substrate. The first TFT includes a first electrode layer, and the second TFT includes a second electrode layer. The insulating layer has a first contact hole and a second contact hole that expose the first and second electrode layers, respectively. The first pixel electrode is connected to the first TFT through the first contact hole, and the second pixel electrode is connected to the second TFT through the second contact hole. The top surface of the first pixel electrode, which overlaps with the first electrode layer in the first contact hole, has a first step facing a first direction, and the top surface of the second pixel electrode, which overlaps with the second electrode layer in the second contact hole, has a second step facing a second direction opposite to the first direction.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2020-0006020, filed with the Korean Intellectual Property Office on January 16, 2020, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] One or more exemplary embodiments of the present invention relate to display devices, and more specifically, to display devices having improved color separation of reflected light. Background Technology

[0004] Display devices visually display data. They can be used as display units in small products such as mobile phones or large products such as televisions.

[0005] Typically, a display device includes multiple pixels that receive electrical signals to emit light in order to display an image. Each pixel includes a light-emitting element. For example, an organic light-emitting display device includes an organic light-emitting diode (OLED) as the light-emitting element. Typically, an organic light-emitting display device includes a thin-film transistor and an OLED disposed on a substrate, and the OLED emits light itself.

[0006] As the applications of display devices become more diversified, various configurations for display devices are being developed to improve their display quality. Summary of the Invention

[0007] According to an exemplary embodiment of the present invention, a display device includes a first thin-film transistor, a second thin-film transistor, an insulating layer, a first pixel electrode, and a second pixel electrode. The first and second thin-film transistors are each disposed on a substrate. The first thin-film transistor includes a first electrode layer, and the second thin-film transistor includes a second electrode layer. The insulating layer has a first contact hole and a second contact hole that respectively expose a portion of the first electrode layer and a portion of the second electrode layer. The first pixel electrode is disposed on the insulating layer and connected to the first thin-film transistor through the first contact hole, and the second pixel electrode is disposed on the insulating layer and connected to the second thin-film transistor through the second contact hole. The top surface of the first pixel electrode overlapping the first electrode layer in the first contact hole has a first step facing a first direction, and the top surface of the second pixel electrode overlapping the second electrode layer in the second contact hole has a second step facing a second direction opposite to the first direction.

[0008] In an exemplary embodiment of the present invention, the display device further includes a step correction layer, wherein the step correction layer is disposed between the substrate and the insulating layer and at least partially overlaps with the first contact hole.

[0009] In an exemplary embodiment of the present invention, the display device further includes a wire, wherein the wire is disposed between the substrate and the step correction layer and extends upward in a third direction intersecting the first and second directions, and wherein the wire overlaps with a portion of the first contact hole and a portion of the second contact hole.

[0010] In an exemplary embodiment of the present invention, the top surface of the portion of the first pixel electrode that overlaps with the conductive wire is lower than the top surface of the portion of the first pixel electrode that overlaps with the step correction layer.

[0011] In an exemplary embodiment of the present invention, the conductor overlaps with the step correction layer.

[0012] In an exemplary embodiment of the present invention, the conductor is a transmission control line.

[0013] In an exemplary embodiment of the present invention, the wire is disconnected at the first contact hole.

[0014] In an exemplary embodiment of the present invention, the display device further includes a gate insulating layer, wherein the gate insulating layer is disposed between the step correction layer and the conductor and has a third contact hole and a fourth contact hole, each exposing a portion of the conductor, and wherein the step correction layer is connected to the conductor through the third contact hole and the fourth contact hole.

[0015] In an exemplary embodiment of the present invention, a first pixel electrode extends in a first direction, and a second pixel electrode extends in a second direction.

[0016] In an exemplary embodiment of the present invention, the display device further includes a pixel defining film, wherein the pixel defining film has a first opening and a second opening, wherein the first opening forms a first emission region of a first pixel electrode and the second opening forms a second emission region of a second pixel electrode, and wherein the first opening is positioned on a side in a first direction relative to a first contact hole and the second opening is positioned on a side in a second direction relative to a second contact hole.

[0017] In an exemplary embodiment of the present invention, the first step has a first inclined surface that is inclined toward a first direction, and the second step has a second inclined surface that is inclined toward a second direction.

[0018] In an exemplary embodiment of the present invention, the display device further includes a first intermediate layer, a second intermediate layer, and a counter electrode, wherein the first intermediate layer and the second intermediate layer are respectively disposed on the first pixel electrode and the second pixel electrode, and the counter electrode covers the first intermediate layer and the second intermediate layer, wherein when the first intermediate layer emits green light, the second intermediate layer emits red light or blue light, and when the first intermediate layer emits red light or blue light, the second intermediate layer emits green light.

[0019] In an exemplary embodiment of the present invention, the first thin-film transistor includes a semiconductor layer and a gate electrode overlapping the semiconductor layer, wherein the display device further includes an upper electrode of a storage capacitor disposed on and overlapping the gate electrode, and wherein a step correction layer is disposed on the same layer as the upper electrode.

[0020] In an exemplary embodiment of the present invention, the first thin-film transistor overlaps with the storage capacitor, and the gate electrode corresponds to the lower electrode of the storage capacitor.

[0021] In an exemplary embodiment of the present invention, the first thin-film transistor further includes a third electrode layer disposed between the substrate and the first electrode layer, wherein a step correction layer is disposed on the same layer as the third electrode layer.

[0022] In an exemplary embodiment of the present invention, a first thin-film transistor includes a semiconductor layer and a gate electrode overlapping the semiconductor layer, and a third electrode layer connects the semiconductor layer to the first electrode layer.

[0023] In an exemplary embodiment of the present invention, the step correction layer is separated from the first thin-film transistor.

[0024] In an exemplary embodiment of the present invention, a first pixel electrode extends in a second direction, and a second pixel electrode extends in a first direction.

[0025] In an exemplary embodiment of the present invention, the display device further includes a pixel defining film, wherein the pixel defining film has a first opening and a second opening, wherein the first opening forms a first emission region of a first pixel electrode and the second opening forms a second emission region of a second pixel electrode, wherein the first opening is positioned on a side portion in a second direction relative to a first contact hole, the second opening is positioned on a side portion in a first direction relative to a second contact hole, and wherein the first step has a first inclined surface inclined toward a first direction, and the second step has a second inclined surface inclined toward a second direction.

[0026] In an exemplary embodiment of the present invention, the display device further includes a first intermediate layer, a second intermediate layer, and a counter electrode, wherein the first intermediate layer and the second intermediate layer are respectively disposed on the first pixel electrode and the second pixel electrode, and the counter electrode covers the first intermediate layer and the second intermediate layer, wherein when the first intermediate layer emits red light or blue light, the second intermediate layer emits green light, and when the first intermediate layer emits green light, the second intermediate layer emits red light or blue light. Attached Figure Description

[0027] Referring to the accompanying drawings, the above and other features of the invention will become more apparent from the detailed description of exemplary embodiments thereof, in which:

[0028] Figure 1 This is a schematic plan view of a display device according to an exemplary embodiment of the present invention;

[0029] Figure 2 This is a schematic plan view of a display panel according to an exemplary embodiment of the present invention;

[0030] Figure 3 It is a circuit diagram of pixels included in a display device according to an exemplary embodiment of the present invention;

[0031] Figure 4 It is a circuit diagram of pixels included in a display device according to an exemplary embodiment of the present invention;

[0032] Figure 5 This is a plan view of the pixel circuit of a display device according to an exemplary embodiment of the present invention;

[0033] Figure 6A , Figure 6B and Figure 6C It is along Figure 5 A schematic cross-sectional view of the display device taken by line II-II';

[0034] Figure 7A This is a schematic plan view of a part of a display device according to an exemplary embodiment of the present invention;

[0035] Figure 7B It is along Figure 7A A schematic cross-sectional view of the display device taken by line III-III';

[0036] Figure 8A This is a schematic plan view of a part of a display device according to an exemplary embodiment of the present invention;

[0037] Figure 8B It is along Figure 8A A schematic cross-sectional view of the display device taken by line IV-IV';

[0038] Figure 9 This is a plan view of the pixel circuit of a display device according to an exemplary embodiment of the present invention;

[0039] Figure 10A It is along Figure 9 A schematic cross-sectional view of the display device taken by line V-V';

[0040] Figure 10B It is along Figure 9 A schematic cross-sectional view of the display device taken by line VI-VI';

[0041] Figure 10C It is along Figure 9 A schematic cross-sectional view of the display device taken by line V-V';

[0042] Figure 11A It is along Figure 7A A schematic cross-sectional view of the display device taken by line III-III'; and

[0043] Figure 11B It is along Figure 8A A schematic cross-sectional view of the display device taken by line IV-IV'. Detailed Implementation

[0044] Exemplary embodiments of the invention will now be described more fully with reference to the accompanying drawings. It will be understood that the invention may be embodied in different forms and therefore should not be construed as limited to the exemplary embodiments set forth herein. It will be understood that similar reference numerals may indicate similar elements throughout the specification, and therefore redundant descriptions may be omitted. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0045] It will be understood that while terms such as "first," "second," etc., may be used to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. Therefore, without departing from the spirit and scope of the invention, the first component discussed below may be referred to as the second component.

[0046] It will be understood that, unless the context clearly indicates otherwise, the singular form includes the plural form.

[0047] For clarity, the dimensions of the components in the accompanying drawings may be exaggerated. In other words, because the dimensions and thicknesses of the components in the accompanying drawings may be exaggerated for clarity, the invention is not limited thereto.

[0048] When exemplary embodiments of the present invention can be implemented differently, the process sequence may be performed in a different order than that described. For example, two consecutively described processes may be performed substantially simultaneously or in the reverse order of their description.

[0049] In this disclosure, "A and / or B" may include "A", "B" or "A and B". Additionally, "at least one of A and B" may include "A", "B" or "A and B".

[0050] It will be understood that when a layer, zone, or component is referred to as being connected to another layer, zone, or component, it may be directly or indirectly connected to that other layer, zone, or component.

[0051] It will be understood that the x-axis, y-axis, and z-axis are not limited to the three axes of a Cartesian coordinate system and can be interpreted in a broader sense. For example, the x-axis, y-axis, and z-axis can be perpendicular to each other, or they can represent different directions that are not perpendicular to each other.

[0052] In the following, one or more exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0053] Figure 1 This is a schematic plan view of a display device 1 according to an exemplary embodiment of the present invention.

[0054] Reference Figure 1 The display device 1 includes a display area DA for displaying an image and a peripheral area PA surrounding the display area DA. The display device 1 can provide an image to the outside by using light emitted from the display area DA.

[0055] Substrate 100 may comprise various materials, such as glass, metal, plastic, or the like. According to an exemplary embodiment of the invention, substrate 100 may comprise a flexible material. For example, a substrate comprising a flexible material may be twisted, bent, folded, or rolled. Substrate 100 comprising a flexible material may comprise ultrathin glass, metal, and / or plastic.

[0056] The display area DA of the substrate 100 may be arranged with pixels PX including various display elements (such as organic light-emitting diodes (OLEDs)). Multiple pixels PX may be included in the display device 1, and the multiple pixels PX may be arranged in various forms such as stripe arrangement, pentile arrangement, mosaic arrangement or similar arrangement to realize an image.

[0057] like Figure 1As shown, in a plan view of the display area DA, the display area DA may have a rectangular shape. In an exemplary embodiment of the invention, the display area DA may have a polygonal shape such as a triangle, pentagon, hexagon, or similar shape, or a circular, elliptical, atypical, or similar shape.

[0058] The peripheral region PA of the substrate 100 is the area surrounding the display area DA, and may be an area where no image is displayed. For example, the peripheral region PA may at least partially surround the display area DA. Various lines configured to transmit electrical signals to the display area DA and pads for attaching printed circuit boards or driver integrated circuit (IC) chips may be located in the peripheral region PA.

[0059] Figure 2 This is a schematic plan view of a display panel 10 according to an exemplary embodiment of the present invention.

[0060] Reference Figure 2 The display panel 10 includes a display area DA and a peripheral area PA, and includes a plurality of pixels PX arranged in the display area DA. Each of the plurality of pixels PX may include a display element such as an OLED. Each pixel PX may emit, for example, red light, green light, blue light, or white light through the OLED. Hereinafter, each pixel PX may be referred to as a subpixel that emits light of a different color, and each pixel PX may include, for example, one of a red R subpixel, a green G subpixel, and a blue B subpixel. For example, a pixel unit may include one of a red R subpixel, a green G subpixel, and a blue B subpixel. The display area DA may be covered by an encapsulation member to be protected from external air or moisture.

[0061] Each pixel PX can be electrically connected to external circuitry arranged in the peripheral region PA. The peripheral region PA may include a first scan drive circuit 130, a second scan drive circuit 131, a transmit drive circuit 133, a terminal 140, a data drive circuit 150, a first power line 160, and a second power line 170.

[0062] The first scan driving circuit 130 and the second scan driving circuit 131 can provide scan signals to each pixel PX via scan lines SL. The second scan driving circuit 131 can be arranged parallel to the first scan driving circuit 130 when the display area DA is located between the second scan driving circuit 131 and the first scan driving circuit 130. Some of the plurality of pixels PX arranged in the display area DA can be electrically connected to the first scan driving circuit 130, and the remaining pixels PX can be connected to the second scan driving circuit 131. In an exemplary embodiment of the present invention, the second scan driving circuit 131 may be omitted.

[0063] The emission drive circuit 133 can provide the emission control signal to each pixel PX through the emission control line EL.

[0064] Terminal 140 may be disposed on one side of substrate 100. Terminal 140 may be exposed without being covered by an insulating layer and may be electrically connected to a printed circuit board (PCB). Terminal PCB-P of the printed circuit board (PCB) may be electrically connected to terminal 140 of display panel 10. The printed circuit board (PCB) transmits signals or power from the controller to display panel 10.

[0065] The control signals generated by the controller can be transmitted to the first scan drive circuit 130 and the second scan drive circuit 131 via the printed circuit board (PCB). The controller can supply a first power supply voltage to the first power supply line 160 and the second power supply line 170 via the first connection line 161 and the second connection line 171, respectively. For example, the first power supply voltage can be a drive voltage (described below). Figure 3 The second power supply voltage can be a common voltage (as described below). Figure 3 (ELVSS in the text). A first power supply voltage can be provided to each pixel PX via a drive voltage line PL connected to a first power supply line 160, and a second power supply voltage can be provided to the opposing electrode of each pixel PX connected to a second power supply line 170 (to be described below). Figure 6A (230 in the middle).

[0066] The data drive circuit 150 is electrically connected to the data line DL. The data signal from the data drive circuit 150 can be provided to each pixel PX via the connection line 151 connected to terminal 140 and the data line DL connected to the connection line 151. Although Figure 2 The diagram shows the data driving circuit 150 arranged in a printed circuit board (PCB), but in an exemplary embodiment of the invention, the data driving circuit 150 may be arranged on the substrate 100. For example, the data driving circuit 150 may be arranged between the terminal 140 and the first power line 160.

[0067] The first power line 160 may include a first sub-line 162 and a second sub-line 163, wherein both the first sub-line 162 and the second sub-line 163 extend parallel to each other in the x-direction when the display area DA is located between the first sub-line 162 and the second sub-line 163. The second power line 170 may have an annular shape with a side opening and partially surround the display area DA.

[0068] Figure 3 This is a circuit diagram of a pixel PX included in a display device 1 according to an exemplary embodiment of the present invention.

[0069] Reference Figure 3Each pixel PX includes a pixel circuit PC connected to the scan line SL, the data line DL, and the organic light-emitting diode OLED.

[0070] The pixel circuit PC includes a driving thin-film transistor (TFT) T1, a switching TFT T2, and a storage capacitor Cst. The switching TFT T2 is connected to the scan line SL and the data line DL, and is configured to transmit a data signal Dm to the driving TFT T1 via the data line DL according to the scan signal Sn input through the scan line SL.

[0071] The storage capacitor Cst is connected to the switch TFT T2 and the drive voltage line PL, and stores the voltage corresponding to the difference between the voltage received from the switch TFT T2 and the drive voltage ELVDD supplied to the drive voltage line PL.

[0072] The driving TFT T1 can be connected to the driving voltage line PL and the storage capacitor Cst, and the driving current flowing from the driving voltage line PL to the organic light-emitting diode (OLED) can be controlled according to the voltage value stored in the storage capacitor Cst. The OLED can emit light with a predetermined brightness according to the driving current.

[0073] although Figure 3 The illustration shows a pixel circuit PC comprising two TFTs and one storage capacitor, but the invention is not limited thereto. For example, the pixel circuit PC may include three or more TFTs and / or two or more storage capacitors. In an exemplary embodiment of the invention, the pixel circuit PC may include seven TFTs and one storage capacitor. Now, in... Figure 4 This implementation method is described in the following text.

[0074] Figure 4 This is a circuit diagram of pixel PX included in a display device 1 according to an exemplary embodiment of the present invention, and Figure 5 This is a plan view of the pixel circuit PC of the display device 1 according to an exemplary embodiment of the present invention. Additionally, Figures 6A to 6C It is along Figure 5 A schematic cross-sectional view of display device 1 taken from line II-II'.

[0075] Reference Figure 4 and Figure 5 A pixel PX may include a pixel circuit PC and an organic light-emitting diode (OLED) electrically connected to the pixel circuit PC.

[0076] In an exemplary embodiment of the present invention, such as Figure 4As shown, the pixel circuit PC may include multiple TFTs T1 to T7 and a storage capacitor Cst. The multiple TFTs T1 to T7 and the storage capacitor Cst may be connected to multiple signal lines SL, SL-1, SL+1, EL and DL, a first initialization voltage line VL1, a second initialization voltage line VL2 and a drive voltage line PL.

[0077] Multiple signal lines SL, SL-1, SL+1, EL, and DL may include a scan line SL, a previous scan line SL-1, a next scan line SL+1, an emit control line EL, and a data line DL. The scan line SL is configured to transmit a scan signal Sn. The previous scan line SL-1 is configured to transmit a previous scan signal Sn-1. The next scan line SL+1 is configured to transmit the scan signal Sn to the second initialization TFT T7. The emit control line EL is configured to transmit an emit control signal En to the operation control TFT T5 and the emit control TFT T6. The data line DL intersects with the scan line SL and is configured to transmit a data signal Dm. The drive voltage line PL can be configured to transmit a drive voltage ELVDD to the drive TFT T1. The first initialization voltage line VL1 can be configured to transmit an initialization voltage Vint to the first initialization TFT T4, and the second initialization voltage line VL2 can be configured to transmit an initialization voltage Vint to the second initialization TFT T7.

[0078] The driving gate electrode G1 of the driving TFT T1 can be connected to the lower electrode CE1 of the storage capacitor Cst. The driving source electrode S1 of the driving TFT T1 can be connected to the driving voltage line PL via the operation control TFT T5, and the driving drain electrode D1 of the driving TFT T1 can be electrically connected to the pixel electrode of the organic light-emitting diode OLED via the emission control TFT T6. Figure 6A (210 in the text). The driving TFT T1 receives the data signal Dm according to the switching operation of the switching TFT T2, and sends the driving current I... OLED It is supplied to organic light-emitting diodes (OLEDs).

[0079] The switching gate electrode G2 of the switching TFT T2 can be connected to the scan line SL. The switching source electrode S2 of the switching TFT T2 can be connected to the data line DL, and the switching drain electrode D2 of the switching TFT T2 can be connected to the driving source electrode S1 of the driving TFT T1 and connected to the driving voltage line PL via the operation control TFT T5. The switching TFT T2 can be turned on according to the scan signal Sn received through the scan line SL, and can perform a switching operation to transmit the data signal Dm transmitted to the data line DL to the driving source electrode S1 of the driving TFT T1.

[0080] The compensation gate electrode G3 of the compensation TFT T3 can be connected to the scan line SL. The compensation source electrode S3 of the compensation TFT T3 can be connected to the driving drain electrode D1 of the driving TFT T1 and can be connected to the pixel electrode 210 of the organic light-emitting diode OLED via the emission control TFT T6. The compensation drain electrode D3 of the compensation TFT T3 can be connected to the lower electrode CE1 of the storage capacitor Cst, the first initialization drain electrode D4 of the first initialization TFT T4, and the driving gate electrode G1 of the driving TFT T1. The compensation TFT T3 can be turned on according to the scan signal Sn received through the scan line SL, and can be electrically connected to the driving gate electrode G1 and the driving drain electrode D1 of the driving TFT T1 to connect the driving TFT T1 diode.

[0081] The first initialization gate electrode G4 of the first initialization TFT T4 can be connected to the previous scan line SL-1. The first initialization source electrode S4 of the first initialization TFT T4 can be connected to the first initialization voltage line VL1, and the first initialization drain electrode D4 of the first initialization TFT T4 can be connected to the lower electrode CE1 of the storage capacitor Cst, the compensation drain electrode D3 of the compensation TFT T3, and the driving gate electrode G1 of the driving TFT T1. The first initialization TFT T4 can be turned on according to the previous scan signal Sn-1 received through the previous scan line SL-1, and can be configured to transmit the initialization voltage Vint to the driving gate electrode G1 of the driving TFT T1 to perform an initialization operation to initialize the voltage of the driving gate electrode G1 of the driving TFT T1.

[0082] The operation control gate electrode G5 of the operation control TFT T5 can be connected to the emitter control line EL. The operation control source electrode S5 of the operation control TFT T5 can be connected to the drive voltage line PL, and the operation control drain electrode D5 of the operation control TFT T5 can be connected to the drive source electrode S1 of the drive TFT T1 and the switch drain electrode D2 of the switch TFT T2.

[0083] The emission control gate electrode G6 of the emission control TFT T6 can be connected to the emission control line EL. The emission control source electrode S6 of the emission control TFT T6 can be connected to the driving drain electrode D1 of the driving TFT T1 and the compensation source electrode S3 of the compensation TFT T3, and the emission control drain electrode D6 of the emission control TFT T6 can be electrically connected to the second initialization source electrode S7 of the second initialization TFT T7 and the pixel electrode 210 of the organic light-emitting diode OLED.

[0084] The operation control TFT T5 and the emission control TFT T6 can be turned on according to the emission control signal En received through the emission control line EL, and the driving voltage ELVDD received through the driving voltage line PL can be transmitted to the organic light-emitting diode OLED to allow the driving current I. OLED It flows through an organic light-emitting diode (OLED).

[0085] The second initialization gate electrode G7 of the second initialization TFT T7 is connected to the next scan line SL+1. The second initialization source electrode S7 of the second initialization TFT T7 is connected to the emission control drain electrode D6 of the emission control TFT T6 and the pixel electrode 210 of the organic light-emitting diode OLED, and the second initialization drain electrode D7 of the second initialization TFT T7 is connected to the second initialization voltage line VL2.

[0086] Since scan line SL and the next scan line SL+1 are electrically connected to each other, the same scan signal Sn can be applied to both scan line SL and the next scan line SL+1. Accordingly, the second initialization TFT T7 can be turned on according to the scan signal Sn received through the next scan line SL+1, and performs the operation of initializing the pixel electrode 210 of the organic light-emitting diode OLED.

[0087] The upper electrode CE2 of the storage capacitor Cst is connected to the driving voltage line PL, and the common electrode of the organic light-emitting diode (OLED) is connected to the common voltage ELVSS. Accordingly, the OLED can receive a driving current I from the driving TFT T1. OLED It emits light to display images.

[0088] although Figure 4 The compensation TFT T3 and the first initialization TFT T4 are shown to have dual gate electrodes, but the compensation TFT T3 and the first initialization TFT T4 may each have a single gate electrode.

[0089] In the following text, it will be referred to below. Figure 5 , Figure 6A , Figure 6B and Figure 6C The structure of pixel PX is described in detail. Figure 6B and Figure 6C Corresponding to Figure 6A An exemplary implementation of the modification. Reference will be made to... Figure 6A Exemplary embodiments of the present invention will be described, and will be based on... Figure 6A Differences to Figure 6B and Figure 6C Describe it.

[0090] The driving TFT T1, the switching TFT T2, the compensation TFT T3, the first initialization TFT T4, the operation control TFT T5, the emission control TFT T6, and the second initialization TFT T7 can be arranged along the semiconductor layer 1130, and some regions of the semiconductor layer 1130 can form the semiconductor layer of the driving TFT T1, the switching TFT T2, the compensation TFT T3, the first initialization TFT T4, the operation control TFT T5, the emission control TFT T6, and the second initialization TFT T7.

[0091] The semiconductor layer 1130 can be formed on the substrate 100, and as... Figure 6A As shown, a buffer layer 110 may be formed on a substrate 100, and a semiconductor layer 1130 may be formed on the buffer layer 110. For example, the semiconductor layer 1130 may be formed above the buffer layer 110.

[0092] like Figure 6A As shown, semiconductor layer 1130 may include an active layer A1 for driving TFT T1. Active layer A1 may include channel region C1, source electrode S1, and drain electrode D1.

[0093] Substrate 100 may include, for example, glass or a polymeric resin. The polymeric resin may include, for example, polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, cellulose acetate propionate, or the like. Substrate 100 comprising a polymeric resin may be flexible, rollable, or bendable. For example, substrate 100 may have a multilayer structure comprising a layer containing the aforementioned polymeric resin and an inorganic layer.

[0094] The buffer layer 110 can reduce or block the penetration of foreign matter, moisture, or external air from the lower part of the substrate 100 and can provide a flat surface on the substrate 100. The buffer layer 110 may include inorganic materials such as oxides or nitrides, organic materials, or organic and inorganic composites, and the buffer layer 110 may include a single-layer structure or a multi-layer structure of inorganic and organic materials.

[0095] For example, semiconductor layer 1130 may include low-temperature polysilicon (LTPS). Polysilicon materials have high electron mobility (e.g., greater than 100 cm⁻¹). 2 ( / Vs), low power consumption, and high reliability. In an exemplary embodiment of the present invention, semiconductor layer 1130 may include amorphous silicon (a-Si) and / or oxide semiconductor. Some semiconductor layers of the plurality of TFTs T1 to T7 may include LTPS, and other semiconductor layers of the plurality of TFTs T1 to T7 may include a-Si and / or oxide semiconductor.

[0096] The first gate insulating layer 111 may be located on the semiconductor layer 1130, and the scan line SL, the previous scan line SL-1, the next scan line SL+1 and the emission control line EL may be located on the first gate insulating layer 111.

[0097] The first gate insulating layer 111 may include, for example, silicon oxide (SiO2) or silicon nitride (SiN). x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), zinc oxide (ZnO) or similar substances.

[0098] The regions of scan line SL that overlap with the channel regions of switching TFT T2 and compensation TFT T3 can be the switching gate electrode G2 and compensation gate electrode G3, respectively. The region of the preceding scan line SL-1 that overlaps with the channel region of the first initialization TFT T4 can be the first initialization gate electrode G4. The region of the following scan line SL+1 that overlaps with the channel region of the second initialization TFT T7 can be the second initialization gate electrode G7, and the regions of the emission control line EL that overlap with the channel regions of operation control TFT T5 and emission control TFT T6 can be the operation control gate electrode G5 and emission control gate electrode G6, respectively.

[0099] A second gate insulating layer 113 may be provided on the scan line SL, the previous scan line SL-1, the next scan line SL+1, and the emission control line EL. The second gate insulating layer 113 may include, for example, silicon oxide (SiO2) or silicon nitride (SiN). x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), zinc oxide (ZnO) or similar substances.

[0100] Electrode voltage line HL, first initialization voltage line VL1, and second initialization voltage line VL2 may be arranged on the second gate insulating layer 113. Electrode voltage line HL may cover at least a portion of the driving gate electrode G1 and may form a storage capacitor Cst together with the driving gate electrode G1.

[0101] The lower electrode CE1 of the storage capacitor Cst can be integrated with the driving gate electrode G1 of the driving TFT T1. For example, the driving gate electrode G1 of the driving TFT T1 can perform the function of the lower electrode CE1 of the storage capacitor Cst. The region of the electrode voltage line HL that overlaps with the driving gate electrode G1 can be the upper electrode CE2 of the storage capacitor Cst. Accordingly, the second gate insulating layer 113 can perform the function of the dielectric layer of the storage capacitor Cst.

[0102] According to an exemplary embodiment of the present invention, a step correction layer DG may be disposed on the second gate insulating layer 113. The step correction layer DG may have an isolated pattern. The step correction layer DG may be separate from the driving TFT T1 and may include the same material as the upper electrode CE2 of the storage capacitor Cst. For example, the upper electrode CE2 of the storage capacitor Cst and the step correction layer DG may be a single layer or multiple layers of at least one of aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and copper (Cu).

[0103] An interlayer insulating layer 115 is positioned on the electrode voltage line HL, the first initialization voltage line VL1, and the second initialization voltage line VL2. The interlayer insulating layer 115 may include, for example, silicon oxide (SiO2) or silicon nitride (SiN). x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), zinc oxide (ZnO) or similar substances.

[0104] Data line DL, drive voltage line PL, first initialization connection line 1173a and second initialization connection line 1173b, node connection line 1174, and electrode layer 1175 may be disposed on interlayer insulating layer 115. Data line DL, drive voltage line PL, node connection line 1174, and electrode layer 1175 may comprise conductive materials such as Mo, Al, Cu, Ti, or the like, and may comprise multilayers or single layers containing the aforementioned materials. In an exemplary embodiment of the present invention, data line DL, drive voltage line PL, node connection line 1174, and electrode layer 1175 may comprise multilayers of Ti / Al / Ti.

[0105] The data line DL can be connected to the switching source electrode S2 of the switching TFT T2 via contact hole 1154. A portion of the data line DL can be understood as the switching source electrode S2.

[0106] The driving voltage line PL can be connected to the upper electrode CE2 of the storage capacitor Cst through a contact hole 1158 formed in the interlayer insulating layer 115. Accordingly, the electrode voltage line HL can have the same voltage level as the driving voltage line PL (e.g., a constant voltage). In addition, the driving voltage line PL can be connected to the operation control source electrode S5 through a contact hole 1155.

[0107] The first initialization voltage line VL1 can be connected to the first initialization TFT T4 via the first initialization connection line 1173a, and the second initialization voltage line VL2 can be connected to the second initialization TFT T7 via the second initialization connection line 1173b. The first initialization voltage line VL1 and the second initialization voltage line VL2 may have the same constant voltage (e.g., -2V or similar voltage) to each other.

[0108] One end of the node connection line 1174 can be connected to the compensation drain electrode D3 through the contact hole 1156, and the other end of the node connection line 1174 can be connected to the drive gate electrode G1 through the contact hole 1157.

[0109] The electrode layer 1175 is connected to the semiconductor layer of the emission control TFT T6 through a contact hole 1153 that penetrates the interlayer insulating layer 115, the second gate insulating layer 113, and the first gate insulating layer 111. The emission control TFT T6 can be electrically connected to the pixel electrode 210 of the organic light-emitting diode OLED through the electrode layer 1175.

[0110] A planarization layer 117 may be positioned on the data line DL, the driving voltage line PL, the first initialization connection line 1173a and the second initialization connection line 1173b, the node connection line 1174, and the electrode layer 1175. An organic light-emitting diode (OLED) may be located on the planarization layer 117.

[0111] although Figure 4 and Figure 5 The structure of a pixel circuit PC is shown, but multiple pixels PX having substantially the same pixel circuit PC can be arranged in the x and y directions, and the first initialization voltage line VL1, the previous scan line SL-1, the second initialization voltage line VL2, and the next scan line SL+1 can be shared by two pixel circuit PCs arranged adjacent to each other in the y direction. Pixel circuits arranged in the first row can share the first initialization voltage line VL1 and the previous scan line SL-1, and pixel circuits arranged in the next row can share the second initialization voltage line VL2 and the next scan line SL+1.

[0112] For example, the first initialization voltage line VL1 and the previous scan line SL-1 can be electrically connected relative to Figure 5 in the y direction and Figure 5 The second initialization TFTs of other pixel circuits PC are arranged adjacent to the pixel circuit PC shown. Accordingly, the previous scan signal Sn-1 applied to the previous scan line SL-1 can be transmitted as the next scan signal to the second initialization TFTs of the other pixel circuit PCs. Similarly, the second initialization voltage line VL2 and the next scan line SL+1 can be electrically connected to the second initialization TFTs of the other pixel circuit PC relative to the previous scan line SL+1. Figure 5 in the y direction and Figure 5The pixel circuit PC shown is arranged adjacent to other pixel circuit PCs with a first initialization TFT to transmit the previous scan signal Sn-1 and the initialization voltage Vint.

[0113] Return to reference Figure 6A The planarization layer 117 may have a flat surface, such that the pixel electrode 210 can be formed with a substantially flat surface. The planarization layer 117 may comprise a single layer or multiple layers of a film containing organic materials. The planarization layer 117 may comprise, for example, benzocyclobutene (BCB), polyimide, hexamethyldisiloxane (HDMSO), common commercial polymers such as poly(methyl methacrylate) (PMMA) or polystyrene (PS), polymer derivatives having phenolic groups, acrylic polymers, imide polymers, aromatic ether polymers, amide polymers, fluoropolymers, p-xylene polymers, vinyl alcohol polymers, and mixtures thereof. The planarization layer 117 may comprise inorganic materials. In this case, the planarization layer 117 may comprise, for example, silicon oxide (SiO2), silicon nitride (SiN). x The planarization layer 117 may contain silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), zinc oxide (ZnO), or similar materials. When the planarization layer 117 comprises inorganic materials, chemical planarization polishing may be performed. The planarization layer 117 may comprise organic and inorganic materials.

[0114] An organic light-emitting diode (OLED) may include a pixel electrode 210, a counter electrode 230, and an intermediate layer 220 located between the pixel electrode 210 and the counter electrode 230 and containing an emission layer.

[0115] The pixel electrode 210 can be connected to the electrode layer 1175 through the contact hole 1163, and the electrode layer 1175 can be connected to the emission control drain electrode D6 through the contact hole 1153.

[0116] The pixel electrode 210 may be a (semi-)transparent electrode or a reflective electrode. In an exemplary embodiment of the present invention, the pixel electrode 210 may include a reflective film comprising, for example, Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, their compounds, or the like, and a transparent or semi-transparent electrode layer formed on the reflective film. The transparent or semi-transparent electrode layer may include at least one of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), and aluminum zinc oxide (AZO). In an exemplary embodiment of the present invention, the pixel electrode 210 may include a stacked structure having ITO / Ag / ITO.

[0117] The pixel defining layer 119 can be disposed on the planarization layer 117, and the pixel defining layer 119 can form the emission region EA of the pixel PX through an opening OP having an exposed central portion of the pixel electrode 210. Additionally, the pixel defining layer 119 can prevent the generation of arcs or the like at the edges of the pixel electrode 210 by increasing the distance between the edge of the pixel electrode 210 and the opposing electrode 230 disposed on the pixel electrode 210. The pixel defining layer 119 can be formed from an organic insulating material such as polyimide, polyamide, acrylic resin, BCB, HMDSO, and phenolic resin by spin coating or similar methods.

[0118] The intermediate layer 220 may include an organic emitting layer. The organic emitting layer may include an organic material comprising a fluorescent or phosphorescent material emitting red, green, blue, or white light. The organic emitting layer may include a low molecular weight organic material or a polymeric organic material, and functional layers such as a hole transport layer (HTL), a hole injection layer (HIL), an electron transport layer (ETL), an electron injection layer (EIL), or the like may be selectively disposed above or below the organic emitting layer. The intermediate layer 220 may be disposed corresponding to each of the plurality of pixel electrodes 210. However, the invention is not limited thereto. At least some of the multiple layers included in the intermediate layer 220 may be formed as a single continuous body over the plurality of pixel electrodes 210.

[0119] For example, the relative electrode 230 may be a transparent electrode or a reflective electrode. In an exemplary embodiment of the present invention, the relative electrode 230 may be a transparent or semi-transparent electrode and may include a metal film with a low work function comprising lithium (Li), calcium, lithium fluoride (LiF) / Ca, LiF / Al, Ag, Mg, and their compounds. Additionally, a transparent conductive oxide (TCO) film such as ITO, IZO, ZnO, In2O3, or the like may be disposed above the metal film. The relative electrode 230 may be formed individually to correspond to a plurality of pixel electrodes 210.

[0120] Display device 1 according to an exemplary embodiment of the present invention (see Figure 1 The substrate 100 may include a step correction layer DG, which is disposed between the substrate 100 and the interlayer insulating layer 115 and partially overlaps with a contact hole 1163 of a portion of the exposed electrode layer 1175 in the planarization layer 117.

[0121] Reference Figure 5 According to an exemplary embodiment of the present invention, the conductor ML may be disposed between the substrate 100 and the step correction layer DG to extend in the x-direction and may partially overlap with the contact hole 1163. In an exemplary embodiment of the present invention, the conductor ML may be the aforementioned emission control line EL.

[0122] like Figure 6A As shown, the conductor ML may partially overlap with the step correction layer DG. In an exemplary embodiment of the invention, the conductor ML and the step correction layer DG may not overlap each other, and the ends of the conductor ML and the steps correction layer DG may coincide. In an exemplary embodiment of the invention, the ends of the conductor ML and the steps correction layer DG may be aligned with each other.

[0123] When a step correction layer DG is included, which partially overlaps with the contact hole 1163, an interlayer insulating layer 115 disposed on the step correction layer DG can be formed along the step correction layer DG. Additionally, an electrode layer 1175 disposed on the interlayer insulating layer 115 and connected to the emission control drain electrode D6 of the emission control TFT T6 can be formed along the step correction layer DG.

[0124] The pixel electrode 210 can contact the electrode layer 1175 through the contact hole 1163, and the portion of the pixel electrode 210 that contacts the electrode layer 1175 can be formed in a shape corresponding to the step correction layer DG. In other words, the top surface of the pixel electrode 210 that overlaps with the conductor ML can be lower than the top surface of the pixel electrode 210 that overlaps with the step correction layer DG.

[0125] For example, the pixel electrode 210 may extend in the y-direction (e.g., the +y-direction), and the opening OP of the pixel defining layer 119 may be positioned on a side portion in the +y-direction relative to the contact hole 1163. For example, the opening OP may be positioned to the left of the contact hole 1163. Additionally, refer to the enlarged view showing the pixel electrode 210 and the electrode layer 1175. Figure 6A The pixel electrode 210 may have a step h that is reduced in the +y direction due to the step correction layer DG.

[0126] In other words, the lower top surface of the pixel electrode 210 that overlaps with the electrode layer 1175 exposed by the contact hole 1163 may be adjacent to the emission region EA, and the step h of the pixel electrode 210 may have an inclined surface N facing the emission region EA. For example, the top surface of the pixel electrode 210 that overlaps with the wire ML may be closer to the emission region EA than the top surface of the pixel electrode 210 that overlaps with the step correction layer DG. For example, the lower bottom surface opposite the lower top surface of the pixel electrode 210 may contact the electrode layer 1175.

[0127] External light or similar objects traveling toward the inner surface of the substrate 100 can be reflected back to the outside by the pixel electrode 210, which serves as a reflective electrode. Therefore, when the pixel electrode 210 includes a step h lowered in the +y direction by the step correction layer DG, external light or similar objects can be reflected back toward the emission region EA in the direction (see...). Figure 6A The arrow in the image is reflected by the step h of the pixel electrode 210.

[0128] although Figure 6A The pixel electrode 210 is shown to extend in the +y direction, but as... Figure 6C As shown, the pixel electrode 210 can extend in the -y direction. Figure 6A Conversely, when the portion of pixel electrode 210 in contact with electrode layer 1175 has a step h that is still reduced in the +y direction by step correction layer DG, external light or the like advancing toward the inner surface of substrate 100 can be directed toward the region where there is no emission region EA (see...). Figure 6C The arrow in the image is reflected by the step h of the pixel electrode 210.

[0129] exist Figure 6A and Figure 6C In this example, the +y and -y directions are used, but these are for descriptive convenience and, unlike those shown, can be arranged symmetrically side-to-side. For example, according to an exemplary embodiment of the invention, such as... Figure 6A As shown, the lower top surface of the pixel electrode 210 that overlaps with the conductor ML on the top surface of the electrode layer 1175 exposed by the contact hole 1163 may be closer to the emission region EA than the higher top surface of the pixel electrode 210 that overlaps with the step correction layer DG. Additionally, as Figure 6C As shown, the higher top surface of the pixel electrode 210 that overlaps with the step correction layer DG is closer to the emission region EA than the lower top surface of the pixel electrode 210 that overlaps with the wire ML.

[0130] According to an exemplary embodiment of the present invention, when a step correction layer DG is included, disposed between the substrate 100 and the interlayer insulating layer 115 and partially overlapping with the contact hole 1163, the direction of the step h of the pixel electrode 210 in the contact hole 1163 can be adjusted by the step correction layer DG, and the direction of external light or the like reflected by the pixel electrode 210 in the contact hole 1163 can be adjusted.

[0131] although Figure 6A The diagram shows an interlayer insulating layer 115 disposed between the electrode layer 1175 and the step correction layer DG, but as... Figure 6B As shown, the interlayer insulation layer 115 may include a first interlayer insulation layer 115a and a second interlayer insulation layer 115b. Furthermore, the step correction layer DG may be disposed on the first interlayer insulation layer 115a.

[0132] The pixel electrode 210 can contact the second electrode layer 1175b through contact hole 1163, and the second electrode layer 1175b can be connected to the first electrode layer 1175a through contact hole 1153 formed in the second interlayer insulating layer 115b. Additionally, the first electrode layer 1175a can be connected to the emission control TFT T6 through contact hole 1143. A step correction layer DG can be disposed on the same layer as the first electrode layer 1175a, and the step correction layer DG can comprise the same material as the first electrode layer 1175a.

[0133] Figure 7A This is a schematic plan view of a portion of a display device 1 according to an exemplary embodiment of the present invention, and Figure 7B It is along Figure 7A A schematic cross-sectional view of display device 1 taken by line III-III'. Figure 7B In, with Figure 6A The same reference numerals in the figures can indicate Figure 6A The same components or elements in the same text, and their redundant descriptions can be omitted.

[0134] Figure 7A A plurality of pixels PX are shown that can be arranged on display device 1 (see Figure 1 The display area DA (see) Figure 1 For example, a first pixel PX1, a second pixel PX2, and a third pixel PX3 can be arranged in the display area DA. Although Figure 7AThe first pixel PX1, the second pixel PX2, and the third pixel PX3 are arranged in a pentile pattern, but the number and arrangement of pixels can vary.

[0135] According to an exemplary embodiment of the present invention, the first pixel electrode 210R of the first pixel PX1 and the third pixel electrode 210B of the third pixel PX3 may extend in a first direction. In an exemplary embodiment of the present invention, as Figure 7A As shown, the first direction can be the -y direction, and the first pixel electrode 210R and the third pixel electrode 210B can extend in the -y direction.

[0136] For example, in a plan view, the first opening OP1 and the third opening OP3, which respectively form the first emission region EA1 of the first pixel electrode 210R and the third emission region EA3 of the third pixel electrode 210B, can be positioned on the sides in the -y direction relative to the first contact hole 1163R and the third contact hole 1163B, respectively. For example, the first opening OP1 can be positioned to the right of the first contact hole 1163R, and the third opening OP3 can be positioned to the right of the third contact hole 1163B. As an additional example, the first contact hole 1163R and the first opening OP1 can be arranged sequentially in the -y direction, and the third contact hole 1163B and the third opening OP3 can be arranged sequentially in the -y direction.

[0137] Furthermore, the second pixel electrode 210G of the second pixel PX2 may extend in a second direction opposite to the first direction. In an exemplary embodiment of the present invention, such as Figure 7A As shown, the second direction can be the +y direction, and the second pixel electrode 210G can extend in the +y direction.

[0138] In other words, the second opening OP2, which forms the second emission region EA2 of the second pixel electrode 210G, can be positioned on the side in the +y direction relative to the second contact hole 1163G. For example, the second opening OP2 can be positioned to the left of the second contact hole 1163G. As an additional example, the second opening OP2 and the second contact hole 1163G can be arranged sequentially in the -y direction.

[0139] The conductor ML may pass through the first contact hole 1163R, the second contact hole 1163G, and the third contact hole 1163B to extend upward in a third direction intersecting the first and second directions. The first pixel electrode 210R, the second pixel electrode 210G, and the third pixel electrode 210B each extend in either the first or second direction and overlap with a portion of the first contact hole 1163R, a portion of the second contact hole 1163G, and a portion of the third contact hole 1163B, respectively. In an exemplary embodiment of the invention, the conductor ML may correspond to the aforementioned emission control line EL. Here, the third direction is the x-direction.

[0140] although Figure 7A The wire ML is shown relative to Figure 7A The center portion overlaps with and passes through the upper portion of the regions of the first contact hole 1163R, the second contact hole 1163G, and the third contact hole 1163B, but the wire ML may partially overlap with and pass through the lower portion of the regions of the first contact hole 1163R, the second contact hole 1163G, and the third contact hole 1163B. For example, Figure 7A The wire ML shown can overlap with portions of the first contact hole 1163R, the second contact hole 1163G, and the third contact hole 1163B by extending parallel in the x-direction. For example, the wire ML can have a sufficiently large width in the -y-direction to overlap with the first contact hole 1163R, the second contact hole 1163G, and the third contact hole 1163B.

[0141] In an exemplary embodiment of the invention, the step correction layer DG may be arranged to partially overlap with a portion of the second contact hole 1163G of the second pixel PX2. In this case, the second pixel electrode 210G of the second pixel PX2 extends in a different direction than the first pixel electrode 210R of the first pixel PX1 and the third pixel electrode 210B of the third pixel PX3. Hereinafter, the step correction layer DG may partially overlap with the conductor ML. In an exemplary embodiment of the invention, the step correction layer DG may not overlap with the conductor ML, and the ends of the conductor ML and the ends of the step correction layer DG may coincide with each other.

[0142] Reference Figure 7B The first TFT TFT1 may include a first electrode layer 1175R, the second TFT TFT2 may include a second electrode layer 1175G, and the third TFT TFT3 may include a third electrode layer 1175B. In an exemplary embodiment of the present invention, the first TFT TFT1, the second TFT TFT2, and the third TFT TFT3 may correspond to the emission control TFT T6 in each pixel circuit PC.

[0143] A magnified view of display device 1 is shown with reference to it. Figure 7BThe top surface of the first pixel electrode 210R, which contacts the first electrode layer 1175R exposed by the first contact hole 1163R, may have a first step h1 that decreases in a first direction (e.g., the -y direction). Additionally, the top surface of the second pixel electrode 210G, which contacts the second electrode layer 1175G exposed by the second contact hole 1163G, may have a second step h2 that decreases in a second direction opposite to the first direction (e.g., the +y direction). For example, the inclined surface of the first step h1 may face the first direction, and the inclined surface of the second step h2 may face the second direction. Furthermore, the top surface of the third pixel electrode 210B, which contacts the third electrode layer 1175B exposed by the third contact hole 1163B, may have a third step h3 that decreases in the first direction (e.g., the -y direction). For example, the inclined surface of the third step h3 may face the first direction.

[0144] For example, the lower top surface of the lower portion of the first pixel electrode 210R, the second pixel electrode 210G, and the third pixel electrode 210B, which are respectively exposed by the first contact hole 1163R, the second contact hole 1163G, and the third contact hole 1163B, may be closer to the first emission region EA1, the second emission region EA2, and the third emission region EA3 than the higher top surface of the lower portion of the first pixel electrode 210R, the second pixel electrode 210G, and the third pixel electrode 210B.

[0145] In an exemplary embodiment of the present invention, the first step h1, second step h2, and third step h3 of the first pixel electrode 210R, the second pixel electrode 210G, and the third pixel electrode 210B may each have a first inclined surface N1, a second inclined surface N2, and a third inclined surface N3 that are inclined toward the first emission region EA1, the second emission region EA2, and the third emission region EA3, respectively. For example, the first inclined surface N1, the second inclined surface N2, and the third inclined surface N3 may each face the direction in which their respective emission regions EA1, EA2, or EA3 are located.

[0146] In an exemplary embodiment of the present invention, the first pixel PX1 and the third pixel PX3 may form the top surface of the first pixel electrode 210R and the top surface of the third pixel electrode 210B that overlap with the wire ML above the first step h1 and the third step h3, and the second pixel PX2 may form the top surface of the lower part of the second pixel electrode 210G that overlaps with the step correction layer DG above the lower surface of the lower part of the second pixel electrode 210G.

[0147] According to an exemplary embodiment of the present invention, the lower top surface of the top surfaces of the first pixel electrode 210R, the second pixel electrode 210G, and the third pixel electrode 210B that are respectively exposed by the first contact hole 1163R, the second contact hole 1163G, and the third contact hole 1163B can be uniformly formed to be closer to the first emission region EA1, the second emission region EA2, and the third emission region EA3 than the higher top surfaces of the first pixel electrode 210R, the second pixel electrode 210G, and the third pixel electrode 210B, respectively.

[0148] In an exemplary embodiment of the present invention, the first intermediate layer 220R, the second intermediate layer 220G, and the third intermediate layer 220B may be respectively disposed on the first pixel electrode 210R, the second pixel electrode 210G, and the third pixel electrode 210B, and the opposing electrode 230 may be disposed on and cover the first intermediate layer 220R, the second intermediate layer 220G, and the third intermediate layer 220B. For example, the first intermediate layer 220R may emit red light, the second intermediate layer 220G may emit green light, and the third intermediate layer 220B may emit blue light.

[0149] In an exemplary embodiment of the present invention, the first intermediate layer 220R and the third intermediate layer 220B can emit light with a green wavelength, and the second intermediate layer 220G can emit light with a red wavelength or a blue wavelength.

[0150] In a comparative embodiment, the step correction layer can be omitted. When the pixels are arranged in a pentile type, the directions in which the pixel electrodes extend are offset from each other. Typically, the pixel electrodes of pixels emitting red or blue light and the pixel electrodes of pixels emitting green light are arranged opposite to each other. In the case of a green light-emitting pixel where the step correction layer is omitted, the higher top surface of the pixel electrode that contacts the electrode layer exposed by the contact hole is adjacent to the emitting region. That is, the step direction of the pixel electrode of the green light-emitting pixel is formed opposite to the step direction of the pixel electrode of the red or blue light-emitting pixel.

[0151] External light or similar light traveling toward the inner surface of the substrate is reflected back to the outside by the pixel electrodes. Additionally, pixels emitting red or blue light reflect external light or similar light toward the emitting area, while pixels emitting green light reflect external light or similar light away from the emitting area. In this case, because the reflection directions of the external light or similar light are different, a separation phenomenon of magenta and green, a mixture of red and blue, may occur.

[0152] In an exemplary embodiment of the present invention, a step correction layer DG is disposed in the second pixel PX2. In this case, the second pixel electrode 210G of the second pixel PX2 extends in a direction opposite to the extending direction of the first pixel electrode 210R of the first pixel PX1 and the third pixel electrode 210B of the third pixel PX3. In this case, the first pixel electrode 210R and the third pixel electrode 210B may have a first step h1 and a third step h3 that are reduced in the -y direction, respectively, and the second pixel electrode 210G may have a second step h2 that is reduced in the +y direction due to the step correction layer DG.

[0153] For example, the descending directions of the first step h1, second step h2, and third step h3 of the first pixel electrode 210R, the second pixel electrode 210G, and the third pixel electrode 210B can be uniformly formed to face the first emission region EA1, the second emission region EA2, and the third emission region EA3. In this case, external light or similar incident towards the inner surface of the substrate 100 can be reflected by the first step h1, second step h2, and third step h3 of the first pixel electrode 210R, the second pixel electrode 210G, and the third pixel electrode 210B in the direction facing the first emission region EA1, the second emission region EA2, and the third emission region EA3. Accordingly, the direction in which external light or similar is reflected can be the same, and the separation phenomenon of magenta and green, which are a mixture of red and blue, can be improved.

[0154] Figure 8A This is a schematic plan view of a portion of a display device 1 according to an exemplary embodiment of the present invention, and Figure 8B It is along Figure 8A A schematic cross-sectional view of display device 1 taken by line IV-IV'. Figure 8A and Figure 8B In, with Figure 7A and Figure 7B In the accompanying drawings, the same reference numerals may indicate the same components or elements, and redundant descriptions may be omitted.

[0155] In an exemplary embodiment of the present invention, the first pixel electrode 210R of the first pixel PX1 and the third pixel electrode 210B of the third pixel PX3 may extend in a first direction. In an exemplary embodiment of the present invention, as... Figure 8A As shown, the first direction can be the -y direction, and the first pixel electrode 210R and the third pixel electrode 210B can extend in the -y direction.

[0156] For example, the first opening OP1 and the third opening OP3 of the first emission region EA1 of the first pixel electrode 210R and the third emission region EA3 of the third pixel electrode 210B, respectively, can be positioned on the side in the -y direction relative to the first contact hole 1163R and the third contact hole 1163B, respectively.

[0157] Furthermore, the second pixel electrode 210G of the second pixel PX2 may extend in a second direction opposite to the first direction. In an exemplary embodiment of the present invention, such as Figure 8A As shown, the second direction can be the +y direction, and the second pixel electrode 210G can extend in the +y direction.

[0158] In other words, the second opening OP2 of the second emission region EA2 providing the second pixel electrode 210G can be positioned on the side in the +y direction relative to the second contact hole 1163G. For example, the second emission region EA2 can be positioned to the left of the second contact hole 1163G.

[0159] The conductor ML may pass through the first contact hole 1163R, the second contact hole 1163G, and the third contact hole 1163B, extending upward in a third direction intersecting the first or second direction extending from the first pixel electrode 210R, the second pixel electrode 210G, and the third pixel electrode 210B, respectively. Additionally, the conductor ML may overlap with a portion of the first contact hole 1163R, a portion of the second contact hole 1163G, and a portion of the third contact hole 1163B. In an exemplary embodiment of the invention, the conductor ML may correspond to the aforementioned emission control line EL. Here, the third direction is the x-direction.

[0160] although Figure 8A The diagram shows that the wire ML partially overlaps and passes through the upper portions of the first contact hole 1163R, the second contact hole 1163G, and the third contact hole 1163B, but the wire ML may also partially overlap and pass through the lower portions of the first contact hole 1163R, the second contact hole 1163G, and the third contact hole 1163B. In other words, Figure 8A The conductor ML shown can be arranged by moving it parallel to the x-y direction. For example, the conductor ML can extend in both the x and y directions.

[0161] In an exemplary embodiment of the invention, in a plan view, the wire ML may partially overlap and pass through the upper portions of the first contact hole 1163R, the second contact hole 1163G, and the third contact hole 1163B.

[0162] In an exemplary embodiment of the present invention, a plurality of step correction layers DG and DG' may be arranged to partially overlap with the first contact hole 1163R of the first pixel PX1 and the third contact hole 1163B of the third pixel PX3, respectively. In this case, the first pixel electrode 210R of the first pixel PX1 and the third pixel electrode 210B of the third pixel PX3 extend in a direction different from the extending direction of the second pixel electrode 210G of the second pixel PX2. In this document, the plurality of step correction layers DG and DG' may partially overlap with the conductor ML. In an exemplary embodiment of the present invention, the plurality of step correction layers DG and DG' may not overlap with the conductor ML, and the ends of the plurality of step correction layers DG and DG' may coincide with the ends of the conductor ML.

[0163] A magnified view of display device 1 is shown with reference to it. Figure 8B The top surface of the first pixel electrode 210R, which overlaps with the first electrode layer 1175R exposed by the first contact hole 1163R, may have a first step h1 that decreases in a first direction (e.g., the +y direction), and the top surface of the second pixel electrode 210G, which overlaps with the second electrode layer 1175G exposed by the second contact hole 1163G, may have a second step h2 that decreases in a second direction (e.g., the -y direction) opposite to the first direction. Additionally, the top surface of the third pixel electrode 210B, which overlaps with the third electrode layer 1175B exposed by the third contact hole 1163B, may have a third step h3 that decreases in the first direction (e.g., the +y direction).

[0164] For example, the lower top surface of the top surfaces of the first pixel electrode 210R, the second pixel electrode 210G, and the third pixel electrode 210B, which are respectively exposed by the first electrode layer 1175R, the second electrode layer 1175G, and the third electrode layer 1175B, may be farther away from the first emission region EA1, the second emission region EA2, and the third emission region EA3 than the higher top surfaces of the first pixel electrode 210R, the second pixel electrode 210G, and the third pixel electrode 210B.

[0165] In an exemplary embodiment of the present invention, the first step h1 of the first pixel electrode 210R and the third step h3 of the third pixel electrode 210B may have a first inclined surface N1 and a third inclined surface N3 inclined toward the +y direction, and the second step h2 of the second pixel electrode 210G may have a second inclined surface N2 inclined toward the -y direction.

[0166] In an exemplary embodiment of the present invention, the first pixel PX1 and the third pixel PX3 may have top surfaces that overlap with the first pixel electrode 210R and the third pixel electrode 210B and are superimposed on the plurality of step correction layers DG and DG', and the second pixel PX2 may have a top surface that overlaps with the conductor ML of the second pixel electrode 210G. For example, the top surfaces of the lower portion of the first pixel electrode 210R and the third pixel electrode 210B that overlap with the plurality of step correction layers DG and DG' may be formed higher than other top surfaces of the lower portion that do not overlap with the plurality of step correction layers DG and DG'. As an additional example, the top surface of the lower portion of the second pixel electrode 210G that overlaps with the conductor ML may be formed higher than another top surface of the lower portion that does not overlap with the conductor ML.

[0167] According to an exemplary embodiment of the present invention, the lower top surfaces of the first pixel electrode 210R, the second pixel electrode 210G, and the third pixel electrode 210B that overlap with the top surfaces of the first electrode layers 1175R, 1175G, and 1175B exposed by the first contact hole 1163R, the second contact hole 1163G, and the third contact hole 1163B can be uniformly formed such that they are farther away from the first emission region EA1, the second emission region EA2, and the third emission region EA3 than the higher top surfaces of the first pixel electrode 210R, the second pixel electrode 210G, and the third pixel electrode 210B that overlap with the first electrode layers 1175R, 1175G, and 1175B exposed by the first contact hole 1163R, the second contact hole 1163G, and the third contact hole 1163B, respectively.

[0168] In an exemplary embodiment of the present invention, the first intermediate layer 220R can emit red light, the second intermediate layer 220G can emit green light, and the third intermediate layer 220B can emit blue light. In an exemplary embodiment of the present invention, the first intermediate layer 220R and the third intermediate layer 220B can emit green light, and the second intermediate layer 220G can emit either red or blue light.

[0169] In an exemplary embodiment of the present invention, a plurality of step correction layers DG and DG' may be arranged in the first pixel PX1 and the third pixel PX3. In this case, the first pixel electrode 210R of the first pixel PX1 and the third pixel electrode 210B of the third pixel PX3 extend in a direction opposite to the extending direction of the second pixel electrode 210G of the second pixel PX2. In this case, the descending directions of the first step h1, the second step h2, and the third step h3 of the first pixel electrode 210R, the second pixel electrode 210G, and the third pixel electrode 210B may be uniformly formed to move away from the first emission region EA1, the second emission region EA2, and the third emission region EA3.

[0170] For example, external light or similar objects advancing toward the inner surface of the substrate 100 can be reflected by the first step h1, second step h2, and third step h3 of the first pixel electrode 210R, the second pixel electrode 210G, and the third pixel electrode 210B in a direction away from the first organic light-emitting diode OLED1, the second organic light-emitting diode OLED2, and the third organic light-emitting diode OLED3. Accordingly, the direction in which the external light or similar objects are reflected can be the same, and thus, the separation of magenta and green, which are a mixture of red and blue, can be improved.

[0171] Figure 9 This is a plan view of the pixel circuit PC of the display device 1 according to an exemplary embodiment of the present invention. Figure 10A It is along Figure 9 A schematic cross-sectional view of display device 1 taken by line V-V'. Figure 10B It is along Figure 9 A schematic cross-sectional view of display device 1 taken by line VI-VI', and Figure 10C It is along Figure 9 A schematic cross-sectional view of display device 1 taken by line V-V'. Figure 9 , Figure 10A , Figure 10B and Figure 10C In, with Figure 5 , Figure 6A and Figure 6B The same reference numerals in the figures can indicate Figure 5 , Figure 6A and Figure 6B The same components or elements in the same text, and their redundant descriptions can be omitted.

[0172] In an exemplary embodiment of the invention, a conductor ML disposed between the substrate 100 and the step correction layer DG to extend in a third direction (e.g., the x-direction) may be disconnected at a portion overlapping with the contact hole 1163. For example, the conductor ML may include an opening or a gap, and the contact hole 1163 may overlap with an opening or gap in the conductor ML.

[0173] Reference Figure 9 , Figure 10A and Figure 10B Since the conductor ML does not overlap with the lower part of the contact hole 1163 formed in the planarization layer 117 and partially exposes the electrode layer 1175, the conductor ML is not present in the lower part of the contact hole 1163, and only the step correction layer DG can be arranged to partially overlap with the lower part of the contact hole 1163.

[0174] The wire ML, which breaks at the portion overlapping with contact hole 1163, can be connected to the step correction layer DG via a plurality of contact holes 1140a and 1140b formed in the second gate insulating layer 113. For example, the step correction layer DG can be used as a bridge to the broken wire ML. In an exemplary embodiment of the invention, the wire ML can be configured to transmit a transmit control signal En (see...). Figure 4 The transmit control line EL, and the transmit control signal En can be transmitted to the transmit control TFT T6 through multiple contact holes 1140a and 1140b and the step correction layer DG during travel along the disconnected wire ML.

[0175] like Figure 6A As described above, when a step correction layer DG is included that partially overlaps with the contact hole 1163, an interlayer insulating layer 115 disposed on the step correction layer DG may be formed along the shape of the step correction layer DG, and an electrode layer 1175 disposed on the interlayer insulating layer 115 and connected to the emission control drain electrode D6 of the emission control TFT T6 may also be formed along the shape of the step correction layer DG.

[0176] The pixel electrode 210 can contact the electrode layer 1175 through the contact hole 1163, and the portion of the pixel electrode 210 that contacts the electrode layer 1175 can be formed along the shape of the step correction layer DG. In other words, the top surface of the pixel electrode 210 that overlaps with the wire ML can be lower than the top surface of the pixel electrode 210 that overlaps with the step correction layer DG.

[0177] The pixel electrode 210 may extend in the +y direction, and the opening OP of the pixel defining layer 119 may be positioned on the side in the +y direction relative to the contact hole 1163, and the pixel electrode 210 may have a step h that is reduced in the +y direction due to the step correction layer DG.

[0178] In other words, the lower top surface of the top surface of the pixel electrode 210 that overlaps with the electrode layer 1175 exposed by the contact hole 1163 may be adjacent to the emission region EA, and the step h of the pixel electrode 210 may have an inclined surface N that is inclined toward the emission region EA.

[0179] According to an exemplary embodiment of the present invention, when a step correction layer DG is included, disposed between the substrate 100 and the interlayer insulating layer 115 and partially overlapping with the contact hole 1163, the direction of the step h of the pixel electrode 210 in the contact hole 1163 can be adjusted by the step correction layer DG, and the direction of external light or the like reflected by the pixel electrode 210 can be adjusted.

[0180] although Figure 10A The diagram shows an interlayer insulating layer 115 disposed between the electrode layer 1175 and the step correction layer DG, but as... Figure 10CAs shown, the interlayer insulating layer 115 may include a first interlayer insulating layer 115a and a second interlayer insulating layer 115b, and the step correction layer DG may be disposed on the first interlayer insulating layer 115a. The pixel electrode 210 may contact the second electrode layer 1175b through a contact hole 1163, and the second electrode layer 1175b may be connected to the first electrode layer 1175a through the contact hole 1153 formed in the second interlayer insulating layer 115b. The step correction layer DG may be disposed on the same layer as the first electrode layer 1175a, and the step correction layer DG may include the same material as the first electrode layer 1175a.

[0181] although Figure 10C The conductor ML is shown positioned below contact hole 1163, but this is to illustrate that conductor ML connects to step correction layer DG via contact hole 1140a. Figure 10A As shown, there is no wire ML overlapping with contact hole 1163, and as... Figure 10B As shown, the disconnected wire ML is connected to the step correction layer DG through multiple contact holes 1140a and 1140b.

[0182] Figure 11A It is along Figure 7A A schematic cross-sectional view of display device 1 taken by line III-III', and Figure 11B It is along Figure 8A A schematic cross-sectional view of display device 1 taken by line IV-IV'. Figure 11A and Figure 11B In, with Figure 7B and Figure 8B The same reference numerals in the figures indicate the same reference numerals. Figure 7B and Figure 8B The same components or elements in the same text, and their redundant descriptions can be omitted.

[0183] Figure 11A and Figure 11B Corresponding to Figure 7B and Figure 8B An exemplary implementation of the modification, and based on the... Figure 7B and Figure 8B The differences are described.

[0184] Reference Figure 11AIn an exemplary embodiment of the present invention, the step correction layer DG may be arranged to partially overlap with the second contact hole 1163G of the second pixel PX2. In this case, the pixel electrode 210G of the second pixel PX2 extends in a direction different from the extending directions of the first pixel electrode 210R and the third pixel electrode 210B of the first pixel PX1 and the third pixel PX3. The wire ML disposed between the substrate 100 and the step correction layer DG may be disconnected at the portion overlapping with the second contact hole 1163G.

[0185] exist Figure 9 and Figure 10A As described above, the disconnected wire ML can be connected to the step correction layer DG through multiple contact holes 1140a and 1140b, and the emission control signal En can be transmitted to the emission control TFT T6.

[0186] Reference Figure 11B In an exemplary embodiment of the present invention, a plurality of step correction layers DG and DG' may be arranged to partially overlap with the first contact hole 1163R of the first pixel PX1 and the third contact hole 1163B of the third pixel PX3. In this case, the first pixel electrode 210R and the third pixel electrode 210B of the first pixel PX1 and the third pixel PX3 extend in a direction different from the extending direction of the second pixel electrode 210G of the second pixel PX2. The wire ML disposed between the substrate 100 and the plurality of step correction layers DG and DG' may be disconnected at the portions overlapping with the first contact hole 1163R and the third contact hole 1163B, respectively.

[0187] In the case of the first pixel PX1, the disconnected wire ML can pass through multiple contact holes 1140a and 1140b (see... Figure 10B The wire ML is connected to the first step correction layer DG, and in the case of the third pixel PX3, the disconnected wire ML can be connected to the second step correction layer DG' through the contact hole 1140a'. Accordingly, the wire ML can transmit the emission control signal En to the emission control TFT T6 without interruption.

[0188] although Figure 11A and Figure 11B The diagram shows the wire ML positioned below the first contact hole 1163R, the second contact hole 1163G, and the third contact hole 1163B, but this is to illustrate that the wire ML connects to multiple step correction layers DG and DG' via contact holes 1140a and 1140a'. Figure 10A As shown, the wire ML that overlaps with the contact hole 1163 can be omitted.

[0189] The display device 1 according to an exemplary embodiment of the present invention may include a step correction layer DG disposed between a substrate 100 and a planarization layer 117 serving as an insulating layer, and the step correction layer DG and the contact hole 1163 (see, for example) Figure 10A The surfaces partially overlap. Accordingly, since the steps h of the pixel electrodes 210 located in the contact holes 1163 of the pixel PX can be oriented in the same direction, color separation can be improved. For example, the steps h of the pixel electrodes 210 can face their respective emission regions or can be opposite to their respective emission regions.

[0190] A display device has been described, but the invention is not limited thereto. For example, methods of manufacturing the display device are also included within the scope of this disclosure.

[0191] According to the exemplary embodiments of the present invention described above, a display device can be realized that improves the phenomenon of color separation caused by reflected light. The scope of the present invention is not limited to these effects.

[0192] Although the present invention has been described with reference to exemplary embodiments thereof, it will be understood by those skilled in the art that various changes in form and detail may be made without departing from the scope and spirit of the invention.

Claims

1. A display device comprising: a first thin film transistor and a second thin film transistor each arranged over a substrate, wherein the first thin film transistor includes a first electrode layer and the second thin film transistor includes a second electrode layer; an insulating layer having a first contact hole and a second contact hole that respectively expose a portion of the first electrode layer and a portion of the second electrode layer; a first pixel electrode arranged over the insulating layer and connected to the first thin film transistor through the first contact hole; and a second pixel electrode arranged over the insulating layer and connected to the second thin film transistor through the second contact hole, wherein a top surface of the first pixel electrode overlapping with the first electrode layer in the first contact hole has a first step facing a first direction, and a top surface of the second pixel electrode overlapping with the second electrode layer in the second contact hole has a second step facing a second direction opposite to the first direction.

2. The display device according to claim 1, further comprising: a step correction layer arranged between the substrate and the insulating layer and at least partially overlapping with the first contact hole.

3. The display device according to claim 2, further comprising: a wire arranged between the substrate and the step correction layer and extending in a third direction crossing the first direction and the second direction, and wherein the wire overlaps with a portion of the first contact hole and a portion of the second contact hole.

4. The display device of claim 3, wherein, a top surface of a portion of the first pixel electrode overlapping with the wire is lower than a top surface of a portion of the first pixel electrode overlapping with the step correction layer.

5. The display device of claim 3, wherein, the wire overlaps with the step correction layer.

6. The display device of claim 3, wherein, the wire is an emission control line.

7. The display device of claim 3, wherein, the wire is broken at the first contact hole.

8. The display device according to claim 7, further comprising: a gate insulating layer arranged between the step correction layer and the wire and having a third contact hole and a fourth contact hole each exposing a portion of the wire, and wherein the step correction layer is connected to the wire through the third contact hole and the fourth contact hole.

9. The display device of claim 2, wherein, the first pixel electrode extends in the first direction, and the second pixel electrode extends in the second direction.

10. The display device according to claim 9, further comprising: a pixel defining film having a first opening and a second opening, wherein the first opening forms a first emission area of the first pixel electrode and the second opening forms a second emission area of the second pixel electrode, and wherein the first opening is positioned on a side portion in the first direction with respect to the first contact hole and the second opening is positioned on a side portion in the second direction with respect to the second contact hole.

11. The display device of claim 10, wherein, the first step has a first inclined surface inclined toward the first direction, and the second step has a second inclined surface inclined toward the second direction. the first step has a first inclined surface inclined toward the first direction, and the second step has a second inclined surface inclined toward the second direction.

12. The display device according to claim 9, further comprising: first and second intermediate layers arranged over the first and second pixel electrodes, respectively; and a counter electrode covering the first and second intermediate layers, wherein the second intermediate layer emits red or blue light when the first intermediate layer emits green light, and the second intermediate layer emits green light when the first intermediate layer emits red or blue light.

13. The display device of claim 2, wherein, the first thin film transistor includes a semiconductor layer and a gate electrode overlapping the semiconductor layer, wherein the display device further comprises: an upper electrode of a storage capacitor arranged over and overlapping the gate electrode, and wherein the step correction layer is arranged on the same layer as the upper electrode.

14. The display device of claim 13, wherein, the first thin film transistor overlaps the storage capacitor, and the gate electrode corresponds to a lower electrode of the storage capacitor.

15. The display device of claim 2, wherein, the first thin film transistor further includes a third electrode layer arranged between the substrate and the first electrode layer, and wherein the step correction layer is arranged on the same layer as the third electrode layer.

16. The display device of claim 15, wherein, the first thin film transistor includes a semiconductor layer and a gate electrode overlapping the semiconductor layer, and the third electrode layer connects the semiconductor layer to the first electrode layer.

17. The display device of claim 2, wherein, the step correction layer is separate from the first thin film transistor.

18. The display device of claim 2, wherein, the first pixel electrode extends in the second direction, and the second pixel electrode extends in the first direction.

19. The display device according to claim 18, further comprising: a pixel defining film having first and second openings, wherein the first opening forms a first emission area of the first pixel electrode and the second opening forms a second emission area of the second pixel electrode, wherein the first opening is positioned on a side in the second direction with respect to the first contact hole, the second opening is positioned on a side in the first direction with respect to the second contact hole, and wherein the first step has a first inclined surface inclined toward the first direction, and the second step has a second inclined surface inclined toward the second direction.

20. The display device according to claim 18, further comprising: first and second intermediate layers arranged over the first and second pixel electrodes, respectively; and a counter electrode covering the first and second intermediate layers, wherein the second intermediate layer emits green light when the first intermediate layer emits red or blue light, and the second intermediate layer emits red or blue light when the first intermediate layer emits green light.

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