Display device

Abstract

This application relates to a display device. The display device includes: a substrate including a first display area and a second display area including a transmissive area; a first pixel in the first display area; and a second pixel in the second display area, wherein the distance between a first sub-pixel in the first pixel and a second sub-pixel in the second pixel is set to a specific value, the first sub-pixel is adjacent to a boundary region between the first display area and the second display area, and the second sub-pixel is adjacent to the boundary region.

Description

[0001] Cross-references to related applications

[0002] This application claims the benefit of Korean Patent Application No. 10-2020-0012712, filed on February 3, 2020, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] One or more implementations relate to display devices. Background Technology

[0004] Recently, the applications of display devices have diversified. Furthermore, the increasing thinness and lightness of display devices has broadened their range of uses.

[0005] Because display devices can be used in a variety of ways, there are various methods to design the shape of display devices, and the number of functions that can be embedded in display devices or associated with display devices has increased. Summary of the Invention

[0006] One or more embodiments include a display device, which includes a first display area and a second display area. The first display area is a main display area, and the second display area may be equipped with electronic components that use light or sound.

[0007] Other aspects will be set forth in part in the description which follows, and in part will be apparent from the description, or may be learned by practice of the embodiments presented in this disclosure.

[0008] According to one or more embodiments, a display device includes: a substrate including a first display area and a second display area including a transmissive area; a first pixel in the first display area; and a second pixel in the second display area. The distance between a first sub-pixel in the first pixel and a second sub-pixel in the second pixel has a value based on pixel pitch. The first sub-pixel is adjacent to a boundary region between the first and second display areas and emits light of a first color. The second sub-pixel is adjacent to the boundary region, emits light of the first color, and a virtual line passing through the center of the first sub-pixel passes through the second sub-pixel.

[0009] The second sub-pixel can be the pixel that the virtual line in the second pixel first passes through.

[0010] The second pixel can be in units of pixel groups, where the transmissive region can surround the pixel group.

[0011] The structure of the second pixel that makes up the pixel group may be the same as or different from the structure of the first pixel.

[0012] The area of ​​each of the second pixels can be different from the area of ​​the first pixel corresponding to the second pixel.

[0013] The pixel pitch can be the center distance between the first pixels that emit green light in the first pixel.

[0014] Virtual lines can be parallel to data lines or scan lines connected to the second pixel.

[0015] The distance between the first sub-pixel and the second sub-pixel can be the shortest straight-line distance between the edge of the first sub-pixel and the edge of the second sub-pixel.

[0016] The distance between the first sub-pixel and the second sub-pixel can be greater than or equal to the pixel pitch.

[0017] The distance between the first sub-pixel and the second sub-pixel can be the shortest straight-line distance between a line passing through the center of the first sub-pixel and a line passing through the center of the second sub-pixel.

[0018] The distance between the first sub-pixel and the second sub-pixel can be within a specific range of twice the pixel pitch.

[0019] The distance between the first sub-pixel and the second sub-pixel can be within ±30% of twice the pixel pitch.

[0020] The display device may also include an inorganic insulating layer on a substrate, wherein the inorganic insulating layer may include openings corresponding to the transmission region and the boundary region.

[0021] The distance between the third sub-pixel in the first pixel and the fourth sub-pixel in the second pixel can be the minimum of the gap value of the pixel-limiting layer between the first pixels and the gap value of the pixel-limiting layer between the second pixels, or it can be a value greater than the minimum value. The third sub-pixel is adjacent to the boundary region and emits light of the second color. The fourth sub-pixel is adjacent to the boundary region, emits light of a color different from the second color, and a virtual line passing through the center of the third sub-pixel passes through the fourth sub-pixel.

[0022] According to one or more embodiments, a display device includes: a substrate including a first display area and a second display area including a transmissive area; a first pixel in the first display area; and a second pixel in the second display area, wherein the distance between a first sub-pixel in the first pixel and a second sub-pixel in the second pixel is greater than or equal to the minimum of the gap values ​​of the pixel-defining layers between the first pixels and the second pixels, the first sub-pixel is adjacent to a boundary region between the first display area and the second display area and emits light of a first color, the second sub-pixel is adjacent to the boundary region, emits light of a color different from the first color, and a virtual line passing through the center of the first sub-pixel passes through the second sub-pixel.

[0023] The second sub-pixel can be the pixel through which the virtual line in the second pixel first passes, and the virtual line can be parallel to the data line or scan line connected to the second pixel.

[0024] The second pixel can be a pixel group, wherein the transmissive region can surround the pixel group, and the structure of the second pixel constituting the pixel group can be different from the structure of the first pixel.

[0025] According to one or more embodiments, a display device includes: a substrate including a first display area and a second display area including a transmissive area; a first pixel in the first display area; and a second pixel in the second display area, wherein the center distance between a first sub-pixel in the first pixel and a second sub-pixel in the second pixel is within a specific range of twice the pixel pitch, the first sub-pixel is adjacent to a boundary region between the first and second display areas and emits light of a first color, the second sub-pixel is adjacent to the boundary region and emits light of the first color, and a virtual line passing through the center of the first sub-pixel passes through the second sub-pixel.

[0026] The second pixel can be a pixel group, wherein the transmissive region can surround the pixel group, and the structure of the second pixel constituting the pixel group can be the same as or different from the structure of the first pixel.

[0027] The pixel pitch can be the center distance between the first pixels that emit green light in the first pixel, and the virtual line can be parallel to the data line or scan line connected to the second pixel. Attached Figure Description

[0028] The above and other aspects and features of certain embodiments of this disclosure will become more apparent from the following description taken in conjunction with the accompanying drawings.

[0029] Figure 1A and Figure 1B This is a schematic perspective view of a display device according to an embodiment.

[0030] Figure 2 This is a schematic cross-sectional view of a display device according to an embodiment.

[0031] Figure 3 This is a schematic plan view of the display panel according to the embodiment.

[0032] Figure 4A and Figure 4B These are equivalent circuit diagrams of the first pixel and / or the second pixel of the display panel according to the implementation method.

[0033] Figure 5 This is a view showing an example of a mask used for depositing organic materials.

[0034] Figure 6 This is a plan view showing portions of the first and second display areas according to an embodiment.

[0035] Figure 7 It shows Figure 6 The pixel structure in the first display area.

[0036] Figure 8 It shows Figure 6 The pixel structure in the second display area.

[0037] Figure 9 and Figure 10 yes Figure 6 A magnified view of part A.

[0038] Figure 11 It is along Figure 7 The sectional view of the display device is taken from line II-II'.

[0039] Figure 12 It is along Figure 8 The cross-sectional view of the display device is taken from line III-III'.

[0040] Figure 13 This is a plan view showing portions of the first and second display areas according to an embodiment.

[0041] Figure 14A and Figure 14B It shows Figure 13 The pixel structure in the second display area.

[0042] Figure 15 , Figure 16 and Figure 17 yes Figure 13 A magnified view of part B. Detailed Implementation

[0043] Reference will now be made in detail to embodiments, examples of which are illustrated in the accompanying drawings, wherein the same reference numerals denote the same elements throughout. In this respect, embodiments may take different forms and should not be construed as limited to the description set forth herein. Therefore, embodiments are described below only with reference to the accompanying drawings to explain aspects of this specification. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. Throughout the disclosure, the expression “at least one of a, b, and c” means only a, only b, only c, both a and b, both a and c, both b and c, or all of a, b, and c.

[0044] One or more embodiments of this disclosure will now be described in more detail with reference to the accompanying drawings. Identical or corresponding elements are given the same reference numerals and are not related to the figure numbers, and redundant explanations are omitted.

[0045] It should be understood that although the terms "first," "second," etc., may be used to describe various elements in this document, different terms may be used to describe these elements. These terms are only used to distinguish one element from another.

[0046] As used in this article, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0047] It should also be understood that the terms “comprises” and / or “comprising” as used herein specify the presence of the said feature or element, but do not exclude the presence or addition of one or more other features or elements.

[0048] It should be understood that when a layer, region, or element is referred to as being "formed on" another layer, region, or element, it can be formed directly or indirectly on that other layer, region, or element. That is, for example, there can be intermediate layers, regions, or elements.

[0049] For ease of explanation, the dimensions of the elements in the accompanying drawings may be enlarged. In other words, for ease of explanation, the dimensions and thicknesses of the elements in the accompanying drawings are arbitrarily shown.

[0050] When a particular implementation can be carried out differently, the specific process sequence can be performed differently than the described sequence. For example, two consecutively described processes can be performed substantially simultaneously, or in the reverse order of the described sequence.

[0051] In the following implementation, "A and / or B" means A, B, or A and B. "At least one of A and B" means A, B, or A and B.

[0052] In the following embodiments, when layers, regions, or elements are connected to each other, they can be directly connected, or another layer, region, or element can be inserted between them. Therefore, layers, regions, or elements can be indirectly connected. For example, in the following embodiments, when layers, regions, or elements are electrically connected to each other, they can be directly electrically connected, or another layer, region, or element can be inserted between them. Therefore, layers, regions, or elements can be indirectly electrically connected.

[0053] The x-axis, y-axis, and z-axis are the three axes of a Cartesian coordinate system, but they can be interpreted in a broader sense. For example, the x-axis, y-axis, and z-axis can be perpendicular to each other, or they can represent different directions that are not perpendicular to each other.

[0054] Figure 1A and Figure 1B These are schematic perspective views of display devices 1 and 1' according to the embodiments.

[0055] Reference Figure 1A The display device 1 includes a first display area DA1 in which an image is implemented, a second display area DA2 in which an image is implemented, and a non-display area NDA in which no image is implemented. The display device 1 can provide a main image by using light emitted from a first pixel Pm in the first display area DA1.

[0056] Display device 1 includes a second display area DA2. (See later...) Figure 2 Described, the second display area DA2 may be an area under which a component such as a sensor or camera (e.g., an image sensor) using infrared light, visible light, or sound is positioned. The second display area DA2 may include a transmissive area TA capable of transmitting light and / or sound emitted from the component to the outside or traveling from the outside toward the component. In embodiments, when infrared light or visible light is transmitted through the second display area DA2, the transmittance in the second display area DA2 may be about 30% or greater, 50% or greater, 75% or greater, 80% or greater, 85% or greater, or 90% or greater.

[0057] The second pixel Pa can be located in the second display area DA2, and a specific image can be provided using light emitted from the second pixel Pa. The image provided by the second display area DA2 can be an auxiliary image. In one embodiment, the resolution in the second display area DA2 can be the same as the resolution in the first display area DA1. In another embodiment, the resolution in the second display area DA2 can be lower than the resolution in the first display area DA1. In other words, because the second display area DA2 includes a transmissive area TA capable of transmitting light and / or sound, the number of second pixels Pa per unit area can be less than the number of first pixels Pm per unit area in the first display area DA1.

[0058] Figure 1A A second display area DA2 is shown within a first display area DA1. In embodiments, there may be two or more second display areas DA2, and the shapes and sizes of the multiple second display areas DA2 may differ from each other.

[0059] exist Figure 1AIn the diagram, the second display area DA2 is shown as having a substantially circular shape. However, in the embodiment, in a plan view, i.e. when viewed in a direction perpendicular to the main surface of the substrate, the second display area DA2 can have one of a variety of shapes, such as circular, elliptical, polygonal (e.g., rectangular), star-shaped, and rhomboid.

[0060] The second display area DA2 may be at least partially surrounded by the first display area DA1. For example, as Figure 1A As shown, the second display area DA2 may be located on one side (e.g., the upper center) of the first display area DA1, which has a rectangular shape. In an embodiment, the second display area DA2 may be located on one side of the first display area DA1. Figure 1B The second display area DA2 is shown between the non-display area NDA and the first display area DA1.

[0061] The non-display area NDA can be the outer perimeter of the first display area DA1 and the second display area DA2. The non-display area NDA can be a region where no pixels are located. The first display area DA1 and the second display area DA2 can be completely surrounded by the non-display area NDA.

[0062] Organic light-emitting display devices are now shown and described as display device 1. In embodiments, display device 1 may be a display device such as an inorganic light-emitting display device, for example an inorganic electroluminescent (EL) display device or a quantum dot light-emitting display device. For example, the emitting layer of the display element in display device 1 may include organic materials, inorganic materials, quantum dots, organic materials and quantum dots, or inorganic materials and quantum dots.

[0063] Figure 2 This is a schematic cross-sectional view of the display device 1 according to the embodiment. Figure 2 Can correspond to along Figure 1A The cross section intercepted by line I-I'.

[0064] Reference Figure 2 The display device 1 may include a display panel 10 and a component 20 positioned to correspond to the second display area DA2. The display panel 10 includes display elements.

[0065] The display panel 10 may include a substrate 100, a display element layer 200 on the substrate 100, and a thin-film encapsulation layer 300, wherein the thin-film encapsulation layer 300 is an encapsulation component that seals the display element layer 200. The display panel 10 may also include a lower protective film 175 and a lower cover layer 185 located below the substrate 100.

[0066] The display element layer 200 may include a circuit layer, which includes thin-film transistors TFT and TFT', organic light-emitting diodes OLED and OLED' as display elements, and insulating layers IL and IL' between the thin-film transistors TFT and TFT' and the organic light-emitting diodes OLED and OLED'.

[0067] The first pixel Pm, including an organic light-emitting diode (OLED), can be in a first display area DA1, and the first pixel Pm can be connected to a pixel circuit including a thin-film transistor (TFT).

[0068] The second pixel Pa, including an organic light-emitting diode (OLED), can be in the second display area DA2, and the second pixel Pa can be connected to a pixel circuit including a thin-film transistor (TFT).

[0069] In the second display area DA2, a transmissive area TA can be positioned where no thin-film transistor TFT' and second pixel Pa are disposed. The transmissive area TA can be an area that transmits light / signals emitted by component 20 or light / signals incident on component 20.

[0070] Component 20 may be located in the second display area DA2. Component 20 may be an electronic component that uses light or sound. For example, component 20 may be a sensor that receives and uses light (e.g., an infrared sensor), a sensor that outputs and senses light or sound to measure distance or identify fingerprints, a small lamp that outputs light, a speaker that outputs sound, or an image sensor that captures images. Electronic components that use light may use light of various wavelength bands, such as visible light, infrared light, and ultraviolet light. Component 20 may be located in the second display area DA2. For example, both the light-emitting device and the light-receiving device of component 20 may be included in a single second display area DA2. Alternatively, both the light-emitting portion and the light-receiving portion may be included in a single component 20.

[0071] The metal layer BSM can be located in the second display area DA2. The metal layer BSM can correspond to the lower portion of the thin-film transistor TFT'. The metal layer BSM can be a light-blocking layer that blocks external light from reaching the thin-film transistor TFT', etc. For example, the metal layer BSM can block light emitted from component 20 from reaching the second pixel Pa. In some embodiments, a constant voltage or signal can be applied to the metal layer BSM to prevent damage to the pixel circuitry due to electrostatic discharge.

[0072] The thin-film encapsulation layer 300 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. Figure 2 A first inorganic encapsulation layer 310 and a second inorganic encapsulation layer 330 are shown, along with an organic encapsulation layer 320 between the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330.

[0073] Each of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may include one or more inorganic insulating materials, such as alumina, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and / or silicon oxynitride. The organic encapsulation layer 320 may include polymer-based materials. Examples of polymer-based materials may include acryloyl resins, epoxy resins, polyimides, and polyethylene.

[0074] The lower protective film 175 can be attached to the lower surface of the substrate 100 and can support and protect the substrate 100. The lower protective film 175 may include a material with high light transmittance. The lower protective film 175 may include polyethylene terephthalate (PET) or polyimide (PI).

[0075] The lower cover layer 185 may be located below the lower protective film 175. The lower cover layer 185 may include an opening 185OP corresponding to the second display area DA2. By including the opening 185OP in the lower cover layer 185, the light transmittance of the second display area DA2 can be improved. The lower cover layer 185 may include a light-blocking material. Therefore, external light that may be transmitted to the lower surface of the substrate 100 can be blocked.

[0076] The second display area DA2 can have a larger area than the area where component 20 is located. Therefore, the area of ​​the opening 185OP in the lower cover layer 185 can be different from the area of ​​the second display area DA2. For example, the area of ​​the opening 185OP can be smaller than the area of ​​the second display area DA2.

[0077] Furthermore, component 20 can be located in the second display area DA2. Component 20 can have different functions.

[0078] Although not shown, components such as input sensing elements for sensing touch input, anti-reflective elements including polarizers and delayers, color filters and black matrices, and transparent windows may be located on the display panel 10.

[0079] In this embodiment, the thin-film encapsulation layer 300 serves as an encapsulation component for sealing the display element layer 200. However, in this embodiment, an encapsulation substrate bonded to the substrate 100 by a sealant or glass frit can be used as a component for sealing the display element layer 200.

[0080] Figure 3 This is a schematic plan view of the display panel 10 according to the embodiment.

[0081] Reference Figure 3 The display panel 10 may include a substrate 100. First pixels Pm may be located on a first display area DA1 of the substrate 100. Each of the first pixels Pm may include a display element, such as... Figure 2The organic light-emitting diode (OLED) in the image. Each of the first pixels Pm can emit red, green, blue, or white light through the OLED.

[0082] The second display area DA2 may be on one side of or surrounded by the first display area DA1, and the second pixel Pa may be on the second display area DA2 of the substrate 100. Each of the second pixels Pa may include a display element, such as... Figure 2 The second pixel Pa is an organic light-emitting diode (OLED). Each of the second pixels Pa can emit red, green, blue, or white light through the OLED. A transmissive region TA located between the second pixels Pa can be provided in the second display area DA2. At least one component can be located under the second display area DA2 of the substrate 100.

[0083] In some embodiments, when the second display area DA2 includes a transmissive area TA, the resolution of the second display area DA2 can be less than the resolution of the first display area DA1. For example, the resolution of the second display area DA2 can be approximately half the resolution of the first display area DA1. In some embodiments, the resolution of the first display area DA1 can be 400 ppi or greater, and the resolution of the second display area DA2 can be approximately 200 ppi. In some embodiments, the structure of the pixel circuit driving the second pixel Pa of the second display area DA2 and the wiring for transmitting signals to the pixel circuit are different from the structure of the pixel circuit driving the first pixel Pm and the wiring for transmitting signals to the pixel circuit. Therefore, the second display area DA2 can have the same resolution as the first display area DA1 while having a transmissive area TA.

[0084] The first pixel Pm and the second pixel Pa can be electrically connected to the driving circuit in the non-display area NDA. In the non-display area NDA, the first scan driving circuit 110, the second scan driving circuit 120, the terminal 140, the data driving circuit 150, the first power line 160, and the second power line 170 can be located.

[0085] The first scan driving circuit 110 can provide scan signals to the first pixel Pm and the second pixel Pa via scan line SL. The first scan driving circuit 110 can also provide transmission control signals to each pixel via transmission control line EL. The second scan driving circuit 120 can be connected in parallel with the first scan driving circuit 110, wherein the first display area DA1 is located between the second scan driving circuit 120 and the first scan driving circuit 110. Some of the first pixels Pm in the first display area DA1 and some of the second pixels Pa in the second display area DA2 can be electrically connected to the first scan driving circuit 110, and other pixels can be electrically connected to the second scan driving circuit 120. In some embodiments, the second scan driving circuit 120 can be omitted.

[0086] Terminal 140 may be located on one side of substrate 100. Terminal 140 may be exposed and electrically connected to a printed circuit board (PCB) without being covered by an insulating layer. Terminal PCB-P of the PCB may be electrically connected to terminal 140 of display panel 10. The PCB transmits signals or power from the controller to display panel 10. Control signals generated by the controller may be transmitted through the PCB to the first scan drive circuit 110 and the second scan drive circuit 120. The controller may provide a first power supply voltage ELVDD and a second power supply voltage ELVSS (e.g., see [reference]) to the first power supply line 160 and the second power supply line 170, respectively, via the first connection line 161 and the second connection line 171. Figure 4A and Figure 4B A first power supply voltage ELVDD can be supplied to each of the first pixel Pm and the second pixel Pa via a power supply voltage line PL connected to the first power supply line 160. A second power supply voltage ELVSS can be supplied to the opposite electrodes of each of the first pixel Pm and the second pixel Pa connected to the second power supply line 170.

[0087] The data driving circuit 150 is electrically connected to the data line DL. The data signal of the data driving circuit 150 can be provided to each of the first pixel Pm and the second pixel Pa through the connection line 151 connected to the terminal 140 and the data line DL connected to the connection line 151. Figure 3 The diagram shows the data driving circuit 150 located on a printed circuit board (PCB). However, in some embodiments, the data driving circuit 150 may be located on the substrate 100. For example, the data driving circuit 150 may be located between terminal 140 and the first power line 160.

[0088] The first power line 160 may include a first sub-line 162 and a second sub-line 163, which extend parallel to each other in the x-direction, and the first display area DA1 is located between the first sub-line 162 and the second sub-line 163. The second power line 170 may partially surround the first display area DA1 in an annular shape having an open side.

[0089] Figure 4A and Figure 4B This is an equivalent circuit diagram of the first pixel Pm and / or the second pixel Pa of the display panel according to the embodiment.

[0090] Reference Figure 4A Each of the first pixel Pm and the second pixel Pa may include an organic light-emitting diode (OLED). The OLED may be connected to a pixel circuit PC, which is connected to a scan line SL and a data line DL. The pixel circuit PC includes a first transistor T1, a second transistor T2, and a capacitor Cst. The first transistor T1 and the second transistor T2 may be thin-film transistors.

[0091] The second transistor T2, acting as a switching transistor, is connected to the scan line SL and the data line DL, and transmits the data signal DATA input through the data line DL to the first transistor T1 according to the scan signal Sn input through the scan line SL.

[0092] The capacitor Cst is connected to the second transistor T2 and the power supply voltage line PL, and stores the voltage corresponding to the difference between the voltage received from the second transistor T2 and the first power supply voltage ELVDD supplied to the power supply voltage line PL, which is sometimes referred to as the drive voltage.

[0093] The first transistor T1, acting as the driving transistor, is connected to the power supply voltage line PL and the capacitor Cst. The driving current flowing from the power supply voltage line PL to the organic light-emitting diode (OLED) can be controlled based on the voltage value stored in the capacitor Cst. The OLED can emit light with a certain brightness according to the driving current. The opposite electrode (e.g., the cathode) of the OLED can receive a second power supply voltage ELVSS.

[0094] Figure 4A The diagram illustrates a pixel circuit PC comprising two transistors T1 and T2 and a capacitor Cst. (Example...) Figure 4B As shown in the illustration, in an embodiment, the pixel circuit PC may include seven transistors T1, T2, T3, T4, T5, T6 and T7, and a capacitor Cst.

[0095] Reference Figure 4BThe pixel circuit PC includes a first transistor T1 to a seventh transistor T7, and the first transistor T1 to the seventh transistor T7 can be thin-film transistors.

[0096] The pixel circuit PC can be connected to the first scan line SL1 that sends the scan signal Sn, the second scan line SL2 that sends the previous scan signal Sn-1, the third scan line SL3 that sends the next scan signal Sn+1, the transmit control line EL that sends the transmit control signal EM, and the data line DL that sends the data signal DATA.

[0097] The power supply voltage line PL transmits the first power supply voltage ELVDD to the first transistor T1, and the initialization voltage line VIL transmits the initialization voltage VINT used to initialize the first transistor T1 and the organic light-emitting diode OLED to the gate electrode of the first transistor T1 and the organic light-emitting diode OLED.

[0098] The first scan line SL1, the second scan line SL2, the third scan line SL3, the transmit control line EL, and the initialization voltage line VIL extend in the x-direction and may be spaced apart from each other in each row. The data line DL and the power supply voltage line PL extend in the y-direction and may be spaced apart from each other in each column.

[0099] The first transistor T1 is connected to the power supply voltage line PL via the fifth transistor T5, and is electrically connected to the organic light-emitting diode (OLED) via the sixth transistor T6. As a driving transistor, the first transistor T1 receives the data signal DATA according to the switching operation of the second transistor T2, and provides a driving current I to the OLED. oled .

[0100] The second transistor T2 is connected to the first scan line SL1 and the data line DL, and is turned on according to the scan signal Sn received through the first scan line SL1, and performs a switching operation to send the data signal DATA received from the data line DL to node N.

[0101] The third transistor T3 is connected to the organic light-emitting diode (OLED) via the sixth transistor T6. The third transistor T3 is turned on according to the scan signal Sn received through the first scan line SL1, and therefore, the first transistor T1 is diode-connected.

[0102] The fourth transistor T4 is turned on according to the previous scan signal Sn-1 received through the second scan line SL2, and is configured to send the initialization voltage VINT received from the initialization voltage line VIL to the gate electrode of the first transistor T1 to initialize the gate voltage of the first transistor T1.

[0103] The fifth transistor T5 and the sixth transistor T6 are simultaneously turned on according to the transmit control signal EM received through the transmit control line EL, forming a current path, thus enabling the drive current I... oled The power supply voltage line PL can flow to the organic light-emitting diode (OLED).

[0104] The seventh transistor T7 is turned on according to the next scan signal Sn+1 received via the third scan line SL3, and is configured to transmit the initialization voltage VINT received from the initialization voltage line VIL to the organic light-emitting diode OLED to initialize the OLED. The seventh transistor T7 can be omitted.

[0105] The capacitor Cst is connected to the power supply voltage line PL and the gate electrode of the first transistor T1, and the voltage applied to the gate electrode of the first transistor T1 can be maintained by storing and holding the voltage corresponding to the difference between the voltages across the capacitor Cst.

[0106] An organic light-emitting diode (OLED) includes a pixel electrode and a counter electrode, and the counter electrode can receive a second power supply voltage, ELVSS. The OLED receives a drive current I from a first transistor T1. oled It emits light to display the image.

[0107] exist Figure 4B In the diagram, the third transistor T3 and the fourth transistor T4 are shown as having dual gate electrodes. However, each of the third transistor T3 and the fourth transistor T4 may have a single gate electrode. Figure 4B In the diagram, the seventh transistor T7 is shown receiving the next scan signal Sn+1 via the third scan line SL3. However, the seventh transistor T7 can also be connected to the second scan line SL2 and receive the previous scan signal Sn-1.

[0108] In this embodiment, the first pixel Pm and the second pixel Pa can have the same pixel circuit PC. However, in another embodiment, the first pixel Pm and the second pixel Pa can have pixel circuits with different structures. For example, the first pixel Pm can use... Figure 4B The pixel circuit PC, and the second pixel Pa can be adopted Figure 4A The pixel circuit PC.

[0109] Figure 5 This is a view showing an example of a mask M used for depositing organic materials.

[0110] Reference Figure 5The mask M may include a first mask opening 610 corresponding to the first display area DA1 and a second mask opening 620 corresponding to the second display area DA2. Depending on the positions of the first pixel Pm and the second pixel Pa, the first mask opening 610 and the second mask opening 620 may be spaced apart from each other in the x and y directions.

[0111] A first pixel Pm can be formed by depositing an emission layer in the first display area DA1 through each of the first mask openings 610, and a second pixel Pa can be formed by depositing an emission layer in the second display area DA2 through each of the second mask openings 620. The first pixel Pm and the second pixel Pa formed through the first mask openings 610 and the second mask openings 620 can be sub-pixels that emit light of the same color. The first mask openings 610 and the second mask openings 620 can each have a polygonal shape with rounded corners.

[0112] exist Figure 5 For ease of description, an example is shown where the shape, size, and structure of the first mask opening 610 are identical to those of the second mask opening 620. However, the shape, size, and structure of the first mask opening 610 and the second mask opening 620 can be varied depending on the shape, size, and structure of the first pixel Pm of the first display area DA1 and the second pixel Pa of the second display area DA2, which emit light of the same color. The dimensions of the first pixel Pm and the second pixel Pa can be the dimensions or areas of pixel electrodes or emitting regions.

[0113] The stability of the distance between mask openings can affect the quality of mask M. Specifically, when the display device has different display areas (i.e., a first display area DA1 and a second display area DA2), the distance Dm between the openings of the first display area DA1 and the second display area DA2 at the boundary between them must be greater than or equal to a specific distance. Therefore, it is important to arrange sub-pixels emitting the same color of light at the boundary between the first display area DA1 and the second display area DA2.

[0114] In the following description, in this embodiment, the first pixel Pm and the second pixel Pa, which are corresponding to each other, can be sub-pixels that emit light of the same color. For example, Figure 7 and Figure 8 The first red pixel Pmr and the second red pixel Par, the first green pixel Pmg and the second green pixel Pag, and the first blue pixel Pmb and the second blue pixel Pab shown can be corresponding sub-pixels.

[0115] In embodiments of this disclosure, the distance between a first pixel Pm and a second pixel Pa adjacent to the boundary region between the first display area DA1 and the second display area DA2 can be optimized. Therefore, defects in the boundary region between the first display area DA1 and the second display area DA2 can be reduced. Hereinafter, the distance between the first pixel Pm and the second pixel Pa refers to the distance between the first pixel Pm and the second pixel Pa adjacent to the boundary region. The distance between the first pixel Pm and the second pixel Pa can be the distance between the first pixel Pm and the second pixel Pa on a first virtual line parallel to the x-direction or y-direction passing through the center of the second pixel Pa, or on a second virtual line parallel to the first virtual line.

[0116] In an implementation, when a first virtual line parallel to the x-direction or y-direction is set, passing through the center of a second pixel Pa adjacent to the boundary region, the distance between the edge of the second pixel Pa on the first virtual line and the edge of the first pixel Pm that the first virtual line first passes through (hereinafter referred to as the "edge distance") can be determined to a specific value. The edge distance may include a first edge distance ED1 (for example, see...). Figure 9 and Figure 15 ) and the second edge distance ED2 (for example, see Figure 15 When the first pixel Pm and the second pixel Pa on the first virtual line are corresponding sub-pixels, the edge distance is the first edge distance ED1. When the first pixel Pm and the second pixel Pa on the first virtual line are sub-pixels emitting different colors of light, the edge distance is the second edge distance ED2. In this case, the edge of the pixel refers to the edge of the emission region.

[0117] In the implementation, when a first virtual line parallel to the x-direction or y-direction is set through the center of the second pixel Pa adjacent to the boundary region, the distance between the centers of the corresponding first pixel Pm and second pixel Pa on the first virtual line or the second virtual line (hereinafter referred to as center distance CD3 and CD3' (see, for example, see...) Figure 10 and Figure 16 The center of the pixel can be determined to be a specific value. In this case, the center of the pixel refers to the center of the emission region.

[0118] Figure 6 This is a plan view showing portions of the first display area DA1 and the second display area DA2 according to an embodiment. Figure 7 The pixel structure in the first display area DA1 is shown. Figure 8 The pixel structure in the second display area DA2 is shown. Figure 9 and Figure 10 yes Figure 6 A magnified view of part A. Figure 11 It is along Figure 7The sectional view of the display device is taken from line II-II'. Figure 12 It is along Figure 8 The cross-sectional view of the display device is taken from line III-III'.

[0119] In this disclosure, the pixel structure will be described based on the emission region of each sub-pixel. The emission region of a sub-pixel may be defined by an opening in a pixel-defining layer, which will be described later.

[0120] Reference Figure 6 A first display area DA1 may surround a second display area DA2, and a boundary area BR may be set between the first display area DA1 and the second display area DA2. The boundary area BR may surround the second display area DA2, and the first display area DA1 may surround the boundary area BR.

[0121] Reference Figure 7 The first pixel Pm may be located in the first display area DA1. Each of the first pixels Pm may include a display element such as an organic light-emitting diode (OLED). The first pixel Pm may be a sub-pixel that emits red, green, blue, or white light. The first pixel Pm may include a first red pixel Pmr that emits red light, a first green pixel Pmg that emits green light, and a first blue pixel Pmb that emits blue light. The first red pixel Pmr and the first blue pixel Pmb may be larger than the first green pixel Pmg.

[0122] The first green pixel Pmg can be repeatedly positioned in the first sub-row SR1 of each row Ri, and the first red pixel Pmr and the first blue pixel Pmb can be alternately positioned in the second sub-row SR2. That is, in each row Ri, the first pixel Pm can be repeatedly positioned in the order of the first red pixel Pmr, the first green pixel Pmg, the first blue pixel Pmb, and the first green pixel Pmg in the x-direction. The pixel definition layer 119 between the first red pixel Pmr and the first green pixel Pmg (see, for example, see...) Figure 11 The first green pixel Pmg and the first blue pixel Pmb may have a first width (e.g., gap) d1a, and the pixel defining layer 119 between the first green pixel Pmg and the first blue pixel Pmb may have a second width d1b.

[0123] The first red pixel Pmr and the first blue pixel Pmb can be alternately located in the first sub-column SC1 of each column Cj, and the first green pixel Pmg can be repeatedly located in the second sub-column SC2.

[0124] First pixels Pm can constitute pixel units PmU. Each pixel unit PmU may include at least two first pixels Pm. In an embodiment, first pixel unit PmU1 may include a first red pixel Pmr and a first green pixel Pmg, and second pixel unit PmU2 may include a first blue pixel Pmb and a first green pixel Pmg. Each of the pixel units PmU in the first display area DA1 may have a pixel pitch PP. In this disclosure, the pixel pitch PP may be the center distance between the first green pixels Pmg.

[0125] Figure 7 The pixel structure is called the PenTile matrix structure, and in this case, high resolution can be achieved with a small number of pixels by using a rendering-driven scheme that shares adjacent pixels to render colors.

[0126] Despite Figure 7 The image shows the first pixel Pm of the PenTile type, but the first pixel Pm can be a bar shape or various other shapes.

[0127] Reference Figure 8 The second pixel Pa can be located in the second display area DA2. Each of the second pixels Pa can include a display element such as an organic light-emitting diode (OLED). The second pixel Pa can be a sub-pixel that emits red, green, blue, or white light. The second pixel Pa can include a second red pixel Par that emits red light, a second green pixel Pag that emits green light, and a second blue pixel Pab that emits blue light.

[0128] The second display area DA2 may include a pixel group PG and a transmissive area TA, wherein the pixel group PG includes at least one second pixel Pa. The pixel group PG and the transmissive area TA may be alternately positioned in the x and y directions, and may be, for example, a grid shape. In this case, multiple pixel groups PG and multiple transmissive areas TA may be provided.

[0129] A pixel group PG can be defined as a set of pixels in which the second pixel Pa is grouped within a preset unit. Figure 8 In the original text, pixel group PG is defined as comprising eight second pixels Pa. However, in an implementation, the number of second pixels Pa in pixel group PG can be designed to be modified according to the resolution of the second display area DA2.

[0130] The structure of the second pixel Pa in the pixel group PG of the second display area DA2 can be the same as the structure of the first pixel Pm of the first display area DA1. In this case, the area (e.g., size) of each of the second pixels Pa can be the same as or different from the area (e.g., size) of each of the first pixels Pm corresponding to the second pixel Pa. The second pixel Pa can constitute a pixel unit PaU. Each of the pixel units PaU can include at least two second pixels Pa. In an embodiment, the first pixel unit PaU1 can include a second red pixel Par and a second green pixel Pag, and the second pixel unit PaU2 can include a second blue pixel Pab and a second green pixel Pag. Each of the pixel units PaU in the second display area DA2 can have a pixel pitch PP. Each pixel group PG can include two first pixel units PaU1 and two second pixel units PaU2. The pixel defining layer 119 between the second red pixel Par and the second green pixel Pag (e.g., see...) Figure 12 The pixel-defining layer 119 between the second green pixel Pag and the second blue pixel Pab may have a third width d2a, and may have a fourth width d2b.

[0131] The transmissive region TA can be on one side of the pixel group PG. The second pixel Pa may not be in the transmissive region TA. That is, the pixel electrode, intermediate layer, and opposite electrode constituting the OLED', as well as the pixel circuitry electrically connected to the OLED', are not in the transmissive region TA. Of course, some signal lines PL, DL, SL, and EL (see, for example, for providing signals to the second pixel Pa located in the second display region DA2) are used. Figure 4A and Figure 4B The signal lines PL, DL, SL, and EL can be positioned to intersect the transmission region TA. However, even in this case, to increase the transmittance of the transmission region TA, the signal lines PL, DL, SL, and EL can be positioned to bypass the central portion of the transmission region TA and biased to one side.

[0132] Return to reference Figure 6 In the first display area DA1, the first pixel unit PmU1 and the second pixel unit PmU2 can be alternately positioned in the x and y directions. In the second display area DA2, pixel group PG can be repeatedly positioned at specific intervals in the x and y directions. A transmission region TA can be located between pixel groups PG, and the transmission region TA can surround pixel groups PG. The transmission region TA can be located in the boundary region BR, and the first pixel Pm can surround the boundary region BR. Figure 6In the diagram, the boundary region BR is shown as the area between the first display area DA1 and the second display area DA2. However, the boundary region BR can be a part of the second display area DA2, that is, the boundary region BR can be the transmission region TA of the second display area DA2.

[0133] exist Figure 6 In the original diagram, the transmissive region TA surrounds the pixel group PG. However, in some implementations, the transmissive region TA and the pixel group PG can be staggered in a grid shape.

[0134] exist Figure 6 In the original text, the second pixel Pa is larger than the first pixel Pm. However, in some implementations, the first pixel Pm may be larger than the second pixel Pa, or the first pixel Pm and the second pixel Pa may have the same size.

[0135] Reference Figure 9 When a first pixel Pm on a first virtual line IL1 extending parallel to the x-direction (e.g., parallel to the scan line) or a first pixel Pm on a first virtual line IL2 extending parallel to the y-direction (e.g., parallel to the data line) is a sub-pixel corresponding to a second pixel Pa, the first edge distance ED1 can be greater than or equal to the pixel pitch PP. The first edge distance ED1 can be the shortest straight-line distance between the edges of corresponding first pixels Pm and second pixels Pa. For example, as... Figure 9 As shown, the first edge distance ED1 between the first pixel Pm and the second pixel Pa can be the distance between the relative vertices of the corresponding first pixels Pm and the second pixel Pa. The first edge distance D1r between the second red pixel Par and the first red pixel Pmr, which are adjacent to the boundary region BR on the first virtual line IL1 or IL2, can be greater than or equal to the pixel pitch PP. The first edge distance D1g between the second green pixel Pag and the first green pixel Pmg, which are adjacent to the boundary region BR on the first virtual line IL1 or IL2, can be greater than or equal to the pixel pitch PP. Furthermore, the first edge distance D1b between the second blue pixel Pab and the first blue pixel Pmb, which are adjacent to the boundary region BR on the first virtual line IL1 or IL2, can be greater than or equal to the pixel pitch PP.

[0136] Reference Figure 10, the center distance CD3 between the centers of the first pixel Pm and the second pixel Pa corresponding to each other on the first virtual line IL1 extending in the x direction or the first virtual line IL2 extending in the y direction may be within ±30% of twice the pixel pitch PP ((PP×2×0.7) < CD3 < (PP×2×1.3)). The center distance CD3 between the first pixel Pm and the second pixel Pa corresponding to each other on the first virtual line IL1 may be the shortest straight-line distance between the line passing through the center of the first pixel Pm in the y direction and the line passing through the center of the second pixel Pa in the y direction. The center distance CD3 between the first pixel Pm and the second pixel Pa corresponding to each other on the first virtual line IL2 may be the shortest straight-line distance between the line passing through the center of the first pixel Pm in the x direction and the line passing through the center of the second pixel Pa in the x direction.

[0137] The center distance D3r between the second red pixel Par and the first red pixel Pmr adjacent to the boundary region BR on the first virtual line IL1 or IL2 may be within ±30% of twice the pixel pitch PP. The center distance D3g between the second green pixel Pag and the first green pixel Pmg adjacent to the boundary region BR on the first virtual line IL1 or IL2 may be within ±30% of twice the pixel pitch PP. In addition, the center distance D3b between the second blue pixel Pab and the first blue pixel Pmb adjacent to the boundary region BR on the first virtual line IL1 or IL2 may be within ±30% of twice the pixel pitch PP.

[0138] As Figure 11 shown, the first pixel Pm may include a first organic light-emitting diode OLED and may be connected to a pixel circuit including a first thin-film transistor TFT and a first capacitor Cst. As Figure 12 shown, the second pixel Pa may include a second organic light-emitting diode OLED' and may be connected to a pixel circuit including a second thin-film transistor TFT' and a second capacitor Cst'. The metal layer BSM may be under the second thin-film transistor TFT' of the second pixel Pa to overlap with the second thin-film transistor TFT'.

[0139] Hereinafter, reference will be made to Figure 11 and Figure 12 to describe the structure in which the components in the display device 1 according to the embodiment are stacked.

[0140] The substrate 1**00** may include a polymer resin. The substrate 1**00** may include a base layer containing a polymer resin and an inorganic layer. In an embodiment, the substrate 1**00** may include a first base layer 1**01**, a first inorganic layer 1**02**, a second base layer 1**03**, and a second inorganic layer 1**04** stacked in sequence.

[0141] Each of the first base layer 101 and the second base layer 103 may include a polymer resin. For example, each of the first base layer 101 and the second base layer 103 may include a polymer resin such as polyethersulfone (PES), polyarylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyimide (PI), polycarbonate (PC), cellulose triacetate (TAC), cellulose acetate propionate (CAP), etc. The polymer resin may be transparent.

[0142] Each of the first inorganic layer 102 and the second inorganic layer 104 is a barrier layer to prevent impurity penetration, and may include a single layer or multiple layers containing inorganic materials, such as silicon nitride (SiN). x ) and / or silicon dioxide (SiO2) x ).

[0143] A buffer layer 111 may be located on the substrate 100 and reduces or prevents the penetration of impurities, moisture, or external air from below the substrate 100, and may provide a flat surface on the substrate 100. The buffer layer 111 may comprise inorganic materials, organic materials, or organic and inorganic compounds such as oxides or nitrides, and may be formed as a single layer or multiple layers of inorganic and organic materials. A barrier layer may be present between the substrate 100 and the buffer layer 111 to prevent the penetration of ambient air. In some embodiments, the buffer layer 111 may comprise silicon nitride (SiN). x ) or silicon dioxide (SiO) x The buffer layer 111 can be configured such that the first buffer layer 111a and the second buffer layer 111b are stacked.

[0144] In the second display area DA2, the metal layer BSM can be located between the first buffer layer 111a and the second buffer layer 111b. In one embodiment, the metal layer BSM can be located between the substrate 100 and the first buffer layer 111a. The metal layer BSM can be located below the pixel circuitry to overlap with it, and can prevent degradation of the thin-film transistor characteristics due to light emitted from components 20, etc. The metal layer BSM can have a region corresponding to the pixel group PG.

[0145] Furthermore, the metal layer BSM can be connected to wiring on another layer via contact holes and receive a constant voltage or signal from the wiring. The constant voltage could be a first power supply voltage (ELVDD) or an initialization voltage (VINT), and the signal could be a scan signal. The metal layer BSM can receive a constant voltage or signal, and therefore can significantly reduce the probability of electrostatic discharge. The metal layer BSM can include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and / or copper (Cu). The metal layer BSM can comprise a single layer or multiple layers of the above materials.

[0146] The first thin-film transistor (TFT) and the second thin-film transistor (TFT') can be located on the buffer layer 111. The first TFT may include a first semiconductor layer A1, a first gate electrode G1, a first source electrode S1, and a first drain electrode D1. The second TFT' may include a second semiconductor layer A2, a second gate electrode G2, a second source electrode S2, and a second drain electrode D2. The first TFT can be connected to a first organic light-emitting diode (OLED) to drive the first OLED. The second TFT' can be connected to a second OLED' to drive the second OLED'.

[0147] The first semiconductor layer A1 and the second semiconductor layer A2 may be on the buffer layer 111 and may include polycrystalline silicon. In an embodiment, each of the first semiconductor layer A1 and the second semiconductor layer A2 may include amorphous silicon. In an embodiment, the first semiconductor layer A1 and the second semiconductor layer A2 may each include an oxide of at least one material selected from indium (In), gallium (Ga), strontium (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (Ti), and zinc (Zn). Each of the first semiconductor layer A1 and the second semiconductor layer A2 may include a channel region and impurity-doped source and drain regions.

[0148] The second semiconductor layer A2 may overlap with the metal layer BSM, and the second buffer layer 111b is located between the second semiconductor layer A2 and the metal layer BSM. In this embodiment, the width of the second semiconductor layer A2 may be smaller than the width of the metal layer BSM. Therefore, when projected in a direction perpendicular to the substrate 100, the second semiconductor layer A2 may completely overlap with the metal layer BSM.

[0149] The first gate insulating layer 112 may be configured to cover the first semiconductor layer A1 and the second semiconductor layer A2. The first gate insulating layer 112 may include an inorganic insulating material, such as silicon oxide (SiO2). x), silicon nitride (SiN) x The inorganic insulating layer 112 may comprise a single layer or multiple layers containing the aforementioned inorganic insulating materials, such as silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), or zinc oxide (ZnO2).

[0150] The first gate electrode G1 and the second gate electrode G2 are located on the first gate insulating layer 112, overlapping the first semiconductor layer A1 and the second semiconductor layer A2, respectively. Each of the first gate electrode G1 and the second gate electrode G2 may include Mo, Al, Cu, Ti, etc., and may comprise a single layer or multiple layers. For example, each of the first gate electrode G1 and the second gate electrode G2 may comprise a single layer containing Mo.

[0151] The second gate insulating layer 113 may be configured to cover the first gate electrode G1 and the second gate electrode G2. The second gate insulating layer 113 may include an inorganic insulating material, such as SiO2. x SiN x The inorganic insulating layer 113 may contain a single layer or multiple layers of the aforementioned inorganic insulating material, such as SiON, Al2O3, TiO2, Ta2O5, HfO2, or ZnO2.

[0152] The first upper electrode CE2 of the first capacitor Cst and the second upper electrode CE2' of the second capacitor Cst' can be on the second gate insulating layer 113.

[0153] In the first display area DA1, the first upper electrode CE2 may overlap with the first gate electrode G1 below the first upper electrode CE2. The second gate insulating layer 113 between the overlapping first gate electrode G1 and the first upper electrode CE2 may form a first capacitor Cst. The first gate electrode G1 may be the first lower electrode CE1 of the first capacitor Cst.

[0154] In the second display area DA2, the second upper electrode CE2' may overlap with the second gate electrode G2 below the second upper electrode CE2'. The second gate insulating layer 113 between the overlapping second gate electrode G2 and the second upper electrode CE2' and between the second gate electrode G2 and the second upper electrode CE2' may form a second capacitor Cst'. The second gate electrode G2 may be the second lower electrode CE1' of the second capacitor Cst'.

[0155] Each of the first upper electrode CE2 and the second upper electrode CE2' may include Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Li, Ca, Mo, Ti, W or Cu, and may include a single layer or multiple layers of the above materials.

[0156] The interlayer insulating layer 115 may be formed to cover the first upper electrode CE2 and the second upper electrode CE2'. The interlayer insulating layer 115 may include SiO2. x SiN x , SiON, Al2O3, TiO2, Ta2O5, HfO2, ZnO2, etc.

[0157] When the first gate insulating layer 112, the second gate insulating layer 113, and the interlayer insulating layer 115 are collectively referred to as the inorganic insulating layer IL, the inorganic insulating layer IL may have a first hole H1 corresponding to the transmission region TA. The first hole H1 may be formed to extend to and expose the upper surface of the buffer layer 111 or the substrate 100. The first hole H1 may be formed by making the first gate insulating layer 112, the second gate insulating layer 113, and the interlayer insulating layer 115 overlap with the opening corresponding to the transmission region TA. The openings may be formed separately by individual processes or simultaneously by the same process. When the openings are formed separately by individual processes, a step may be formed on the inner surface of the first hole H1.

[0158] In one embodiment, the inorganic insulating layer IL may be provided with grooves other than the first hole H1 that exposes the buffer layer 111.

[0159] In this embodiment, the inorganic insulating layer IL may not have a first hole H1 corresponding to the transmission region TA. Because the inorganic insulating layer IL typically comprises an inorganic insulating material with excellent light transmittance, even without the hole corresponding to the transmission region TA, the inorganic insulating layer IL can be implemented by component 20 (e.g., reference TA). Figure 2 Transmittance of transmitted / received light.

[0160] The first source electrode S1, the second source electrode S2, the first drain electrode D1, and the second drain electrode D2 can be located on the interlayer insulating layer 115. Each of the first source electrode S1, the second source electrode S2, the first drain electrode D1, and the second drain electrode D2 can comprise a conductive material, such as Mo, Al, Cu, or Ti, and can be formed as a single layer or multiple layers comprising the conductive material. For example, each of the first source electrode S1, the second source electrode S2, the first drain electrode D1, and the second drain electrode D2 can have a Ti / Al / Ti multilayer structure.

[0161] The first planarization layer 117 may cover the first source electrode S1 and the second source electrode S2, as well as the first drain electrode D1 and the second drain electrode D2. The first planarization layer 117 may have a flat upper surface, such that the first pixel electrode 221 and the second pixel electrode 221' are formed flatly on the first planarization layer 117.

[0162] The second planarization layer 118 may be on the first planarization layer 117. Contact metal layers CM and CM' may be between the first planarization layer 117 and the second planarization layer 118. The contact metal layers CM and CM' may electrically connect the first drain electrode D1 and the second drain electrode D2 to the first pixel electrode 221 and the second pixel electrode 221' through contact holes formed in the first planarization layer 117 and the second planarization layer 118, respectively.

[0163] Each of the first planarization layer 117 and the second planarization layer 118 can be formed as a single layer or multiple layers comprising organic or inorganic materials. Each of the first planarization layer 117 and the second planarization layer 118 may comprise commercial polymers such as benzocyclobutene (BCB), polyimide, hexamethyl disilicide (HMDSO), polymethyl methacrylate (PMMA), or polystyrene (PS)), polymer derivatives having phenolic groups, acryloyl polymers, imide polymers, acryloyl ether polymers, amide polymers, fluoropolymers, p-xylylene polymers, vinyl alcohol polymers, mixtures thereof, etc. x SiN x Materials such as SiON, Al2O3, TiO2, Ta2O5, HfO2, and ZnO2. After forming the first planarization layer 117 and the second planarization layer 118, chemical mechanical polishing can be performed to provide flat top surfaces of the first planarization layer 117 and the second planarization layer 118.

[0164] The first planarization layer 117 and the second planarization layer 118 may have a second aperture H2 corresponding to the transmission region TA. The second aperture H2 may overlap with the first aperture H1. Figure 11 and Figure 12 An example is shown where the second hole H2 is larger than the first hole H1. However, the first planarization layer 117 and the second planarization layer 118 can be configured to cover the edge of the first hole H1 in the inorganic insulating layer IL, and therefore, the width of the second hole H2 can be smaller than the width of the first hole H1.

[0165] Each of the first planarization layer 117 and the second planarization layer 118 has a contact hole that exposes one of the first source electrode S1 and the first drain electrode D1 of the first thin film transistor TFT, and the first pixel electrode 221 can contact the first source electrode S1 or the first drain electrode D1 through the contact hole and be electrically connected to the first thin film transistor TFT.

[0166] Furthermore, each of the first planarization layer 117 and the second planarization layer 118 has a contact hole that exposes one of the second source electrode S2 and the second drain electrode D2 of the second thin film transistor TFT', and the second pixel electrode 221' can contact the second source electrode S2 or the second drain electrode D2 through the contact hole and be electrically connected to the second thin film transistor TFT'.

[0167] Each of the first pixel electrode 221 and the second pixel electrode 221' may include a conductive oxide, such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), or zinc aluminum oxide (AZO). In embodiments, each of the first pixel electrode 221 and the second pixel electrode 221' may include a reflective layer comprising Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, or compounds thereof. In embodiments, each of the first pixel electrode 221 and the second pixel electrode 221' may further include a layer comprising ITO, IZO, ZnO, or In2O3 above or below the reflective layer. In some embodiments, each of the first pixel electrode 221 and the second pixel electrode 221' may have an ITO / Ag / ITO stacked structure.

[0168] The pixel defining layer 119 may cover the edges of each of the first pixel electrode 221 and the second pixel electrode 221'. The pixel defining layer 119 may overlap with each of the first pixel electrode 221 and the second pixel electrode 221', and may include a first opening OP1 and a second opening OP2 defining the light-emitting area of ​​the pixel. The pixel defining layer 119 may increase the distance between the edges of the first pixel electrode 221 and the second pixel electrode 221' and the opposing electrode 223 above the first pixel electrode 221 and the second pixel electrode 221', thereby preventing arcing at the edges of the first pixel electrode 221 and the second pixel electrode 221'. The pixel defining layer 119 may include an organic insulating material, such as polyimide, polyamide, acrylic resin, BCB, HMDSO, or phenolic resin, and may be formed by spin coating or the like.

[0169] The pixel-defining layer 119 may have a third aperture H3 located in the transmission region TA. The third aperture H3 may overlap with the first aperture H1 and the second aperture H2. When the first aperture H1, the second aperture H2, and the third aperture H3 are formed, the transmittance of the transmission region TA can be improved. The opposing electrode 223, which will be described later, may be located on the inner walls of the first aperture H1, the second aperture H2, and the third aperture H3.

[0170] The first functional layer 222a covers the pixel definition layer 119. The first functional layer 222a may include a single layer or multiple layers. The first functional layer 222a may be a hole transport layer (HTL) with a single-layer structure. Alternatively, the first functional layer 222a may include a hole injection layer (HIL) and an HTL. The first functional layer 222a may be integrally formed to correspond to a first pixel Pm in the first display area DA1 and a second pixel Pa in the second display area DA2.

[0171] A first emission layer 222b and a second emission layer 222b' are formed on the first functional layer 222a, respectively corresponding to the first pixel electrode 221 and the second pixel electrode 221'. Each of the first emission layer 222b and the second emission layer 222b' may include a polymer material or a low molecular weight material, and may emit red light, green light, blue light or white light.

[0172] The second functional layer 222c may be formed on the first emission layer 222b and the second emission layer 222b'. The second functional layer 222c may include a single layer or multiple layers. The second functional layer 222c may include an electron transport layer (ETL) and / or an electron injection layer (EIL). The second functional layer 222c may be integrally formed to correspond to a first pixel Pm in the first display area DA1 and a second pixel Pa in the second display area DA2. In an embodiment, the first functional layer 222a and the second functional layer 222c may be omitted.

[0173] The counter electrode 223 is located on the second functional layer 222c. The counter electrode 223 may include a conductive material with a low work function. For example, the counter electrode 223 may include a (semi-)transparent layer comprising Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, or alloys thereof. Alternatively, the counter electrode 223 may also include a layer comprising ITO, IZO, ZnO, or In2O3 on top of a (semi-)transparent layer comprising the aforementioned materials. The counter electrode 223 may be integrally formed to correspond to a first pixel Pm in the first display area DA1 and a second pixel Pa in the second display area DA2.

[0174] A first organic light-emitting diode (OLED) can be formed from the layer from the first pixel electrode 221 to the opposite electrode 223 in the first display area DA1. A second organic light-emitting diode (OLED) can be formed from the layer from the second pixel electrode 221' to the opposite electrode 223 in the second display area DA2.

[0175] A capping layer 250 may be formed on the opposing electrode 223. The capping layer 250 may include LiF. Alternatively, the capping layer 250 may include materials such as SiN. x Inorganic insulating materials and / or organic materials. In some embodiments, the covering layer 250 may be omitted.

[0176] In this embodiment, the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and the cover layer 250 may have a transmission aperture TAH corresponding to the transmission region TA. That is, the first functional layer 222a, the second functional layer 222c, the counter electrode 223, and the cover layer 250 may each have an opening corresponding to the transmission region TA. In this embodiment, the widths of the openings forming the transmission aperture TAH may be substantially equal to each other. For example, the width of the opening of the counter electrode 223 may be substantially equal to the width of the transmission aperture TAH.

[0177] The transmission aperture TAH corresponding to the transmission region TA can mean that the transmission aperture TAH overlaps with the transmission region TA. In this case, the area of ​​the transmission aperture TAH can be smaller than the area of ​​the first aperture H1 formed in the inorganic insulating layer IL. Therefore, in Figure 12 In this configuration, the width Wt of the transmission aperture TAH is smaller than the width W1 of the first aperture H1. Here, the areas of the transmission aperture TAH and the first aperture H1 can be defined as the areas of the narrowest openings.

[0178] When a transmission aperture TAH is provided, a portion of the opposing electrode 223 is removed from the transmission region TA. Therefore, the transmittance of the transmission region TA can be significantly increased. The opposing electrode 223 located in the transmission region TA can be formed by laser ablation to remove the area corresponding to the transmission region TA, and can also be formed by FMM (fine metal mask) patterning.

[0179] The first organic light-emitting diode (OLED) and the second organic light-emitting diode (OLED') can be sealed by a thin-film encapsulation layer 300. The thin-film encapsulation layer 300 can be on the cover layer 250. The thin-film encapsulation layer 300 can prevent external moisture or impurities from penetrating into the first organic light-emitting diode (OLED) and the second organic light-emitting diode (OLED').

[0180] The thin-film encapsulation layer 300 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. In this respect, Figure 11 and Figure 12 The diagram illustrates a structure in which the thin-film encapsulation layer 300 comprises a first inorganic encapsulation layer 310, an organic encapsulation layer 320, and a second inorganic encapsulation layer 330 stacked sequentially. In embodiments, the number of organic encapsulation layers, the number of inorganic encapsulation layers, and the stacking order can be varied.

[0181] Each of the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may include one or more inorganic insulating materials, such as alumina, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and / or silicon oxynitride, and may be formed by chemical vapor deposition (CVD). The organic encapsulation layer 320 may include polymer-based materials. Examples of polymer-based materials may include silicone resins, acrylamide resins, epoxy resins, polyimides, and polyethylene.

[0182] The first inorganic encapsulation layer 310, the organic encapsulation layer 320, and the second inorganic encapsulation layer 330 can be integrally formed to cover the first display area DA1 and the second display area DA2. Therefore, the first inorganic encapsulation layer 310, the organic encapsulation layer 320, and the second inorganic encapsulation layer 330 can be in the transmission aperture TAH.

[0183] In one embodiment, the organic encapsulation layer 320 may be integrally formed to cover the first display area DA1 and the second display area DA2, but may not be located within the transmissive area TA. In other words, the organic encapsulation layer 320 may include an opening corresponding to the transmissive area TA. In this case, the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may be in contact with each other within the transmissive aperture TAH.

[0184] Figure 6 The display device shown is an example in which the pixel structure of the first display area DA1 and the pixel structure of the second display area DA2 are the same. In an embodiment, the pixel structure of the first display area DA1 may be different from the pixel structure of the second display area DA2.

[0185] Figure 13 This is a plan view showing portions of the first display area DA1 and the second display area DA2 according to an embodiment. Figure 14A and Figure 14B The pixel structure in the second display area DA2 is shown. Figure 15 , Figure 16 and Figure 17 yes Figure 13 A magnified view of part B.

[0186] like Figure 13 As shown, a first display area DA1 may surround a second display area DA2, and a boundary area BR may be set between the first display area DA1 and the second display area DA2. The boundary area BR may surround the second display area DA2, and the first display area DA1 may surround the boundary area BR. The pixel structure of the first display area DA1 is... Figure 7 The pixel structure shown is the same.

[0187] Reference Figure 14AThe second pixel Pa can be located in the second display area DA2. Each of the second pixels Pa can include a display element such as an organic light-emitting diode (OLED). The second pixel Pa can be a sub-pixel that emits red, green, blue, or white light. The second pixel Pa can include a second red pixel Par that emits red light, a second green pixel Pag that emits green light, and a second blue pixel Pab that emits blue light.

[0188] The second display area DA2 may include a pixel group PG and a transmissive area TA, wherein the pixel group PG includes at least one second pixel Pa. The pixel group PG and the transmissive area TA may be alternately positioned in the x and y directions, and may be, for example, a grid shape. In this case, multiple pixel groups PG and multiple transmissive areas TA may be provided. The transmissive area TA may surround the pixel group PG.

[0189] A pixel group PG can include three second pixels Pa. Each pixel group PG can include a second red pixel Par, a second green pixel Pag, and a second blue pixel Pab. A second blue pixel Pab can be configured to correspond to one second red pixel Par and one second green pixel Pag. Therefore, the size of the second blue pixel Pab can be larger than the sizes of the second red pixel Par and the second green pixel Pag. The length of the second blue pixel Pab in the y-direction can be equal to or greater than the sum of the lengths of the second red pixel Par and the second green pixel Pag in the y-direction. This pixel structure is called an S-band structure.

[0190] Pixel definition layer 119 between the second red pixel Par and the second green pixel Pag (for example, see...) Figure 12 The pixel-defining layer 119 between the second green pixel Pag and the second blue pixel Pab may have a fifth width d2a', and the pixel-defining layer 119 between the second green pixel Pag and the second blue pixel Pab may have a sixth width d2b'.

[0191] exist Figure 14A In the image, the size of the second pixel Pa in pixel group PG is within the width of pixel pitch PP. However, as... Figure 14B As shown, the size of the second pixel Pa in pixel group PG can be larger than the width of pixel pitch PP.

[0192] Return to reference Figure 13 First pixel unit PmU1 and second pixel unit PmU2 can be alternately positioned in the x and y directions within the first display area DA1. In the second display area DA2, pixel group PG can be repeatedly positioned at specific intervals in the x and y directions. A transmission region TA can exist between pixel groups PG, and the transmission region TA can surround pixel groups PG. The transmission region TA can be located within the boundary region BR, and the first pixel Pm can surround the boundary region BR. Figure 13 In the diagram, the boundary region BR is shown as the area between the first display area DA1 and the second display area DA2. However, the boundary region BR can be a part of the second display area DA2, that is, the boundary region BR can be the transmission region TA of the second display area DA2.

[0193] Refer to together Figure 13 and Figure 15 When the first pixel Pm on the first virtual line IL1' extending parallel to the x direction or the first pixel Pm on the first virtual line IL2' extending parallel to the y direction is a sub-pixel corresponding to the second pixel Pa, the first edge distance ED1 can be greater than or equal to the pixel spacing PP.

[0194] When a first pixel Pm on a first virtual line IL1' extending parallel to the x-direction or a first virtual line IL2' extending parallel to the y-direction is a sub-pixel emitting light of a different color than the second pixel Pa, the second edge distance ED2 can be greater than or equal to the minimum of the widths (e.g., gaps or intervals) of the pixel-defining layers 119 between the first pixels Pm and between the second pixel Pa. The second edge distance ED2 can be equal to the minimum of the first width d1a, the second width d1b, the fifth width d2a', and the sixth width d2b', or the second edge distance ED2 can be a value greater than that minimum value.

[0195] exist Figure 15 In the first image, for each of the second green pixel Pag and the second blue pixel Pab, the first pixel on the first virtual line IL1' or IL2' is the corresponding sub-pixel, namely, the first green pixel Pmg and the first blue pixel Pmb. Therefore, the first edge distance D1g and the first edge distance D1b, which are greater than or equal to the pixel pitch PP, can be set between the second green pixel Pag and the first green pixel Pmg, and between the second blue pixel Pab and the first blue pixel Pmb, respectively. For the second red pixel Par, the first pixel on the first virtual line IL1' or IL2' is a sub-pixel that emits light of a different color than the second red pixel Par, namely, the first blue pixel Pmb or the first green pixel Pmg. Therefore, the second edge distance D2rb and the second edge distance D2rg, which are equal to or greater than the minimum value of the first width d1a, the second width d1b, the fifth width d2a', and the sixth width d2b', can be set between the second red pixel Par and the first blue pixel Pmb in the x-direction and between the second red pixel Par and the first green pixel Pmg in the y-direction, respectively.

[0196] Reference Figure 16, the center distance CD3' between the centers of the corresponding first pixel Pm and second pixel Pa on the first virtual line IL1' extending in the x direction or the first virtual line IL2' extending in the y direction can be within ±30% of twice the pixel pitch PP ((PP × 2 × 0.7) < CD3' < (PP × 2 × 1.3)). The center distance CD3' between the corresponding first pixel Pm and second pixel Pa on the first virtual line IL1' can be the shortest straight-line distance between the line passing through the center of the first pixel Pm in the y direction and the line passing through the center of the second pixel Pa in the y direction. The center distance CD3' between the corresponding first pixel Pm and second pixel Pa on the first virtual line IL2' can be the shortest straight-line distance between the line passing through the center of the first pixel Pm in the x direction and the line passing through the center of the second pixel Pa in the x direction.

[0197] The center distance D3'r between the second red pixel Par and the first red pixel Pmr adjacent to the boundary region BR on the first virtual line IL1' or IL2', the center distance D3'g between the second green pixel Pag and the first green pixel Pmg adjacent to the boundary region BR on the first virtual line IL1' or IL2', and the center distance D3'b between the second blue pixel Pab and the first blue pixel Pmb adjacent to the boundary region BR on the first virtual line IL1' or IL2' can be within ±30% of twice the pixel pitch PP. Figure 16 An example is shown where, for the second red pixel Par adjacent to the corner of the boundary region BR, the first virtual line IL2' or the second virtual line IL" passing through the second red pixel Par does not pass through the corresponding sub-pixel (i.e., the first red pixel Pmr).

[0198] On the other hand, Figure 17 An example is shown where, for the second red pixel Par adjacent to the corner of the boundary region BR, the second virtual line IL" passes through the first red pixel Pmr. Depending on the size and structure of the pixel group PG including the second pixel Pa, the first virtual lines IL1' and IL2' or the second virtual line IL" passing through the second pixel Pa may pass through or not pass through the first pixel Pm of the corresponding sub-pixel. In Figure 17In the implementation, the center distance D3'r between the second red pixel Par and the first red pixel Pmr adjacent to the boundary region BR on the first virtual line IL2', the center distance D3'r between the second red pixel Par and the first red pixel Pmr adjacent to the boundary region BR on the second virtual line IL", the center distance D3'g between the second green pixel Pag and the first green pixel Pmg adjacent to the boundary region BR on the first virtual line IL1' or IL2', and the center distance D3'b between the second blue pixel Pab and the first blue pixel Pmb adjacent to the boundary region BR on the first virtual line IL1' or IL2', can be within ±30% of twice the pixel pitch PP.

[0199] In a display device according to one or more embodiments, a pixel region and a transmissive region with improved light transmittance are located in a second display region corresponding to components such as sensors and cameras, thereby creating an environment in which the components can operate, and realizing an image in the region overlapping with the components. Therefore, a display device with various functions and improved quality can be provided.

[0200] It should be understood that the embodiments described herein should be considered merely descriptive and not for limiting purposes. Descriptions of features or aspects within each embodiment should generally be considered applicable to other similar features or aspects in other embodiments. While one or more embodiments have been described with reference to the accompanying drawings, those skilled in the art will understand that various changes in form and detail may be made therein without departing from the spirit and scope defined by the appended claims.

Claims

1. A display device, including: The substrate includes a first display area and a second display area including a transmissive area; The first pixel is located in the first display area; as well as The second pixel, in the second display area Wherein, the distance between the first sub-pixel in the second pixel and the second sub-pixel in the first pixel has a value based on the pixel pitch, the first sub-pixel is adjacent to the boundary region between the first display area and the second display area and emits light of the first color, the second sub-pixel is adjacent to the boundary region, emits light of the first color, and a virtual line passing through the center of the first sub-pixel passes through the second sub-pixel. The boundary region is a region where no pixels are set. The virtual line is parallel to the data line or scan line connected to the first sub-pixel, and The second sub-pixel is the pixel through which the virtual line first passes among the first pixels in the first display area.

2. The display device of claim 1, wherein, The second pixel is in units of pixel groups. The transmissive region surrounds the pixel group.

3. The display device of claim 2, wherein, The structure of the second pixel constituting the pixel group is the same as that of the first pixel.

4. The display device of claim 3, wherein, The area of ​​each of the second pixels is different from the area of ​​the first pixel corresponding to the second pixel.

5. The display device of claim 2, wherein, The structure of the second pixel constituting the pixel group is different from the structure of the first pixel.

6. The display device according to claim 1, wherein, The pixel spacing is the center distance between the first pixels that emit green light in the first pixel.

7. The display device of claim 1, wherein, The distance between the first sub-pixel and the second sub-pixel is the shortest straight-line distance between the edge of the first sub-pixel and the edge of the second sub-pixel.

8. The display device of claim 7, wherein, The distance between the first sub-pixel and the second sub-pixel is greater than or equal to the pixel pitch.

9. The display device of claim 1, wherein, The distance between the first sub-pixel and the second sub-pixel is the shortest straight-line distance between a line passing through the center of the first sub-pixel and a line passing through the center of the second sub-pixel.

10. The display device of claim 9, wherein, The distance between the first sub-pixel and the second sub-pixel is within ±30% of twice the pixel pitch.

11. The display device according to claim 1, further comprising an inorganic insulating layer on the substrate, wherein, The inorganic insulating layer includes openings corresponding to the transmission region and the boundary region.

12. The display device of claim 1, wherein, The distance between the third sub-pixel in the second pixel and the fourth sub-pixel in the first pixel has the minimum value of the gap value of the pixel-defining layer between the first pixels and the gap value of the pixel-defining layer between the second pixels, or has a value greater than the minimum value. The third sub-pixel is adjacent to the boundary region and emits light of the second color. The fourth sub-pixel is adjacent to the boundary region, emits light of a color different from the second color, and a virtual line passing through the center of the third sub-pixel passes through the fourth sub-pixel.

13. A display device, including: The substrate includes a first display area and a second display area including a transmissive area; The first pixel is located in the first display area; as well as The second pixel, in the second display area Wherein, the distance between the first sub-pixel in the second pixel and the second sub-pixel in the first pixel is greater than or equal to the minimum of the pixel-defining layer gap value between the first pixels and the pixel-defining layer gap value between the second pixels; the first sub-pixel is adjacent to the boundary region between the first display area and the second display area and emits light of the first color; the second sub-pixel is adjacent to the boundary region, emits light of a color different from the first color, and a virtual line passing through the center of the first sub-pixel passes through the second sub-pixel. The boundary region is a region where no pixels are set. Wherein, the virtual line is parallel to the data line or scan line connected to the first sub-pixel, and The second sub-pixel is the pixel through which the virtual line first passes among the first pixels in the first display area.

14. The display device of claim 13, wherein, The second pixel is in units of pixel groups. Wherein, the transmission region surrounds the pixel group, and The structure of the second pixel constituting the pixel group is different from the structure of the first pixel.

15. A display device, including: The substrate includes a first display area and a second display area including a transmissive area; The first pixel is located in the first display area; as well as The second pixel, in the second display area Wherein, the center distance between the first sub-pixel in the second pixel and the second sub-pixel in the first pixel is within ±30% of twice the pixel pitch; the first sub-pixel is adjacent to the boundary region between the first display area and the second display area and emits light of the first color; the second sub-pixel is adjacent to the boundary region, emits light of the first color, and a virtual line passing through the center of the first sub-pixel passes through the second sub-pixel. The boundary region is a region where no pixels are set. Wherein, the virtual line is parallel to the data line or scan line connected to the first sub-pixel, and The second sub-pixel is the pixel through which the virtual line first passes among the first pixels in the first display area.

16. The display device of claim 15, wherein, The second pixel is in units of pixel groups. Wherein, the transmission region surrounds the pixel group, and The structure of the second pixel constituting the pixel group may be the same as or different from the structure of the first pixel.

17. The display device according to claim 15, wherein, The pixel spacing is the center distance between the first pixels that emit green light in the first pixel.

Images