Display device

Abstract

A display device is provided. The display device includes a main display area, an assembly area including a transmissive area, a main sub-pixel disposed on a substrate corresponding to the main display area, and an auxiliary sub-pixel disposed on the substrate corresponding to the assembly area. The assembly area includes a first assembly area and a second assembly area. The auxiliary sub-pixel disposed in the first assembly area and the auxiliary sub-pixel disposed in the second assembly area have the same arrangement structure. An opaque layer is disposed between the substrate and the auxiliary sub-pixel in the second assembly area and includes a hole corresponding to the transmissive area.

Description

[0001] This application claims priority and benefit to Korean Patent Application No. 10-2020-0021762, filed on February 21, 2020, with the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0002] The disclosure relates to a display panel and a display device including the display panel, wherein the display area of ​​the display panel is extended to display images even in areas where electronic components are housed. Background Technology

[0003] Recently, display devices have been used in various fields. Furthermore, as the thickness and weight of display devices have decreased, their application scope has expanded.

[0004] Because display devices are used in a variety of ways, different methods can be used to design different types of display devices. Furthermore, the functionality embedded in or linked to display devices continues to increase. Summary of the Invention

[0005] One or more disclosed embodiments may provide a display panel and a display device including the display panel, wherein the display area of ​​the display panel can be expanded to display images in an area where components, as electronic elements, can be housed. However, this is merely an example, and the disclosed one or more embodiments are not limited thereto.

[0006] Additional aspects will be set forth in part in the description which follows, and will be apparent in part from the description, or may be learned by practice of the disclosed embodiments.

[0007] According to one or more disclosed embodiments, a display device may include: a main display area; a component area including a transmissive area; main sub-pixels disposed on a substrate corresponding to the main display area; and auxiliary sub-pixels disposed on the substrate corresponding to the component areas. The component area may include a first component area and a second component area. The auxiliary sub-pixels disposed in the first component area and the auxiliary sub-pixels disposed in the second component area may have the same arrangement structure. An opaque layer may be disposed between the substrate and the auxiliary sub-pixels in the second component area. The opaque layer may include holes corresponding to the transmissive area.

[0008] The holes in the opaque layer can be circular in shape.

[0009] The opaque layer may include light-blocking metal.

[0010] The opaque layer may include light-blocking organic materials.

[0011] The display device may further include: a first camera disposed below the substrate corresponding to a first component area; a second camera disposed below the substrate corresponding to a second component area; and a driver that generates a composite image signal by combining a first image signal from the first camera and a second image signal from the second camera.

[0012] The first camera may include a low-sensitivity camera with high resolution, and the second camera may include a high-sensitivity camera with low resolution.

[0013] The driver can generate a composite image signal by replacing the degraded data of the first image signal with the pixel data of the corresponding position in the second image signal.

[0014] The driver can generate a composite image signal by combining pixel data corresponding to the foreground of the first image signal and pixel data corresponding to the background of the second image signal.

[0015] The driver can generate a first image signal by synthesizing multiple image signals obtained by moving the image sensor of the first camera by a pixel pitch in multiple directions, and generate a second image signal by synthesizing multiple image signals obtained by moving the image sensor of the second camera by a pixel pitch in multiple directions.

[0016] The display device may further include: a camera disposed below the substrate corresponding to the component area; and a driver that can generate a composite image signal by combining a first image signal and a second image signal, the first image signal being obtained by moving the camera toward the first component area, and the second image signal being obtained by moving the camera toward the second component area.

[0017] The driver can generate a composite image signal by replacing the degraded data of the first image signal with the pixel data of the corresponding position in the second image signal.

[0018] The driver can generate a composite image signal by combining pixel data corresponding to the foreground of the first image signal and pixel data corresponding to the background of the second image signal.

[0019] The driver can generate a first image signal by synthesizing multiple image signals obtained by moving the camera's image sensor by a pixel pitch in multiple directions, and generate a second image signal by synthesizing multiple image signals obtained by moving the camera's image sensor by a pixel pitch in multiple directions.

[0020] Pixel groups can be set in the component area, each of which can include a predetermined number of auxiliary sub-pixels, and a transmissive area can be placed around the pixel group.

[0021] Each of the main sub-pixel and the auxiliary sub-pixel may include a pixel electrode and an emission layer, and a counter electrode may be disposed above the pixel electrode. The counter electrode may be shared by the main sub-pixel and the auxiliary sub-pixel, and includes a via corresponding to the transmission region.

[0022] According to one or more disclosed embodiments, a display device includes a main display area, a first component area, and a second component area. The image signal processing method of the display device may include the following steps: obtaining a first image signal from light-receiving pixels of an image sensor disposed corresponding to the first component area of ​​the display device; obtaining a second image signal from light-receiving pixels of an image sensor disposed corresponding to the second component area of ​​the display device; and generating a composite image signal by combining the first image signal and the second image signal.

[0023] The step of obtaining a first image signal may include obtaining an image signal from a first camera including light-receiving pixels disposed corresponding to a first component region, and the step of obtaining a second image signal may include obtaining an image signal from a second camera including light-receiving pixels disposed corresponding to a second component region.

[0024] The step of obtaining the second image signal may include moving a camera, which includes light-receiving pixels, corresponding to the first component area setting, to the second component area.

[0025] The step of generating a synthetic image signal may include replacing degraded data from the first image signal with pixel data at the corresponding positions in the second image signal.

[0026] The step of generating a composite image signal may include combining pixel data corresponding to the foreground of the first image signal and pixel data corresponding to the background of the second image signal. Attached Figure Description

[0027] The above and other aspects, features, and advantages of the disclosed specific embodiments will become clearer from the following description taken in conjunction with the accompanying drawings, in which:

[0028] Figures 1A to 1C This is a schematic plan view of the display panel according to an embodiment;

[0029] Figure 2A and Figure 2B This is a schematic cross-sectional view of the display panel according to an embodiment;

[0030] Figure 3 This is a schematic plan view of the display panel according to an embodiment;

[0031] Figure 4A and Figure 4B This is a schematic circuit diagram of sub-pixels of a first pixel and / or a second pixel that may be included in a display panel according to an embodiment;

[0032] Figure 5 This is a schematic plan view illustrating the pixel arrangement structure in the main display area according to an embodiment;

[0033] Figure 6 This is a schematic plan view illustrating the pixel arrangement structure in the component region according to an embodiment;

[0034] Figure 7A and Figure 7B This is a schematic plan view of the shape of an opaque layer that can be arranged in a component area according to an embodiment;

[0035] Figure 8 and Figure 9 This is a schematic cross-sectional view showing a portion of the display panel according to an embodiment;

[0036] Figure 10 and Figure 11 This is a schematic view of a display device according to an embodiment;

[0037] Figure 12 This is an example view for explaining the image signal synthesis method according to an embodiment;

[0038] Figure 13 This is a schematic plan view illustrating the pixel arrangement structure in the component region according to an embodiment;

[0039] Figure 14A and Figure 14B It is a schematic plan view of the shape of an opaque layer that can be set in the component area;

[0040] Figure 15 This is a schematic cross-sectional view of the display panel according to an embodiment;

[0041] Figure 16 and Figure 17 It includes Figure 15 A schematic view of the display device with a display panel;

[0042] Figure 18 and Figure 19 This is a schematic plan view of the display panel according to an embodiment;

[0043] Figure 20 This is a schematic cross-sectional view of the display panel according to an embodiment;

[0044] Figure 21 and Figure 22 This is a schematic diagram illustrating the acquisition of image signals in a display device according to an embodiment;

[0045] Figure 23This is a schematic view illustrating the generation of a composite image signal by a display device according to an embodiment;

[0046] Figure 24 This is a schematic cross-sectional view of the display panel according to an embodiment;

[0047] Figures 25A to 25E This is a schematic diagram illustrating the generation of image signals in a display device according to an embodiment; and

[0048] Figure 26 This is a schematic diagram of an image signal generation method for a display device according to an embodiment. Detailed Implementation

[0049] Reference will now be made in detail to embodiments, examples of which are shown in the accompanying drawings, wherein the same reference numerals always denote the same elements. In this respect, embodiments may take different forms and should not be construed as limited to the description set forth herein. Therefore, embodiments are described below only by reference to the accompanying drawings to explain various aspects of the specification. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. The terms “and” and “or” may be used in a combined or separate sense and may be understood as equivalent to “and / or”. Throughout the disclosure, the expression “at least one of a, b, and c” indicates only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof.

[0050] It will be understood that although the terms “first,” “second,” etc., may be used here to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another.

[0051] As used herein, the singular forms “a,” “one,” and “the” are also intended to include the plural forms, unless the context clearly indicates otherwise.

[0052] It will be further understood that terms used herein (such as “comprising,” “having,” and “including”) indicate the presence of the stated features or elements, but do not preclude the presence or addition of one or more other features or elements.

[0053] It will be understood that when a layer, region, or element is referred to as being “formed” on another layer, region, or element, it can be formed directly or indirectly on said other layer, region, or element. For example, intermediate layers, intermediate regions, or intermediate elements may exist.

[0054] For ease of explanation, the dimensions of the elements in the accompanying drawings may be exaggerated. In other words, because the dimensions and thicknesses of the elements in the accompanying drawings are arbitrarily shown for ease of explanation, the following embodiments are not limited thereto.

[0055] When specific embodiments can be implemented differently, the specific process sequence can be performed in a different order than that described. For example, two consecutively described processes can be performed substantially simultaneously or in the reverse order of their description.

[0056] It will be understood that when an element such as a layer, film, region, or plate is referred to as being "connected to" another element, the element may be directly on the other element, or there may be an intermediate element therein. For example, it will be understood that when an element such as a layer, film, region, or plate is referred to as being "electrically connected to" another element, the element may be directly electrically connected to the other element, or there may be an intermediate element therein for indirect electrical connection.

[0057] The term "overlapping" can include layering, stacking, facing or oriented, extending above, extending below, covering or partially covering, or any other suitable term as will be understood and appreciated by one of ordinary skill in the art. The expression "not overlapping" can include being separate from, away from, or offset from, or any other suitable equivalent as will be understood and appreciated by one of ordinary skill in the art.

[0058] As used herein, “about” or “approximately” includes the value and means within an acceptable range of deviation from the specific value, as determined by a person skilled in the art taking into account the measurement in question and the errors associated with the measurement of the specific quantity (i.e., limitations of the measurement system). For example, “about” may mean within one or more standard deviations, or within ±30%, ±20%, ±5% of the value.

[0059] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will also be understood that terms (such as those defined in a general dictionary) shall be interpreted as having the meaning consistent with their meaning in the context of the relevant field and shall not be interpreted in an ideal or overly formal sense unless clearly defined in the specification.

[0060] Figures 1A to 1C This is a schematic plan view of the display panel 10 according to an embodiment.

[0061] Display panel 10 may be a light-emitting display panel that includes light-emitting elements. For example, display panel 10 may be an organic light-emitting display panel that uses an organic light-emitting diode (OLED) that includes an organic emission layer, a micro-LED display panel that uses micro-LEDs, a quantum dot light-emitting display panel that uses a quantum dot light-emitting diode that includes a quantum dot emission layer, or an inorganic light-emitting display panel that uses an inorganic light-emitting element that includes inorganic semiconductors.

[0062] The display panel 10 can be a rigid display panel that is difficult to bend, if not impossible, due to its rigidity, or a flexible display panel that can be easily bent, folded, or rolled up due to its flexibility. For example, the display panel 10 can be a foldable display panel that can be folded and unfolded, a display panel that includes a curved display surface, a bendable display panel in which the area other than the display surface is curved, a rollable display panel that can be rolled up or unfolded, or a stretchable display panel.

[0063] Reference Figures 1A to 1C The display panel 10 may include a display area DA that can display images and a peripheral area DPA that may not display images. The display area DA may include a main display area MDA and a component area CA. The main display area MDA and the component area CA can be areas for displaying images, and the component area CA can be an area where components 40 (e.g., sensors, cameras, etc., using visible light, infrared light, sound, etc.) are located. In an embodiment, the component area CA may be an area with a greater light transmittance and / or sound transmittance than the main display area MDA. In an embodiment, when light passes through the component area CA, the light transmittance may be equal to or greater than about 25%, about 30%, about 50%, about 75%, about 80%, about 85%, or about 90%.

[0064] A component region (CA) can be set inside and surrounded by the main display area (MDA). Furthermore, the component region CA can be circular in shape, and there can be one or more component regions CA. (See reference...) Figures 1A to 1C This shows two component regions, CA1 and CA2.

[0065] like Figure 1A As shown, the component region CA may include a first component region CA1 and a second component region CA2 arranged side by side in the x-direction. As another example, as... Figure 1B and Figure 1CAs shown, the component region CA may include a first component region CA1 and a second component region CA2 arranged side-by-side in the y-direction. The first component region CA1 and the second component region CA2 may be separate from each other and may each be surrounded by a main display area MDA. A first component may be set corresponding to the first component region CA1, and a second component may be set corresponding to the second component region CA2. In another embodiment, three or more component regions CA may exist, and a component may be set corresponding to each component region CA. When the component is a camera, because the camera can be set to a specified component region CA, images can be captured at various angles, and image compensation can be performed based on the images.

[0066] Figures 1A to 1C The component area CA shown in the illustration can have a circular shape. However, one or more embodiments are not limited to this. For example, the component area CA can be elliptical or a polygon such as a triangle or pentagon, and the position and size of the component area CA can vary.

[0067] Figure 2A and Figure 2B This is a schematic cross-sectional view of the display panel 10 according to an embodiment, and can be viewed along... Figure 1A The cross-section of the display panel 10 is corresponding to the line I-I'.

[0068] Reference Figure 2A The display device may include a display panel 10, a first component 40a, and a second component 40b. The display panel 10 includes display elements, and the first component 40a and the second component 40b may be stacked with the display panel 10. The display panel 10 may include a first component area CA1 stacked with the first component 40a, a second component area CA2 stacked with the second component 40b, and a main display area MDA capable of displaying the main image.

[0069] The display panel 10 may include a substrate 100, a display layer DISL on the substrate 100, a touch screen layer TSL, an optical functional layer OFL, and a panel protection member PB below the substrate 100. The display layer DISL may include a circuit layer PCL, a display element layer EDL, and an encapsulation member ENCM. The circuit layer PCL includes thin-film transistors TFT and TFT', the display element layer EDL includes light-emitting elements ED and ED' as display elements, and the encapsulation member ENCM is such as a thin-film encapsulation layer TFEL or an encapsulation substrate ENS. Insulating layers IL and IL' may be disposed between the substrate 100 and the display layer DISL, and within the display layer DISL.

[0070] As described above, substrate 100 may include an insulating material, such as glass, quartz, polymer resin, or combinations thereof. Substrate 100 may be a rigid substrate, a flexible substrate that is bendable, foldable, or rollable, or a combination thereof.

[0071] A main sub-pixel Pm, including a main light-emitting element ED and a main thin-film transistor TFT connected to the main light-emitting element ED, can be disposed in the main display area MDA of the display panel 10, and auxiliary sub-pixels Pa1 and Pa2 (also referred to as Pa1 and Pa2) including an auxiliary light-emitting element ED' and an auxiliary thin-film transistor TFT' connected to the auxiliary light-emitting element ED' are disposed in the main display area MDA of the display panel 10. Figure 3 It can be set in the first component area CA1 and the second component area CA2.

[0072] Furthermore, in the first component region CA1 and the second component region CA2, there may be a transmissive region TA where no display element is placed. The transmissive region TA may be a region where light / signals emitted from the first component 40a and the second component 40b, which are disposed corresponding to the first component region CA1 and the second component region CA2, or light / signals incident on the first component 40a and the second component 40b are transmitted.

[0073] An opaque layer BML can be set in either the first component area CA1 or the second component area CA2. (See reference...) Figure 2A The opaque layer BML is not disposed in the first component region CA1 but in the second component region CA2. The opaque layer BML may be disposed corresponding to the bottom of the auxiliary thin-film transistor TFT'. For example, the opaque layer BML may be disposed between the auxiliary thin-film transistor TFT' and the substrate 100. The opaque layer BML can prevent external light from reaching the auxiliary thin-film transistor TFT'. In the second component region CA2, multiple opaque layers BML may be provided. In the second component region CA2, there may be an opaque layer BML including a hole corresponding to the transmission region TA.

[0074] like Figure 2A As shown, the display element layer EDL can be covered by a thin-film encapsulation layer TFEL, or as... Figure 2B As shown, the display element layer (EDL) can be covered by the encapsulation substrate (ENS).

[0075] In some embodiments, the thin-film encapsulation layer TFEL may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. In an embodiment, the thin-film encapsulation layer TFEL may include a first inorganic encapsulation layer 131, a second inorganic encapsulation layer 133, and an organic encapsulation layer 132 located therebetween.

[0076] In some embodiments, the encapsulation substrate ENS may face the substrate 100, and the display element layer EDL is located between them. A gap may be provided between the encapsulation substrate ENS and the display element layer EDL. The encapsulation substrate ENS may include glass. A sealant, such as a glass frit, may be provided between the substrate 100 and the encapsulation substrate ENS, and the sealant may be provided in the aforementioned peripheral region DPA. The sealant in the peripheral region DPA may surround the display area DA and prevent moisture penetration through the side surfaces of the display panel 10.

[0077] A touchscreen layer (TSL) can obtain coordinate information based on external input (e.g., touch events). A TSL can include touch electrodes and traces connected to the touch electrodes. The TSL can detect external input using either self-capacitance or mutual capacitance.

[0078] The touchscreen layer TSL can be formed on a thin-film encapsulation layer TFEL or an encapsulation substrate ENS. As another example, the touchscreen layer TSL formed on a separate touch substrate can be bonded to the thin-film encapsulation layer TFEL or the encapsulation substrate ENS via an adhesive layer such as an optically clear adhesive (OCA). In embodiments, such as... Figure 2A and Figure 2B As shown, the touch screen layer TSL can be formed (e.g., directly formed) on the thin film encapsulation layer TFEL or the encapsulation substrate ENS, and the adhesive layer may not be disposed between the touch screen layer TSL and the thin film encapsulation layer TFEL or between the touch screen layer TSL and the encapsulation substrate ENS.

[0079] The optical functional layer OFL may include an anti-reflection layer. The anti-reflection layer can reduce the reflectivity of light (external light) incident on the display panel 10 from the outside.

[0080] In some embodiments, the optical functional layer OFL can be a polarizing film. The OFL may include an opening OFL_OP corresponding to the transmission region TA. Therefore, the light transmittance of the transmission region TA can be significantly improved. The opening OFL_OP can be filled with a transparent material such as optically transparent resin (OCR). In other embodiments, the OFL may include a black matrix and a color filter. The color filter and black matrix may not be disposed in the transmission region TA. For example, the layer including the color filter and black matrix may include holes corresponding to the transmission region TA.

[0081] The panel protection component PB may include an opening PB_OP corresponding to the transmission region TA.

[0082] Figure 3 This is a schematic plan view of the display panel 10 according to an embodiment.

[0083] Reference Figure 3Various components forming the display panel 10 can be disposed on the substrate 100. The substrate 100 may include a display area DA and a peripheral area DPA surrounding the display area DA. The display area DA may include a main display area MDA that can display a main image and a component area CA that may include a transmissive area TA and can display a peripheral image. The component area CA may include a first component area CA1 and a second component area CA2 that can be separated from each other. The peripheral image can be used to generate the entire image together with the main image, or it can be independent of the main image.

[0084] Within the main display area (MDA), primary sub-pixels (Pm) can be arranged. Each primary sub-pixel Pm can be implemented as a display element such as an organic light-emitting diode (OLED). Each primary sub-pixel Pm can emit, for example, red, green, blue, or white light. The main display area (MDA) can be covered by encapsulation components, thus protecting it from external air, moisture, and other influences.

[0085] The first component region CA1 and the second component region CA2 can be located inside the display region DA and surrounded by the main display region MDA. Auxiliary sub-pixels Pa can be arranged in the first component region CA1 and the second component region CA2. Each auxiliary sub-pixel Pa can be implemented by a display element such as an organic light-emitting diode (OLED). Each auxiliary sub-pixel Pa can emit, for example, red, green, blue, or white light. The first component region CA1 and the second component region CA2 can be covered by an encapsulation component, thus protecting them from external air, moisture, etc.

[0086] The first component region CA1 and the second component region CA2 may each include a transmission region TA. The transmission region TA may surround an auxiliary sub-pixel Pa. As another example, the transmission region TA and the auxiliary sub-pixel Pa may be arranged in a grid pattern.

[0087] Because the first component region CA1 and the second component region CA2 can include the transmission region TA, the resolution of each of the first component region CA1 and the second component region CA2 can be lower than the resolution of the main display region MDA. For example, the resolution of each of the first component region CA1 and the second component region CA2 can be approximately 1 / 2, approximately 3 / 8, approximately 1 / 3, approximately 1 / 4, approximately 2 / 9, approximately 1 / 8, approximately 1 / 9, approximately 1 / 16, etc., of the resolution of the main display region MDA. For example, the resolution of the main display region MDA can be approximately 400 ppi, while the resolution of each of the first component region CA1 and the second component region CA2 can be approximately 200 ppi or approximately 100 ppi.

[0088] The pixel circuits driving the main sub-pixel Pm and the auxiliary sub-pixel Pa can be electrically connected to external circuits disposed in the peripheral area DPA. The peripheral area DPA can be equipped with a first scan drive circuit SDRV1, a second scan drive circuit SDRV2, a terminal PAD, a drive voltage supply line 11, and a common voltage supply line 13.

[0089] The first scan driving circuit SDRV1 can transmit scan signals to the pixel circuits driving the main sub-pixel Pm and the auxiliary sub-pixel Pa respectively via scan lines SL. The first scan driving circuit SDRV1 can transmit transmission control signals to each pixel circuit via transmission control lines EL. The second scan driving circuit SDRV2 can be disposed opposite to the first scan driving circuit SDRV1 relative to the main display area MDA, and can be approximately parallel to the first scan driving circuit SDRV1. Some pixel circuits in the pixel circuit of the main sub-pixel Pm of the main display area MDA can be electrically connected to the first scan driving circuit SDRV1, while other pixel circuits in the pixel circuit of the main sub-pixel Pm of the main display area MDA can be electrically connected to the second scan driving circuit SDRV2. Some pixel circuits in the pixel circuit of the auxiliary sub-pixel Pa of the first component area CA1 and the second component area CA2 can be electrically connected to the first scan driving circuit SDRV1, while other pixel circuits in the pixel circuit of the auxiliary sub-pixel Pa of the first component area CA1 and the second component area CA2 can be electrically connected to the second scan driving circuit SDRV2. In an embodiment, the second scan driving circuit SDRV2 may not be formed.

[0090] The terminal PAD can be located on one side of the substrate 100. The terminal PAD may not be covered by an insulating layer and may be exposed to the outside, thereby being electrically connected to the display circuit board 30. A display driver 32 may be disposed on the display circuit board 30. The display driver 32 can generate control signals that are transmitted to the first scan drive circuit SDRV1 and the second scan drive circuit SDRV2. In addition, the display driver 32 can supply a drive voltage ELVDD to the drive voltage supply line 11 and a common voltage ELVSS to the common voltage supply line 13. The drive voltage ELVDD can be applied to the pixel circuits of the main sub-pixel Pm and the auxiliary sub-pixel Pa through the drive power line PL electrically connected to the drive voltage supply line 11, and the common voltage ELVSS can be applied to the counter electrode of the display element through the common voltage supply line 13. The display driver 32 can generate a data signal, and the generated data signal can be transmitted to the pixel circuits of the main sub-pixel Pm and the auxiliary sub-pixel Pa through the fan-out line FW and the data line DL electrically connected to the fan-out line FW.

[0091] The drive voltage supply line 11 may extend along the x-direction at the bottom of the main display area MDA. The common voltage supply line 13 may have a ring shape with an opening on one side, and thus may partially surround the main display area MDA.

[0092] Figure 4A and Figure 4B This is a schematic circuit diagram of sub-pixels of a first pixel and / or a second pixel that may be included in a display panel 10 according to an embodiment.

[0093] Reference Figure 4A The primary sub-pixel Pm and the auxiliary sub-pixel Pa can each include an organic light-emitting diode (OLED). The OLED can be electrically connected to a pixel circuit PC, which is electrically connected to a scan line SL and a data line DL. The pixel circuit PC can include a first transistor T1, a second transistor T2, and a capacitor Cst. The first transistor T1 and the second transistor T2 can be, for example, thin-film transistors.

[0094] The second transistor T2 can be electrically connected to the scan line SL and the data line DL as a switching transistor, and in response to the scan signal Sn input through the scan line SL, it can transmit the data signal DATA input through the data line DL to the first transistor T1.

[0095] The capacitor Cst can be electrically connected to the second transistor T2 and the drive power line PL, and stores the voltage corresponding to the difference between the voltage from the second transistor T2 and the drive voltage ELVDD applied to the drive power line PL.

[0096] The first transistor T1 can be electrically connected as a driving transistor to the driving power line PL and the capacitor Cst, and can control the driving current flowing from the driving power line PL to the organic light-emitting diode (OLED) according to the value of the voltage stored in the capacitor Cst. The OLED can emit light with a specific brightness according to the driving current. A common voltage ELVSS can be applied to the counter electrode (e.g., the cathode) of the OLED.

[0097] Reference Figure 4A The pixel circuit PC may include two transistors and a capacitor, but one or more embodiments are not limited thereto. Figure 4B As shown, the pixel circuit PC may include seven transistors and a capacitor.

[0098] Reference Figure 4B The pixel circuit PC may include a first transistor T1 to a seventh transistor T7, and the first transistor T1 to the seventh transistor T7 may be, for example, thin-film transistors.

[0099] The pixel circuit PC can be electrically connected to the first scan line SL1 that transmits the first scan signal GW, the second scan line SL2 that transmits the second scan signal GI, the third scan line SL3 that transmits the third scan signal GB, the transmit control line EL that transmits the transmit control signal EM, and the data line DL that transmits the data signal DATA.

[0100] The driving power line PL can transmit the driving voltage ELVDD to the first transistor T1, and the initialization voltage line VIL can transmit the initialization voltage VINT to the gate electrode of the first transistor T1 and the organic light-emitting diode OLED. The initialization voltage VINT initializes the first transistor T1 and the organic light-emitting diode OLED.

[0101] In one embodiment, the first scan line SL1, the second scan line SL2, the third scan line SL3, the transmit control line EL, and the initialization voltage line VIL can extend in the x-direction and can be separated from each other in each row. The data line DL and the drive power line PL can extend in the y-direction and can be separated from each other in each column.

[0102] Return to Figure 4B The first transistor T1 can be electrically connected to the driving power line PL via the fifth transistor T5, and electrically connected to the organic light-emitting diode (OLED) via the sixth transistor T6. As a driving transistor, the first transistor T1 can receive the data signal DATA according to the switching operation of the second transistor T2, and supply the driving current Ioled to the OLED.

[0103] The second transistor T2 can be electrically connected to the first scan line SL1 and the data line DL, and can be turned on in response to the first scan signal GW received via the first scan line SL1, thereby performing a switching operation to transmit the data signal DATA transmitted via the data line DL to node N.

[0104] The third transistor T3 can be electrically connected to the organic light-emitting diode (OLED) via the sixth transistor T6. The third transistor T3 can be turned on in response to the first scan signal GW transmitted via the first scan line SL1, and the diode is connected to the first transistor T1.

[0105] The fourth transistor T4 can be turned on in response to the second scan signal GI transmitted via the second scan line SL2, and transmits the initialization voltage VINT from the initialization voltage line VIL to the gate electrode of the first transistor T1, thereby initializing the gate voltage of the first transistor T1.

[0106] The fifth transistor T5 and the sixth transistor T6 can be turned on simultaneously in response to the emission control signal EM received via the emission control line EL, and form a current path to allow the drive current Ioled to flow in the direction from the drive power line PL to the organic light-emitting diode OLED.

[0107] The seventh transistor T7 can be turned on in response to the third scan signal GB received via the third scan line SL3, and will transmit the initialization voltage VINT from the initialization voltage line VIL to the organic light-emitting diode OLED, thereby initializing the organic light-emitting diode OLED. Alternatively, the seventh transistor T7 may not be formed.

[0108] The capacitor Cst can be electrically connected to the drive power line PL and the gate electrode of the first transistor T1, and stores and maintains the voltage corresponding to the difference between the voltages across the capacitor Cst, thereby maintaining the voltage applied to the gate electrode of the first transistor T1.

[0109] An organic light-emitting diode (OLED) can include a pixel electrode and a counter electrode, and a common voltage ELVSS can be applied to the counter electrode. The OLED can receive a drive current Ioled from a first transistor T1, thus emitting light and enabling the display of an image.

[0110] like Figure 4B As shown, the third transistor T3 and the fourth transistor T4 can have dual gate electrodes. However, the third transistor T3 and the fourth transistor T4 can also have a single gate electrode.

[0111] In one embodiment, the primary sub-pixel Pm and the secondary sub-pixel Pa may include the same pixel circuit PC. However, one or more embodiments are not limited thereto. The primary sub-pixel Pm and the secondary sub-pixel Pa may include pixel circuit PCs with different structures. Various modifications can be made. For example, the primary sub-pixel Pm may employ... Figure 4B The pixel circuit PC, and the auxiliary sub-pixel Pa can be adopted Figure 4A The pixel circuit PC.

[0112] Figure 5 This is a schematic plan view illustrating the pixel arrangement structure in the main display area MDA according to an embodiment.

[0113] Reference Figure 5 The main subpixel Pm can be located within the main display area MDA. As used herein, a subpixel is the smallest unit for presenting an image and can be a display element including an organic light-emitting diode (OLED). The emission region of a subpixel can be defined by an opening in the pixel-defining layer. The emission region will be described below.

[0114] The main sub-pixel Pm can include a red sub-pixel Pr, a green sub-pixel Pg, and a blue sub-pixel Pb, and the red sub-pixel Pr, the green sub-pixel Pg, and the blue sub-pixel Pb can emit red light, green light, and blue light, respectively.

[0115] In the first sub-row 1SN of each row N (e.g., 1N, 2N), red subpixels Pr and blue subpixels Pb can be arranged alternately, and green subpixels Pg can be separated from each other at specific intervals in the adjacent second sub-row 2SN, and this arrangement can be repeated up to the Nth row. Blue subpixels Pb and red subpixels Pr can be larger than green subpixels Pg. Red subpixels Pr and blue subpixels Pb in the first sub-row 1SN can be arranged alternately with green subpixels Pg in the second sub-row 2SN. Therefore, red subpixels Pr and blue subpixels Pb can be arranged alternately in the first column 1M, green subpixels Pg can be separated from each other in the adjacent second column 2M, blue subpixels Pb and red subpixels Pr can be arranged alternately in the adjacent third column 3M, green subpixels Pg can be separated from each other in the adjacent fourth column 4M, and this pixel arrangement can be repeated up to the Mth column.

[0116] As another way to represent the pixel arrangement structure, the red sub-pixel Pr is placed on the first and third vertices, which face each other from the vertices of the virtual square VS. The virtual square VS has the center point of the green sub-pixel Pg, which is the center point of the virtual square VS, and the blue sub-pixel Pb is placed on the second and fourth vertices, which are the remaining vertices. The virtual square VS can be modified in various ways, such as into rectangles, rhombuses, parallelograms, etc.

[0117] This pixel arrangement structure is called a Pentile matrix structure or Pentile structure, and by applying rendering operations that represent colors by sharing adjacent pixels, high resolution can be achieved with a small number of pixels.

[0118] Reference Figure 5 The principal sub-pixels Pm are arranged in the form of a Pentile matrix, but one or more embodiments are not limited to this. For example, the principal sub-pixels Pm can be arranged in various forms, such as stripe structures, mosaic arrangements, and delta arrangements.

[0119] Figure 6 This is a schematic plan view illustrating the pixel arrangement structure in the component region CA according to an embodiment.

[0120] Reference Figure 6 The auxiliary subpixels Pa can be arranged in the component region CA. Each of the auxiliary subpixels Pa can emit any one of red, green, blue, and white light. Figure 6The component region CA can be the first component region CA1 and / or the second component region CA2.

[0121] The component region CA may include a transmission region TA and a pixel group PG, wherein the pixel group PG includes at least one auxiliary sub-pixel Pa. The pixel group PG and the transmission region TA may be arranged alternately in the x and y directions, for example, in a grid pattern. The component region CA may include multiple pixel groups PG and multiple transmission regions TA.

[0122] A pixel group PG can be defined as a collection of subpixels including auxiliary subpixels Pa grouped in a preset unit. For example, as Figure 6 As shown, a pixel group PG may include eight auxiliary sub-pixels Pa arranged in a pentile configuration. For example, a pixel group PG may include two red sub-pixels Pr, four green sub-pixels Pg, and two blue sub-pixels Pb.

[0123] The four auxiliary sub-pixels Pa can have a pixel arrangement structure in which the auxiliary sub-pixels Pa are respectively arranged on the vertices of the virtual square VS'. In an embodiment, the virtual square VS' can be a parallelogram. The red sub-pixel Pr and the blue sub-pixel Pb can be arranged in the first sub-row 1SN, and the two green sub-pixels Pg can be arranged in the second sub-row 2SN.

[0124] In the component region CA, the basic unit U, comprising a specific number of pixel groups PG and a specific number of transmission regions TA, can be repeatedly arranged in the x and y directions. For example... Figure 6 As shown, the basic unit U can have a shape in which two pixel groups PG and two transmission regions TA surrounding the pixel groups PG are clustered in a square form. The basic unit U can be generated by dividing the repeating shape, and does not indicate that the structure is broken.

[0125] like Figure 5 As shown, in the main display area MDA, a corresponding unit U' with the same area as the basic unit U can be set. The number of main sub-pixels Pm included in the corresponding unit U' can be greater than the number of auxiliary sub-pixels Pa included in the basic unit U. For example, the number of auxiliary sub-pixels Pa included in the basic unit U can be 16, and the number of main sub-pixels Pm included in the corresponding unit U' can be 32. The ratio of the number of auxiliary sub-pixels Pa to the number of main sub-pixels Pm per equal area can be approximately 1:2.

[0126] Because the pixel group PG and the transmission region TA are arranged alternately and the number of auxiliary sub-pixels Pa included in the pixel group PG is small, the auxiliary sub-pixels Pa can be more dispersed in the basic unit U.

[0127] like Figure 6As shown, the pixel arrangement structure of the auxiliary sub-pixel Pa is a Pentile structure, and because the resolution of the component region CA is half the resolution of the main display region MDA, the pixel arrangement structure of the component region CA is a 1 / 2 Pentile structure. However, Figure 5 and Figure 6 The pixel arrangement structures and methods shown are merely examples, and one or more embodiments are not limited thereto. The arrangement structure, number, and arrangement method of auxiliary sub-pixels Pa included in pixel group PG can vary depending on the resolution of component region CA. For example, the pixel arrangement structure of main display area MDA can be different from the pixel arrangement structure of component region CA.

[0128] Figure 7A and Figure 7B This is a schematic plan view of the shape of an opaque layer BML that can be arranged in the component area CA according to an embodiment.

[0129] Reference Figure 7A and Figure 7B The opaque layer BML can be placed in the second component area CA2 instead of the first component area CA1. The opaque layer BML and the lower hole BMLH can have various shapes and sizes.

[0130] Reference Figure 7A The lower aperture BMLH is rectangular in shape and can be positioned to not correspond to pixel group PG. Due to the shape and size of the lower aperture BMLH, the shape and size of the transmission region TA can be defined. In a planar view, two lower aperture BMLHs can exist in the basic unit U, and the lower aperture BMLHs can be arranged alternately with pixel group PG.

[0131] Reference Figure 7B The shape of the lower aperture BMLH can be circular. When the shape of the transmission region TA is approximately circular, light diffraction can be increased. Therefore, when the component located at the bottom of the component region CA is a camera, it is advantageous to design the shape of the transmission region TA to be approximately circular. The shape of the lower aperture BMLH can be elliptical or a polygon with at least eight sides that can approximate a circle. Various modifications can be made to the lower aperture BMLH. For example, the lower aperture BMLH can be set as a single or multiple.

[0132] Figure 8 and Figure 9 This is a schematic cross-sectional view showing a portion of the display panel 10 according to an embodiment, and schematically showing the main display area MDA and the component area CA. Figure 8 This is a cross-sectional view of the first component region CA1. Figure 9 This is a cross-sectional view of the second component region CA2.

[0133] The main sub-pixel Pm can be disposed in the main display area MDA, and the auxiliary sub-pixel Pa and the transmissive area TA can be disposed in the first component area CA1 and the second component area CA2. In the main display area MDA, a main pixel circuit PC including a main thin-film transistor TFT and a main capacitor Cst, and a main organic light-emitting diode OLED connected to the main pixel circuit PC as a display element, can be disposed. In the first component area CA1 and the second component area CA2, an auxiliary pixel circuit PC' including an auxiliary thin-film transistor TFT' and an auxiliary capacitor Cst', and an auxiliary organic light-emitting diode OLED' connected to the auxiliary pixel circuit PC' as a display element, can be disposed.

[0134] The stacked structure of the components included in the display panel 10 will be described below. The display panel 10 may include a substrate 100, a buffer layer 111, a circuit layer PCL, and a display element layer EDL stacked on top of each other.

[0135] As described above, substrate 100 may include insulating materials such as glass, quartz polymer resin, or combinations thereof.

[0136] A buffer layer 111 may be disposed on a substrate 100 and may reduce or block the penetration of external materials, moisture, or external air from the bottom of the substrate 100, thereby providing a flat surface on the substrate 100. The buffer layer 111 may comprise inorganic materials (such as oxides, nitrides, or combinations thereof), organic materials, or organic / inorganic material composites, and may have a single-layer or multi-layer structure comprising organic / inorganic materials. A barrier layer (not shown) may be further disposed between the substrate 100 and the buffer layer 111 to prevent the penetration of external air. In some embodiments, the buffer layer 111 may comprise silicon oxide (SiO2) or silicon nitride (SiN). X (or a combination thereof). Buffer layer 111 may include a first buffer layer 111a and a second buffer layer 111b stacked on top of each other.

[0137] like Figure 9 As shown, in the second component region CA2, an opaque layer BML can be disposed between the first buffer layer 111a and the second buffer layer 111b. In another embodiment, the opaque layer BML can be disposed between the substrate 100 and the first buffer layer 111a. The opaque layer BML can be disposed below the auxiliary pixel circuit PC' and can prevent the degradation of the characteristics of the auxiliary thin-film transistor TFT' caused by light emitted from components, etc. Furthermore, the opaque layer BML can prevent light emitted from components, etc., or directed to them, from diffracting through the slits between the lines connected to the auxiliary pixel circuit PC'. The opaque layer BML may not be in the transmission region TA.

[0138] In some embodiments, the opaque layer BML may include a lightproof metal. The opaque layer BML can be electrically connected to the line GCL located on different layers via contact holes. The opaque layer BML can receive a constant voltage or signal from the line GCL and prevent damage to the pixel circuitry due to electrostatic discharge. In the second component region CA2, multiple opaque layers BML can be provided, and in some cases, different voltages can be applied to the respective opaque layers BML. For example, the opaque layer BML can receive a drive voltage ELVDD or a scan signal. When the opaque layer BML receives a constant voltage or signal, the probability of electrostatic discharge can be greatly reduced. The opaque layer BML may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), copper (Cu), or combinations thereof. The opaque layer BML may be a single layer or multiple layers comprising the above materials (multiple materials).

[0139] In other embodiments, the opaque layer BML may include a lightproof organic material. For example, the opaque layer BML may include carbon, black acrylic resin, photoresist including black matrix, or combinations thereof.

[0140] The circuit layer PCL can be disposed on the buffer layer 111 and can include pixel circuits PC and PC', a first gate insulating layer 112, a second gate insulating layer 113, an interlayer insulating layer 115, and a planarization layer 117. The main pixel circuit PC can include a main thin-film transistor TFT and a main capacitor Cst, and the auxiliary pixel circuit PC' can include an auxiliary thin-film transistor TFT' and an auxiliary capacitor Cst'.

[0141] On the buffer layer 111, a main thin-film transistor (TFT) and an auxiliary thin-film transistor (TFT') can be disposed. The main TFT includes a first semiconductor layer A1, a first gate electrode G1, a first source electrode S1, and a first drain electrode D1. The auxiliary TFT' includes a second semiconductor layer A2, a second gate electrode G2, a second source electrode S2, and a second drain electrode D2. The main TFT can be electrically connected to and drives the main organic light-emitting diode (OLED). The auxiliary TFT' can be electrically connected to and drives the auxiliary organic light-emitting diode (OLED').

[0142] The first semiconductor layer A1 and the second semiconductor layer A2 may be disposed on the buffer layer 111 and include polycrystalline silicon. In other embodiments, the first semiconductor layer A1 and the second semiconductor layer A2 may include amorphous silicon. In other embodiments, the first semiconductor layer A1 and the second semiconductor layer A2 may each include an oxide material, said oxide material including at least one material selected from the group consisting of indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), Cr, Ti, and zinc (Zn). The first semiconductor layer A1 and the second semiconductor layer A2 may each include a channel region and a source region and a drain region doped with impurities.

[0143] like Figure 9 As shown, the second semiconductor layer A2 can be stacked with the opaque layer BML, and the second buffer layer 111b is located between them. In an embodiment, the width of the second semiconductor layer A2 can be smaller than the width of the opaque layer BML, so that when projected along a direction perpendicular to the substrate 100, the second semiconductor layer A2 can be completely stacked with the opaque layer BML.

[0144] The first gate insulating layer 112 may cover the first semiconductor layer A1 and the second semiconductor layer A2. The first gate insulating layer 112 may include an inorganic insulating material, such as SiO2 or SiN. x The inorganic insulating layer 112 may be a single layer or multiple layers comprising the aforementioned inorganic insulating materials (various inorganic insulating materials). The materials may include silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), zinc oxide (ZnO2), or combinations thereof.

[0145] On the first gate insulating layer 112, the first gate electrode G1 and the second gate electrode G2 can be configured to be stacked with the first semiconductor layer A1 and the second semiconductor layer A2, respectively. The first gate electrode G1 and the second gate electrode G2 can be a single layer or multiple layers including Mo, Al, Cu, Ti, etc. For example, the first gate electrode G1 and the second gate electrode G2 can each be a single layer including Mo.

[0146] The second gate insulating layer 113 may cover the first gate electrode G1 and the second gate electrode G2. The second gate insulating layer 113 may include an inorganic insulating material, such as SiO2 or SiN. x The inorganic insulating layer 113 may be a single layer or multiple layers comprising the above-mentioned inorganic insulating materials (various inorganic insulating materials).

[0147] On the second gate insulating layer 113, the first upper electrode CE2 of the main capacitor Cst and the second upper electrode CE2' of the auxiliary capacitor Cst' are disposed.

[0148] In the main display area MDA, the first upper electrode CE2 can be stacked with the first gate electrode G1 below it. The first gate electrode G1 and the first upper electrode CE2, which are stacked together and have a second gate insulating layer 113 between them, can form the main capacitor Cst. The first gate electrode G1 can be the first lower electrode CE1 of the main capacitor Cst.

[0149] In the first component region CA1 and the second component region CA2, the second upper electrode CE2' can be stacked with the second gate electrode G2 below it. The second gate electrode G2 and the second upper electrode CE2', which are stacked together and have a second gate insulating layer 113 between them, can form an auxiliary capacitor Cst'. The second gate electrode G2 can be the second lower electrode CE1' of the auxiliary capacitor Cst'.

[0150] The first upper electrode CE2 and the second upper electrode CE2' may each include Al, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Ca, Mo, Ti, W and / or Cu, and may be a single layer or multiple layers including the above materials (multiple materials).

[0151] The interlayer insulating layer 115 may cover the first upper electrode CE2 and the second upper electrode CE2'. The interlayer insulating layer 115 may include SiO2, SiN x Inorganic insulating materials, such as SiON, Al2O3, TiO2, Ta2O5, HfO2, ZnO2, etc., or combinations thereof. The interlayer insulation layer 115 may be a single layer or multiple layers comprising the above-mentioned inorganic insulating materials (various inorganic insulating materials).

[0152] The first gate insulating layer 112, the second gate insulating layer 113, and the interlayer insulating layer 115 can be collectively referred to as the inorganic insulating layer IIL. The inorganic insulating layer IIL may have a first aperture H1 corresponding to the transmission region TA. The first aperture H1 may expose a portion of the upper surface of the buffer layer 111 or the substrate 100. The first aperture H1 may be formed as an overlap of openings in the first gate insulating layer 112, the second gate insulating layer 113, and the interlayer insulating layer 115, the openings corresponding to the transmission region TA. Such openings can be formed separately by individual processes or simultaneously by the same process. When the opening is formed by individual processes, the inner surface of the first aperture H1 may not be smooth and may have a step difference, for example, a stepped shape.

[0153] Unlike the description above, the inorganic insulating layer IIL may have a groove instead of a first hole H1, through which the buffer layer 111 can be exposed. As another example, the inorganic insulating layer IIL may not have a groove or a first hole H1 corresponding to the transmission region TA. Because the inorganic insulating layer IIL comprises mostly inorganic insulating material with high light transmittance, it can still have sufficient light transmittance even without a hole or groove corresponding to the transmission region TA. Therefore, the inorganic insulating layer IIL can help the component receive / transmit a sufficient amount of light.

[0154] Source electrodes S1 and S2, and drain electrodes D1 and D2 can be disposed on the interlayer insulating layer 115. Source electrodes S1 and S2, and drain electrodes D1 and D2 can each comprise a conductive material, such as Mo, Al, Cu, Ti, or a combination thereof, and can be a multilayer or a single layer comprising the aforementioned materials (multiple materials). For example, source electrodes S1 and S2, and drain electrodes D1 and D2 can have a Ti / Al / Ti multilayer structure.

[0155] The planarization layer 117 can be configured to cover the source electrodes S1 and S2 and the drain electrodes D1 and D2. The planarization layer 117 can have a flat upper surface, such that the first pixel electrode 121 and the second pixel electrode 121' disposed thereon can be flat.

[0156] The planarization layer 117 may comprise organic or inorganic materials and may have a single-layer or multi-layer structure. The planarization layer 117 may comprise general-purpose polymers (such as benzocyclobutene (BCB), polyimide, hexamethyldisiloxane (HMDSO), polymethyl methacrylate (PMMA), or polystyrene (PS)), polymer derivatives with phenolic groups, acrylic polymers, imide polymers, aryl ether polymers, amide polymers, fluorinated polymers, p-xylene polymers, vinyl alcohol polymers, etc., or combinations thereof. The planarization layer 117 may comprise inorganic insulating materials, such as SiO2, SiN... x The materials used are SiON, Al2O3, TiO2, Ta2O5, HfO2, or ZnO2. When forming the planarization layer 117, mechanochemical polishing can be performed on the upper surface of the planarization layer 117 to provide a flat upper surface after the planarization layer 117 is formed.

[0157] The planarization layer 117 may have a second aperture H2 corresponding to the transmission region TA. The second aperture H2 may be stacked with the first aperture H1. (Refer to...) Figure 8 and Figure 9The second hole H2 can be larger than the first hole H1. In other embodiments, the planarization layer 117 covers the periphery of the first hole H1 in the inorganic insulating layer 111, and the area of ​​the second hole H2 can be larger than the area of ​​the first hole H1.

[0158] The planarization layer 117 may have vias through which either the first source electrode S1 or the first drain electrode D1 of the main thin-film transistor TFT is exposed, and the first pixel electrode 121 can be electrically connected to the main thin-film transistor TFT by contacting the first source electrode S1 or the first drain electrode D1 via the vias. Furthermore, the planarization layer 117 may have vias through which either the second source electrode S2 or the second drain electrode D2 of the auxiliary thin-film transistor TFT' is exposed, and the second pixel electrode 121' can be electrically connected to the auxiliary thin-film transistor TFT' by contacting the second source electrode S2 or the second drain electrode D2 via the vias.

[0159] The first pixel electrode 121 and the second pixel electrode 121' may each comprise a conductive oxide, such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), zinc aluminum oxide (AZO), or combinations thereof. The first pixel electrode 121 and the second pixel electrode 121' may include a reflective layer comprising Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, or mixtures thereof. For example, the first pixel electrode 121 and the second pixel electrode 121' may have a structure in which a layer comprising ITO, IZO, ZnO, or In2O3 is disposed above / below the aforementioned reflective layer. The first pixel electrode 121 and the second pixel electrode 121' may have an ITO / Ag / ITO stacked structure.

[0160] The pixel defining layer 119 may cover the edges of each of the first pixel electrode 121 and the second pixel electrode 121' on the planarization layer 117, and may include a first opening OP1 and a second opening OP2 exposing the centers of the first pixel electrode 121 and the second pixel electrode 121'. The emission regions of the organic light-emitting diodes OLED and OLED' (e.g., the size and shape of the primary sub-pixel Pm and the auxiliary sub-pixel Pa) may be defined by the first opening OP1 and the second opening OP2.

[0161] The pixel defining layer 119 can prevent the generation of electric arcs at the edges of the pixel electrodes 121 and 121' by increasing the distance between the edges of the pixel electrodes 121 and 121' and the counter electrode 123 disposed above the pixel electrodes 121 and 121'. The pixel defining layer 119 may include an organic insulating material, such as polyimide, polyamide, acrylic resin, BCB, HMDSO, phenolic resin, or combinations thereof, and may be formed by using a spin coating method or the like.

[0162] The pixel defining layer 119 may include a third aperture H3 disposed in the transmissive region TA. The third aperture H3 may be stacked with the first aperture H1 and the second aperture H2. Due to the first aperture H1 to the third aperture H3, the light transmittance of the transmissive region TA can be improved. Figure 8 and Figure 9 As shown, the buffer layer 111 can be continuously disposed corresponding to the transmission region TA, but the buffer layer 111 may include holes disposed in the transmission region TA. A portion of the counter electrode 123, as described below, can be disposed on the inner surface of the first hole H1 to the third hole H3.

[0163] Inside the first opening OP1 and the second opening OP2 of the pixel limiting layer 119, a first emitting layer 122b and a second emitting layer 122b' can be respectively disposed corresponding to the first pixel electrode 121 and the second pixel electrode 121'. The first emitting layer 122b and the second emitting layer 122b' can include polymer materials or low molecular weight materials, and can emit red light, green light, blue light or white light.

[0164] The organic functional layer 122e may be disposed above and / or below the first emission layer 122b and the second emission layer 122b'. The organic functional layer 122e may include the first functional layer 122a and / or the second functional layer 122c. The first functional layer 122a or the second functional layer 122c may not be formed.

[0165] The first functional layer 122a may be disposed below the first emission layer 122b and the second emission layer 122b'. The first functional layer 122a may be a single layer or multiple layers comprising organic materials. The first functional layer 122a may be a hole transport layer (HTL) with a single-layer structure. As another example, the first functional layer 122a may include a hole injection layer (HIL) and an HTL. The first functional layer 122a may be integrally formed to correspond to the organic light-emitting diodes OLED and OLED' included in the main display area MDA and the first component area CA1 and the second component area CA2.

[0166] The second functional layer 122c can be disposed on the first emission layer 122b and the second emission layer 122b'. The second functional layer 122c can be a single layer or multiple layers comprising organic materials. The second functional layer 122c may include an electron transport layer (ETL) and / or an electron injection layer (EIL). The second functional layer 122c can be integrally formed to correspond to the organic light-emitting diodes OLED and OLED' included in the main display area MDA and the first component area CA1 and the second component area CA2.

[0167] Counter electrode 123 may be disposed on the second functional layer 122c. Counter electrode 123 may include a conductive material with low work function. For example, counter electrode 123 may include a (semi-transparent) transparent layer comprising Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, or alloys thereof. As another example, counter electrode 123 may also include a layer comprising ITO, IZO, ZnO, or In2O3 located on a (semi-transparent) transparent layer comprising the aforementioned materials (multiple materials). Counter electrode 123 may be integrally formed to correspond to organic light-emitting diodes OLED and OLED' included in the main display area MDA and the first component area CA1 and the second component area CA2.

[0168] In the main display area MDA, the layer formed from the first pixel electrode 121 to the counter electrode 123 can form a main organic light-emitting diode (OLED). In the component area CA, the layer formed from the second pixel electrode 121' to the counter electrode 123 can form an auxiliary organic light-emitting diode (OLED').

[0169] An upper layer 150 comprising an organic material may be formed on the counter electrode 123. The upper layer 150 may be a layer prepared to protect the counter electrode 123 and improve light extraction efficiency. The upper layer 150 may comprise an organic material having a refractive index greater than that of the counter electrode 123. As another example, the upper layer 150 may be formed by stacking layers with different refractive indices. For example, the upper layer 150 may be formed by stacking a high-refractive-index layer / a low-refractive-index layer / a high-refractive-index layer. The refractive index of the high-refractive-index layer may be equal to or greater than about 1.7, while the refractive index of the low-refractive-index layer may be less than or equal to about 1.3.

[0170] The upper layer 150 may additionally include LiF. As another example, the upper layer 150 may additionally include materials such as SiO2 or SiN. x Inorganic insulating materials.

[0171] The first functional layer 122a, the second functional layer 122c, the counter electrode 123, and the upper layer 150 may include a through-hole TAH corresponding to the transmission region TA. For example, the first functional layer 122a, the second functional layer 122c, the counter electrode 123, and the upper layer 150 may each have an opening corresponding to the transmission region TA. The areas of the openings may be substantially the same. For example, the area of ​​the opening of the counter electrode 123 may be substantially the same as the area of ​​the through-hole TAH.

[0172] The description of the via TAH corresponding to the transmission region TA indicates that the via TAH is superimposed on the transmission region TA. The area of ​​the via TAH can be smaller than the area of ​​the first hole H1 formed in the inorganic insulating layer IIL. Therefore, Figure 8 and Figure 9It is shown that the width Wt of the through hole TAH is smaller than the width of the first hole H1. Here, the area of ​​the through hole TAH can be defined as the area of ​​the opening with the smallest area among the openings forming the through hole TAH. The area of ​​the first hole H1 can also be defined as the area of ​​the opening with the smallest area among the openings forming the first hole H1.

[0173] Since the via TAH and portion of the counter electrode 123 may not be within the transmission region TA, the light transmittance in the transmission region TA can be significantly improved. The counter electrode 123, including the aforementioned via TAH, can be formed using various methods. After the material forming the counter electrode 123 is formed on the entire substrate 100, a portion of the material corresponding to the transmission region TA can be removed by laser lift-off, thus forming the counter electrode 123 with the via TAH. In another embodiment, the counter electrode 123 with the via TAH can be formed using a metal self-patterning (MSP) method. In yet another embodiment, the counter electrode 123 with the via TAH can be formed by depositing the counter electrode 123 using a fine metal mask (FMM).

[0174] Figure 10 and Figure 11 This is a schematic view of the display device 1 according to an embodiment. Figure 12 This is an example view used to explain the image signal synthesis method according to an embodiment.

[0175] Reference Figure 10 and Figure 11 The display device 1 may include a display panel 10, a scan driver 15, and a display driver 32. The display device 1 may also include a first camera 40a' and a second camera 40b', wherein the first camera 40a' is configured as a first component to correspond to the first component area CA1 of the display panel 10, and the second camera 40b' is configured as a second component to correspond to the second component area CA2.

[0176] The first camera 40a' and the second camera 40b' can be arranged adjacent to each other to face the same direction and can be embedded in a single integrated component. In one embodiment, the first camera 40a' and the second camera 40b' can have the same performance. In another embodiment, the first camera 40a' and the second camera 40b' can have different performance. For example, the first camera 40a' can be a low-sensitivity camera with high resolution, while the second camera 40b' can be a high-sensitivity camera with low resolution.

[0177] The first camera 40a' and the second camera 40b' may each include an image sensor. The image sensor may include photoelectric conversion elements, such as a charge-coupled device (CCD) or complementary metal-oxide-semiconductor (CMOS). The image sensor acquires image information by capturing the scene in front of it. A color filter and a lens (not shown) for receiving light signals may be included on the front of the image sensor. The color filter may allow light in a specified wavelength band to pass through and may be an RGB Bayer matrix filter.

[0178] An image sensor may include light-receiving pixels arranged in a two-dimensional array. Each light-receiving pixel of the image sensor can receive light passing through a corresponding color filter and can convert the light into an electrical signal. Depending on the corresponding color filter, the light-receiving pixel may be a red pixel R, a green pixel G, or a blue pixel B. The size, shape, and arrangement of the light-receiving pixels of the image sensor may be the same as or different from the size, shape, and arrangement of the sub-pixels of the display panel 10. For example, some light-receiving pixels of the image sensor may be arranged corresponding to pixel group PG, and other light-receiving pixels of the image sensor may be arranged corresponding to the transmissive region TA.

[0179] In display mode, display device 1 can display an image on display area DA of display panel 10, and the first camera 40a' and the second camera 40b' can be idle (turned off). Display device 1 can generate an image corresponding to an electrical signal and can display the image on display area DA of display panel 10. The electrical signal can be input from the first camera 40a' and the second camera 40b' which are activated in shooting mode. The image can be displayed on the main display area MDA and / or the first component area CA1 and the second component area CA2.

[0180] In each of the first component region CA1 and the second component region CA2, as Figure 6 As shown, pixel group PG and transmission area TA can be set. Figure 7A and Figure 7B As shown, the opaque layer BML may not be set in the first component area CA1, but in the second component area CA2, the opaque layer BML may be set in an area other than the transmissive area TA, for example, corresponding to the pixel group PG and the signal line.

[0181] Reference Figure 2A and Figure 2B The main display area MDA can be formed between the first component area CA1 and the second component area CA2, but reference Figure 11Because the first component region CA1 and the second component region CA2 can be formed adjacent to each other, the main display region MDA may not be formed between the first component region CA1 and the second component region CA2. In some embodiments, the transmissive region TA may be formed between the first component region CA1 and the second component region CA2.

[0182] The display driver 32 can be implemented as a variety of hardware and / or software components capable of performing specific functions. For example, the display driver 32 can be a data processor embedded in hardware and having physical structure circuitry to perform functions expressed in code or commands included in a program. Examples of data processors embedded in hardware may include microprocessors, central processing units (CPUs), processor cores, multiprocessors, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), etc., but one or more embodiments are not limited thereto.

[0183] Display driver 32 may include camera driver 322, signal processor 324, and data driver 326.

[0184] In shooting mode, camera driver 322 can activate the first camera 40a' and the second camera 40b', and can output a control signal CS for controlling the driving of the first camera 40a' and / or the second camera 40b'. Activation of the first camera 40a' and the second camera 40b' can be selectively performed based on user activation requests (e.g., execution of related applications, etc.). As another example, the first camera 40a' and the second camera 40b' can be automatically activated when an event related to the activation of the first camera 40a' and the second camera 40b' occurs.

[0185] The first camera 40a' and the second camera 40b' may have the same or different perspectives. The real-world region in the image captured by the first camera 40a' may be the same as or partially overlap with the real-world region in the image captured by the second camera 40b'.

[0186] The signal processor 324 can reduce noise in the image signal and perform signal processing for quality enhancement, such as gamma correction, color filter array interpolation, color matrix, color correction, color enhancement, etc.

[0187] Signal processor 324 can process output signals from the first camera 40a' and the second camera 40b', and can output the processed output signals to data driver 326. The output signal from the first camera 40a' can be a first image signal IM1, and the output signal from the second camera 40b' can be a second image signal IM2. The light-receiving pixels of the first camera 40a' can obtain the first image signal IM1 for capturing a scene including the target object OB by using light incident on the first component region CA1. The light-receiving pixels of the second camera 40b' can obtain the second image signal IM2 for capturing a scene including the target object OB by using light incident on the second component region CA2.

[0188] In some embodiments, the signal processor 324 can correct the image signal by analyzing the brightness (illuminance) of the image signal. The signal processor 324 can receive a first image signal IM1 from a first camera 40a' and a second image signal IM2 from a second camera 40b', and can sequentially read brightness values ​​based on the coordinates of the light-receiving pixels of the first image signal IM1 and the second image signal IM2 to generate composite image signals IMs. The first image signal IM1 and the second image signal IM2 may each include degradation data. The degradation data can be brightness values ​​(pixel data) that deviate from a reference brightness value range. For example, the signal processor 324 can determine the brightness value of the first image signal IM1 that is equal to or greater than the reference brightness value as degradation data. The composite image signals IMs can be image signals generated by converting the degradation data of the first image signal IM1 based on the pixel data of the second image signal IM2.

[0189] In one embodiment, the signal processor 324 can read the pixel data of each light-receiving pixel in the first image signal IM1 according to the coordinates of the light-receiving pixel, and can detect degraded data whose brightness value is equal to or greater than a reference brightness value. The signal processor 324 can replace the degraded data of the first image signal IM1 with the pixel data of the light-receiving pixel at the corresponding coordinates of the second image signal IM2, thus generating a composite image signal IMs. In another embodiment, the signal processor 324 can combine the first image signal IM1 and the second image signal IM2 by setting weights, thus generating a composite image signal IMs. For example, the composite image signal IMs can be determined according to the following Equation 1.

[0190] IMs(x,y)=IM1(x,y)*w+IM2(x,y)*(1-w)……(1)

[0191] Where IM1(x,y) is the brightness value of the (x,y) coordinates of the first image signal IM1, IM2(x,y) is the brightness value of the (x,y) coordinates of the second image signal IM2, IMs(x,y) is the brightness value of the (x,y) coordinates of the synthesized image signal IMs, and w is the weight. The coordinates in Equation 1 are the coordinates of the light-receiving pixels of the image sensor.

[0192] The detection of degraded data in the first image signal IM1 and the second image signal IM2 can be performed using various methods other than those described above. For example, the signal processor 324 can convert the first image signal IM1 and the second image signal IM2 into signals in the frequency domain using a Fourier transform (e.g., a discrete Fourier transform (DFT)), determine the pixel data of the first image signal IM1 with an amplitude greater than a reference amplitude as degraded data, and convert the degraded data of the first image signal IM1 into pixel data of the light-receiving pixel at the corresponding coordinates of the second image signal IM2, thereby generating a synthetic image signal IMs.

[0193] like Figure 12 As shown, the signal processor 324 can arrange the first image signal IM1 and the second image signal IM2 through image registration. The signal processor 324 can generate composite image signals IMs based on image signals IM11 and IM21 in corresponding regions, and can use image signals IM12 and IM22 in regions other than the corresponding regions for image synthesis without using them.

[0194] Because the opaque layer BML is not located in the first component region CA1, light will be diffracted due to the gaps between the signal lines in the first component region CA1. However, the transmittance in the first component region CA1 can be greater than that in the second component region CA2. Because the opaque layer BML can be positioned corresponding to the pixel group PG and signal lines in the second component region CA2, the transmittance in the second component region CA2 can be less than that in the first component region CA1, but light diffraction can be prevented.

[0195] The display device 1 according to an embodiment can generate synthetic image signals IMs by considering the differences between the pixel structure of the first component region CA1 and the pixel structure of the second component region CA2 (e.g., differences between image signals based on the arrangement of the opaque layer BML). For example, the display device 1 according to an embodiment can detect degraded data based on the light diffraction of the first image signal IM1 generated by the image sensor of the first component region CA1, and correct the degraded data based on the pixel data of the corresponding region of the second image signal IM2 generated by the image sensor of the second component region CA2, thereby providing a high-quality image signal. As another example, the display device 1 can separate the foreground and background from the first image signal IM1 and the second image signal IM2, such as a person, where the foreground can mainly use the first image signal IM1 generated by the image sensor of the first component region CA1, and the background can mainly use the second image signal IM2 generated by the image sensor of the second component region CA2. Therefore, a clear image without diffraction can be generated.

[0196] The signal processor 324 can output the composite image signal IMs to the data driver 326. The data driver 326 can output a data signal of voltage type and / or current type corresponding to the composite image signal IMs to the main sub-pixel Pm and the auxiliary sub-pixel Pa of the display panel 10 in response to the output of the scan signal from the scan driver 15 to the main sub-pixel Pm and the auxiliary sub-pixel Pa.

[0197] Upon user request, signal processor 324 can output either the first image signal IM1 or the second image signal IM2 to data driver 326 without image compositing.

[0198] Figure 13 This is a schematic plan view illustrating the pixel arrangement structure in the component region CA according to an embodiment. Figure 14A and Figure 14B It is a schematic plan view of the shape of the opaque layer BML that can be set in the component area CA. Figure 13 The component region CA can be the first component region CA1 and the second component region CA2.

[0199] Reference Figure 13 According to an embodiment, the pixel arrangement structure of the component region CA can be a 1 / 4 Pentile structure. In an embodiment, in pixel group PG, eight auxiliary sub-pixels Pa can be arranged in a Pentile configuration, but the basic unit U can include only one pixel group PG. The remaining area of ​​the basic unit U can be a transmissive region TA. For example, the area of ​​the transmissive region TA of the component region CA can be approximately 3 / 4 of the area of ​​the component region CA. Figure 5 and Figure 13 In one embodiment, the number of auxiliary sub-pixels Pa and the number of primary sub-pixels Pm arranged in the same area can be in a ratio of approximately 1:4. A pixel group PG can be surrounded by a transmission region TA.

[0200] Reference Figure 14A and Figure 14B The opaque layer BML can be placed in the second component area CA2 instead of the first component area CA1. The shape and size of the opaque layer BML and the lower hole BMLH can be varied.

[0201] Reference Figure 14A The lower aperture (BMLH) can have an "L" shape and may not correspond to pixel group (PG). (See reference...) Figure 14B The lower hole BMLH can have a circular shape and can be set to multiple.

[0202] The above embodiments are examples in which components are arranged in component areas, but in other embodiments, a single component can move between multiple component areas and perform functions.

[0203] Figure 15 This is a schematic cross-sectional view of the display panel 10 according to an embodiment. Figure 16 and Figure 17 It includes Figure 15 A schematic view of the display device 1' of the display panel 10.

[0204] Reference Figure 15 The display device 1' may include a display panel 10 and components 40 stacked with the display panel 10. The display panel 10 may include a first component area CA1, a second component area CA2, and a main display area MDA. The first component area CA1 and the second component area CA2 may be separate from each other. (See reference...) Figure 15 The main display area MDA can be set between the first component area CA1 and the second component area CA2, but if... Figure 17 As shown, since the first component region CA1 and the second component region CA2 can be formed adjacent to each other, the main display region MDA may not be located between the first component region CA1 and the second component region CA2. In some embodiments, the transmissive region TA may be formed between the first component region CA1 and the second component region CA2.

[0205] like Figure 16 and Figure 17 As shown, component 40 may be a camera 40' that includes an image sensor and a module for driving the image sensor. In the following text, references to the camera will be omitted. Figures 10 to 12 The provided description is the same as the description.

[0206] The camera 40' can move relative to the display panel 10 in the xy plane according to the control signal CS from the camera driver 322. The moving parts connected to the camera 40' can be provided in various forms, including devices and structures (e.g., motors and cylinders) that move the camera 40'.

[0207] In shooting mode, camera 40' can move to a first component area CA1 to capture a scene including the target object OB using light incident on the first component area CA1 and obtain a first image signal IM1. Camera 40' can also move to a second component area CA2 to capture a scene including the target object OB using light incident on the second component area CA2 and obtain a second image signal IM2. For example, camera 40' can obtain a first image signal IM1 and a second image signal IM2 with a time difference.

[0208] The signal processor 324 can generate a composite image signal IMs, which synthesizes a first image signal IM1 and a second image signal IM2. The signal processor 324 can detect degraded data in the first image signal IM1 and generate the composite image signal IMs by correcting the first image signal IM1 based on pixel data corresponding to the degraded data in the second image signal IM2.

[0209] Figure 18 and Figure 19 This is a schematic plan view of the display panel 10' according to an embodiment. Figure 20 This is a schematic cross-sectional view of the display panel 10' according to an embodiment, and it can be compared with... Figure 18 The cross-section taken along line II-II' corresponds to the display panel 10'.

[0210] Reference Figure 18 and Figure 19 According to an embodiment, the display panel 10' includes a display area DA that can display images and a peripheral area DPA that can not display images. The display area DA may include a main display area MDA and a component area CA.

[0211] like Figure 5 As shown, in the main display area MDA, the main sub-pixels Pm can be arranged in a pentile configuration.

[0212] The component region CA can be a bar shape. For example... Figure 6 or Figure 13 As shown, the auxiliary sub-pixel Pa can be arranged in the component region CA, and the component region CA can include a pixel group PG and a transmission region TA, wherein the pixel group PG includes at least one auxiliary sub-pixel Pa. Figure 7A and Figure 7B as well as Figure 14A and Figure 14B As shown, the opaque layer BML can be disposed in component region CA, similar to the second component region CA2. The opaque layer BML can have a lower aperture BMLH, which has a rectangular shape, an "L" shape, or a circular shape and corresponds to the transmissive region TA.

[0213] Corresponding to component area CA, first component 40a and second component 40b can be set separately from each other below component area CA. First component 40a and second component 40b can be fixed at a specified position.

[0214] Figure 21 and Figure 22 This is a schematic diagram illustrating the acquisition of image signals in the display device 1' according to an embodiment. Figure 23 This is a schematic view illustrating the generation of synthetic image signals IMs according to an embodiment.

[0215] Reference Figure 21 and Figure 22 The display device 1' may include a first camera 40a' and a second camera 40b'. The first camera 40a' is configured as a first component to correspond to the first component area CA1 of the display panel 10', and the second camera 40b' is configured as a second component to correspond to the second component area CA2.

[0216] The first camera 40a' and the second camera 40b' can be arranged adjacent to each other to face the same direction and can be embedded in a single component. The first camera 40a' and the second camera 40b' can be cameras with the same performance. When the first image signal IM1 and the second image signal IM2 are matched and registered, the first camera 40a' and the second camera 40b' can be arranged separately from each other so that the position of the first region (degraded data) 310 corresponding to the position of the pixel group PG of the first image signal IM1 does not overlap with the position of the second region (degraded data) 320 corresponding to the position of the pixel group PG of the second image signal IM2.

[0217] like Figure 10 As shown, in shooting mode, camera driver 322 can activate the first camera 40a' and the second camera 40b', and can output a control signal CS for controlling the drive of the first camera 40a' and / or the second camera 40b'.

[0218] The first camera 40a' and the second camera 40b' can respectively obtain a first image signal IM1 and a second image signal IM2 by capturing a scene including the target object OB using light incident on the first component region CA1 and the second component region CA2, which are part of the component region CA. The first component region CA1 included in the field of view of the first camera 40a' and the second component region CA2 included in the field of view of the second camera 40b' can partially overlap.

[0219] Signal processor 324 can read data from each light-receiving pixel of the first image signal IM1 based on the coordinates of the light-receiving pixels, and can detect degraded data. Degraded data indicates that the brightness value of the light-receiving pixel's coordinates deviates from the range of a reference brightness value. Signal processor 324 can also read data from each light-receiving pixel of the second image signal IM2 based on the coordinates of the light-receiving pixels, and can detect degraded data. Degraded data also indicates that the brightness value of the light-receiving pixel's coordinates deviates from the range of a reference brightness value.

[0220] Signal processor 324 can generate a composite image signal IMs by combining pixel data (excluding degraded data) of the first image signal IM1 with pixel data (excluding degraded data) of the second image signal IM2. For example, as Figure 23 As shown, a composite image signal IMs can be generated by combining pixel data of the first image signal IM1 (excluding degradation data 310) with pixel data of the second image signal IM2 (excluding degradation data 320). The degradation data 310 of the first image signal IM1 can be pixel data of a light-receiving pixel positioned corresponding to the position of pixel group PG of the first image signal IM1. The degradation data 320 of the second image signal IM2 can be pixel data of a light-receiving pixel positioned corresponding to the position of pixel group PG of the second image signal IM2. The positions of the degradation data 310 of the first image signal IM1 and the degradation data 320 of the second image signal IM2 can be offset, thus avoiding overlap. Various image signal synthesis methods, including the method described above, can be applied, such as replacement with pixel data at corresponding coordinates and / or weighted summation of pixel data at corresponding coordinates.

[0221] Figure 24 This is a schematic cross-sectional view of the display panel 10' according to an embodiment.

[0222] Reference Figure 24 The display device 1' may include a display panel 10' and a camera 40', with the camera 40' configured as a component corresponding to the component area CA of the display panel 10'. The camera 40' can move relative to the display panel 10' in the xy plane according to the control signal CS from the camera driver 322.

[0223] In shooting mode, camera 40' can move to a first component region CA1 and a second component region CA2, which are part of component regions CA, respectively. It can acquire a first image signal IM1 by capturing a scene including the target object OB using light incident on the first component region CA1, and acquire a second image signal IM2 by capturing a scene including the target object OB using light incident on the second component region CA2. The first component region CA1 and the second component region CA2 can partially overlap.

[0224] like Figure 23 As shown, when the first image signal IM1 and the second image signal IM2 are matched and registered, the position of the camera 40' can be moved so that the position of the first region 310 corresponding to the position of the pixel group PG of the first image signal IM1 does not overlap with the position of the second region 320 corresponding to the position of the pixel group PG of the second image signal IM2.

[0225] The signal processor 324 can generate a composite image signal IMs by combining pixel data (excluding degraded data) of the first image signal IM1 with pixel data (excluding degraded data) of the second image signal IM2. Various synthesis methods, including those described above, can be applied, such as substitution with pixel data at corresponding coordinates and / or weighted summation of pixel data at corresponding coordinates.

[0226] The above embodiments relate to the synthesis of two image signals obtained from two component regions, but one or more embodiments are not limited thereto. For example, the method can be applied to the synthesis of three or more image signals obtained from three or more component regions. Some of the component regions may overlap each other, and the positions of the component regions and / or the camera position can be set such that the position of degraded data of the image signal is offset, such as... Figure 23 As shown in the image.

[0227] Figures 25A to 25E This is a schematic diagram illustrating the generation of image signals in display devices 1 and 1' according to an embodiment.

[0228] According to the above embodiments, components 40, 40a, and 40b, as well as cameras 40', 40a', and 40b', can move the pixel pitch in a specific direction, thereby acquiring an image signal. The movement of the camera can instruct the movement of the image sensor, and the pixel pitch can be the center distance between two adjacent light-receiving pixels of the image sensor. For ease of explanation, Figures 25A to 25E An image signal captured by an image sensor IS is shown. The image sensor IS includes first light-receiving pixels 51 to sixteenth light-receiving pixels 66 and a color filter CF'.

[0229] Typically, each light-receiving pixel of an image sensor can obtain one of the R, G, and B values ​​based on a corresponding color filter, and the R, G, and B values ​​are estimated by interpolating the R, G, and B values ​​of neighboring light-receiving pixels. For example, a red pixel R of an image sensor can have an R value, and the R, G, and B values ​​can be obtained by interpolating the G value via the neighboring green pixel G and interpolating the B value via the neighboring blue pixel B.

[0230] According to an embodiment, the R, G, and B values ​​of the corresponding light-receiving pixels can be obtained by moving the image sensor IS by the pixel spacing, thereby capturing an image and synthesizing an image signal. Therefore, data interpolation operations between adjacent pixels are not required. For example, each of the first image signal IM1 and the second image signal IM2 can be an image signal obtained by synthesizing the image signal obtained via the moving image sensor IS.

[0231] Reference Figure 25A The image sensor IS can capture an image at a first location and obtain a first image signal IMa. The first light-receiving pixel 51 to the sixteenth light-receiving pixel 66 can respectively have G value, R value, G value, R value, B value, G value, B value, G value, G value, R value, R value, B value, G value, B value and G value.

[0232] Reference Figure 25B The image sensor IS can capture an image at a second position and obtain a second image signal IMb, the second position being shifted to the right by the same number of pixel spacings from the first position. The first light-receiving pixel 51 to the sixteenth light-receiving pixel 66 can respectively have R values, G values, R values, G values, G values, B values, G values, B values, R values, G values, R values, G values, G values, G values, B values, G values, and B values.

[0233] Reference Figure 25C The image sensor IS can capture an image at a third position and obtain a third image signal IMc, the third position being a pixel spacing upward from the first position. The first light-receiving pixel 51 to the sixteenth light-receiving pixel 66 can respectively have B values, G values, B values, G values, G values, R values, G values, R values, B values, G values, B values, G values, G values, G values, R values, G values, and R values.

[0234] Reference Figure 25D The image sensor IS can capture an image at a fourth position and obtain a fourth image signal IMd, said fourth position being a pixel spacing to the right and upward from the first position. The first light-receiving pixel 51 to the sixteenth light-receiving pixel 66 of the image sensor can respectively have G values, B values, G values, B values, R values, G values, R values, G values, G values, B values, G values, B values, R values, G values, R values, and G values.

[0235] like Figure 25E As shown, by synthesizing the first to fourth image signals IMa, IMb, IMc, and IMd obtained via the image sensor IS of the moving camera, the R, G, and B values ​​of the first light-receiving pixels 51 to the sixteenth light-receiving pixels 66 can be obtained, respectively. According to an embodiment, a high-quality image can be obtained by taking multiple photos via the moving image sensor IS without complex interpolation operations.

[0236] Figure 26 This is a schematic diagram of the image signal generation method of display devices 1 and 1' according to an embodiment.

[0237] Figure 26 A method may be shown for processing images obtained by cameras and / or components of display devices 1 and 1', including display panels 10 and 10', components 40, 40a and 40b, and cameras 40', 40a' and 40b'.

[0238] The display device can obtain a first image signal from the light-receiving pixels of the image sensor disposed in the first component area of ​​the display panel (i.e., the display device can obtain the first image signal in the first component area) (S22), and obtain a second image signal from the light-receiving pixels of the image sensor disposed in the second component area of ​​the display panel (i.e., the display device can obtain the second image signal in the second component area) (S24).

[0239] In some embodiments, the first component area and the second component area of ​​the display panel can be separated from each other. An opaque layer can be provided in either the first component area or the second component area. Figure 11 As shown, the first camera 40a' and the second camera 40b' can be separated from each other. The first camera 40a' may include light-receiving pixels arranged corresponding to the first component region CA1, and the second camera 40b' may include light-receiving pixels arranged corresponding to the second component region CA2. The performance of the first camera 40a' may be the same as or different from that of the second camera 40b'. For example, the first camera 40a' may be a low-sensitivity camera with high resolution, and the second camera 40b' may be a high-sensitivity camera with low resolution. As another example, such as... Figure 17 As shown, a camera 40' including an image sensor can move within a first component region CA1 and a second component region CA2.

[0240] In other embodiments, the first component area and the second component area of ​​the display panel may be part of a single component area. An opaque layer may be disposed in both the first and second component areas. A portion of the first component area and a portion of the second component area may be identical. Figure 21 As shown, the first camera 40a' and the second camera 40b' can be separated from each other. The first camera 40a' includes light-receiving pixels arranged at a first position corresponding to a component region CA (e.g., the first component region CA1), and the second camera 40b' includes light-receiving pixels arranged at a second position corresponding to a component region CA (e.g., the second component region CA2). As another example, such as... Figure 24 As shown, a camera 40' including an image sensor can be positioned in component region CA to move between first component region CA1 and second component region CA2.

[0241] The display device can obtain a composite image signal by combining the first image signal and the second image signal (S26).

[0242] When the first image signal and the second image signal are registered, the positions of the degraded data in the first image signal and the degraded data in the second image signal can be offset. For example, the pixel data of the second image signal at the position corresponding to the position of the degraded data in the first image signal can be non-degraded pixel data. The degraded data can be determined according to user-defined conditions. For example, the degraded data can be pixel data that deviates from the range of reference pixel values. As another example, the degraded data can be the pixel data of a light-receiving pixel corresponding to a region in the component region other than the transmission region. For example, the degraded data can be the pixel data of a light-receiving pixel that receives light passing through a region in the component region other than the transmission region.

[0243] The display device can obtain a composite image signal based on pixel data that excludes degraded data of the first image signal and pixel data that excludes degraded data of the second image signal. Various methods, including those described above, can be applied, such as replacement with pixel data at corresponding coordinates and / or weighted summation of pixel data at corresponding coordinates.

[0244] The display device can acquire image signals by taking multiple photographs and can generate a first image and a second image by combining the image signals, wherein the image is captured by moving the image sensor in multiple directions by the pixel pitch during the multiple photographs.

[0245] According to one or more of the disclosed embodiments, a display panel and a display device including the display panel can be implemented, wherein the display area of ​​the display panel is expanded to display images even in areas where components as electronic elements are disposed. However, the scope of the disclosure is not limited by this effect.

[0246] It should be understood that the embodiments described herein are to be considered in a descriptive sense only and not for limiting purposes. The description of features or aspects within each embodiment should generally be considered applicable to other similar features or aspects in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, it will be understood by those skilled in the art that various changes in form and detail may be made herein without departing from the spirit and scope defined by the claims (including any equivalents).

Claims

1. A display device, the display device comprising: Main display area; Component area, including the transmission area; The main sub-pixel is disposed on the substrate corresponding to the main display area; as well as Auxiliary sub-pixels, corresponding to the component region, are disposed on the substrate, wherein, The component region includes a first component region and a second component region. The auxiliary sub-pixels arranged in the first component region and the auxiliary sub-pixels arranged in the second component region have the same arrangement structure, and An opaque layer is disposed between the substrate and the auxiliary sub-pixel in the second component region, the opaque layer including a hole corresponding to the transmissive region, and the opaque layer is not disposed in the first component region.

2. The display device according to claim 1, wherein, The holes in the opaque layer are circular in shape.

3. The display device according to claim 1, wherein, The opaque layer includes a light-blocking metal.

4. The display device according to claim 1, wherein, The opaque layer includes a light-resistant organic material.

5. The display device according to claim 1, further comprising: A first camera is disposed below the substrate, corresponding to the area of ​​the first component. A second camera is disposed below the substrate, corresponding to the area of ​​the second component. as well as The driver generates a composite image signal by combining a first image signal from the first camera and a second image signal from the second camera.

6. The display device according to claim 5, wherein, The first camera includes a low-sensitivity camera with high resolution, and The second camera includes a high-sensitivity camera with low resolution.

7. The display device according to claim 5, wherein, The driver generates the synthesized image signal by replacing the degraded data of the first image signal with pixel data at the corresponding positions in the second image signal.

8. The display device according to claim 5, wherein, The driver generates the composite image signal by combining pixel data corresponding to the foreground of the first image signal and pixel data corresponding to the background of the second image signal.

9. The display device according to claim 5, wherein, The driver: The first image signal is generated by synthesizing multiple image signals obtained by moving the image sensor of the first camera by the pixel pitch in multiple directions, and The second image signal is generated by synthesizing multiple image signals obtained by moving the image sensor of the second camera in multiple directions by that amount of pixel spacing.

10. The display device according to claim 1, further comprising: A camera, corresponding to the component area, is disposed below the substrate; as well as The driver generates a composite image signal by combining a first image signal and a second image signal, wherein the first image signal is obtained by moving the camera toward the first component region and the second image signal is obtained by moving the camera toward the second component region.

11. The display device according to claim 10, wherein, The driver generates the synthesized image signal by replacing the degraded data of the first image signal with pixel data at the corresponding positions in the second image signal.

12. The display device according to claim 10, wherein, The driver generates the composite image signal by combining pixel data corresponding to the foreground of the first image signal and pixel data corresponding to the background of the second image signal.

13. The display device according to claim 10, wherein, The driver: The first image signal is generated by synthesizing multiple image signals obtained by moving the image sensor of the camera by the pixel pitch in multiple directions, and The second image signal is generated by synthesizing multiple image signals obtained by moving the image sensor of the camera in multiple directions by such a large number of pixel pitches.

14. The display device according to claim 1, wherein, Pixel groups are arranged in the component region, each of the pixel groups including a predetermined number of the auxiliary sub-pixels, and The transmission area is positioned around the pixel group.

15. The display device according to claim 1, wherein, Each of the main sub-pixel and the auxiliary sub-pixel includes a pixel electrode and an emission layer, and The counter electrode is disposed above the pixel electrode, and the counter electrode is shared by the main sub-pixel and the auxiliary sub-pixel, and includes a through hole corresponding to the transmission region.

Images