Display device

Abstract

A display device includes a plurality of pixels on a substrate. Each of the pixels includes first and second electrodes spaced apart from each other on the substrate, and a plurality of light emitting elements each including a first end portion connected to the first electrode and a second end portion connected to the second electrode. The first electrode includes a plurality of first holes adjacent to the first end portion of each of the light emitting elements.

Description

[0001] Cross-references to related applications

[0002] This application claims priority and benefit to Korean Patent Application No. 10-2020-0017212, filed on February 12, 2020, with the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The embodiments of this disclosure relate to display devices. Background Technology

[0004] The importance of display devices has increased with the development of multimedia. Therefore, various types of display devices, such as organic light-emitting diode (OLED) displays and liquid crystal displays (LCDs), are used.

[0005] A display device is a device for displaying images, and a display device includes a display panel, such as an organic light-emitting display panel or a liquid crystal display panel. A light-emitting display panel may include light-emitting elements. For example, light-emitting diodes (LEDs) include organic light-emitting diodes (OLEDs) that use organic materials as fluorescent materials and inorganic light-emitting diodes that use inorganic materials as fluorescent materials.

[0006] Compared to organic light-emitting diodes (OLEDs), inorganic light-emitting diodes (LEDs) using inorganic semiconductors as fluorescent materials exhibit superior durability in high-temperature environments and high blue light efficiency. Furthermore, a transfer method using dielectric electrophoresis (DEP) has been developed for manufacturing processes that have been identified as limiting factors for conventional inorganic LED devices. Accordingly, research on inorganic LEDs with superior durability and efficiency compared to OLEDs continues. Summary of the Invention

[0007] According to an aspect of the embodiments of this disclosure, a display device is provided that can minimize or reduce light emission failure of the light-emitting element due to short circuit.

[0008] According to aspects of embodiments of this disclosure, a display device is provided that can prevent or reduce heat and fire accidents caused by overload of light-emitting elements.

[0009] However, the embodiments of this disclosure are not limited to the aspects described above, and other technical aspects not described will be clearly understood by those skilled in the art from the following description.

[0010] According to one or more embodiments, a display device includes a plurality of pixels located on a substrate. Each pixel includes a first electrode and a second electrode spaced apart from each other on the substrate, and a plurality of light-emitting elements, each light-emitting element including a first end connected to the first electrode and a second end connected to the second electrode. The first electrode includes a plurality of first holes adjacent to the first end of each of the light-emitting elements.

[0011] Multiple first holes can be arranged along the outer edge of the first end of the light-emitting element.

[0012] The display device may also include a dam between the substrate and the first electrode, and a first hole may pass through the first electrode to expose the upper surface of the dam.

[0013] The display device may also include an insulating layer on the first electrode, and the insulating layer may be connected to the upper surface of the embankment through the first hole.

[0014] The first electrode may include a first alignment electrode and a first contact electrode on the first alignment electrode, and the first contact electrode may cover the first end of the light-emitting element.

[0015] Multiple first holes can pass through the first alignment electrode and the first contact electrode.

[0016] The display device may also include an insulating layer between the first alignment electrode and the first contact electrode.

[0017] The second electrode may include a plurality of second holes adjacent to the second end of each of the light-emitting elements.

[0018] Multiple second holes can be arranged along the outer edge of the second end of the light-emitting element.

[0019] The area of ​​the first hole and the area of ​​the second hole can be the same.

[0020] According to one or more embodiments, a display device includes a plurality of pixels located on a substrate. Each pixel may include a first electrode and a second electrode spaced apart from each other on the substrate, a plurality of light-emitting elements located between the first electrode and the second electrode, and a first connection pattern connecting the first electrode to the light-emitting elements among the plurality of light-emitting elements. The melting point of the first connection pattern may be lower than the melting point of the first electrode.

[0021] One end of the first connecting pattern can contact the first electrode, and the other end of the first connecting pattern can contact the first end of the light-emitting element.

[0022] The first electrode and the light-emitting element can be spaced apart from each other.

[0023] The first electrode may include a first alignment electrode and a first contact electrode on the first alignment electrode, one end of the first connection pattern may contact the first contact electrode, and the other end of the first connection pattern may contact the first end of the light-emitting element.

[0024] The second electrode can contact the second end of the light-emitting element.

[0025] The display device may also include a second connection pattern that connects the second electrode and the light-emitting element to each other.

[0026] The first end of the light-emitting element can be connected to the first connection pattern, and the second end of the light-emitting element can be connected to the second connection pattern.

[0027] The second electrode and the light-emitting element can be spaced apart from each other.

[0028] The melting point of the second connecting pattern can be lower than that of the second electrode.

[0029] The first connecting pattern and the second connecting pattern can be formed from the same material.

[0030] Further details of some exemplary implementations are included in the detailed description and accompanying drawings.

[0031] According to embodiments of this disclosure, since the electrodes electrically connected to the light-emitting element include multiple holes, light-emitting failures of the light-emitting element caused by short circuits can be minimized or reduced.

[0032] Furthermore, since the connection pattern of the electrical connection to the light-emitting element has a relatively low melting point, it can prevent or substantially prevent overheating and fire accidents in the display device, even if overload may occur in some light-emitting elements.

[0033] However, the aspects and effects of the implementation are not limited to those discussed above, and many more aspects and effects are included in this specification. Attached Figure Description

[0034] The above and other features of this disclosure will become clearer by referring to the accompanying drawings, which describe some exemplary embodiments of the present disclosure in more detail, in which:

[0035] Figure 1 and Figure 2 It is a perspective view of a light-emitting element according to some implementation methods;

[0036] Figure 3 This is a plan view showing a display device according to an embodiment;

[0037] Figures 4 to 6 This is a circuit diagram illustrating pixels according to some embodiments;

[0038] Figure 7 This is a circuit diagram illustrating a pixel according to another embodiment;

[0039] Figure 8 It is a planar view of the pixels according to the implementation method;

[0040] Figure 9 It is along Figure 8 A sectional view taken by line A-A';

[0041] Figure 10 It is a planar view of pixels according to another embodiment;

[0042] Figure 11 It is along Figure 10 A sectional view taken by line B-B';

[0043] Figure 12 It is a planar view of pixels according to another embodiment;

[0044] Figure 13 It is along Figure 12 A sectional view taken by line C-C';

[0045] Figure 14 It is a planar view of pixels according to another embodiment; and

[0046] Figure 15 It is along Figure 14 A sectional view taken by line D-D'. Detailed Implementation

[0047] Aspects and features of embodiments of this disclosure, as well as methods of implementing them, will become apparent from the exemplary embodiments described in further detail below with reference to the accompanying drawings. However, this disclosure is not limited to the embodiments disclosed below and can be implemented in various different forms. The present embodiments are provided so that this disclosure will be thorough and complete, and its scope will be fully understood by those skilled in the art to which this disclosure pertains. This disclosure is defined by the scope of the claims.

[0048] When an element or layer is referred to as "on" another element or layer, it includes situations where the layer or element is directly disposed on the other element or layer, or where the other element or layer is disposed between them. Throughout this specification, the same reference numerals denote the same or similar components.

[0049] Although the terms "first," "second," etc., can be used to describe various components, these components are not limited by these terms. These terms are used to distinguish one component from another. Therefore, within the technical spirit of this disclosure, the first component mentioned below can be the second component. Unless the context clearly indicates otherwise, singular expressions include plural expressions.

[0050] Here, some embodiments of the present disclosure will be described in more detail with reference to the accompanying drawings. In the drawings, the same or similar reference numerals are used for the same or similar components.

[0051] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which the exemplary embodiments of the inventive concept pertain. It should also be understood that terms, such as those defined in commonly used dictionaries, shall be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and shall not be interpreted as having an idealized or overly formal meaning unless expressly defined herein.

[0052] Figure 1 and Figure 2 This is a perspective view of a light-emitting element according to some implementation methods.

[0053] Reference Figure 1 and Figure 2 The light-emitting element (LD) may include a first semiconductor layer 11, a second semiconductor layer 13, and an active layer 12 interposed between the first semiconductor layer 11 and the second semiconductor layer 13. For example, the light-emitting element (LD) may be implemented in which the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13 are stacked in sequence.

[0054] In this embodiment, the light-emitting element (LD) can be configured as a rod shape extending in one direction. When the extension direction of the light-emitting element (LD) is the length direction, the light-emitting element (LD) can have a first end and a second end along the length direction. One of the first semiconductor layer 11 and the second semiconductor layer 13 can be disposed at the first end, and the other of the first semiconductor layer 11 and the second semiconductor layer 13 can be disposed at the second end.

[0055] The light-emitting element (LD) can be configured in a rod shape. Here, the term "rod" can include rod-shaped or bar-shaped objects that are long in the longitudinal direction (i.e., have an aspect ratio greater than 1), such as cylinders, polygonal pillars, etc. For example, the length of the light-emitting element LD can be greater than its diameter. However, this disclosure is not limited thereto. For example, the light-emitting element LD can be a light-emitting element with a core-shell structure.

[0056] For example, light-emitting diodes (LDs) can be manufactured with diameters and / or lengths in the approximately micrometer or nanometer range. For instance, the diameter of an LD can be equal to or less than 600 nm, and the length of an LD can be equal to or less than 4 μm. However, the size of an LD is not limited to these dimensions, and the size of an LD can vary depending on the requirements of the display device using the LD.

[0057] For example, the first semiconductor layer 11 may include at least one n-type semiconductor layer. For example, the first semiconductor layer 11 may include any one of the semiconductor materials InAlGaN, GaN, AlGaN, InGaN, AlN, and InN, and may include a semiconductor layer doped with a first dopant (such as Si, Ge, or Sn). However, the materials used to configure the first semiconductor layer 11 are not limited to these, and the first semiconductor layer 11 may be configured with various materials.

[0058] The active layer 12 can be formed on the first semiconductor layer 11 and can be formed of a single quantum well structure or a multi-quantum well structure. In an embodiment, when the active layer 12 includes a material of a multi-quantum well structure, the active layer 12 can be a structure in which quantum layers and well layers are stacked alternately.

[0059] When an electric field of a certain voltage (e.g., a predetermined voltage) or greater is applied to the two ends of the light-emitting element (LD), the LD emits light, and electron-hole pairs couple in the active layer 12. By controlling the emission of the LD using this principle, the LD can be used as a light source for various light-emitting devices, including pixels of a display device.

[0060] In one embodiment, the active layer 12 can emit light with wavelengths from 400 nm to 900 nm. For example, when the active layer 12 emits blue light, it can comprise materials such as AlGaN or AlGaInN. In another embodiment, when the active layer 12 is a structure in which quantum layers and well layers are alternately stacked in a multi-quantum-well structure, the quantum layers can comprise materials such as AlGaN or AlGaInN, and the well layers can comprise materials such as GaN or AlInN. In yet another embodiment, the active layer 12 can comprise AlGaInN as a quantum layer and can comprise AlInN as a well layer, and as described above, the active layer 12 can emit blue light with a center wavelength in the range of 450 nm to 495 nm.

[0061] However, this disclosure is not limited thereto, and the active layer 12 may be a structure in which a semiconductor material with a large bandgap energy and a semiconductor material with a small bandgap energy are stacked alternately, or may include group 3 to group 5 semiconductor materials that vary depending on the wavelength of the emitted light. The light emitted by the active layer 12 is not limited to the blue band, and in some cases, the active layer 12 may emit red and green band light.

[0062] The second semiconductor layer 13 may be disposed on the active layer 12 and may include a semiconductor layer of a different type than the first semiconductor layer 11. For example, the second semiconductor layer 13 may include at least one p-type semiconductor layer. For example, the second semiconductor layer 13 may include at least one semiconductor material selected from InAlGaN, GaN, AlGaN, InGaN, AlN, and InN, and may include a semiconductor layer doped with a second dopant (such as Mg, Zn, Ca, Se, or Ba), but is not limited thereto.

[0063] In the accompanying drawings, the first semiconductor layer 11 and the second semiconductor layer 13 are shown configured as a single layer, but are not limited thereto. For example, the first semiconductor layer 11 and the second semiconductor layer 13 may be configured as multiple layers depending on the material of the active layer 12. For example, the first semiconductor layer 11 and the second semiconductor layer 13 may also include a cladding layer or a tensile strain barrier reduction (TSBR) layer.

[0064] In addition to the first semiconductor layer 11, the active layer 12 and the second semiconductor layer 13 described above, the light-emitting element LD may also include another fluorescent layer, an active layer, a semiconductor layer and / or an electrode layer on and / or below each layer.

[0065] The light-emitting element (LD) may further include at least one electrode layer disposed on the end (e.g., upper surface) side of the second semiconductor layer 13 or the end (e.g., lower surface) side of the first semiconductor layer 11. For example, as Figure 2 As shown, the light-emitting element LD may further include an electrode layer 15 disposed on the end side of the second semiconductor layer 13. The electrode layer 15 may be an ohmic electrode, but is not limited thereto. For example, the electrode layer 15 may be a Schottky contact electrode. The electrode layer 15 may include a metal or a metal oxide. For example, chromium (Cr), (Ti), aluminum (Al), gold (Au), nickel (Ni) and their oxides or alloys, indium tin oxide (ITO), indium zinc oxide (IZO) and indium tin zinc oxide (ITZO) may be used alone or in combination, but this disclosure is not limited thereto.

[0066] Furthermore, the light-emitting element LD may also include an insulating film 14. According to an embodiment, the insulating film 14 may be omitted, and may be configured to cover only a portion of the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13. For example, the insulating film 14 may be disposed on portions other than the two ends of the light-emitting element LD, thus exposing the two ends of the light-emitting element LD.

[0067] For ease of description, Figure 1 and Figure 2 The diagram shows a state where a portion of the insulating film 14 has been removed; however, all sides of the light-emitting element LD can be surrounded by the insulating film 14.

[0068] The insulating film 14 may comprise a transparent insulating material. For example, the insulating film 14 may comprise at least one insulating material selected from SiO2, Si3N4, Al2O3, and TiO2, but is not limited thereto. Various materials with insulating properties may be used.

[0069] The insulating film 14 can prevent short circuits that may occur when the active layer 12 comes into contact with conductive materials other than the first semiconductor layer 11 and the second semiconductor layer 13. In addition, by forming the insulating film 14, surface defects of the light-emitting element LD can be minimized or reduced, thereby improving the lifetime and efficiency of the light-emitting element LD.

[0070] Figure 3 This is a plan view showing a display device according to an embodiment.

[0071] Reference Figure 3 The display device 1000 may include a substrate SUB and a plurality of pixels PXL disposed on the substrate SUB. The display device 1000 (or the substrate SUB) may include a display area DA for displaying an image and a non-display area NDA other than the display area DA.

[0072] The display area DA can be the area where the pixel PXL is set. The non-display area NDA can be the area where the drivers SDV and DDV used to drive the pixel PXL are set, as well as the various lines DL, SL, and CL that connect the pixel PXL and the drivers to each other.

[0073] The display area DA can have any of a variety of shapes. For example, the display area DA can be set to any of a variety of shapes, such as a polygon with sides formed by straight lines, a circle with sides formed by curves, an ellipse, or a semicircle or semi-ellipse with sides formed by both straight lines and curves.

[0074] When the display area DA comprises multiple regions, each region can be configured in any of various shapes, such as a polygon with closed sides formed by straight lines, or a circle or ellipse with sides formed by curves. Furthermore, the areas of the multiple regions can be the same or different from each other. In this embodiment, the case where the display area DA is configured as a quadrilateral with straight sides will be described as an example.

[0075] The non-display area NDA can be disposed on at least one side of the display area DA. In an embodiment, the non-display area NDA can surround the display area DA.

[0076] Pixels PXL can be disposed on the substrate SUB in the display area DA. Each pixel PXL may include at least one light-emitting element LD connected to the scan line SL and the data line DL and driven by the corresponding scan signal and data signal.

[0077] Each pixel PXL can emit one of red, green, and blue light, but is not limited to these. For example, each pixel PXL can emit one of cyan, magenta, yellow, and white light.

[0078] Pixel PXL may include a first pixel emitting light of a first color, a second pixel emitting light of a second color different from the first color, and a third pixel emitting light of a third color different from the first and second colors. At least one first pixel, second pixel, and third pixel arranged adjacent to each other can be configured as a pixel unit capable of emitting various colors of light. For example, the first pixel may be a red pixel emitting red light, the second pixel may be a green pixel emitting green light, and the third pixel may be a blue pixel emitting blue light. Furthermore, each pixel PXL may include a light-emitting element emitting light of the same color, and may include a light conversion layer of different colors disposed on each light-emitting element to emit different colors of light. In another embodiment, each pixel PXL may include a light-emitting element emitting light of different colors. However, the color, type, number, etc., of the pixel PXL are not particularly limited.

[0079] Multiple pixels PXL can be set and arranged along a first direction DR1 and a second direction DR2 intersecting the first direction DR1. However, the arrangement of pixels PXL is not limited to this and can be arranged in various forms.

[0080] Drivers SDV and DDV can be located in the non-display area NDA. Drivers SDV and DDV can provide signals to each pixel PXL via lines SL and DL, thereby controlling the driving of each pixel PXL. Drivers SDV and DDV can include a scan driver SDV that provides scan signals to pixel PXL via scan lines SL and a data driver DDV that provides data signals to pixel PXL via data lines DL.

[0081] The scan driver SDV can be disposed on one side of the substrate SUB and can be disposed along one direction (e.g., a second direction DR2). The scan driver SDV can be mounted on the substrate SUB as a separate component, but is not limited to this. For example, the scan driver SDV can be formed directly on the substrate SUB. In an embodiment, the scan driver SDV can be located outside the substrate SUB and connected to each pixel PXL via a separate connecting member.

[0082] The data driver DDV can be connected to each pixel PXL via pad unit PA and can provide data signals to the pixel PXL. Pad unit PA can be located in the non-display area NDA and can include multiple pads to be connected to the data driver DDV. The data line DL used to provide data signals to each pixel PXL can be connected to the data driver DDV via connecting line CL. The data driver DDV can be directly mounted on the pad unit PA, or it can be connected to the pad unit PA via a separate connecting member.

[0083] According to an embodiment, the display device 1000 may further include a timing controller that controls the scan driver SDV and the data driver DDV, and a transmission driver that provides transmission control signals to the pixel PXL via a transmission control line.

[0084] Figures 4 to 6 This is a circuit diagram illustrating pixels according to some embodiments. Figures 4 to 6 An example of pixels configured for an active light-emitting display panel is shown, but this disclosure is not limited thereto.

[0085] Reference Figure 4 The pixel PXL may include: a light-emitting element unit (LDU) including at least one light-emitting element (LD); and a driving circuit (DC) connected to the LDU to drive the light-emitting element (LD). The LDU may include multiple light-emitting elements (LD) connected in parallel and / or in series with each other.

[0086] The first electrode (e.g., the anode electrode) of the light-emitting element LD can be connected to the first driving power supply VDD via the driving circuit DC, and the second electrode (e.g., the cathode electrode) of the light-emitting element LD can be connected to the second driving power supply VSS.

[0087] The first driving power supply VDD and the second driving power supply VSS can have different potentials. For example, the second driving power supply VSS can have a potential equal to that of the first driving power supply VDD or a potential lower than the threshold voltage of the light-emitting element LD or greater. That is, the voltage applied to the first driving power supply VDD can be greater than the voltage applied to the second driving power supply VSS.

[0088] The light-emitting element (LD) can emit light with a brightness corresponding to the driving current controlled by the DC drive circuit.

[0089] The driving circuit DC may include a first transistor M1 (driving transistor), a second transistor M2 (switching transistor), and a storage capacitor Cst.

[0090] The first electrode of the first transistor M1 can be connected to the first driving power supply VDD, and the second electrode of the first transistor M1 can be electrically connected to the first electrode (e.g., the anode electrode) of the light-emitting element LD. The gate electrode of the first transistor M1 can be connected to the first node N1. The first transistor M1 can control the amount of driving current supplied to the light-emitting element LD according to the voltage of the first node N1.

[0091] The first electrode of the second transistor M2 can be connected to the data line DL, and the second electrode of the second transistor M2 can be connected to the first node N1. Here, the first and second electrodes of the second transistor M2 can be different electrodes, and for example, when the first electrode is the source electrode, the second electrode can be the drain electrode. The gate electrode of the second transistor M2 can be connected to the scan line SL.

[0092] When a scan signal is provided from the scan line SL, providing a voltage (e.g., a gate on-voltage) that enables the second transistor M2 to conduct, the second transistor M2 can be turned on to electrically connect the data line DL and the first node N1 to each other. At this time, the data signal for the corresponding frame can be provided to the data line DL, and thus the data signal can be transmitted to the first node N1. The data signal transmitted to the first node N1 can be stored in the storage capacitor Cst.

[0093] One electrode of the storage capacitor Cst can be connected to the first drive power supply VDD, and the other electrode of the storage capacitor Cst can be connected to the first node N1. The storage capacitor Cst can be charged with the voltage corresponding to the data signal and the voltage difference between the two ends of the first drive power supply VDD, and the charging voltage can be maintained until the data signal of the next frame is provided.

[0094] For ease of description, Figure 4 A relatively simple driving circuit DC is shown, comprising a second transistor M2 for transmitting data signals to each of the pixels PXL, a storage capacitor Cst for storing the data signals, and a first transistor M1 for providing a driving current corresponding to the data signals to the light-emitting element LD. However, various modifications can be made to the structure of the driving circuit DC. For example, the driving circuit DC may also include other circuit elements, such as a compensation transistor for compensating the threshold voltage of the first transistor M1, an initialization transistor for initializing the first node N1, and / or various transistors for controlling the emission time of the light-emitting element LD, and a boost capacitor for boosting the voltage of the first node N1.

[0095] In the implementation method, Figure 4In the drive circuit DC, all transistors, such as the first transistor M1 and the second transistor M2, are P-type transistors, but this disclosure is not limited thereto. That is, at least one of the first transistor M1 and the second transistor M2 included in the drive circuit DC can be an N-type transistor.

[0096] For example, such as Figure 5 As shown, the first transistor M1 and the second transistor M2 in the DC drive circuit can be implemented as N-type transistors. Aside from the different connection positions of some components due to the different transistor types, Figure 5 The DC drive circuit shown can have the same characteristics as... Figure 4 The configuration or operation of the DC drive circuit is similar. Therefore, further detailed description will be omitted.

[0097] As another example, such as Figure 6 As shown, the pixel PXL may also include a third transistor M3 (sensing transistor).

[0098] The gate electrode of the third transistor M3 can be connected to the sensing signal line SSL. One electrode of the third transistor M3 can be connected to the sensing line SENL, and the other electrode of the third transistor M3 can be connected to the anode electrode of the light-emitting element LD. During the sensing cycle, the third transistor M3 can transmit the voltage value at the anode electrode of the light-emitting element LD to the sensing line SENL according to the sensing signal provided to the sensing signal line SSL. The voltage value transmitted through the sensing line SENL can be provided to external circuitry (e.g., a timing controller), and the external circuitry can extract feature information of pixel PXL (e.g., the threshold voltage of the first transistor M1, etc.) based on the provided voltage value. The extracted feature information can be used to convert image data, thereby compensating for feature deviations of pixel PXL.

[0099] Figure 7 This is a circuit diagram illustrating a pixel according to another embodiment.

[0100] Reference Figure 7 The pixel PXL may include a light-emitting element unit LDU, a first transistor to a seventh transistor T1, T2, T3, T4, T5, T6 and T7, and a storage capacitor Cst.

[0101] A light-emitting element unit (LDU) may include multiple light-emitting elements (LDs) connected in parallel and / or in series with each other. The first electrode (e.g., anode electrode) of the light-emitting element LD may be connected to a first transistor T1 via a sixth transistor T6, and the second electrode (e.g., cathode electrode) of the light-emitting element LD may be connected to a second driving power supply VSS. The light-emitting element LD may emit light at a certain brightness (e.g., a predetermined brightness) corresponding to the amount of current supplied from the first transistor T1.

[0102] One electrode of the first transistor T1 (driving transistor) can be connected to the first driving power supply VDD via the fifth transistor T5, and the other electrode of the first transistor T1 can be connected to the first electrode of the light-emitting element LD via the sixth transistor T6. The first transistor T1 can control the amount of current flowing from the first driving power supply VDD through the light-emitting element LD to the second driving power supply VSS in correspondence with the voltage of the first node N1, which is its gate electrode.

[0103] A second transistor T2 (a switching transistor) can be connected between the data line DL and one electrode of the first transistor T1. Furthermore, the gate electrode of the second transistor T2 can be connected to the scan line SL. When a scan signal with a gate-on voltage is provided to the scan line SL, the second transistor T2 can be turned on to electrically connect the data line DL and one electrode of the first transistor T1 to each other.

[0104] The third transistor T3 can be connected between the other electrode of the first transistor T1 and the first node N1. Furthermore, the gate electrode of the third transistor T3 can be connected to the scan line SL. When a scan signal with a gate-on voltage is provided to the scan line SL, the third transistor T3 can be turned on to electrically connect the other electrode of the first transistor T1 and the first node N1 to each other.

[0105] The fourth transistor T4 can be connected between the first node N1 and the initialization power supply Vint. Furthermore, the gate electrode of the fourth transistor T4 can be connected to the previous scan line SL-1. When a scan signal with a gate-on voltage is provided to the previous scan line SL-1, the fourth transistor T4 can be turned on to provide the initialization power supply Vint to the first node N1. Here, the initialization power supply Vint can be set to a voltage lower than the data signal voltage.

[0106] The fifth transistor T5 can be connected between the first drive power supply VDD and one electrode of the first transistor T1. The gate electrode of the fifth transistor T5 can be connected to the emitter control line EL. The fifth transistor T5 can be turned on when the emitter control signal with gate on-voltage is provided to the emitter control line EL, and can be turned off under other conditions.

[0107] The sixth transistor T6 can be connected between the other electrode of the first transistor T1 and the first electrode of the light-emitting element LD. The gate electrode of the sixth transistor T6 can be connected to the emitter control line EL. The sixth transistor T6 can be turned on when the emitter control signal with the gate on-voltage is provided to the emitter control line EL, and can be turned off under other conditions.

[0108] The seventh transistor T7 can be connected between the initialization power supply Vint and the first electrode (e.g., the anode electrode) of the light-emitting element LD. Furthermore, the gate electrode of the seventh transistor T7 can be connected to the next scan line SL+1. When a scan signal with a gate on-state voltage is provided to the next scan line SL+1, the seventh transistor T7 can be turned on to provide the voltage of the initialization power supply Vint to the first electrode of the light-emitting element LD.

[0109] Figure 7 The illustration shows the case where the gate electrode of the seventh transistor T7 is connected to the next scan line SL+1. However, embodiments of this disclosure are not limited to this. For example, the gate electrode of the seventh transistor T7 may be connected to the scan line SL. In this case, when a scan signal of the gate on-state voltage is provided to the scan line SL, the voltage of the initialization power supply Vint can be provided to the anode electrode of the light-emitting element LD through the seventh transistor T7.

[0110] The storage capacitor Cst can be connected between the first drive power supply VDD and the first node N1. The storage capacitor Cst can store the voltage corresponding to the data signal and the threshold voltage of the first transistor T1.

[0111] In the implementation method, Figure 7 In the driving circuit DC, all transistors, such as the first to the seventh transistors T1, T2, T3, T4, T5, T6 and T7, are P-type transistors. However, the embodiments of this disclosure are not limited to this, and at least one of the first to the seventh transistors T1, T2, T3, T4, T5, T6 and T7 can be an N-type transistor.

[0112] Figure 8 It is a planar view of pixels according to the implementation method; and Figure 9 It is along Figure 8 A sectional view taken by line A-A'.

[0113] Reference Figure 8 and Figure 9 The display device 1000 may include a substrate SUB, a pixel circuit layer PCL, and a display layer DPL.

[0114] The substrate SUB can have a planar rectangular shape. The substrate SUB may include two short sides extending in one direction and two long sides extending in another direction intersecting that direction. The corner where the long and short sides of the planar substrate SUB meet can be a right angle, but is not limited to this, and can have a rounded curved shape. The planar shape of the substrate SUB is not limited to the shape shown, but can be a square shape, a circular shape, an elliptical shape, or other shapes.

[0115] The substrate SUB can be a rigid substrate or a flexible substrate, and its material or physical properties are not particularly limited. For example, the substrate SUB can be a rigid substrate configured with glass or tempered glass, or a flexible substrate configured with a thin film of plastic or metallic material. Furthermore, the substrate SUB can be a transparent substrate, but is not limited to this. For example, the substrate SUB can be a translucent substrate, an opaque substrate, or a reflective substrate.

[0116] The pixel circuit layer (PCL) can be disposed on the substrate (SUB). The pixel circuit layer (PCL) may include components for configuring pixels (PXL). Figure 4 The pixel drive circuit consists of multiple circuit elements of DC.

[0117] The pixel circuit layer (PCL) may include a first circuit insulating layer (CINS1), a second circuit insulating layer (CINS2), a third circuit insulating layer (CINS3), and a fourth circuit insulating layer (CINS4) sequentially stacked on a substrate (SUB). Each of the first circuit insulating layers (CINS1) to the fourth circuit insulating layer (CINS4) may be an insulating layer comprising an organic insulating material or an inorganic insulating material.

[0118] A semiconductor pattern SCL can be disposed on a first circuit insulating layer CINS1. The semiconductor pattern SCL may include a first region in contact with a first transistor electrode TE1 (described later), a second region connected to a second transistor electrode TE2, and a channel region located between the first and second regions. One of the first and second regions may be a source region, and the other may be a drain region.

[0119] The semiconductor pattern SCL can be a semiconductor pattern formed from polycrystalline silicon, amorphous silicon, oxide semiconductor, etc. In an embodiment, the channel region of the semiconductor pattern SCL can be an intrinsic semiconductor that is an undoped semiconductor pattern therein, and the first region and the second region of the semiconductor pattern SCL can be semiconductor patterns doped with predetermined impurities therein, respectively.

[0120] The gate electrode GE can be disposed on the semiconductor pattern SCL. The gate insulating film GI can be disposed between the gate electrode GE and the semiconductor pattern SCL. The gate electrode GE and the semiconductor pattern SCL can be insulated from each other by the gate insulating film GI. Figure 9 The diagram illustrates a transistor with a top-gate structure where the gate electrode GE is located on a semiconductor pattern SCL; however, embodiments of this disclosure are not limited thereto. For example, the gate electrode GE may be disposed below the semiconductor pattern SCL, or it may be disposed both above and below the semiconductor pattern SCL.

[0121] A first conductive layer may be disposed on a second insulating layer CINS2. The first conductive layer may include a first transistor electrode TE1 and a second transistor electrode TE2. The first transistor electrode TE1 may contact the first region of the semiconductor pattern SCL described above through a contact hole passing through the second insulating layer CINS2. The second transistor electrode TE2 may contact the second region of the semiconductor pattern SCL described above through a contact hole passing through the second insulating layer CINS2.

[0122] The second circuit conductive layer can be disposed on the third circuit insulating layer CINS3. The second circuit conductive layer may include a first power line PL1, a second power line PL2, and a bridging wire BRE.

[0123] The first power line PL1 can be connected to Figure 4 The first drive power supply line VDD. The first power supply line PL1 can contact the first transistor electrode TE1 through the contact hole passing through the third circuit insulation layer CINS3.

[0124] The second power supply line PL2 can be connected to... Figure 4 The second drive power supply line VSS. The second power supply line PL2 can contact the third alignment electrode RFE3, which will be described later, through the second contact hole CH2 passing through the fourth circuit insulation layer CINS4.

[0125] The bridging wire BRE can contact the second transistor electrode TE2 through a contact hole passing through the third circuit insulation layer CINS3. The bridging wire BRE can contact the first alignment electrode RFE1, which will be described later, through a first contact hole CH1 passing through the fourth circuit insulation layer CINS4. Therefore, the drive current supplied to the second transistor electrode TE2 can be supplied to the first alignment electrode RFE1 through the bridging wire BRE.

[0126] The display layer (DPL) can be disposed on the pixel circuit layer (PCL). The display layer (DPL) may include light-emitting element units (LDUs), which include multiple light-emitting elements (LD1 and LD2) connected in parallel and / or in series with each other.

[0127] The display layer DPL may include a dam layer, an alignment electrode layer, a first insulating layer INS1, a light-emitting element unit (LDU), a second insulating layer INS2, a contact electrode layer, a third insulating layer INS3, and a fourth insulating layer INS4.

[0128] The embankment layer may include, but is not limited to, insulating materials made of organic or inorganic materials.

[0129] The dike layer may include a first dike layer BNK1, a second dike layer BNK2, and a third dike layer BNK3.

[0130] The light-emitting element unit (LDU) can be disposed in the separation space between the first embankment BNK1, the second embankment BNK2, and the third embankment BNK3. For this purpose, the first embankment BNK1, the second embankment BNK2, and the third embankment BNK3 can be separated from each other by a distance longer than the length of the light-emitting elements LD1 and LD2.

[0131] In the implementation, each of the first embankment BNK1, the second embankment BNK2, and the third embankment BNK3 may have a trapezoidal shape with its side surfaces inclined at a certain angle (e.g., a predetermined angle), but is not limited thereto, and may have any of a variety of shapes, such as semi-elliptical, circular, and quadrilateral.

[0132] An alignment electrode layer may be disposed on the embankment layer. The alignment electrode layer may be formed of a conductive material. Conductive materials may include, but are not limited to, silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), titanium (Ti), and alloys thereof. For example, the alignment electrode layer may include a conductive material with a constant reflectivity. In this case, light emitted from the ends of each of the light-emitting elements LD1 and LD2 can be reflected by the alignment electrode layer and propagate in the display direction (e.g., third-direction DR3).

[0133] In some embodiments, the alignment electrode layer may be formed as a single layer. However, embodiments of this disclosure are not limited thereto, and the alignment electrode layer may be formed of multiple layers. For example, the alignment electrode layer may further include a covering layer (not shown) formed of a transparent conductive material. The covering layer may be configured to cover the alignment electrode layer to prevent or substantially prevent damage to the alignment electrode layer that may occur during the manufacturing process of the display device.

[0134] The alignment electrode layer may include a first alignment electrode RFE1, a second alignment electrode RFE2, and a third alignment electrode RFE3.

[0135] The first alignment electrode RFE1, the second alignment electrode RFE2, and the third alignment electrode RFE3 can extend along the second direction DR2. The first alignment electrode RFE1 and the second alignment electrode RFE2 can be spaced apart from each other along the first direction DR1, and the first light-emitting element LD1 is inserted between the first alignment electrode RFE1 and the second alignment electrode RFE2. The second alignment electrode RFE2 and the third alignment electrode RFE3 can be spaced apart from each other along the first direction DR1, and the second light-emitting element LD2 is located between the second alignment electrode RFE2 and the third alignment electrode RFE3.

[0136] The first alignment electrode RFE1 can be disposed on the first embankment BNK1, the second alignment electrode RFE2 can be disposed on the second embankment BNK2, and the third alignment electrode RFE3 can be disposed on the third embankment BNK3. Therefore, the first alignment electrode RFE1, the second alignment electrode RFE2, and the third alignment electrode RFE3 can have shapes corresponding to the shapes of the first embankment BNK1, the second embankment BNK2, and the third embankment BNK3, respectively. That is, the first alignment electrode RFE1, the second alignment electrode RFE2, and the third alignment electrode RFE3 can have inclined surfaces that are at a certain angle (e.g., a predetermined angle) to the upper surface of the substrate SUB. In this case, light emitted from both ends of the light-emitting elements LD1 and LD2 can be reflected by the inclined surfaces of the first alignment electrode RFE1, the second alignment electrode RFE2, and the third alignment electrode RFE3, and can propagate on the third-direction DR3. Therefore, the luminous efficiency of the display device 1000 can be improved.

[0137] As described above, the first alignment electrode RFE1 can be electrically connected to the bridge wire BRE of the pixel circuit layer PCL through the first contact hole CH1 passing through the fourth circuit insulating layer CINS4. Furthermore, the third alignment electrode RFE3 can be electrically connected to the second power line PL2 of the pixel circuit layer PCL through the second contact hole CH2 passing through the fourth circuit insulating layer CINS4. The first alignment electrode RFE1 can receive drive current from the bridge wire BRE and provide drive current to the light-emitting element unit LDU.

[0138] The first insulating layer INS1 can be disposed on the alignment electrode layer. In an embodiment, the first insulating layer INS1 can be disposed on the entire surface of the substrate SUB.

[0139] The first insulating layer INS1 can be an inorganic insulating layer formed of inorganic material. In this case, the first insulating layer INS1 can be disposed with a substantially uniform thickness along the substrate SUB and the surface of the aligned electrode layer.

[0140] Light-emitting elements LD1 and LD2 can be disposed on the first insulating layer INS1. Light-emitting elements LD1 and LD2 can be disposed in the spaces between the dikes BNK1, BNK2, and BNK3, respectively. For example, the first light-emitting element LD1 can be disposed in the space provided between the first dike BNK1 and the second dike BNK2, and the second light-emitting element LD2 can be disposed in the space provided between the second dike BNK2 and the third dike BNK3. Each of the light-emitting elements LD1 and LD2 can be connected in series or in parallel with each other, and can receive a driving current to emit light with a brightness corresponding to the driving current.

[0141] The second insulating layer INS2 can be disposed on the light-emitting element unit LDU. The second insulating layer INS2 can be disposed to overlap with each of the light-emitting elements LD1 and LD2.

[0142] The second insulating layer INS2 may be configured to cover at least a portion of each of the light-emitting elements LD1 and LD2, and may be configured to expose a first end and a second end of each of the light-emitting elements LD1 and LD2. In an embodiment, the second insulating layer INS2 may fill the space between each of the light-emitting elements LD1 and LD2 and the first insulating layer INS1. Therefore, the light-emitting elements LD1 and LD2 can be more stably disposed and fixed on the first insulating layer INS1.

[0143] The contact electrode layer can be formed on the first insulating layer INS1 and the second insulating layer INS2.

[0144] The contact electrode layer can be configured with a transparent conductive material. For example, transparent conductive materials may include indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO), etc. In this embodiment, the contact electrode layer is configured with a transparent conductive material to reduce light loss when light emitted from the light-emitting elements LD1 and LD2 travels along the third-direction DR3. However, the material of the contact electrode layer is not limited to the materials described above.

[0145] The contact electrode layer may include a first contact electrode CTE1, a second contact electrode CTE2, and a third contact electrode CTE3. The first contact electrode CTE1 may be referred to as the first electrode together with the first alignment electrode RFE1. Furthermore, the second contact electrode CTE2 may be referred to as the second electrode together with the second alignment electrode RFE2.

[0146] The first contact electrode CTE1 can contact the first alignment electrode RFE1 through a contact hole passing through the first insulating layer INS1, and can receive the drive current from the first alignment electrode RFE1. One end of the first contact electrode CTE1 can contact one end of the first light-emitting element LD1. Therefore, the first contact electrode CTE1 can provide the first light-emitting element LD1 with the drive current supplied from the first alignment electrode RFE1.

[0147] The third contact electrode CTE3 can contact the third alignment electrode RFE3 through a contact hole passing through the first insulating layer INS1, and can receive the voltage of the second power line PL2 through the third alignment electrode RFE3. In other words, the third contact electrode CTE3 can be connected to the second power line PL2. Figure 4The second driving power supply VSS is provided. One end of the third contact electrode CTE3 can contact the second end of the second light-emitting element LD2. Therefore, the third contact electrode CTE3 can provide the voltage of the second driving power supply VSS to the second light-emitting element LD2.

[0148] One end of the second contact electrode CTE2 can contact the other end of the first light-emitting element LD1, and the other end of the second contact electrode CTE2 can contact the end of the second light-emitting element LD2 opposite to the second end. The second contact electrode CTE2 can be connected in series with the first light-emitting element LD1 and the second light-emitting element LD2.

[0149] The first contact electrode CTE1, the second contact electrode CTE2, and / or the third contact electrode CTE3 may include a plurality of holes H passing through the first contact electrode CTE1, the second contact electrode CTE2, and / or the third contact electrode CTE3.

[0150] Multiple holes H can be formed along the two ends of the light-emitting elements LD1 and LD2.

[0151] In the implementation, the areas of the multiple holes H can be the same (same or substantially the same), but are not limited to this.

[0152] exist Figure 8 and Figure 9 The illustration shows a case where each of a plurality of holes H has a circular shape, but embodiments of the present disclosure are not limited thereto. In embodiments, the holes H may have a planar quadrilateral or slit shape extending in a first direction DR1 and / or a second direction DR2.

[0153] In one embodiment, the plurality of holes H can pass through the contact electrode layer and also through an electrode layer (e.g., an alignment electrode layer) disposed below the contact electrode layer. In another embodiment, the plurality of holes H can pass through the contact electrode layer to expose the upper surface of an insulating layer (e.g., a first insulating layer INS1) disposed below the contact electrode layer.

[0154] For example, multiple holes H can pass through the first contact electrode CTE1 and the first alignment electrode RFE1. Therefore, multiple holes H can partially expose the upper surface of the first embankment BNK1 disposed below the first alignment electrode RFE1.

[0155] In this embodiment, multiple holes H can pass through the second contact electrode CTE2. Therefore, the multiple holes H can partially expose the upper surface of the first insulating layer INS1 disposed below the second contact electrode CTE2.

[0156] In this embodiment, multiple holes H can pass through the third contact electrode CTE3 and the third alignment electrode RFE3. Therefore, the multiple holes H can partially expose the upper surface of the third embankment BNK3 disposed below the third alignment electrode RFE3.

[0157] When a short-circuit fault occurs, the area between the multiple holes H can be disconnected by a momentary high current. Therefore, even if a short-circuit fault may occur in some light-emitting elements LD1 and LD2, other light-emitting elements can still operate normally. For example, when a short-circuit fault occurs in some light-emitting elements LD1 and LD2, all light-emitting elements arranged in the same column as the light-emitting element that has experienced a short circuit may not emit light. Therefore, in the display device 1000 according to the embodiment, when a current tens or more times the permissible current flows momentarily due to a short-circuit fault, the area between the multiple holes H provided along the end of the light-emitting element that has experienced a short circuit can be disconnected. Therefore, even if a short-circuit fault occurs in some light-emitting elements LD1 and LD2, other light-emitting elements can still operate normally. That is, the light emission failure caused by the short circuit in light-emitting elements LD1 and LD2 can be minimized or reduced.

[0158] The accompanying drawings show a configuration where all of the first contact electrode CTE1, the second contact electrode CTE2, and the third contact electrode CTE3 include multiple holes H. However, according to an embodiment, only some of the contact electrodes CTE1, CTE2, and CTE3 may include multiple holes H. For example, only one of the first contact electrode CTE1 and the second contact electrode CTE2 connected to the first light-emitting element LD1 may include multiple holes H, and only one of the second contact electrode CTE2 and the third contact electrode CTE3 connected to the second light-emitting element LD2 may include multiple holes H.

[0159] The third insulating layer INS3 can be disposed between the first contact electrode CTE1 and the second contact electrode CTE2, and between the second contact electrode CTE2 and the third contact electrode CTE3.

[0160] The surface of the third insulating layer INS3 can contact the first contact electrode CTE1 and the third contact electrode CTE3. In one embodiment, this surface of the third insulating layer INS3 can contact the upper surfaces of the first embankment BNK1 and the third embankment BNK3 exposed by the plurality of holes H. Another surface of the third insulating layer INS3 can contact the second contact electrode CTE2. However, according to an embodiment, the third insulating layer INS3 can be omitted.

[0161] A fourth insulating layer INS4 can be disposed on the contact electrode layer and the third insulating layer INS3. The fourth insulating layer INS4 can cover the contact electrode layer and can prevent or substantially prevent damage to the contact electrode layer. In addition, the fourth insulating layer INS4 can prevent or substantially prevent oxygen, moisture, etc. from penetrating into the light-emitting elements LD1 and LD2.

[0162] The fourth insulating layer INS4 may comprise an inorganic insulating film formed of an inorganic material or an organic insulating film formed of an organic material. The fourth insulating layer INS4 may be formed as a single layer, but is not limited thereto. The fourth insulating layer INS4 may be formed as multiple layers, including organic and inorganic insulating films. For example, the fourth insulating layer INS4 may further comprise a planarization layer. The planarization layer can mitigate step differences caused by various configurations disposed beneath the planarization layer. The planarization layer may comprise, but is not limited to, an organic insulating film.

[0163] According to the above embodiment, when a short-circuit fault occurs in some light-emitting elements LD1 and LD2, the connection between the multiple holes H formed along the ends of the respective light-emitting elements can be broken. Therefore, even if a short-circuit fault occurs, other light-emitting elements can still operate normally, thereby minimizing or reducing light-emitting faults in the light-emitting elements.

[0164] Here, a display device according to another embodiment of the present disclosure will be described. In the following embodiments, the same components as those already described will be indicated by the same reference numerals, and repeated descriptions may be omitted or simplified.

[0165] Figure 10 It is a planar view of pixels according to another embodiment; Figure 11 It is along Figure 10 The sectional view taken by line B-B'.

[0166] Reference Figure 10 and Figure 11 According to another embodiment, the display device and Figures 1 to 9 The difference in the implementation method is that the display device according to this embodiment also includes connection patterns CP1, CP2, CP3 and CP4 that contact the ends of the light-emitting elements LD1 and LD2.

[0167] In the plan view, the connecting patterns CP1, CP2, CP3, and CP4 can be positioned between the light-emitting elements LD1 and LD2 and the contact electrodes CTE1, CTE2, and CTE3. The contact electrodes CTE1, CTE2, and CTE3 can be positioned so as not to overlap with the light-emitting elements LD1 and LD2 in the plan view, but are not limited thereto.

[0168] One end of the connecting patterns CP1, CP2, CP3 and CP4 can be electrically connected to the light-emitting elements LD1 and LD2, and the other end of the connecting patterns CP1, CP2, CP3 and CP4 can be electrically connected to the contact electrodes CTE1, CTE2 and CTE3.

[0169] For example, one end of the first connection pattern CP1 can contact the first end of the first light-emitting element LD1, and the other end of the first connection pattern CP1 can contact one end of the first contact electrode CTE1.

[0170] One end of the second connection pattern CP2 can contact the second end of the first light-emitting element LD1, and the other end of the second connection pattern CP2 can contact one end of the second contact electrode CTE2.

[0171] One end of the third connecting pattern CP3 can contact the other end of the second contact electrode CTE2, and the other end of the third connecting pattern CP3 can contact the first end of the second light-emitting element LD2.

[0172] One end of the fourth connecting pattern CP4 can contact the second end of the second light-emitting element LD2, and the other end of the fourth connecting pattern CP4 can contact one end of the third contact electrode CTE3.

[0173] The first contact electrode CTE1 can electrically connect the first connection pattern CP1 and the first alignment electrode RFE1 to each other. The first contact electrode CTE1 can contact the first connection pattern CP1 and the first alignment electrode RFE1.

[0174] The second contact electrode CTE2 can electrically connect the second connection pattern CP2 and the third connection pattern CP3 to each other. The second contact electrode CTE2 can contact the second connection pattern CP2 and the third connection pattern CP3.

[0175] The third contact electrode CTE3 can electrically connect the fourth connection pattern CP4 and the third alignment electrode RFE3. The third contact electrode CTE3 can contact the fourth connection pattern CP4 and the third alignment electrode RFE3.

[0176] The accompanying drawings show the connection patterns CP1, CP2, CP3, and CP4 contacting contact electrodes CTE1, CTE2, and CTE3. However, according to an embodiment, the connection patterns CP1, CP2, CP3, and CP4 may contact alignment electrodes RFE1, RFE2, and RFE3.

[0177] The connection patterns CP1, CP2, CP3, and CP4 can be formed from a conductive material with a relatively low melting point. The melting points of the connection patterns CP1, CP2, CP3, and CP4 can be lower than the melting points of the contact electrodes CTE1, CTE2, and CTE3 and / or the melting points of the alignment electrodes RFE1, RFE2, and RFE3. For example, the melting points of the connection patterns CP1, CP2, CP3, and CP4 can be from about 300°C to 1500°C. In embodiments, the connection patterns CP1, CP2, CP3, and CP4 can include at least one material selected from Pb, Zn, Te, Sb, Np, Pu, Mg, Al, Ra, Ba, Sr, Ce, As, Eu, Yb, Ca, ES, Cf, La, Pr, Pm, Ge, Bk, Am, Nd, Ac, and Au, but are not necessarily limited thereto.

[0178] In this embodiment, the connection patterns CP1, CP2, CP3, and CP4 are formed of a conductive material with a relatively low melting point, such that when an overload occurs in some of the light-emitting elements LD1 and LD2, the connection patterns CP1, CP2, CP3, and CP4 can be disconnected by heating. Therefore, even if an overload occurs in some of the light-emitting elements LD1 and LD2, overheating and fire accidents of the display device can be prevented or substantially prevented.

[0179] In this implementation, the connecting patterns CP1, CP2, CP3 and CP4 may be formed from the same material, but are not necessarily limited to this.

[0180] According to the implementation, some of the connection patterns CP1, CP2, CP3, and CP4 can be omitted. For example, one of the first connection pattern CP1 and the second connection pattern CP2 connected to the first light-emitting element LD1 can be omitted, and one of the third connection pattern CP3 and the fourth connection pattern CP4 connected to the second light-emitting element LD2 can be omitted.

[0181] Figure 12 It is a planar view of pixels according to another embodiment; and Figure 13 It is along Figure 12 A sectional view taken by line C-C'.

[0182] Reference Figure 12 and Figure 13 According to another embodiment, the display device and Figure 10 and Figure 11 The implementation differs in that the first contact electrode CTE1, the second contact electrode CTE2, and / or the third contact electrode CTE3 include multiple holes H.

[0183] In this embodiment, multiple holes H can pass through the first contact electrode CTE1, the second contact electrode CTE2, and / or the third contact electrode CTE3. Since reference has been made... Figures 1 to 9 Multiple holes H are described, so repeated descriptions will be omitted.

[0184] The first contact electrode CTE1 and the first light-emitting element LD1 can be electrically connected to each other via a first connection pattern CP1. The first light-emitting element LD1 and the second contact electrode CTE2 can be electrically connected to each other via a second connection pattern CP2. The second contact electrode CTE2 and the second light-emitting element LD2 can be electrically connected to each other via a third connection pattern CP3. The second light-emitting element LD2 and the third contact electrode CTE3 can be electrically connected to each other via a fourth connection pattern CP4. (Note: This last part is a repetition of the previous sentence and can be left as is.) Figure 10 and Figure 11 The connection patterns CP1, CP2, CP3 and CP4 are described, so repeated descriptions are omitted.

[0185] According to this embodiment, when a short-circuit fault occurs in some light-emitting elements LD1 and LD2, the connection can be broken along the area between the plurality of holes H formed at the ends of the respective light-emitting elements. Therefore, even if a short-circuit fault occurs, since other light-emitting elements can operate normally, the light-emitting fault of the light-emitting elements can be minimized or reduced as described above.

[0186] Furthermore, since the contact electrodes CTE1, CTE2, and CTE3, as well as the light-emitting elements LD1 and LD2, are connected to each other via connection patterns CP1, CP2, CP3, and CP4, which have relatively low melting points, the connection patterns CP1, CP2, CP3, and CP4 can be thermally disconnected in the event of an overload in the light-emitting elements LD1 and LD2. Therefore, even if an overload occurs in some of the light-emitting elements LD1 and LD2, overheating and fire accidents in the display device can be prevented or substantially prevented as described above.

[0187] Figure 14 It is a planar view of pixels according to another embodiment; and Figure 15 It is along Figure 14 A sectional view taken by line D-D'.

[0188] Reference Figure 14 and Figure 15 According to another embodiment, the display device and Figure 10 and Figure 11 The difference in the implementation is that the first contact electrode CTE1 and / or the third contact electrode CTE3 include multiple holes H, and the second contact electrode CTE2 is directly connected to the light-emitting elements LD1 and LD2.

[0189] In this embodiment, multiple holes H can pass through the first contact electrode CTE1 and / or the third contact electrode CTE3. Since reference has been made... Figures 1 to 9 Multiple holes H are described, therefore repeated descriptions are omitted.

[0190] The first contact electrode CTE1 and the first light-emitting element LD1 can be electrically connected to each other via the first connection pattern CP1. The first light-emitting element LD1 and the second contact electrode CTE2 can be directly connected to each other and electrically connected. The first end of the first light-emitting element LD1 can contact the first connection pattern CP1, and the second end of the first light-emitting element LD1 can contact the second contact electrode CTE2. In an embodiment, the second contact electrode CTE2 can directly cover the second end of the first light-emitting element LD1.

[0191] The second contact electrode CTE2 and the second light-emitting element LD2 can be directly and electrically connected to each other. The second light-emitting element LD2 and the third contact electrode CTE3 can be electrically connected to each other through a fourth connection pattern CP4. The first end of the second light-emitting element LD2 can contact the fourth connection pattern CP4, and the second end of the second light-emitting element LD2 can contact the second contact electrode CTE2. In an embodiment, the second contact electrode CTE2 can directly cover the second end of the second light-emitting element LD2.

[0192] Furthermore, since it has already been referenced Figure 10 and Figure 11 The connection patterns CP1 and CP4 are described, so repeated descriptions are omitted.

[0193] According to this embodiment, when a short-circuit fault occurs in some light-emitting elements LD1 and LD2, the area between the plurality of holes H formed along the ends of the light-emitting elements can be disconnected. Therefore, even if a short-circuit fault occurs, since other light-emitting elements can operate normally, the light-emitting fault of the light-emitting elements can be minimized or reduced as described above.

[0194] Furthermore, since the contact electrodes CTE1 and CTE3, as well as the light-emitting elements LD1 and LD2, are connected by connection patterns CP1 and CP4, which have relatively low melting points, the connection patterns CP1 and CP4 can be disconnected by heating when an overload occurs in some of the light-emitting elements LD1 and LD2. Therefore, even if an overload occurs in some of the light-emitting elements LD1 and LD2, overheating and fire accidents of the display device can be prevented or substantially prevented as described above.

[0195] Although some embodiments of this disclosure have been described with reference to the accompanying drawings, those skilled in the art will understand that embodiments may be implemented in other specific forms without altering the technical spirit and essential characteristics of this disclosure. Therefore, it should be understood that the embodiments described above are illustrative in all respects and not restrictive.

Claims

1. A display device, including: Multiple pixels, located on a substrate, Each of the plurality of pixels includes: The first electrode and the second electrode are spaced apart from each other on the substrate; and Multiple light-emitting elements, each light-emitting element including a first end connected to the first electrode and a second end connected to the second electrode, and The first electrode includes a plurality of first holes adjacent to the first end of each of the plurality of light-emitting elements; The display device further includes a dam located between the substrate and the first electrode. The plurality of first holes pass through the first electrode to expose the upper surface of the embankment.

2. The display device according to claim 1, wherein, The plurality of first holes are arranged along the outer edge of the first end of the light-emitting element.

3. The display device according to claim 1, wherein, The first electrode includes a first alignment electrode and a first contact electrode on the first alignment electrode, and The first contact electrode covers the first end of the light-emitting element.

4. The display device according to claim 1, wherein, The second electrode includes a plurality of second holes adjacent to the second end of each of the plurality of light-emitting elements.

5. Display devices, including: Multiple pixels, located on a substrate, Each of the plurality of pixels includes: A first electrode and a second electrode are spaced apart from each other on the substrate, the first electrode including a first alignment electrode and a first contact electrode on the first alignment electrode; Multiple light-emitting elements are located between the first electrode and the second electrode; and A first connection pattern connects the first electrode to each of the plurality of light-emitting elements. One end of the first connection pattern contacts the first contact electrode, and the other end of the first connection pattern contacts the first end of the light-emitting element. The melting point of the first connection pattern is lower than the melting point of the first electrode.

6. The display device according to claim 5, wherein, One end of the first connection pattern is in contact with the first electrode, and the other end of the first connection pattern is in contact with the first end of the light-emitting element.

7. The display device according to claim 5, wherein, The first electrode and the light-emitting element are spaced apart from each other.

8. The display device of claim 5, further comprising a second connection pattern connecting the second electrode and the light-emitting element to each other.

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