Methods for manufacturing display devices
By using a base to regulate temperature and a mask frame to control the position of the deposited material, the problem of substrate surface uniformity in display device manufacturing was solved, thereby improving the reliability and efficiency of the display device.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SAMSUNG DISPLAY CO LTD
- Filing Date
- 2021-04-07
- Publication Date
- 2026-07-17
AI Technical Summary
During the manufacturing process of display devices, it is difficult to uniformly form various layers on the entire surface of the substrate, especially under conditions of maintaining a uniform temperature, which leads to problems with the reliability and efficiency of the display device.
A base is used to maintain the temperature of the display substrate, and the substrate temperature is regulated by heaters and coolant flow paths. Combined with the use of a mask frame to control the position of the deposited material and prevent arc discharge, uniform substrate processing is achieved.
This technology enables the uniform formation of various layers on the substrate surface, improving the reliability and manufacturing efficiency of display devices and meeting the requirements of various process conditions.
Smart Images

Figure CN113496924B_ABST
Abstract
Description
[0001] Cross-references to related applications
[0002] This application claims priority and benefit to Korean Patent Application No. 10-2020-0042404, filed on April 7, 2020, with the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field
[0003] One or more embodiments relate to a method of manufacturing a display device by using a base. Background Technology
[0004] The use of display devices has recently become more diversified. Furthermore, as the thickness and weight of display devices decrease, their applications are expanding.
[0005] As the size of the display area used to display images in a display device increases, various functions combined with or associated with the display device have been added. As a method of increasing area while adding various functions, display devices with display areas that not only display images but also have various additional functions have been continuously researched.
[0006] Such a display device can include various layers on a substrate, such as a pixel circuit layer including thin-film transistors, a display layer with display components, and an input sensing portion for sensing touch input. The reliability of the display device can be improved by uniformly forming these various layers across the entire surface of the substrate. To ensure uniform formation of these layers across the entire surface of the substrate, it may be important to maintain the display device at a uniform temperature during manufacturing. Therefore, during the manufacturing process, the display device can be placed on a pedestal to maintain a uniform temperature, and the various layers can be formed on the substrate.
[0007] It will be understood that the background art in the technical section is partly intended to provide useful background information for understanding the technology. However, the background art in the technical section may also include concepts, ideas, or knowledge of the subject matter disclosed herein that were not known or understood by a person skilled in the art prior to the corresponding valid application date. Summary of the Invention
[0008] One or more embodiments can provide a method for manufacturing a display device by using a base that meets various process conditions.
[0009] Additional aspects will be set forth in part in the description which follows, and in part will be apparent from the description, or may be learned by practice of the embodiments presented in this disclosure.
[0010] According to one embodiment, a method of manufacturing a display device may include: placing a display substrate on a base in a cavity, maintaining the base at a first temperature, dividing the display substrate into a plurality of partial substrates, placing the plurality of partial substrates on the base, and maintaining the base at a second temperature.
[0011] In one embodiment, the method may further include arranging a first mask frame in a cavity, the first mask frame including a first opening, wherein the first mask frame may overlap with an edge of a display substrate, and the first opening may expose a central region of the display substrate.
[0012] In one embodiment, the method may further include forming a pixel circuit layer on the display substrate.
[0013] In one embodiment, the base may include a heater for maintaining the base at a first temperature.
[0014] In one embodiment, the method may further include arranging a second mask frame in a chamber, the second mask frame including a plurality of second openings, wherein the second mask frame may overlap with the edges of a plurality of partial substrates, and the plurality of second openings may respectively expose the central regions of the plurality of partial substrates.
[0015] In one embodiment, maintaining the base at the second temperature may include: introducing coolant into the base through a coolant inlet portion of the base, and discharging coolant from the base through a coolant outlet portion of the base.
[0016] In one embodiment, the method may further include forming an input sensing portion on each of a plurality of partial substrates.
[0017] In one embodiment, the first temperature may be higher than the second temperature.
[0018] In one embodiment, the base may include a plurality of holes and a support plate supporting a display substrate or a plurality of partial substrates. The plurality of holes in the base may be formed in a first region and a second region surrounded by the first region, and the first region may be the edge of the support plate.
[0019] In one embodiment, placing a plurality of partial substrates on a base may include: placing a plurality of partial substrates on support pins that pass through a plurality of holes, and placing the plurality of partial substrates on a support plate by moving the support pins and the base relative to either of the support pins and the base.
[0020] In one embodiment, the method may further include moving the base upward.
[0021] In one embodiment, the method may further include preventing deformation of the base by using an anti-deformation portion, wherein the base includes the anti-deformation portion.
[0022] According to another embodiment, a method of manufacturing a display device may include: placing a substrate on a base including a flow path and a heater; operating the heater; allowing coolant to flow through the flow path; forming a layer on the substrate by spraying a deposition material via a spraying portion; forming a first layer on the substrate in conjunction with the operation of the heater; and forming a second layer on the substrate in conjunction with the flow of coolant through the flow path.
[0023] In one embodiment, the formation of the first layer may include forming a pixel circuit layer on the substrate in conjunction with the operation of a heater.
[0024] In one embodiment, the method may further include using a heater to maintain the base at a first temperature.
[0025] In one embodiment, the formation of the second layer may include the flow of coolant onto the substrate to form an input sensing portion.
[0026] In one embodiment, the method may further include maintaining the base at a second temperature by allowing coolant to circulate through a flow path.
[0027] In one embodiment, the base may include a support plate supporting the substrate and may include a plurality of holes, which may be disposed in a first region and a second region surrounded by the first region, wherein the first region may be the edge of the support plate.
[0028] In one embodiment, the method may further include: arranging a mask frame including at least one opening in a chamber facing a base, moving the base upward, and arranging the mask frame to overlap with the edge of a substrate.
[0029] In one embodiment, the base may include a main body and a deformation-resistant part, the main body surrounding the flow path and the heater, and the deformation-resistant part preventing deformation of the main body. Attached Figure Description
[0030] The above and other aspects, features, and advantages of specific embodiments of the present disclosure will become more apparent from the following description taken in conjunction with the accompanying drawings, in which:
[0031] Figure 1 This is a schematic plan view of an apparatus for manufacturing a display device according to an embodiment;
[0032] Figure 2 This is a schematic cross-sectional view of the processing portion according to an embodiment;
[0033] Figure 3 This is a schematic plan view of the base according to an embodiment;
[0034] Figure 4 yes Figure 3 A schematic rear view of the base, schematically illustrating the heater and flow path;
[0035] Figure 5 This is a schematic plan view of the display substrate and the first mask frame;
[0036] Figure 6 This is a schematic plan view of the display substrate and the second mask frame;
[0037] Figure 7 It is by Figure 1 A schematic cross-sectional view of a display device manufactured using an apparatus for manufacturing a display device;
[0038] Figure 8 yes Figure 7 A schematic cross-sectional view of a portion of the display device;
[0039] Figure 9 , Figure 10 and Figure 11 This is a schematic cross-sectional view illustrating some operations of a method for manufacturing a display device according to an embodiment;
[0040] Figure 12 This is a schematic cross-sectional view of a display substrate on which pixel circuit layers can be formed;
[0041] Figure 13 This is a schematic cross-sectional view of a display substrate divided by irradiating a laser beam onto the substrate;
[0042] Figure 14 This is a schematic cross-sectional view of the display layer and encapsulation layer formed on the display substrate;
[0043] Figure 15 , Figure 16 and Figure 17 This is a schematic cross-sectional view illustrating some operations of a method for manufacturing a display device according to an embodiment; and
[0044] Figure 18 This is a schematic cross-sectional view of the input sensing portion formed on the display substrate. Detailed Implementation
[0045] Reference will now be made in detail to embodiments, examples of which are illustrated in the accompanying drawings. In this regard, embodiments may take different forms and should not be construed as limited to the description set forth herein. Therefore, embodiments are described below only by reference to the accompanying drawings to explain aspects of the description. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. For example, “A and / or B” may be understood to mean “A, B, or A and B”. The terms “and” and “or” may be used in a combined or separate sense and may be understood as equivalent to “and / or”. Throughout this disclosure, the expression “at least one of a, b, and c” indicates only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof.
[0046] Various modifications can be applied to the embodiments, and specific embodiments will be illustrated and described in the accompanying drawings. The effects and features of the embodiments, as well as methods for achieving these effects and features, will become clearer with reference to the following detailed description taken in conjunction with the accompanying drawings. However, embodiments can be implemented in various forms and are not limited to the embodiments presented below.
[0047] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. The same reference numerals denote the same elements in the drawings, and redundant explanations are omitted.
[0048] In the embodiments described below, it will be understood that although the terms “first,” “second,” etc., may be used herein to describe various components, these components should not be limited by these terms. These terms are used only to distinguish one component from another.
[0049] In the following embodiments, the singular forms “a” and “the” are intended to also include the plural forms, unless the context explicitly indicates otherwise.
[0050] In the following embodiments, it will be further understood that terms such as “comprising,” “having,” and “including” indicate the presence of the stated features or components, but do not exclude the presence or addition of one or more other features or components.
[0051] In the following embodiments, it will be understood that when a layer, area, or component is referred to as being "formed" on another layer, area, or component, it can be formed directly or indirectly on that other layer, area, or component. For example, intermediate layers, areas, or components may exist.
[0052] For ease of explanation, the dimensions of the components in the accompanying drawings may be exaggerated. For example, since the dimensions and thicknesses of the components in the accompanying drawings can be arbitrarily illustrated for ease of explanation, the following embodiments are not limited thereto.
[0053] When a particular embodiment can be implemented differently, the specific order of processes may differ from the order in which they are executed. For example, two consecutively described processes may be executed substantially simultaneously, or in the reverse order of their description.
[0054] In the following embodiments, it will be understood that when a layer, area, or component is referred to as being "connected" to another layer, area, or component, it can be directly connected to the other layer, area, or component, or indirectly connected to the other layer, area, or component via an intermediate layer, area, or component. For example, in this specification, when a layer, area, or component is referred to as being "electrically connected" to another layer, area, or component, it can be directly electrically connected to the other layer, area, or component, or indirectly electrically connected to the other layer, area, or component via an intermediate layer, area, or component.
[0055] The term “overlap” can include layer, stack, face or orientation, extend over, extend under, cover or partially cover, or any other suitable term that will be recognized and understood by one of ordinary skill in the art.
[0056] Given the measurements discussed and the errors associated with the measurement of a particular quantity (i.e., limitations of the measurement system), as used herein, “about,” “approximately,” or “substantially” can include the stated value and mean within an acceptable range of deviation from the stated value as determined by one of ordinary skill in the art. For example, “about” can mean within one or more standard deviations, or, for example, within ±30%, ±20%, or ±5% of the stated value.
[0057] Figure 1 This is a schematic plan view of an apparatus 1000 for manufacturing a display device according to an embodiment. Figure 2 This is a schematic cross-sectional view of the processing section 1300 according to an embodiment.
[0058] refer to Figure 1 The apparatus 1000 for manufacturing a display device may include a loading section 1100, a conveying section 1200, and a processing section 1300.
[0059] The loading section 1100 can be extended to the transfer section 1200. The loading section 1100 serves as an inlet for the apparatus 1000 used to manufacture the display device, and the display substrate S can be loaded into the loading section 1100 from the outside. The display substrate S can be transferred to the transfer section 1200 via the loading section 1100.
[0060] The pressure in the loading section 1100 can be adjusted to be the same as or similar to atmospheric pressure. As another example, the internal pressure of the loading section 1100 can be adjusted to be the same as or similar to a vacuum state. For example, when the display substrate S is loaded from the outside, the pressure in the loading section 1100 can be adjusted to be the same as or similar to atmospheric pressure. Furthermore, when the display substrate S is transferred to the transfer section 1200, the pressure in the loading section 1100 can be adjusted to be the same as or similar to a vacuum state.
[0061] The transfer section 1200 can extend to the loading section 1100 and the processing section 1300. The transfer section 1200 can receive or take over the display substrate S from the processing section 1300 or the loading section 1100. In this state, the transfer section 1200 may include a robotic arm 1400. The robotic arm 1400 can transfer the display substrate S from the loading section 1100 to the transfer section 1200. Furthermore, the robotic arm 1400 can transfer the display substrate S from the transfer section 1200 to the processing section 1300, or transfer the display substrate S that has already undergone the manufacturing process from the processing section 1300 to the transfer section 1200.
[0062] The processing section 1300 can be extended to the transmission section 1200. In one embodiment, the processing section 1300 may include multiple processing sections 1300. In this state, each processing section 1300 can be extended to the transmission section 1200. Although Figure 1 The diagram shows five processing sections 1300, each extending into the transmission section 1200, but the number of processing sections 1300 can be varied.
[0063] The process of manufacturing the display device can be performed in the processing section 1300. For example, chemical vapor deposition (CVD) can be performed in the processing section 1300. In another example, plasma CVD or plasma-enhanced CVD (PECVD) can be performed in the processing section 1300. In yet another example, atomic layer deposition (ALD) or plasma-enhanced ALD (PEALD) can be performed in the processing section 1300.
[0064] The display substrate S can be a manufactured display device. The display substrate S may include glass or a polymer resin such as polyethersulfone, polyarylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyimide, polycarbonate (PC), cellulose triacetate (TAC), cellulose acetate propionate, or combinations thereof.
[0065] In one embodiment, the display substrate S may be a mother substrate, which is a set of unit regions. In this state, each of the unit regions may be part of a manufactured display device. The display substrate S may be divided by a cutting process. In one embodiment, the display substrate S may be divided into multiple partial substrates. For example, partial substrates may be equally divided substrates of the display substrate S. As another example, the display substrate S may be divided according to unit regions. In some embodiments, the entire display substrate S may be part of a display device that has undergone the manufacturing process.
[0066] In one embodiment, the display substrate S can be laser-cut using a laser device. In another embodiment, the display substrate S can be cut using a knife.
[0067] refer to Figure 2 The processing section 1300 may include a chamber 1310, an opening / closing section 1320, a base 1330, a spraying section 1340, a deposition material supply section 1350, a power section 1360, a pressure regulating section 1370, a support pin SP, a support pin adjusting section AP, a heater control section HC, and a coolant control section RC.
[0068] The chamber 1310 may have a space formed therein and an opening side, allowing the display substrate S to be extracted or received through the opening side. In one embodiment, an opening / closing portion 1320 with a gate valve may be provided at the opening side of the chamber 1310 for selective opening / closing. When the opening / closing portion 1320 is open, the robotic arm 1400 may load the display substrate S into the chamber 1310.
[0069] In one embodiment, chamber 1310 may be a chamber for CVD or PECVD. In another embodiment, chamber 1310 may be a chamber for ALD or PEALD. In yet another embodiment, chamber 1310 may be a chamber in which CVD (or PECVD) or ALD (or PEALD) is selectively performed. In the following description, the case where chamber 1310 may be a chamber for PECVD is described in detail.
[0070] The chamber 1310 may include a first part 1311, a second part 1312, and a third part 1313. The first part 1311 may correspond to the chamber body. The second part 1312 may be disposed above the first part 1311. The second part 1312 may correspond to a cover. The third part 1313 may correspond to a cover plate. The third part 1313 may be configured to cover a backing plate BP. In this state, the backing plate BP can protect the interior of the chamber 1310 from the influence of the atmospheric environment and prevent leakage of the deposited material sprayed from the spraying section 1340. In one embodiment, the backing plate BP may be provided with multiple coolant flow paths.
[0071] The display substrate S can be placed on a base 1330 disposed in the chamber 1310. As another example, the display substrate S can be placed on the base 1330 by being divided into multiple partial substrates. The display substrate S or partial substrates can be placed on the base 1330 by support pins SP and support pin adjustment portions AP.
[0072] The base 1330 may include a flow path FP through which coolant flows and a heater HT. Therefore, the base 1330 can regulate the temperature of the display substrate S. For example, the base 1330 can be maintained at a preset first temperature T1. The first temperature T1 can be above approximately 150°C and below approximately 400°C. In this state, the heater HT can maintain the base 1330 at the preset first temperature T1. The heater HT can be electrically connected to a heater control section HC.
[0073] The base 1330 can be maintained at a preset second temperature T2. The second temperature T2 can be approximately 150°C or lower. Therefore, the first temperature T1 can be higher than the second temperature T2. In this state, the base 1330 can be maintained at the preset second temperature T2 when coolant flows through the flow path FP. The flow path FP can extend to the coolant inlet section RI or the coolant outlet section RO, and the coolant inlet section RI and the coolant outlet section RO can extend to the coolant control section RC.
[0074] The base 1330 may include a main body 1331, a support plate 1333, an anti-deformation portion 1335, and a central portion CP. The main body 1331 may surround the heater HT and the flow path FP. In other words, the heater HT and the flow path FP may be inserted into the main body 1331. In one embodiment, the heater HT may be positioned above the flow path FP. In another embodiment, the heater HT may be positioned below the flow path FP. In the following description, the case where the heater HT may be positioned above the flow path FP is described in detail.
[0075] A support plate 1333 can be disposed above the main body portion 1331. In this state, the display substrate S can be placed on the support plate 1333. In one embodiment, the support plate 1333 can be provided integrally with the main body portion 1331. The support plate 1333 can be a portion protruding from the main body portion 1331 in the z-direction.
[0076] The support plate 1333 may include holes H through which support pins SP pass. Holes H may include multiple holes H, and support pins SP may include multiple support pins SP. Holes H may be provided along the edge of the support plate 1333, or they may be provided in the central region of the support plate 1333.
[0077] The main body 1331 and / or the support plate 1333 may comprise at least one of aluminum (Al), magnesium (Mg), zinc (Zn), manganese (Mn), copper (Cu), and silicon (Si). For example, the main body 1331 and / or the support plate 1333 may comprise an Al-Mg-Si alloy. In another example, the main body 1331 and / or the support plate 1333 may comprise an Al-Zn-Mg alloy.
[0078] An anti-deformation portion 1335 may be disposed below the main body portion 1331. The anti-deformation portion 1335 may be a plate supporting the main body portion 1331. The anti-deformation portion 1335 can prevent deformation of the main body portion 1331. For example, when the main body portion 1331 is heated to a first temperature T1 by a heater HT, the main body portion 1331 may undergo thermal deformation. In this state, since the anti-deformation portion 1335 supports the main body portion 1331, sagging and deformation due to heat can be prevented. The anti-deformation portion 1335 may comprise a ceramic material. For example, the anti-deformation portion 1335 may comprise at least one of Si, Al, titanium (Ti), and zirconium (Zr).
[0079] The main body 1331 and the anti-deformation part 1335 may each include a through hole corresponding to the hole H of the support plate 1333. The through hole may include a plurality of through holes extending into each of the holes H of the support plate 1333. Therefore, the support pin SP can penetrate the base 1330 and support the display substrate S.
[0080] The central portion CP can be positioned below the main body 1331. The central portion CP can adjust the position of the main body 1331. Therefore, the base 1330 can rise or fall. For example, the central portion CP may include a cylinder. In another example, the central portion CP may include a linear motor. In yet another example, the central portion CP may include a rack and pinion. The central portion CP may include all means and structures for adjusting the position of the main body 1331.
[0081] The heating wire of the heater HT can pass through the interior of the central section CP and can be electrically connected to the heater control section HC. Furthermore, the coolant inlet section RI and coolant outlet section RO, extending to the flow path FP, can pass through the interior of the central section CP to extend to the coolant control section RC.
[0082] A heater control section HC can be electrically connected to a heater HT to control the temperature of the heater HT. For example, the heater control section HC can control the heater HT to have a first temperature T1. In this state, the first temperature T1 can be above approximately 150°C and below approximately 400°C. When the heater control section HC controls the temperature of the heater HT, a pixel circuit layer including thin-film transistors can be formed on the display substrate S.
[0083] The coolant control section RC can be extended to the flow path FP to control the temperature of the coolant. The coolant control section RC can supply coolant to the flow path FP via the coolant input section RI. Furthermore, the coolant control section RC can receive the coolant that has flowed through the flow path FP via the coolant output section RO. The coolant control section RC can control the coolant flowing through the flow path FP to have a second temperature T2. In this state, the second temperature T2 can be below approximately 150°C. The coolant can include perfluoropolyether (PFPE). For example, the coolant can be Galden fluid. When the coolant control section RC supplies coolant through the flow path FP, the input sensing section can be formed on the display substrate S.
[0084] In this embodiment, the base 1330 may include a heater HT and a flow path FP through which coolant flows. Therefore, the base 1330 can meet various process conditions. For example, the pixel circuit layer including thin-film transistors in the display device can be formed in a temperature range of approximately 150°C to approximately 400°C, and the input sensing portion can be formed at a temperature below approximately 150°C. Unlike this embodiment, the first base may include a heater HT, and the second base may include a flow path FP through which coolant flows. After the display substrate S is placed on the first base, the pixel circuit layer can be formed. After the display substrate S is placed on the second base, the input sensing portion can be formed. In other words, the first base needs to be replaced by the second base. Because the base 1330 of this embodiment includes a heater HT and a flow path FP through which coolant flows, various process conditions can be met, and the efficiency of the apparatus 1000 used to manufacture the display device can be improved.
[0085] The support pin SP can be configured to pass through the hole H in the support plate 1333. In one embodiment, the support pin SP can have a T-shape. In another embodiment, the support pin SP can have a shape that extends in one direction. For example, the support pin SP can have a shape that extends in the z-direction. In the following description, the case where the support pin SP has a T-shape is described in detail.
[0086] The display substrate S, conveyed by the robotic arm 1400, can be placed on the support pin SP, and one of the support pin SP and the base 1330 can move relative to the other, such that the display substrate S can be placed on the base 1330. In one embodiment, the support pin SP can be extended to the support pin adjustment portion AP for raising or lowering. In another embodiment, the support pin SP can be fixed in the chamber 1310. For example, the support pin SP can be fixed to the inner wall of the first portion 1311. In the following description, the raising or lowering of the support pin SP by extending to the support pin adjustment portion AP is described in detail.
[0087] The support pin adjusting part AP can adjust the position of the support pin SP. The support pin adjusting part AP can move the support pin SP up or down. For example, the support pin adjusting part AP may include a cylinder. In another example, the support pin adjusting part AP may include a linear motor. In yet another example, the support pin adjusting part AP may include a rack and pinion. The support pin adjusting part AP may include all means and structures for adjusting the position of the support pin SP.
[0088] The spraying section 1340 can supply deposition material into the interior of the chamber 1310. The spraying section 1340 may include multiple nozzles, and the deposition material can be sprayed through the nozzles toward the interior of the chamber 1310. The deposition material may be a gas containing components that are raw materials to be formed on the display substrate S. In one embodiment, the spraying section 1340 may serve as one of two electrodes for forming plasma with the base 1330. For example, the spraying section 1340 may be electrically connected to the power section 1360. The base 1330 may be grounded.
[0089] The deposition material supply section 1350 can supply deposition material to the spraying section 1340. In addition, the deposition material supply section 1350 can store deposition material.
[0090] The power supply section 1360 can be electrically connected to the spraying section 1340. In one embodiment, the power supply section 1360 can supply alternating current (AC) power to the spraying section 1340. The spraying section 1340 can be used as an upper electrode, and the base 1330 can be used as a lower electrode. Therefore, plasma can be formed between the spraying section 1340 and the base 1330.
[0091] The pressure regulating section 1370 may include a connecting pipe 1371 extending into the chamber 1310 and a pump 1373 provided on the connecting pipe 1371. In this state, outside air can be introduced through the connecting pipe 1371, or gas in the chamber 1310 may be discharged to the outside through the connecting pipe 1371 depending on the operation of the pump 1373.
[0092] The processing section 1300 may further include a mask frame. In this configuration, the mask frame may be disposed between the base 1330 and the spraying section 1340. In one embodiment, the mask frame may be fixed inside the chamber 1310. The mask frame can shield the edges of the display substrate S. Therefore, the mask frame can prevent the deposition material sprayed from the spraying section 1340 from being deposited on the edges of the display substrate S. The mask frame may include a first mask frame and a second mask frame.
[0093] The first mask frame can shield the edges of the display substrate S. When the display substrate S is divided into multiple partial substrates, the second mask frame can shield the edges of the partial substrates.
[0094] Figure 3 This is a schematic plan view of the base 1330 according to an embodiment. Figure 4 yes Figure 3 A schematic rear view of the base 1330, schematically illustrating the heater HT and the flow path FP. Figure 5 This is a schematic plan view of the display substrate S and the first mask frame MF1. Figure 6 This is a schematic plan view of the display substrate S and the second mask frame MF2. Figures 3 to 6 In the middle, due to with Figure 2 In the accompanying drawings, the same reference numerals denote the same elements, therefore their redundant descriptions are omitted.
[0095] refer to Figure 3The base 1330 may include a main body 1331 and a support plate 1333. The main body 1331 may include an alignment mark AM and a grounding portion GP. The alignment mark AM may be disposed on the main body 1331 along the edge of the support plate 1333. The alignment mark AM can be used to align a mask frame, and the alignment mark AM may include a groove. In one embodiment, the mask frame may include a protrusion corresponding to the alignment mark AM. The protrusion of the mask frame may be inserted into the groove of the alignment mark AM.
[0096] In one embodiment, a damage prevention portion (not shown) may be disposed in a groove of the alignment mark AM. The damage prevention portion can prevent the main body 1331 and / or the mask frame from being damaged due to contact between the main body 1331 and the mask frame. The damage prevention portion may include a ceramic material.
[0097] The base 1330 can be grounded via the grounding portion GP. Therefore, the base 1330 can be used as a lower electrode. The main body 1331 may include a plurality of grounding portions GP as grounding portions GP, and the grounding portions GP may be disposed along the edge of the main body 1331.
[0098] The display substrate S can be placed on the upper surface 1333US of the support plate 1333. The upper surface 1333US of the support plate 1333 may include a first surface US1 and a second surface US2. In this state, the first surface US1 and the second surface US2 may be surfaces on which multiple partial substrates (e.g., a first partial substrate and a second partial substrate) can be disposed.
[0099] The support plate 1333 may include a first region R1 and a second region R2 surrounded by the first region R1. The first region R1 may correspond to the edge of the support plate 1333. The second region R2 may correspond to the central region of the support plate 1333. The holes H of the support plate 1333 may include a plurality of holes H, and the holes H of the support plate 1333 may be provided along the edge of the support plate 1333. In other words, the holes H of the support plate 1333 may be provided along the first region R1. In addition, the holes H of the support plate 1333 may be provided in the second region R2. Therefore, when the support pin SP supports the display substrate S, the central region of the display substrate S can be prevented from sagging. In addition, the support pin SP can stably support each of the partial substrates. In one embodiment, the holes H provided in the first surface US1 and the holes H provided in the second surface US2 may be arranged asymmetrically with respect to the y-direction. In some embodiments, the holes H provided in the first surface US1 and the holes H provided in the second surface US2 may be arranged symmetrically with respect to the y-direction.
[0100] refer to Figure 4The base 1330 may include a main body 1331 and a support plate 1333, and the heater HT and flow path FP may be provided in the main body 1331. The support plate 1333 may include a hole H through which a support pin SP passes.
[0101] The heater HT can maintain the base 1330 at a first temperature T1. The heater HT can be electrically connected to the heater control section HC via the central portion CP. In one embodiment, the heater HT may include a first external heating wire OHL1, a second external heating wire OHL2, a first internal heating wire IHL1, and a second internal heating wire IHL2. In this state, the first external heating wire OHL1 and the second external heating wire OHL2 may be arranged symmetrically with respect to the y-direction. The first internal heating wire IHL1 and the second internal heating wire IHL2 may also be arranged symmetrically with respect to the y-direction. Since the first external heating wire OHL1 and the second external heating wire OHL2 may be identical or similar to each other, the first external heating wire OHL1 is described in detail, and since the first internal heating wire IHL1 and the second internal heating wire IHL2 may be identical or similar to each other, the first internal heating wire IHL1 is described in detail.
[0102] The first external heating wire OHL1 can extend from the center portion CP and be disposed along the edge of the main body portion 1331. At least a portion of the first external heating wire OHL1 may include a bend. The first internal heating wire IHL1 can be disposed inside the first external heating wire OHL1. In other words, the first external heating wire OHL1 can surround the first internal heating wire IHL1. The first internal heating wire IHL1 can extend from the center portion CP in a serpentine pattern. Both the first external heating wire OHL1 and the first internal heating wire IHL1 can be disposed separately from the hole H of the support plate 1333.
[0103] Coolant can flow through flow path FP, and therefore base 1330 can be maintained at a second temperature T2. Flow path FP can be extended through central portion CP to coolant control portion RC. In this state, after coolant is supplied to coolant inlet portion RI and flows through flow path FP, coolant can be discharged through coolant outlet portion RO. In one embodiment, flow path FP may include a pipe through which coolant can flow.
[0104] In one embodiment, the flow path FP may include a first outflow path ORL1, a second outflow path ORL2, a first inflow path IRL1, and a second inflow path IRL2. In this configuration, the first outflow path ORL1 and the second outflow path ORL2 may be arranged symmetrically with respect to the x-direction. The first inflow path IRL1 and the second inflow path IRL2 may also be arranged symmetrically with respect to the x-direction. Since the first outflow path ORL1 and the second outflow path ORL2 may be identical or similar to each other, the first outflow path ORL1 is described in detail. Similarly, since the first inflow path IRL1 and the second inflow path IRL2 may be identical or similar to each other, the first inflow path IRL1 is described in detail.
[0105] The first outflow path ORL1 can extend from the central portion CP and be arranged along the edge of the main body 1331. At least a portion of the first outflow path ORL1 may include a bend. The first outflow path ORL1 may at least partially overlap with the first external heating line OHL1 or the second external heating line OHL2. The first internal flow path IRL1 may be located inside the first outflow path ORL1. In other words, the first outflow path ORL1 may surround the first internal flow path IRL1. The first internal flow path IRL1 may be configured to intersect with the first internal heating line IHL1 or the second internal heating line IHL2. Both the first outflow path ORL1 and the first internal flow path IRL1 may be separately arranged from the hole H of the support plate 1333.
[0106] refer to Figure 5 The first mask frame MF1 may include a first opening OP1. In this state, the display substrate S can be positioned corresponding to the first opening OP1. The first mask frame MF1 may overlap with the edge of the display substrate S. Therefore, the deposition material may not be deposited on the edge of the display substrate S. The first opening OP1 may expose the central region of the display substrate S. Therefore, the deposition material may be deposited only in the central region of the display substrate S.
[0107] In one embodiment, the first mask frame MF1 can fix the display substrate S. With the deposition material deposited on the display substrate S, the display substrate S can be kept flat.
[0108] Furthermore, arc discharge may occur if the edges of the display substrate S are exposed during the PECVD process. The deposited material may not be deposited uniformly on the display substrate S. In this embodiment, since the first mask frame MF1 covers the edges of the display substrate S, arc discharge can be prevented. Therefore, the deposited material can be uniformly deposited on the display substrate S.
[0109] refer to Figure 6The display substrate S can be divided into multiple partial substrates. During the manufacturing process of the display device, the display substrate S can be divided into multiple partial substrates. In the following description, for ease of explanation, the case where the display substrate S can be divided into a first partial substrate S1 and a second partial substrate S2 is described in detail.
[0110] The second mask frame MF2 may include a plurality of second openings OP2. The second mask frame MF2 may include a first frame portion MFa and a second frame portion MFb. In one embodiment, the first frame portion MFa and the second frame portion MFb may be provided integrally. In another embodiment, the first frame portion MFa and the second frame portion MFb may be separate frame portions. In the following description, the case where the first frame portion MFa and the second frame portion MFb may be provided integrally is described in detail.
[0111] The first frame portion MFa may include an opening OP. The shape of the first frame portion MFa may be consistent with... Figure 5 The first mask frame MF1 is the same. In this state, the first partial substrate S1 and the second partial substrate S2 can be configured to correspond to the opening OP of the first frame portion MFa. The first frame portion MFa can overlap with the edge of the first partial substrate S1 and the edge of the second partial substrate S2.
[0112] In one embodiment, the second mask frame MF2 can fix the first partial substrate S1 and the second partial substrate S2. Since the second mask frame MF2 covers the edges of the first partial substrate S1 and the edges of the second partial substrate S2, arc discharge can be prevented.
[0113] The second frame section MFb can extend in one direction. For example, the second frame section MFb can... Figure 6 The second frame portion MFb extends in the y-direction. It can be configured to intersect the opening OP of the first frame portion MFA, and the second frame portion MFb can divide the opening OP of the first frame portion MFA into second openings OP2. In some embodiments, the second mask frame MF2 may include multiple second frame portions MFb. The second mask frame MF2 may include two or more second openings OP2, and the second frame portions MFb may be arranged in a grid shape within the first frame portion MFA.
[0114] Multiple partial substrates can be configured to correspond to the second opening OP2. For example, the first partial substrate S1 and the second partial substrate S2 can be configured to correspond to the corresponding second opening OP2.
[0115] The display device manufactured by the apparatus 1000 described above for manufacturing a display device is described in detail. A display device that is a means for displaying images may include portable mobile devices such as gaming devices, multimedia devices, or ultra-compact PCs. The display device 1, which will be described later, may include liquid crystal displays, electrophoretic displays, organic light-emitting displays, inorganic electroluminescent (EL) displays, field emission displays, surface conduction electron emission displays, quantum dot displays, plasma displays, cathode ray tube displays, etc. In the following description, although organic light-emitting display devices are described as examples of display devices according to embodiments, the various types of display devices described above can be used in one or more embodiments.
[0116] Figure 7 It is by Figure 1 A schematic cross-sectional view of a display device 1 manufactured by an apparatus 1000 for manufacturing a display device.
[0117] refer to Figure 7 The display device 1 may include a substrate 100, a pixel circuit layer PCL on the substrate 100 including thin film transistors and an insulating layer, a display layer DL on the pixel circuit layer PCL including display components, an encapsulation layer 300 covering the display components, and an input sensing portion 400 on the encapsulation layer 300.
[0118] The substrate 100 may include glass or a polymeric resin such as polyethersulfone, polyarylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyimide, PC, TAC, cellulose acetate propionate, or combinations thereof.
[0119] A buffer layer (not shown) may be further included between the pixel circuit layer PCL and the substrate 100. The buffer layer, which is a layer for preventing foreign matter intrusion, may comprise a single layer or multiple layers containing an inorganic material such as silicon nitride, silicon oxide, or a combination thereof.
[0120] The display layer (DL) may include display components, such as organic light-emitting diodes (OLEDs). The pixel circuit layer (PCL) may include pixel circuits electrically connected to the OLED and an insulating layer. The pixel circuit layer (PCL) may include multiple thin-film transistors and storage capacitors, as well as an insulating layer disposed between the multiple thin-film transistors and the storage capacitors.
[0121] The display component may be covered by an encapsulation layer 300. In one embodiment, the encapsulation layer 300 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer covering the display layer DL. The inorganic encapsulation layer may include one or more inorganic materials such as alumina, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and silicon oxynitride. The organic encapsulation layer may include polymeric materials. Polymeric materials may include acrylic resins, epoxy resins, polyimides, polyethylene, or combinations thereof. In one embodiment, the organic encapsulation layer may include acrylates.
[0122] In another embodiment, the encapsulation layer 300 may have a structure in which the substrate 100 and the upper substrate, which may be a transparent member, are connected to each other by a sealing member, such that the internal space between the substrate 100 and the upper substrate can be sealed. An absorbent or filler may be located in the internal space. The sealing member may be a sealant, and in another embodiment, the sealing member may include a material that is cured by laser. For example, the sealing member may include a glass frit. Specifically, the sealing member may include an organic sealant such as a polyurethane resin, epoxy resin, acrylic resin, or a combination thereof, or an inorganic sealant such as silicone. The polyurethane resin may include, for example, polyurethane acrylate. The acrylic resin may include, for example, butyl acrylate, isooctyl acrylate, or a combination thereof. The sealing member may include a thermosetting material.
[0123] The input sensing section 400 may include touch electrodes and may be disposed on the encapsulation layer 300. The input sensing section 400 can obtain external input, such as coordinate information, based on touch events. The input sensing section 400 may include touch electrodes and traces electrically connected to the touch electrodes. The input sensing section 400 can sense external input using mutual capacitance or self-capacitance methods.
[0124] Although not shown, an optical functional layer may be disposed on the input sensing section 400. The optical functional layer may reduce the reflectivity of light (external light) input from the outside to the display device 1, and / or may improve the color purity of light emitted from the display device 1. In one embodiment, the optical functional layer may include a retarder and a polarizer. The retarder may be a film-type or a liquid crystal coating-type, and may include a λ / 2 retarder and / or a λ / 4 retarder. The polarizer may also be a film-type or a liquid crystal coating-type. The film-type may include a stretchable synthetic resin film, and the liquid crystal coating-type may include liquid crystals arranged in an array. The retarder and polarizer may further include a protective film.
[0125] In another embodiment, the optical functional layer may include a black matrix and color filters. The color filters may be arranged considering the color of light emitted from each of the pixels. Each of the color filters may include a red, green, or blue pigment or dye. As another example, in addition to the pigments or dyes described above, each of the color filters may further include quantum dots. As yet another example, some of the color filters may not include the pigments or dyes described above and may include scattering particles such as titanium dioxide.
[0126] In another embodiment, the optical functional layer may include a destructive interference structure. The destructive interference structure may include a first reflective layer and a second reflective layer that can be disposed on different layers. First reflected light and second reflected light reflected from the first reflective layer and the second reflective layer, respectively, can interfere destructively with each other, and thus the reflectivity of external light can be reduced.
[0127] Figure 8 This is a schematic cross-sectional view of a portion of the display device 1. Figure 8 In the middle, due to with Figure 7 In the accompanying drawings, the same reference numerals denote the same elements, therefore their redundant descriptions are omitted.
[0128] refer to Figure 8 The display device 1 may include a substrate 100, a buffer layer 111, a pixel circuit layer PCL, a display layer DL, an encapsulation layer 300, and an input sensing portion 400. The pixel circuit layer PCL may include pixel circuitry PC and an insulating layer disposed therebetween. The display layer DL may include an OLED. In this embodiment, the pixel circuit layer PCL may be formed in a temperature range of approximately 150°C or higher and approximately 400°C or lower. The input sensing portion 400 may be formed at a temperature below approximately 150°C.
[0129] In one embodiment, substrate 100 may include a base layer and a barrier layer, the base layer comprising a polymer resin and the barrier layer comprising an inorganic insulating material. For example, substrate 100 may include a first base layer 101, a first barrier layer 102, a second base layer 103, and a second barrier layer 104 that may be sequentially stacked on top of each other. The first base layer 101 and second base layer 103 may include polymer resins such as polyethersulfone, polyarylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyimide, PC, TAC, cellulose acetate propionate, or combinations thereof. The first barrier layer 102 and second barrier layer 104 may include inorganic insulating materials such as silicon oxide, silicon oxynitride, and / or silicon nitride.
[0130] A buffer layer 111 may be disposed on the substrate 100. The buffer layer 111 can reduce or block the intrusion of foreign matter, moisture or external air from below the substrate 100. The buffer layer 111 may include inorganic materials, organic materials, or organic / inorganic composites having a single-layer or multi-layer structure of inorganic and organic materials.
[0131] A pixel circuit PC, including a thin-film transistor (TFT) and a storage capacitor Cst, can be disposed on a buffer layer 111. The TFT may include a semiconductor layer Act, a gate electrode GE overlapping a channel region of the semiconductor layer Act, and a source electrode SE and a drain electrode DE electrically connected to the source and drain regions of the semiconductor layer Act, respectively. A gate insulating layer 112 may be provided between the semiconductor layer Act and the gate electrode GE, and a first interlayer insulating layer 113 and a second interlayer insulating layer 115 may be disposed between the gate electrode GE and the source electrode SE, or between the gate electrode GE and the drain electrode DE.
[0132] The storage capacitor Cst may overlap with the thin-film transistor (TFT). The storage capacitor Cst may include a first capacitor plate CE1 and a second capacitor plate CE2 that overlap each other. In some embodiments, the gate electrode GE of the thin-film transistor TFT may include the first capacitor plate CE1 of the storage capacitor Cst. A first interlayer insulating layer 113 may be disposed between the first capacitor plate CE1 and the second capacitor plate CE2.
[0133] The semiconductor layer Act may include polycrystalline silicon. In some embodiments, the semiconductor layer Act may include amorphous silicon. In some embodiments, the semiconductor layer Act may include an oxide of at least one selected from the group consisting of indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (Ti), and zinc (Zn). The semiconductor layer Act may include a channel region and impurity-doped source and drain regions.
[0134] The gate insulating layer 112 may include an inorganic insulating material such as silicon oxide, silicon oxynitride, or silicon nitride, and may have a single-layer structure or a multi-layer structure including the materials described above.
[0135] The gate electrode GE or the first capacitor plate CE1 may include a conductive material with low resistance, such as molybdenum (Mo), aluminum (Al), copper (Cu) and / or titanium (Ti), and may have a single-layer structure or a multi-layer structure including the materials described above.
[0136] The first interlayer insulation layer 113 may include an inorganic insulating material such as silicon oxide, silicon oxynitride, or silicon nitride, and may have a single-layer structure or a multi-layer structure including the materials described above.
[0137] The second capacitor plate CE2 may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), neodymium (Nd), iridium (Ir), chromium (Cr), nickel (Ni), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W) and / or copper (Cu), and may have a single-layer structure or a multi-layer structure including the materials described above.
[0138] The second interlayer insulation layer 115 may include an inorganic insulating material such as silicon oxide, silicon oxynitride, or silicon nitride, and may have a single-layer structure or a multi-layer structure including the materials described above.
[0139] The source electrode SE or drain electrode DE may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), neodymium (Nd), iridium (Ir), chromium (Cr), nickel (Ni), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and / or copper (Cu), and may have a single-layer or multi-layer structure comprising the materials described above. For example, the source electrode SE or drain electrode DE may have a three-layer structure of titanium layer / aluminum layer / titanium layer.
[0140] Planarization layer 117 may include a material different from the material used for at least one inorganic insulating layer disposed thereunder (e.g., gate insulating layer 112, first interlayer insulating layer 113, and second interlayer insulating layer 115). Planarization layer 117 may include an organic insulating material. Planarization layer 117 may include organic insulating materials such as acrylic acid, benzocyclobutene (BCB), polyimide, hexamethyldisiloxane (HMDSO), or combinations thereof. According to an embodiment, the organic insulating material of planarization layer 117 may be a photosensitive organic insulating material.
[0141] Pixel electrode 221 can be disposed on planarization layer 117. Pixel electrode 221 can be electrically connected to thin-film transistor (TFT) through contact holes formed in planarization layer 117.
[0142] Pixel electrode 221 may include a reflective film, comprising silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or compounds thereof. Pixel electrode 221 may include a reflective film comprising the materials described above, and a transparent conductive film disposed above and / or below the reflective film. The transparent conductive film may include indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), aluminum zinc oxide (AZO), or combinations thereof. In one embodiment, pixel electrode 221 may have a three-layer structure of ITO layers / Ag layers / ITO layers that can be sequentially stacked on top of each other.
[0143] A pixel defining layer 119 may be disposed on the pixel electrode 221. The pixel defining layer 119 may cover the edge of the pixel electrode 221 and may include an opening overlapping the central portion of the pixel electrode 221. The pixel defining layer 119 may include an organic insulating material and / or an inorganic insulating material. The opening may define an emission region for light emitted from the OLED.
[0144] The intermediate layer 222 may include an emitting layer 222b overlapping the pixel electrode 221. The emitting layer 222b may include an organic material. The emitting layer 222b may include a polymeric organic material or a low-molecular-weight organic material that emits colored light.
[0145] The first functional layer 222a and the second functional layer 222c can be disposed below and / or above the emission layer 222b.
[0146] The first functional layer 222a can be a single layer or multiple layers. For example, when the first functional layer 222a comprises a polymer material, the first functional layer 222a, as a hole transport layer (HTL) with a single-layer structure, may include poly(3,4-ethylenedioxythiophene) (PEDOT), polyaniline, or a combination thereof. When the first functional layer 222a comprises a low molecular weight material, the first functional layer 222a may include a hole injection layer (HIL) and a hole transport layer (HTL).
[0147] The second functional layer 222c may be optional. For example, if the first functional layer 222a and the emitter layer 222b comprise polymer materials, the second functional layer 222c may be formed. The second functional layer 222c may be a single layer or multiple layers. The second functional layer 222c may include an electron transport layer (ETL) and / or an electron injection layer (EIL).
[0148] The counter electrode 223 may comprise a conductive material having a relatively low work function. For example, the counter electrode 223 may comprise a (semi-)transparent layer comprising silver (Ag), magnesium (Mg), aluminum (Al), nickel (Ni), chromium (Cr), lithium (Li), calcium (Ca), or alloys thereof. As another example, the counter electrode 223 may further comprise a layer comprising ITO, IZO, ZnO, or In2O3 on a (semi-)transparent layer comprising the materials described above. In one embodiment, the counter electrode 223 may comprise silver (Ag) and magnesium (Mg).
[0149] A stacked structure of pixel electrodes 221, intermediate layer 222, and counter electrode 223 that can be sequentially stacked on top of each other can form a light-emitting diode, such as an OLED. The OLED can be covered by an encapsulation layer 300.
[0150] In one embodiment, the encapsulation layer 300 may include a first inorganic encapsulation layer 310, a second inorganic encapsulation layer 330, and an organic encapsulation layer 320 between the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330.
[0151] The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may each include one or more inorganic insulating materials. The inorganic insulating materials may include aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and / or silicon oxynitride. The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may be formed by CVD.
[0152] The organic encapsulation layer 320 may include polymeric materials. Polymeric materials may include acrylic resins, epoxy resins, polyimides, polyethylene, or combinations thereof. For example, the organic encapsulation layer 320 may include acrylic resins such as polymethyl methacrylate, polyacrylic acid, or combinations thereof. The organic encapsulation layer 320 may be formed by curing monomers or coating polymers.
[0153] The input sensing portion 400 may be disposed on the second inorganic encapsulation layer 330 and may include at least one inorganic film and sensing electrode.
[0154] The input sensing portion 400 may include insulating and conductive layers that can be alternately stacked on top of each other. In one embodiment, the input sensing portion 400 may include a first insulating layer 401, a first conductive layer 402, a second insulating layer 403, a second conductive layer 404, and a third insulating layer 405. The first conductive layer 402 and the second conductive layer 404 may be electrically connected to each other through contact holes (not shown). Sensing electrodes may be included in at least one of the first conductive layer 402 and the second conductive layer 404.
[0155] The first conductive layer 402 or the second conductive layer 404 may include a metal layer or a transparent conductive layer. The metal layer may include molybdenum (Mo), menthium (Md), silver (Ag), titanium (Ti), copper (Cu), aluminum (Al), or alloys thereof. The transparent conductive layer may include transparent conductive oxides such as ITO, IZO, ZnO, indium tin zinc oxide (ITZO), or combinations thereof. The transparent conductive layer may include conductive polymers such as PEDOT, metal nanowires, graphene, or combinations thereof.
[0156] The first conductive layer 402 or the second conductive layer 404 can be a single layer or multiple layers. A single-layer first conductive layer 402 or second conductive layer 404 may include a metal layer or a transparent conductive layer, and the materials of the metal layer and the transparent conductive layer are the same as described above. One of the first conductive layer 402 and the second conductive layer 404 may include a single metal layer. One of the first conductive layer 402 and the second conductive layer 404 may include a multilayer metal layer. The multilayer metal layer may include, for example, a three-layer structure of titanium / aluminum / titanium, or a two-layer structure of molybdenum / mengium. As another example, the multilayer metal layer may include a metal layer and a transparent conductive layer. The first conductive layer 402 and the second conductive layer 404 may have different stacking structures or the same stacking structure. For example, the first conductive layer 402 may include a metal layer, and the second conductive layer 404 may include a transparent conductive layer. As another example, the first conductive layer 402 and the second conductive layer 404 may include the same metal layer.
[0157] The materials of the first conductive layer 402 and the second conductive layer 404, as well as the arrangement of the sensing electrodes provided in the first conductive layer 402 and the second conductive layer 404, can be determined by considering sensing sensitivity. Resistance-capacitance (RC) delay can affect sensing sensitivity. Since sensing electrodes including a metal layer have a relatively smaller resistance compared to transparent conductive layers, the RC value can be reduced. Therefore, the charging time of the capacitor defined between the sensing electrodes can be reduced. Compared to metal layers, sensing electrodes including transparent conductive layers can be invisible to the user and can have an increased input area to increase capacitance.
[0158] Each of the first insulating layer 401, the second insulating layer 403, and the third insulating layer 405 may include an inorganic insulating material and / or an organic insulating material. The inorganic insulating material may include silicon oxide, silicon nitride, or silicon oxynitride, and the organic insulating material may include a polymeric organic material. In some embodiments, the first insulating layer 401 may be omitted.
[0159] The method for manufacturing a display device to form a pixel circuit layer PCL and an input sensing section 400 is described in detail.
[0160] Figure 9 , Figure 10 and Figure 11 This is a schematic cross-sectional view illustrating some operations of a method for manufacturing a display device according to an embodiment. Figure 12 This is a schematic cross-sectional view of a display substrate S on which the pixel circuit layer PCL can be formed. Figure 13 This is a schematic cross-sectional view of the display substrate S as defined by irradiating a laser beam onto the display substrate S. Figure 14 This is a schematic cross-sectional view of the display layer DL and the encapsulation layer 300 formed on the display substrate S. Figure 15 , Figure 16 and Figure 17 This is a schematic cross-sectional view illustrating some operations of a method for manufacturing a display device according to an embodiment. Figure 18 This is a schematic cross-sectional view of the input sensing portion 400 formed on the display substrate S.
[0161] refer to Figure 9 The display substrate S can be transferred by the robotic arm 1400 of section 1200 (see...) Figure 1 The substrate S can be transferred and can be loaded into the processing section 1300 through the opening / closing section 1320. The support pin SP can pass through the hole H of the support plate 1333 to be positioned above the base 1330. Therefore, the display substrate S can be placed on the support pin SP.
[0162] The display substrate S can be a mother substrate, which is a set of unit regions. In this state, each of the unit regions can be part of a manufactured display device. The display substrate S can include substrate 100 (see...). Figure 7 or Figure 8 ).
[0163] The first mask frame MF1 can be disposed inside the chamber 1310. The first mask frame MF1 can be disposed above the base 1330. In other words, the first mask frame MF1 can be configured to face the base 1330.
[0164] In one embodiment, the first mask frame MF1 may be fixed within the chamber 1310. For example, the first mask frame MF1 may be fixed to the inner wall of the first portion 1311 of the chamber 1310. In another embodiment, the first mask frame MF1 may be configured to be movable within the chamber 1310. For example, the first mask frame MF1 may extend to a cylinder or linear motor and may rise or fall in the z-direction. In the following description, the case where the first mask frame MF1 may be fixed within the chamber 1310 is described in detail.
[0165] refer to Figure 10 The display substrate S can be placed on the base 1330 within the chamber 1310. In other words, the display substrate S can be placed on the support plate 1333. In this state, one of the support pin SP and the base 1330 moves relative to the other, allowing the display substrate S to be placed on the support plate 1333. For example, when the support pin adjustment portion AP extending to the support pin SP is operated, the support pin SP can be lowered, and the display substrate S placed on the support pin SP can be placed on the support plate 1333. In another example, the base 1330 can be raised, and the display substrate S placed on the support pin SP can be placed on the support plate 1333.
[0166] One of the first mask frame MF1 and the display substrate S can be aligned with the other of the first mask frame MF1 and the display substrate S. Specifically, the first mask frame MF1 and the display substrate S can be aligned relative to the alignment mark AM provided in the main body 1331 (see...). Figure 3 (It was aligned.)
[0167] The base 1330 can be maintained at a preset first temperature T1. In this state, the heater HT of the base 1330 can be operated, and the heater HT can maintain the base 1330 at the first temperature T1. The first temperature T1 can be above approximately 150°C and below approximately 400°C. The heater HT can be controlled by the heater control section HC. Therefore, the display substrate S can be maintained at a substantially uniform temperature.
[0168] refer to Figure 11 The base 1330 can be raised. In this state, the central part CP of the base 1330 may include a cylinder or linear motor to move the base 1330 upward.
[0169] In one embodiment, the first mask frame MF1 may include an alignment mark AM with the main body 1331 (see [reference]). Figure 3 The corresponding protruding part. The protruding part of the first mask frame MF1 can be inserted into the groove of the alignment mark AM.
[0170] The first mask frame MF1 can overlap with the edge of the display substrate S. Therefore, during the process, the first mask frame MF1 can shield the edge of the display substrate S. The first opening OP1 of the first mask frame MF1 can expose the central region of the display substrate S. Since the first mask frame MF1 covers the edge of the display substrate S, the generation of arc discharge can be prevented.
[0171] In one embodiment, the first mask frame MF1 can fix the display substrate S. Therefore, when the deposition material is deposited on the display substrate S, the display substrate S can be kept flat.
[0172] A pixel circuit layer (PCL) can be formed on the display substrate S. Specifically, a deposition material can be applied via a spraying portion 1340, located on the opposite side of the base 1330 relative to the first mask frame MF1. In this embodiment, the heater HT can be operated while the deposition material is being applied to the spraying portion 1340. Therefore, the base 1330 can be maintained at a first temperature T1.
[0173] When the coating section 1340 is spraying deposited material, the power section 1360 can supply AC power. The coating section 1340 can be used as the upper electrode, and the base 1330 can be grounded to serve as the lower electrode. Therefore, plasma can be formed between the coating section 1340 and the base 1330. The edge of the display substrate S can be protected by the first mask frame MF1.
[0174] In this embodiment, the anti-deformation portion 1335 can prevent thermal deformation of the main body portion 1331. Specifically, thermal deformation may occur when the main body portion 1331 is held at a first temperature T1. The main body portion 1331 may sag relative to the center portion CP. In this embodiment, since the anti-deformation portion 1335 comprises a ceramic material and supports the main body portion 1331, deformation of the main body portion 1331 can be prevented.
[0175] refer to Figure 12 The pixel circuit layer PCL can be formed on the substrate 100 of the display substrate S. In other words, the pixel circuit layer PCL can be formed on the substrate 100 while the base 1330 maintains a first temperature T1 when the heater HT is operated.
[0176] The display substrate S can be separated from the base 1330 and transferred from the processing section 1300 to the transfer section 1200. In this state, the robotic arm 1400 of the transfer section 1200 can transfer the display substrate S to the transfer section 1200.
[0177] refer to Figure 13 The display substrate S can be divided into multiple partial substrates. For example, the display substrate S can be divided into a first partial substrate S1 and a second partial substrate S2. In one embodiment, the display substrate S can be divided using a laser. For example, a laser irradiation portion LP irradiates a laser towards the display substrate S to divide the display substrate S into the first partial substrate S1 and the second partial substrate S2. In another example, the display substrate S can be divided using a knife.
[0178] refer to Figure 14 The display layer DL and the encapsulation layer 300 can be formed on the display substrate S. Specifically, the display layer DL and the encapsulation layer 300 can be formed on the pixel circuit layer PCL of the first substrate S1 and the pixel circuit layer PCL of the second substrate S2.
[0179] refer to Figure 15 The first substrate S1 and the second substrate S2 can be transferred by the robotic arm 1400 of the transfer section 1200 (see...). Figure 1 It is transmitted and loaded into the processing section 1300 by passing through the opening / closing section 1320.
[0180] The first substrate S1 and the second substrate S2 can each be placed on the support pin SP. Since the hole H through which the support pin SP passes can be located not only in the edge of the support plate 1333 but also in the central region of the support plate 1333, the support pin SP can pass through the hole H and stably support the first substrate S1 and the second substrate S2. Since the first substrate S1 and the second substrate S2 placed on the support pin SP can be similar to the display substrate S placed on the support pin SP, their detailed description is omitted.
[0181] In one embodiment, Figure 9 The first mask frame MF1 can be used Figure 15 The second mask frame MF2 is replaced. The second mask frame MF2 can be disposed inside the chamber 1310. The second mask frame MF2 can be disposed above the base 1330. In other words, the second mask frame MF2 can be configured to face the base 1330.
[0182] In one embodiment, the second mask frame MF2 may be fixed inside the chamber 1310. In another embodiment, the second mask frame MF2 may be configured to be movable inside the chamber 1310. In the following description, the case where the second mask frame MF2 may be fixed inside the chamber 1310 is described in detail.
[0183] refer to Figure 16 The first substrate S1 and the second substrate S2 can be placed on the base 1330 in the chamber 1310. In this state, when one of the support pin SP and the base 1330 moves relative to the other, the first substrate S1 and the second substrate S2 can be placed on the support plate 1333. Since the first substrate S1 and the second substrate S2 placed on the base 1330 can be similar to the display substrate S placed on the base 1330, their detailed description is omitted.
[0184] One of the second mask frame MF2 and the first partial substrate S1 can be aligned with the other of the second mask frame MF2 and the first partial substrate S1. Furthermore, one of the second mask frame MF2 and the second partial substrate S2 can be aligned with the other of the second mask frame MF2 and the second partial substrate S2.
[0185] The base 1330 can be maintained at a preset second temperature T2. In this state, coolant can flow through the flow path FP of the base 1330. Specifically, coolant supplied by the coolant control section RC can be supplied to the flow path FP through the coolant inlet section RI. After the coolant flows through the flow path FP of the base 1330, the coolant can be discharged through the coolant outlet section RO. The coolant control section RC can control the coolant flowing through the flow path FP to be at the second temperature T2. Therefore, the first substrate S1 and the second substrate S2 can be maintained at a substantially uniform temperature. The second temperature T2 can be below approximately 150°C, and the coolant can include PFPE. For example, the coolant can include Galden fluid.
[0186] refer to Figure 17 The base 1330 can be raised. In this state, the central part CP of the base 1330 may include a cylinder or linear motor to move the base 1330 upward.
[0187] In one embodiment, the second mask frame MF2 may include alignment marks AM with the main body 1331 (see [reference]). Figure 3 The corresponding protruding part. The protruding part of the second mask frame MF2 can be inserted into the groove of the alignment mark AM.
[0188] The second mask frame MF2 can overlap with the edges of the first partial substrate S1 and the second partial substrate S2. Specifically, the first frame portion MFa and the second frame portion MFb can overlap with the edges of the first partial substrate S1 and the second partial substrate S2. The second frame portion MFb can overlap with the edges of the first partial substrate S1 and the second partial substrate S2 that face each other.
[0189] During the process, the second mask frame MF2 can shield the edges of the first partial substrate S1 and the edges of the second partial substrate S2. The second opening OP2 of the second mask frame MF2 can each expose the central region of each of the first partial substrate S1 and the second partial substrate S2.
[0190] The input sensing portion 400 can be formed on each of the first partial substrate S1 and the second partial substrate S2. Specifically, the deposited material can be sprayed via a spraying portion 1340 located on the opposite side of the base 1330 relative to the second mask frame MF2. In this embodiment, when the deposited material is sprayed via the spraying portion 1340, coolant can flow through the flow path FP of the base 1330. Therefore, the base 1330 can be maintained at a second temperature T2.
[0191] When the coating section 1340 is spraying the deposited material, the power section 1360 can supply AC power. The edges of the first substrate S1 and the second substrate S2 can be protected by the second mask frame MF2. Since the second mask frame MF2 covers the edges of the first substrate S1 and the second substrate S2, the generation of arc discharge can be prevented.
[0192] refer to Figure 18 The input sensing portion 400 can be formed on the substrate 100 of the first substrate S1 and the second substrate S2. In other words, when the coolant flows through the flow path FP of the base 1330 and the base 1330 is held at the second temperature T2, the input sensing portion 400 can be formed on the encapsulation layer 300.
[0193] The first substrate S1 and the second substrate S2 can be separated from the base 1330 and transferred from the processing section 1300 to the transfer section 1200. In this state, the robotic arm 1400 of the transfer section 1200 can transfer the first substrate S1 and the second substrate S2 to the transfer section 1200.
[0194] In this embodiment, the layer formed on the substrate 100 during the operation of the heater HT may be different from the layer formed on the substrate 100 when the coolant flows through the flow path FP. For example, refer to Figure 12 During the operation of the heater HT, the pixel circuit layer PCL can be formed on the substrate 100. (Reference) Figure 18 When the coolant flows through the flow path FP, the input sensing portion 400 can be formed on the substrate 100.
[0195] In this embodiment, during operation of the heater HT, the layers stacked on the substrate 100 may differ from the layers formed on the substrate 100 as the coolant flows through the flow path FP. For example, a buffer layer (not shown) may be stacked on the substrate 100 during operation of the heater HT. Reference Figure 18 When the coolant flows through the flow path FP, the buffer layer, pixel circuit layer PCL, display layer DL and encapsulation layer 300 can be stacked on the substrate 100.
[0196] In this embodiment, the same base 1330 can be used in the processing section 1300. When the pixel circuit layer PCL is to be formed, the base 1330 can be maintained at a first temperature T1 using a heater HT, and when the input sensing section 400 is to be formed, the base 1330 can be maintained at a second temperature T2 below the first temperature T1 using a coolant. Therefore, when layers with different process temperatures are to be formed, the base 1330 does not need to be replaced, and thus the efficiency of the method for manufacturing the display device can be improved.
[0197] According to one or more embodiments described above, the efficiency of the method for manufacturing a display device can be improved by using a base that meets various process conditions.
[0198] In detail, the base can be used in both the operation of forming the pixel circuit layer and the operation of forming the input sensing part.
[0199] It should be understood that the embodiments described herein are to be considered in a descriptive sense only and not for limiting purposes. The description of features or aspects within each embodiment should generally be considered applicable to other similar features or aspects in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, those skilled in the art will understand that various changes in form and detail may be made therein without departing from the spirit and scope defined by the appended claims and their equivalents.
Claims
1. A method for manufacturing a display device, the method comprising the following steps: The display substrate will be placed on a base within the chamber; Maintain the base at a first temperature; A pixel circuit layer is formed on the display substrate; The display substrate is separated from the base and transferred from the processing section to the transfer section; The display substrate is divided into multiple partial substrates; Place the plurality of partial substrates on the base; The base is kept at a second temperature; and An input sensing portion is formed on each of the plurality of partial substrates, and the first temperature is higher than the second temperature.
2. The method of claim 1, further comprising arranging a first mask frame in the chamber, the first mask frame including a first opening, wherein, The first mask frame overlaps with the edge of the display substrate, and The first opening exposes the central region of the display substrate.
3. The method according to claim 1, wherein, The base includes a heater for maintaining the base at the first temperature.
4. The method of claim 1, further comprising arranging a second mask frame in the chamber, the second mask frame including a plurality of second openings, wherein, The second mask frame overlaps with the edges of the plurality of partial substrates, and The plurality of second openings respectively expose the central regions of the plurality of partial substrates.
5. The method according to claim 1, wherein, Maintaining the base at the second temperature includes: Coolant is introduced into the base through the coolant inlet section of the base; and The coolant is discharged from the base through the coolant outlet section of the base.
6. The method according to claim 1, wherein, The base includes: a plurality of holes; and a support plate for supporting the display substrate or the plurality of partial substrates. The plurality of holes in the base are formed in a first region and in a second region surrounded by the first region. The first area is the edge of the support plate, and Placing the plurality of partial substrates on the base includes: The plurality of partial substrates are placed on support pins that pass through the plurality of holes respectively; and The plurality of partial substrates are placed on the support plate by moving the other of the support pin and the base relative to either of the support pin and the base.
7. The method according to claim 1, further comprising preventing deformation of the base by using an anti-deformation portion. in, The base includes the deformation-resistant part.