Electronic device and method for manufacturing an electronic device

Abstract

Disclosed are an electronic device including an electronic module outputting or receiving a signal, an electronic panel divided into a first area overlapping the electronic module, a second area surrounding at least a portion of the first area, and a third area adjacent to the second area in a plan view, a window on the electronic panel, an anti-reflection member between the window and the electronic panel, and an adhesive layer between the window and the anti-reflection member, and a method for manufacturing the same. The anti-reflection member has a hole overlapping at least a portion of the first area defined therein, and the adhesive layer fills the hole.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to and all benefits arising therefrom of Korean Patent Application No. 10-2020-0035766, filed on March 24, 2020, the contents of which are incorporated herein by reference. Technical Field

[0003] The embodiments of the present invention herein relate to an electronic device and a method for manufacturing the electronic device, and more specifically, to an electronic device including an electronic module and a method for manufacturing the electronic device, the electronic device having improved reliability. Background Technology

[0004] The electronic device is activated by an electrical signal. The electronic device may include a display unit for displaying images and a sensing unit for sensing external inputs. In the display unit, an organic light-emitting display panel has various advantages such as low power consumption, high brightness, and high response speed.

[0005] Electronic devices may include electronic modules that receive external signals or provide output signals to the outside. The electronic modules, together with the display panel, are housed in a casing or similar enclosure to constitute an electronic device. Summary of the Invention

[0006] Embodiments of the present invention provide an electronic device with a reduced bezel. Embodiments of the present invention also provide a method for manufacturing an electronic device with improved process reliability.

[0007] Embodiments of the present invention provide an electronic device comprising: an electronic module for outputting or receiving signals; an electronic panel, which is divided in a plan view into a first region overlapping the electronic module, a second region surrounding at least a portion of the first region, and a third region adjacent to the second region; a window located on the electronic panel; an anti-reflective member located between the window and the electronic panel; and an adhesive layer located between the window and the anti-reflective member, wherein the anti-reflective member defines a hole overlapping at least a portion of the first region, and the adhesive layer fills the hole.

[0008] In one embodiment, the adhesive layer may include a first adhesive pattern and a second adhesive pattern, with the window and anti-reflective member attached via the first adhesive pattern and the second adhesive pattern filling the holes.

[0009] In this embodiment, the depth of the hole in the anti-reflective member and the thickness of the second adhesive pattern can be substantially the same.

[0010] In one embodiment, the first adhesive pattern and the second adhesive pattern may have an integral shape.

[0011] In some embodiments, the adhesive layer may include an optically transparent resin (“OCR”).

[0012] In one embodiment, the adhesive layer may include epoxy resin.

[0013] In some embodiments, the adhesive layer may also include a thermosetting agent.

[0014] In one embodiment, the electronic panel may include a base substrate, a plurality of pixels disposed on the base substrate and displaying an image in a second region, and an encapsulation layer disposed on the base substrate and covering the plurality of pixels.

[0015] In an embodiment, the electronic panel may further include a plurality of insulating layers located on a base substrate, and the plurality of insulating layers may overlap with the second region but may not overlap with the first region.

[0016] In one implementation, the adhesive layer may contact the top surface of the encapsulation layer.

[0017] In an embodiment, the electronic panel may further include a sensing unit disposed on the encapsulation layer and including a plurality of conductive patterns and a plurality of sensing insulating layers disposed between the plurality of conductive patterns, wherein the sensing insulating layers may not overlap with the first region in a plan view.

[0018] In an implementation, the encapsulation layer may include a first inorganic layer, a second inorganic layer located on the first inorganic layer, and an organic layer located between the first inorganic layer and the second inorganic layer, wherein the first inorganic layer may not overlap with the first region in a planar view.

[0019] In one embodiment, the adhesive layer may have a light transmittance of 92 percent or greater than that of about 400 nanometers (nm) in a wavelength range equal to or less than about 400 nanometers (nm).

[0020] In an embodiment of the present invention, the electronic device includes: an electronic panel that includes, in a plan view, a high-transmittance region and an active region surrounding at least a portion of the high-transmittance region; a window located on the electronic panel; an anti-reflective member located between the window and the electronic panel; and a thermosetting adhesive resin layer located between the window and the anti-reflective member, wherein the anti-reflective member defines a hole that overlaps with at least a portion of the high-transmittance region, and the thermosetting adhesive resin layer fills the hole.

[0021] In an embodiment of the present invention, a method for manufacturing an electronic device includes: preparing an electronic panel comprising a high-transmittance region and an active region surrounding at least a portion of the high-transmittance region; defining a hole in an anti-reflective member such that at least a portion of the hole overlaps with the high-transmittance region; applying an adhesive resin to the anti-reflective member to fill the hole; and attaching a window to the anti-reflective member by means of the adhesive resin.

[0022] In one embodiment, the adhesive resin may include a thermosetting resin, and attaching the window may include thermosetting the adhesive resin.

[0023] In some embodiments, the adhesive resin may also include a thermosetting agent.

[0024] In this embodiment, the application of the adhesive resin can be performed by an inkjet method.

[0025] In one embodiment, the electronic panel may include a base substrate and a plurality of insulating layers located on the base substrate, and fabricating the electronic panel may include patterning the plurality of insulating layers that overlap with the high-transmittance region.

[0026] In this implementation, patterning multiple insulating layers and defining the holes of the anti-reflective member can be performed using the same process. Attached Figure Description

[0027] The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention. In the drawings:

[0028] Figure 1A This is a perspective view illustrating an embodiment of the connection of an electronic device according to the present invention;

[0029] Figure 1B yes Figure 1A An exploded perspective view of the electronic device;

[0030] Figure 2 This is a block diagram illustrating an embodiment of an electronic device according to the present invention;

[0031] Figure 3A This is a plan view of an embodiment of the display unit according to the present invention;

[0032] Figure 3B This is a schematic signal circuit diagram illustrating an embodiment of one pixel among a plurality of pixels according to the present invention;

[0033] Figure 3C This is a plan view of an embodiment of the sensing unit according to the present invention;

[0034] Figure 4A and Figure 4B This is a cross-sectional view of an embodiment of an electronic device according to the present invention;

[0035] Figures 5A to 5C This is a cross-sectional view of an embodiment of an electronic device according to an embodiment of the present invention;

[0036] Figure 6This is a graph showing the light transmittance of the adhesive layer for each wavelength according to embodiments of the adhesive layer according to the present invention and related technologies;

[0037] Figure 7A This is an enlarged cross-section of an electronic device to which the adhesive layer of the related technology is applied;

[0038] Figure 7B This is an enlarged view of a cross section of an electronic device to which the adhesive layer of the embodiment is applied;

[0039] Figures 8A to 8E These are cross-sectional views sequentially showing embodiments of the method for manufacturing an electronic device according to the present invention; and

[0040] Figure 9A and Figure 9B This is a cross-sectional view illustrating an embodiment of a portion of the process in a method for manufacturing an electronic device according to the present invention. Detailed Implementation

[0041] In this specification, it will also be understood that when a component (or area, layer, part) is referred to as being "on" another component, "connected to" or "attached to" another component, it may be directly disposed on, connected to / attached to, the other component, or there may be an intervening third component.

[0042] The same reference numerals always denote the same elements. Additionally, in the accompanying drawings, the thickness, proportions, and dimensions of parts are exaggerated for clarity.

[0043] The term “and / or” includes any and all combinations of one or more of the relevant listed items.

[0044] It should be understood that although terms such as “first” and “second” are used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one component from others. For example, an element referred to as a first element in one embodiment may be referred to as a second element in another embodiment without departing from the scope of the appended claims. Unless otherwise stated, singular terms may include plural forms.

[0045] Additionally, terms such as "below," "under," "above," and "upper" are used to explain the relationships between the components shown in the accompanying drawings. These terms can be relative concepts and are described based on the directions expressed in the drawings.

[0046] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. Furthermore, terms (such as those defined in common dictionaries) shall be interpreted as having the meaning consistent with their meaning in the context of the relevant art and shall not be interpreted in an idealized or overly formal sense unless expressly so defined herein.

[0047] The word "include" or "comprise" specifies a property, fixed number, step, operation, element, component, or combination thereof, but does not exclude other properties, fixed numbers, steps, operations, elements, components, or combinations thereof.

[0048] As used herein, “about” or “approximately” includes the stated value and means within an acceptable range of deviation from the particular value as determined by a person of ordinary skill in the art, taking into account the measurement in question and the errors associated with the measurement of the particular quantity (i.e., limitations of the measurement system). For example, “about” may mean within one or more standard deviations of the stated value, or within ±30%, ±20%, ±10%, ±5% of the stated value.

[0049] In the following description, an electronic device and a method for manufacturing an electronic device according to embodiments of the present invention will be described with reference to the accompanying drawings.

[0050] Figure 1A This is a perspective view illustrating an embodiment of the connection of an electronic device according to the present invention. Figure 1B yes Figure 1A An exploded perspective view of the electronic device. Figure 2 This is a block diagram illustrating an embodiment of an electronic device according to the present invention. In the following text, reference will be made to... Figures 1A to 2 The embodiments according to the present invention will be described.

[0051] An electronic device EA can be a device activated by an electrical signal. Various examples of electronic devices EAs are possible. In some embodiments, for example, an electronic device EA may include a tablet, a laptop, a computer, a smart TV, etc. In this embodiment, an electronic device EA including a smartphone will be described as an example.

[0052] refer to Figure 1A The electronic device EA can display an image IM via its front surface FS. The front surface FS can be defined parallel to a surface defined by a first direction DR1 and a second direction DR2. The front surface FS may include a transmissive region TA and a border region BZA adjacent to the transmissive region TA.

[0053] Electronic device EA displays image IM on transmission region TA. Image IM may include at least one of still image and moving image. Figure 1AIn the example, the image IM is shown as a clock and multiple icons.

[0054] The transmission region TA may have a quadrilateral shape (e.g., a rectangular shape parallel to the first direction DR1 and the second direction DR2). However, this is merely an example. In embodiments, for example, the electronic device EA may have various shapes and is not limited to a particular embodiment.

[0055] The border region BZA is adjacent to the transmission region TA. The border region BZA may surround the transmission region TA. However, this is merely an example. In another embodiment, for example, the border region BZA may be configured to be adjacent only to one side of the transmission region TA, or it may be omitted. The electronic device EA may include various embodiments and is not limited to a particular embodiment.

[0056] The normal direction of the front surface FS may correspond to the thickness direction of the electronic device EA (hereinafter also referred to as the third direction DR3). In this embodiment, the front surface (or top surface) or rear surface (or bottom surface) of each component may be defined based on the direction of the displayed image IM. The front and rear surfaces may be opposite each other on the third direction DR3.

[0057] The directions indicated as first direction DR1, second direction DR2, and third direction DR3 can be relative concepts and therefore change to different directions. In the following text, first direction, second direction, and third direction can be directions indicated by first direction DR1, second direction DR2, and third direction DR3, respectively, and represented by the same reference numerals.

[0058] According to embodiments of the present invention, the electronic device EA can sense user input TC applied from the outside (hereinafter also referred to as "external input TC"). In embodiments, for example, user input TC includes various types of external inputs, such as parts of the user's body, light, heat, pressure, etc. In addition, the electronic device EA can sense not only inputs in contact with the electronic device EA, but also inputs that are near or adjacent to it.

[0059] In this embodiment, the user input TC is shown as a user's hand applied to the front surface FS. However, this is merely an example. In embodiments, as described above, for example, the user input TC can be provided in various forms. The electronic device EA can sense the user input TC applied to the side or rear surface of the electronic device EA depending on the structure of the electronic device EA, but is not limited to a particular embodiment.

[0060] The electronic device EA may include a window WM, an electronic panel EP, an anti-reflective component POL, an adhesive layer ADL, a circuit board DC, an electronic module EM, and a housing HU. The window WM and the housing HU may be connected to each other to define the appearance of the electronic device EA.

[0061] A window WM is disposed on an electronic panel EP to cover the front surface IS of the electronic panel EP. The window WM may comprise an optically transparent insulating material. In embodiments, for example, the window WM may comprise glass or plastic. The window WM may have a single-layer structure or a multi-layer structure. In embodiments, for example, the window WM may have a laminated structure of multiple plastic films bonded together by an adhesive, or a laminated structure of a glass substrate and plastic films bonded together by an adhesive.

[0062] The window WM includes the front surface FS exposed to the outside. The front surface FS of the electronic device EA can be substantially defined by the front surface FS of the window WM.

[0063] Specifically, the transmissive region TA can be an optically transparent region. The transmissive region TA may have a shape corresponding to the shape of the active region AA. In an embodiment, for example, the transmissive region TA overlaps with the entire surface of at least a portion of the active region AA. The image IM displayed on the active region AA of the electronic panel EP is visible from the outside through the transmissive region TA.

[0064] The light transmittance (hereinafter also referred to as "transmittance") of the border region BZA may be relatively less than the light transmittance of the transmission region TA. The border region BZA defines the shape of the transmission region TA. The border region BZA may be positioned adjacent to the transmission region TA and surround the transmission region TA.

[0065] The border area BZA may have a predetermined color. When the window WM is set as a glass or plastic substrate, the border area BZA may be a colored layer printed or deposited on a surface of the glass or plastic substrate. In an alternative embodiment, the border area BZA may be formed by coloring a corresponding area of ​​the glass or plastic substrate.

[0066] The border area BZA may cover the peripheral area NAA of the electronic panel EP to prevent the peripheral area NAA from being visible from the outside. However, this is merely an example. In embodiments of the window WM of the present invention, for example, the border area BZA may be omitted.

[0067] The electronic panel EP can display an image IM and sense external input TC. The electronic panel EP includes a front surface IS, which includes an active area AA and a peripheral area NAA. The active area AA can be an area that is activated according to an electrical signal.

[0068] In this embodiment, the active region AA may have an area on which an image IM is displayed, and also senses external input TC. The transmissive region TA overlaps at least with the active region AA. In this embodiment, for example, the transmissive region TA overlaps the entire surface of at least a portion of the active region AA. Therefore, a user can see the image IM or receive external input TC through the transmissive region TA. However, this is merely an example. In this embodiment, for example, the area of ​​the active region AA on which the image IM is displayed and the area of ​​the active region AA on which external input TC is sensed may be separate from each other, but this is not limited to a particular embodiment.

[0069] The peripheral region NAA can be the area covered by the border region BZA. The peripheral region NAA is adjacent to the active region AA. The peripheral region NAA may surround the active region AA. The drive circuitry or drive lines used to drive the active region AA may be located in the peripheral region NAA.

[0070] Pads (PD), electronic components, or various signal lines that provide electrical signals to the active area (AA) can be located in the peripheral area (NAA). The peripheral area (NAA) can be covered by the border area (BZA) and is therefore invisible from the outside.

[0071] In this embodiment, the electronic panel EP can be assembled with the active region AA and the peripheral region NAA flat, facing the window WM. However, this is merely an example. In another embodiment, for example, a portion of the peripheral region NAA of the electronic panel EP can be bent. Here, a portion of the peripheral region NAA may face the rear surface of the electronic device EA to reduce the bezel area BZA on the front surface FS of the electronic device EA. In an alternative embodiment, the electronic panel EP can be assembled with a portion of the active region AA bent. In an alternative embodiment of the electronic panel EP, the peripheral region NAA may be omitted.

[0072] An anti-reflective element (POL) may be disposed between the window WM and the electronic panel EP. The anti-reflective element POL reduces the reflectivity of external light (hereinafter also referred to as external light) incident on the electronic panel EP from outside the window WM. In this embodiment, the anti-reflective element POL may include a polarizing film. In an alternative embodiment, the anti-reflective element POL may include a color filter. When the anti-reflective element POL includes a color filter, the color filter may be directly disposed on the electronic panel EP in a continuous process.

[0073] An adhesive layer (ADL) is provided between the antireflective component POL and the window WM. The adhesive layer ADL bonds the antireflective component POL to the window WM. The adhesive layer ADL may include an optically transparent resin.

[0074] In an embodiment of the invention, an aperture HA-P may be defined in the antireflective member POL. The aperture HA-P may be defined at a position corresponding to the high-transmittance region HA of the electronic panel EP, as will be described later. The aperture HA-P may overlap with at least a portion of the high-transmittance region HA of the electronic panel EP. The transmittance of the aperture HA-P may be greater than the transmittance of the surrounding area. In the following, it will be... Figure 4A and Figure 4B The description of the anti-reflective component POL and the adhesive layer ADL is more detailed.

[0075] refer to Figure 1A , Figure 1B and Figure 2 The electronic panel EP may include a display unit DU and a sensing unit SU. The display unit DU can essentially generate an image IM. The image IM generated by the display unit DU can be seen from the outside by a user through a transmission area TA.

[0076] The sensing unit SU senses the external input TC applied from the outside. As described above, the sensing unit SU can sense the external input TC provided to the window WM.

[0077] The electronic panel EP may define a predetermined high-transmittance region HA (or a first region). The high-transmittance region HA may have a relatively high transmittance relative to the same region when compared to the transmittance of the active region AA (or a second region). Specifically, the central region within the high-transmittance region HA, which serves as the path for light received by the electronic module EM, may have the highest transmittance. This will be described in detail later.

[0078] In the plan view, the high-transmittance region HA is defined at the location overlapping with the electronic module EM described later. Besides the portion of the electronic module EM that receives or outputs light, the high-transmittance region HA can also be a region overlapping with a main body portion, such as the body or housing constituting the electronic module EM.

[0079] The shape of the high-transmittance region HA can be defined differently. In this embodiment, for ease of explanation, the high-transmittance region HA is shown as having a circular shape, but it is not limited thereto. In embodiments, the high-transmittance region HA can have various shapes, such as having elliptical, polygonal, curved, and straight sides, but is not limited to a particular embodiment.

[0080] At least a portion of the high-transmittance region HA may be surrounded by the active region AA. In this embodiment, the high-transmittance region HA is spaced apart from the peripheral region NAA (or the third region). The high-transmittance region HA is shown as being defined inside the active region AA, such that all edges are surrounded by the active region AA. In the connected state of the electronic device EA in this embodiment, the high-transmittance region HA may be defined at a position that overlaps with the transmittance region TA and is spaced apart from the border region BZA.

[0081] The circuit board DC can be connected to the electronic panel EP. The circuit board DC may include a flexible board CF and a main board MB. The flexible board CF may include an insulating film and wires disposed (e.g., mounted) on the insulating film. The wires are connected to pads PD to electrically connect the circuit board DC to the electronic panel EP.

[0082] In this embodiment, the flexible board CF can be assembled in a bent state. Therefore, the main board MB can be disposed on the rear surface of the electronic panel EP to be stably housed within the space provided by the housing HU. In this embodiment, the flexible board CF can be omitted. Here, the main board MB can be directly connected to the electronic panel EP.

[0083] The motherboard MB may include signal lines (not shown) and electronic components. The electronic components may be connected to the signal lines for electrical connection to the electronic panel EP. The electronic components generate various electrical signals (e.g., signals for generating an image IM or signals for sensing an external input TC), or process the sensed signals. The motherboard MB may be configured in multiple ways corresponding to the electrical signals to be generated and processed, but is not limited to a particular implementation.

[0084] In the electronic device EA of the embodiments of the present invention, the driving circuit that provides electrical signals to the active region AA can be directly disposed (e.g., mounted) on the electronic panel EP. Here, the driving circuit can be disposed (e.g., mounted) in the form of a chip, or it can be associated with the pixel PX to be described (see reference). Figure 3A They are set together. Here, the area of ​​the circuit board DC can be reduced or omitted. The electronic device EA in the embodiments of the present invention can be implemented according to various embodiments, but is not limited to a particular embodiment.

[0085] The electronic module EM is positioned below the window WM. In the plan view, the electronic module EM may overlap with the high-transmission region HA. The electronic module EM may receive external input TC transmitted through the high-transmission region HA, or provide output through the high-transmission region HA. In an embodiment according to the invention, the electronic module EM may overlap with the active region AA, thereby preventing the border region BZA from increasing.

[0086] refer to Figure 2 The electronic device EA may include an electronic panel EP, a power supply module PM, a first electronic module EM1, and a second electronic module EM2. The electronic panel EP, the power supply module PM, the first electronic module EM1, and the second electronic module EM2 can be electrically connected to each other. Figure 2 The image shows, as an example, the display unit DU and the sensing unit SU of the electronic panel EP.

[0087] The first electronic module EM1 and the second electronic module EM2 may include various functional modules for driving the electronic device EA. The first electronic module EM1 may be directly disposed (e.g., mounted) on a motherboard electrically connected to the electronic panel EP, or it may be disposed (e.g., mounted) on a separate board and electrically connected to the motherboard via a connector (not shown).

[0088] The first electronic module EM1 may include a control module CM, a wireless communication module TM, an image input module IIM, an audio input module AIM, a memory MM, and an external interface IF. Some of these modules may not be mounted on the motherboard, but may be electrically connected to the motherboard via a flexible circuit board.

[0089] The control module CM controls the overall operation of the electronic device EA. The control module CM may be a microprocessor. In some implementations, for example, the control module CM may activate or deactivate the electronic panel EP. The control module CM may also control other modules, such as the image input module IIM or the audio input module AIM, based on touch signals received from the electronic panel EP.

[0090] In implementations, for example, the wireless communication module TM can transmit / receive wireless signals to / from another terminal via a Bluetooth or Wi-Fi link. The wireless communication module TM can transmit / receive audio signals via a common communication link. The wireless communication module TM includes a transmitter TM1 that modulates and transmits the signal to be transmitted and a receiver TM2 that demodulates the received signal.

[0091] The Image Input Module (IIM) processes image signals to convert them into image data that can be displayed on the Electronic Panel (EP). The Audio Input Module (AIM) receives external audio signals via a microphone during recording or voice recognition mode to convert the received audio signals into electroacoustic data.

[0092] The external interface IF serves as an interface for connecting to external chargers, wired / wireless data ports, and card slots (e.g., memory cards and Subscriber Identity Module / User Identity Module (“SIM / UIM”) cards).

[0093] The second electronic module EM2 may include an audio output module AOM, a light-emitting module LM, a light-receiving module LRM, and a camera module CMM. These components may be directly mounted (e.g., installed) on a motherboard, mounted (e.g., installed) on a separate board and electrically connected to an electronic panel EP via a connector (not shown), or electrically connected to the first electronic module EM1.

[0094] The audio output module AOM converts audio data received from the wireless communication module TM or stored in the memory MM to output the converted audio data to the outside.

[0095] A light-emitting module (LM) generates and outputs light. The LM may output infrared light. In some embodiments, for example, the LM may include a light-emitting diode (“LED”) element. In some embodiments, for example, a light-receiving module (LRM) senses infrared light. The LRM may be activated when infrared light of a predetermined level or higher is sensed. In some embodiments, the LRM may include a complementary metal-oxide-semiconductor (“CMOS”) sensor. The infrared light generated in the LM may be output and then reflected by an external object (e.g., a user’s finger or face), and the reflected infrared light may be incident on the LRM. A camera module (CMM) captures an external image.

[0096] The electronic module EM in embodiments of the present invention may include at least one of the components of a first electronic module EM1 and a second electronic module EM2. In embodiments, for example, the electronic module EM may include at least one of a camera, a speaker, an optical detection sensor, and a thermal detection sensor. The electronic module EM can sense external objects received through a high-transmission region HA, or provide sound signals such as speech to the outside through the high-transmission region HA. Furthermore, the electronic module EM may include multiple components, but is not limited to a specific embodiment.

[0097] In the electronic module EM overlapping the high-transmittance region HA, external objects can be readily visible through the high-transmittance region HA, or output signals generated by the electronic module EM can be easily transmitted to the outside. Although not shown, the electronic device EA in embodiments of the present invention may also include a transparent member disposed between the electronic module EM and the electronic panel EP. The transparent member may be an optically transparent film, such that external input TC transmitted through the high-transmittance region HA passes through the transparent member and is transmitted to the electronic module EM. The transparent member may be attached to the rear surface of the electronic panel EP or disposed between the electronic panel EP and the electronic module EM without an adhesive layer. The electronic device EA in embodiments of the present invention may have various shapes, but is not limited to a particular embodiment.

[0098] In an embodiment of the invention, in a plan view, the electronic module EM can be assembled to overlap with the transmission region TA. Therefore, an increase in the border region BZA due to the reception of the electronic module EM is prevented, thus improving the aesthetics of the electronic device EA.

[0099] Figure 3A This is a plan view of an embodiment of the display unit according to the present invention. Figure 3B This is a schematic signal circuit diagram illustrating an embodiment of one pixel among a plurality of pixels according to the present invention. Figure 3CThis is a plan view of an embodiment of the sensing unit according to the present invention. In the following text, reference will be made to... Figures 3A to 3C To describe embodiments of the present invention. (This can be directed to...) Figure 1A , Figures 1B to 2 The same parts are given the same reference numerals, and detailed descriptions of these parts will be omitted.

[0100] like Figure 3A As shown, the display unit DU includes a base substrate BS, multiple pixels PX, multiple signal lines GL, DL and PL, a power pattern VDD, and multiple display pads DPD.

[0101] The active region AA and the peripheral region NAA can be regions provided by the base substrate BS. The base substrate BS may include an insulating substrate. In embodiments, for example, the base substrate BS may include glass, plastic, or a combination thereof.

[0102] In alternative embodiments, the base substrate BS may include a metal substrate. The base substrate BS may be flexible so that it can be folded by the user, or it may be rigid to prevent shape deformation. The base substrate BS in embodiments of the present invention may include various embodiments, as long as it is arranged in a configuration such as pixels PX or signal lines GL, DL and PL, but is not limited to a particular embodiment.

[0103] Signal lines GL, DL, and PL are connected to pixel PX to send electrical signals to pixel PX. Figure 3A The image shows, as an example, the scan line GL, data line DL, and power line PL included in the signal lines GL, DL, and PL of the display unit DU. However, the signal lines GL, DL, and PL may also include at least one of an initialization voltage line and a transmit control line, and are not limited to this specific embodiment. Furthermore, in Figure 3A For convenience, the diagram illustrates, but is not limited to, one scan line GL, one data line DL, and one power line PL among signal lines GL, DL, and PL. Each of the scan line GL, data line DL, and power line PL can send electrical signals to multiple pixel rows and pixel columns.

[0104] Pixel PX can be set within the active region AA. (See reference) Figure 3B As an example, a magnified view of the signal circuit diagram of one of the multiple pixels PX is shown. Figure 3B An example of a pixel PX connected to the i-th scan line GLi and the i-th emission control line ELi is shown, where i is a natural number.

[0105] A pixel (PX) may include a light-emitting element (ELD) and a pixel circuit (CC).

[0106] The pixel circuit CC may include multiple transistors TR1 to TR7 and a capacitor CP. In an embodiment, for example, the multiple transistors TR1 to TR7 may be provided by a low-temperature polycrystalline silicon (“LTPS”) process or a low-temperature polycrystalline oxide (“LTPO”) process.

[0107] The pixel circuit CC can control the amount of current flowing in the light-emitting element ELD in response to a data signal. The light-emitting element ELD can emit light with a predetermined brightness corresponding to the amount of current supplied from the pixel circuit CC. For this purpose, the level of the first power supply ELVDD can be set to be greater than the level of the second power supply ELVSS. The light-emitting element ELD may include an organic light-emitting element or a quantum dot light-emitting element.

[0108] Each of the plurality of transistors TR1 to TR7 may include an input electrode (or source electrode), an output electrode (or drain electrode), and a control electrode (or gate electrode). In this specification, for convenience, either the input electrode or the output electrode may be referred to as the first electrode, and the other may be referred to as the second electrode.

[0109] The first electrode of the first transistor TR1 is connected to the first power supply ELVDD via the fifth transistor TR5, and the second electrode of the first transistor TR1 is connected to the anode of the light-emitting element ELD via the sixth transistor TR6. In this specification, the first transistor TR1 may be referred to as the driving transistor.

[0110] The first transistor TR1 can control the amount of current flowing in the light-emitting element ELD according to the voltage applied to the control electrode of the first transistor TR1.

[0111] The second transistor TR2 is connected between the data line DL and the first electrode of the first transistor TR1. Additionally, the control electrode of the second transistor TR2 is connected to the i-th scan line GLi. When the i-th scan signal is applied to the i-th scan line GLi, the second transistor TR2 is turned on to electrically connect the data line DL to the first electrode of the first transistor TR1.

[0112] The third transistor TR3 is connected between the second electrode of the first transistor TR1 and the control electrode of the first transistor TR1. The control electrode of the third transistor TR3 is connected to the i-th scan line GLi. When the i-th scan signal is provided to the i-th scan line GLi, the third transistor TR3 is turned on to electrically connect the second electrode of the first transistor TR1 to the control electrode of the first transistor TR1. Therefore, when the third transistor TR3 is turned on, the first transistor TR1 is connected in the form of a diode.

[0113] The fourth transistor TR4 is connected between node ND and the initialization power generation unit (not shown). Additionally, the control electrode of the fourth transistor TR4 is connected to the (i-1)th scan line GLi-1. When the (i-1)th scan signal is provided to the (i-1)th scan line GLi-1, the fourth transistor TR4 is turned on to provide the initialization voltage Vint to node ND.

[0114] The fifth transistor TR5 is connected between the power line PL and the first electrode of the first transistor TR1. The control electrode of the fifth transistor TR5 is connected to the i-th emitter control line ELi.

[0115] The sixth transistor TR6 is connected between the second electrode of the first transistor TR1 and the anode of the light-emitting element ELD. Additionally, the control electrode of the sixth transistor TR6 is connected to the i-th emission control line ELi.

[0116] The seventh transistor TR7 is connected between the initialization power generation unit (not shown) and the anode of the light-emitting element ELD. Additionally, the control electrode of the seventh transistor TR7 is connected to the (i+1)th scan line GLi+1. When the (i+1)th scan signal is provided to the (i+1)th scan line GLi+1, the seventh transistor TR7 is turned on to provide an initialization voltage Vint to the anode of the light-emitting element ELD.

[0117] The seventh transistor TR7 improves the black display capability of pixel PX. Specifically, when the seventh transistor TR7 is turned on, the parasitic capacitor (not shown) of the light-emitting element ELD discharges. Therefore, when black brightness is achieved, the light-emitting element ELD does not emit light due to the leakage current from the first transistor TR1, and thus, the black display performance is improved.

[0118] In addition, although in Figure 3B The control electrode of the seventh transistor TR7 is connected to the (i+1)th scan line GLi+1, but the present invention is not limited thereto. In another embodiment of the present invention, the control electrode of the seventh transistor TR7 may be connected to the i-th scan line GLi or the (i-1)-th scan line GLi-1.

[0119] A capacitor CP is positioned between the power line PL and node ND. The capacitor CP stores the voltage corresponding to the data signal. When the fifth transistor TR5 and the sixth transistor TR6 are turned on based on the voltage stored in the capacitor CP, the amount of current flowing through the first transistor TR1 can be determined.

[0120] In this invention, the equivalent circuit of pixel PX is not limited to... Figure 3B Equivalent to. In another embodiment of the invention, the pixel PX can have various shapes to allow the light-emitting element ELD to emit light. Although in Figure 3BThe diagram illustrates a p-channel metal-oxide semiconductor (“PMOS”), but the invention is not limited thereto. In another embodiment of the invention, the pixel circuit CC may be constructed from an n-channel metal-oxide semiconductor (“NMOS”). In yet another embodiment of the invention, the pixel circuit CC may be constructed from a combination of NMOS and PMOS.

[0121] See again Figure 3A Pixel PX is disposed around the high-transmittance region HA. In this embodiment, the boundary between the high-transmittance region HA and the active region AA may have a closed line shape. In this embodiment, the boundary between the high-transmittance region HA and the active region AA is shown as a circular shape.

[0122] A power pattern VDD is disposed on the peripheral region NAA. In this embodiment, the power pattern VDD is connected to multiple power lines PL. Therefore, the display unit DU may include the power pattern VDD to provide the same first power signal to each of the multiple pixels PX.

[0123] Display pads (DPD) may include a first pad P1 and a second pad P2. Multiple first pads P1 may be provided, and each first pad P1 may be connected to a data line DL. The second pad P2 may be connected to a power pattern VDD and electrically connected to a power line PL. The display unit DU can provide externally supplied electrical signals to the pixel PX through the display pads (DPD). In addition to the first pads P1 and the second pads P2, the display pads (DPD) may also include pads for receiving other electrical signals, but are not limited to this specific embodiment.

[0124] refer to Figure 3C The sensing unit SU is shown in a shape corresponding to that of the display unit DU. In this embodiment, the sensing unit SU may be disposed on the display unit DU. However, this is merely an example, and therefore, the sensing unit SU may be disposed below the display unit DU or may be embedded in the display unit DU, and is not limited to this particular embodiment.

[0125] The sensing unit SU can sense the external input TC (reference). Figure 1A The sensing unit SU includes multiple first sensing electrodes TE1, multiple second sensing electrodes TE2, multiple sensing lines TL1, TL2 and TL3, and multiple sensing pads T1, T2 and T3 to obtain position or intensity information from the external input TC.

[0126] The first sensing electrode TE1 and the second sensing electrode TE2 can be disposed in the active region AA. The sensing unit SU can obtain information about the external input TC by the capacitance change between the first sensing electrode TE1 and the second sensing electrode TE2.

[0127] The first sensing electrode TE1 is arranged in the first direction DR1 and extends in the second direction DR2. Each of the first sensing electrodes TE1 may include a first main pattern SP1, a first adjacent pattern SP1H, and a first connecting pattern CP1.

[0128] A first main pattern SP1 is disposed in the active region AA. The first main pattern SP1 is spaced apart from the high-transmittance region HA. The first main pattern SP1 has a predetermined shape and a first area. In this embodiment, for example, the first main pattern SP1 may have a rhomboid shape. However, this is merely an example. In other embodiments, for example, the first main pattern SP1 may have various shapes and is not limited to a particular embodiment.

[0129] The first neighboring pattern SP1H is configured to be adjacent to the high-transmittance region HA. In this embodiment, the portion of the sensing unit SU that overlaps with the high-transmittance region HA can be removed. The first neighboring pattern SP1H has a second area smaller than the first area of ​​the first main pattern SP1. The first neighboring pattern SP1H may have a shape in which the region overlapping with the high-transmittance region HA is removed from the same rhomboid shape as the first main pattern SP1.

[0130] In this embodiment, the first connecting pattern CP1 extends in the second direction DR2. The first connecting pattern CP1 is connected to the first main pattern SP1. The first connecting pattern CP1 may be disposed between two first main patterns SP1 to connect the two first main patterns SP1 to each other. In an alternative embodiment, the first connecting pattern CP1 is disposed between the first main pattern SP1 and the first adjacent pattern SP1H to connect the first main pattern SP1 to the first adjacent pattern SP1H.

[0131] The second sensing electrode TE2 is arranged on the second direction DR2 and extends on the first direction DR1. Each of the second sensing electrodes TE2 may include a second main pattern SP2, a second adjacent pattern SP2H, and a second connecting pattern CP2.

[0132] The second main pattern SP2 is configured to be spaced apart from the high-transmittance region HA. The second main pattern SP2 may be spaced apart from the first main pattern SP1. In this embodiment, the interval between the first main pattern SP1 and the second main pattern SP2 may be a cross-sectional interval. The first main pattern SP1 and the second main pattern SP2 may be electrically insulated from each other to receive and transmit independent electrical signals.

[0133] In this embodiment, the second main pattern SP2 may have the same shape as the first main pattern SP1. For example, in this embodiment, the second main pattern SP2 may have a rhombus shape. However, this is merely an example. In this embodiment, the second main pattern SP2 may have various shapes and is not limited to, for example, a specific embodiment.

[0134] The second neighboring pattern SP2H is positioned adjacent to the high-transmittance region HA. The second neighboring pattern SP2H has a smaller area than the second main pattern SP2. The second neighboring pattern SP2H may have a shape in which the region overlapping with the high-transmittance region HA is removed from the same rhomboid shape as the second main pattern SP2.

[0135] In this embodiment, the second connecting pattern CP2 extends in the first direction DR1. The second connecting pattern CP2 is connected to the second main pattern SP2. The second connecting pattern CP2 may be disposed between two second main patterns SP2 to connect the two second main patterns SP2 to each other. In an alternative embodiment, the second connecting pattern CP2 is disposed between the second main pattern SP2 and the second adjacent pattern SP2H to connect the second main pattern SP2 to the second adjacent pattern SP2H.

[0136] Sensing lines TL1, TL2, and TL3 are disposed in the peripheral area NAA. Sensing lines TL1, TL2, and TL3 may include a first sensing line TL1, a second sensing line TL2, and a third sensing line TL3.

[0137] The first sensing line TL1 is connected to the first sensing electrode TE1. In this embodiment, the first sensing line TL1 is connected to the lower end of each of the two ends of the first sensing electrode TE1.

[0138] Each of the second sensing lines TL2 is connected to one end of each of the second sensing electrodes TE2. In this embodiment, the second sensing lines TL2 are respectively connected to the left ends of the two ends of the second sensing electrodes TE2.

[0139] The third sensing line TL3 is connected to the upper ends of both ends of the first sensing electrode TE1. In an embodiment of the invention, the first sensing electrode TE1 may be connected to both the first sensing line TL1 and the third sensing line TL3. Therefore, sensitivity can be uniformly maintained over the region relative to the first sensing electrode TE1, wherein each of the first sensing electrodes TE1 has a relatively longer length than each of the second sensing electrodes TE2. However, this is merely an example. In embodiments of the sensing unit SU of the invention, the third sensing line TL3 may be omitted, but this is not limited to a specific embodiment.

[0140] Sensing pads T1, T2, and T3 are disposed in the peripheral area NAA. Sensing pads T1, T2, and T3 may include a first sensing pad T1, a second sensing pad T2, and a third sensing pad T3. The first sensing pad T1 is connected to a first sensing line TL1 to provide an external signal to a first sensing electrode TE1. The second sensing pad T2 is connected to a second sensing line TL2 for electrical connection to a second sensing electrode TE2, and the third sensing pad T3 is connected to a third sensing line TL3 for electrical connection to the first sensing electrode TE1.

[0141] In an embodiment of the invention, the high-transmission region HA may be located in the region surrounded by the active region AA to prevent interference from the electronic module EM (reference). Figure 1B and Figure 2 This leads to an increase in the border area BZA. In addition, since each of the pixel PX and sensing electrodes TE1 and TE2, which are located adjacent to the high-transmittance area HA, is electrically connected via the high-transmittance area HA, the high-transmittance area HA can easily prevent the degradation of display characteristics or sensitivity on the active area AA.

[0142] Figure 4A and Figure 4B This is a cross-sectional view of an embodiment of the electronic device according to the present invention. Figure 4A It is along Figure 1B A schematic cross-sectional view taken from line I-I'. Figure 4B It is shown Figure 4A A schematic cross-sectional view of a portion of the configuration. Figure 4A and Figure 4B The arrangement of the window WM, electronic panel EP, anti-reflective component POL, adhesive layer ADL, and electronic module EM, which are included in the components of the electronic device EA, is shown. For ease of description, the housing HU and circuit board DC are omitted. [The last sentence appears to be incomplete and possibly refers to a different topic.] Figures 1A to 3C The same components are given the same reference numerals, and detailed descriptions of them are omitted.

[0143] refer to Figure 4A and Figure 4B In the embodiment of the electronic device EA, the adhesive layer ADL is disposed between the window WM and the anti-reflective member POL, and the electronic device EA is attached through the adhesive layer ADL.

[0144] In the electronic device EA of the embodiments, the adhesive layer ADL may include an epoxy resin. The adhesive layer ADL may include an OCR containing an epoxy resin. In the embodiments, for example, the adhesive layer ADL may include a bisphenol F type epoxy resin. The adhesive layer ADL may include an epoxy resin having low viscosity, high reactivity, and curability at low temperatures. In the embodiments, the adhesive layer ADL may include an epoxy resin represented by the following chemical formula 1.

[0145] [Chemical Formula 1]

[0146]

[0147] In addition to epoxy resin, the adhesive layer ADL may also include a thermosetting agent. The thermosetting agent can be used without limitation, as long as it is a material used to cure epoxy resin. In embodiments, for example, the thermosetting agent can be a material used to initiate a curing reaction by heat during the formation of the adhesive layer ADL and to improve adhesion, reactivity, etc. In embodiments, the thermosetting agent may include an amine-based thermosetting agent or an imidazole-based thermosetting agent. Amine-based thermosetting agents may include aliphatic amines, modified aliphatic amines, aromatic amines, secondary amines, or tertiary amines, for example, benzyldimethylamine, triethanolamine, triethylenetetramine, diethylenetriamine, triethyleneamine, dimethylaminoethanol, tris(dimethylaminomethyl)phenol, etc. Imidazole-based thermosetting agents may include imidazole, isimidazole, 2-methylimidazole, 2-ethyl-4-methylimidazole, 2,4-dimethylimidazole, butylimidazole, 2-heptadecenyl-4-methylimidazole, 2-undecenylimidazole, 1-vinyl-2-methylimidazole, 2-undecylimidazole, 2-heptadecylimidazole (e.g., 2-n-heptadecylimidazole), 1-benzyl-2-methylimidazole, 1-propyl-2-methylimidazole, 1-cyanoethyl-2-methylimidazole, 1-cyanoethyl-2-ethyl-4-methylimidazole, 1-cyanoethyl-2-undecylimidazole, 1-cyanoethyl-2-phenylimidazole, 1-guanidineaminoethyl-2-methylimidazole, addition products of imidazole and methylimidazole, addition products of imidazole and trimellitic acid, 2-n-decylimidazole, etc. Heptaalkyl-4-methylimidazole, phenylimidazole (e.g., 2-phenylimidazole), benzylimidazole, 2-methyl-4,5-diphenylimidazole, 2,3,5-triphenylimidazole, 2-styrylimidazole, 1-(dodecylbenzyl)-2-methylimidazole, 2-(2-hydroxy-4-tert-butylphenyl)-4,5-diphenylimidazole, 2-(2-methoxyphenyl)-4,5-diphenylimidazole, 2-(3-hydroxyphenyl)-4,5-diphenylimidazole, 2-(p-dimethylaminophenyl)-4,5-diphenylimidazole, 2-(2-hydroxyphenyl)-4,5-diphenylimidazole, di(4,5-diphenyl-2-imidazole)-phenyl-1,4,2-naphthyl-4,5-diphenylimidazole, and 2-p-methoxystyrylimidazole, etc.

[0148] An aperture HA-P may be defined in the antireflective member POL, at least a portion of which overlaps with the high-transmittance region HA. The aperture HA-P may be a hole passing through the antireflective member POL. Because the aperture HA-P is defined within the antireflective member POL, relatively high light transmittance can be provided in the region overlapping with the high-transmittance region HA. When the antireflective member POL includes a polarizing film, the aperture HA-P may be a hole defined in the polarizing film by a punching process or the like. When the antireflective member POL includes a color filter, the aperture HA-P may be a stepped portion formed to overlap with the high-transmittance region HA during the color filter deposition process.

[0149] The adhesive layer ADL may include a first adhesive pattern AD-1 and a second adhesive pattern AD-2. The first adhesive pattern AD-1 is disposed between the antireflective member POL and the window WM, and may be the portion to which the antireflective member POL and the window WM are attached. The second adhesive pattern AD-2 may be the portion filling the hole HA-P defined in the antireflective member POL. The first adhesive pattern AD-1 and the second adhesive pattern AD-2 may be provided by an integral process and may have an integral shape. That is, the first adhesive pattern AD-1 and the second adhesive pattern AD-2 may have a shape that is connected to each other and may not be provided as separate components between the window WM and the antireflective member POL. The second adhesive pattern AD-2 of the adhesive layer ADL may fill the hole HA-P of the antireflective member POL and may have the same shape as the hole HA-P. In the electronic device EA of the embodiment, the hole HA-P is filled by the second adhesive pattern AD-2 so as not to create a separate gap between the electronic panel EP, the antireflective member POL, and the window WM. The thickness d1 of the second adhesive pattern AD-2 and the depth d2 of the hole HA-P may be substantially the same.

[0150] The adhesive layer ADL may comprise a thermosetting resin and have high transmittance in the near-ultraviolet region. In one embodiment, the adhesive layer ADL may have a light transmittance equal to or greater than about 92 percent (%) in a wavelength range equal to or less than about 400 nanometers (nm). The adhesive layer ADL may have a light transmittance equal to or greater than about 92 percent in a wavelength range from about 380 nm to about 430 nm. The adhesive layer ADL may be a layer with high light transmittance in the visible, infrared, and near-infrared regions, as well as in the ultraviolet and near-ultraviolet regions. In one embodiment, for example, the adhesive layer ADL may have a light transmittance equal to or greater than about 92 percent in a wavelength range from about 380 nm to about 750 nm.

[0151] An electronic panel EP may include a patterned portion EP-HA that overlaps with a high-transmittance region HA. The patterned portion EP-HA may be a portion of the electronic panel EP where multiple insulating and metal layers included in the electronic panel EP are patterned. The patterned portion EP-HA may be a portion of the electronic panel EP where a pixel PX overlapping the high-transmittance region HA is patterned. When multiple insulating and metal layers included in the electronic panel EP are patterned, the patterned portion EP-HA may have a higher transmittance than the pixel portion of the electronic panel EP that overlaps with the active region AA.

[0152] In the antireflective member POL of the electronic device EA in the embodiment, an aperture HA-P is defined, at least a portion of which overlaps with a high-transmittance region HA, and the aperture HA-P has a shape in which an adhesive layer ADL fills the aperture HA-P of the antireflective member POL, wherein the window WM and the antireflective member POL are attached by the adhesive layer ADL. More specifically, a first adhesive pattern AD-1 and a second adhesive pattern AD-2 are provided in an integral shape, wherein the antireflective member POL and the window WM are attached by the first adhesive pattern AD-1, and the second adhesive pattern AD-2 fills the aperture HA-P of the antireflective member POL. Therefore, when the aperture HA-P of the antireflective member POL is filled by a separate resin pattern, defects caused by resin pattern overflow or bubbles caused by resin pattern shrinkage can be prevented, thereby improving the reliability of the electronic panel EP. Furthermore, since the adhesive layer ADL (where the antireflective component POL and the window WM are attached via the adhesive layer ADL) is set using a thermosetting resin with high light transmittance in the near-ultraviolet and visible light ranges, the transmittance of the high-transmittance region HA in the low-wavelength range can be improved, thereby improving the function of electronic modules EM such as cameras and sensors.

[0153] Figures 5A to 5C This is a cross-sectional view of an embodiment of the electronic device according to the present invention. Figures 5A to 5C Showing more details Figure 4A and Figure 4B A cross-sectional view of the electronic device. In the following text, in reference... Figures 5A to 5C When describing the electronic device in the embodiments of the present invention, the same reference numerals will be assigned to the same components as those described above, and repeated descriptions will be omitted.

[0154] exist Figure 5A For ease of description, an electronic panel EP (reference) is shown as an example. Figure 1B , Figure 2 , Figure 4A and Figure 4BThe components of the device include a base substrate BS, a thin film transistor TR, a light-emitting element ELD, multiple insulating layers 10, 20, 30, 40, 50 and SU-IL, an encapsulation layer TFE, multiple sensing patterns SP1H and SP2H, a second connection pattern CP2, and hole signal lines HSL1, HSL2 and HSL3.

[0155] The insulating layers 10, 20, 30, 40, 50, and SU-IL may comprise a first insulating layer 10, a second insulating layer 20, a third insulating layer 30, a fourth insulating layer 40, and a fifth insulating layer 50, and a sensing insulating layer SU-IL, which are stacked sequentially. Each of the sequentially stacked first insulating layer 10, second insulating layer 20, third insulating layer 30, fourth insulating layer 40, and fifth insulating layer 50, and the sensing insulating layer SU-IL, may comprise organic and / or inorganic materials, and may have a single-layer structure or a multilayer structure.

[0156] In this embodiment, the base substrate BS can be optically transparent. For example, in this embodiment, the base substrate BS may have a transmittance equal to or greater than about 90% in the visible and near-ultraviolet range.

[0157] A first insulating layer 10 is disposed on a base substrate BS to cover the entire surface of the base substrate BS. The first insulating layer 10 may include a barrier layer and / or a buffer layer. Therefore, the first insulating layer 10 can prevent oxygen or moisture introduced through the base substrate BS from penetrating into the pixel PX, or can provide the pixel PX with a top surface having low surface energy, so that the pixel PX is stably disposed on the base substrate BS.

[0158] In this embodiment, the first insulating layer 10 may be optically transparent. For example, in this embodiment, the first insulating layer 10 may have a transmittance equal to or greater than about 90% in the visible and near-ultraviolet range.

[0159] A thin-film transistor (TR) and a light-emitting element (ELD) constitute a pixel (PX). The thin-film transistor TR can correspond to the sixth transistor TR6 of the pixel PX (reference). Figure 3B ).

[0160] The thin-film transistor TR may include a semiconductor pattern SP, a control electrode CE, an input electrode IE, and an output electrode OE. The semiconductor pattern SP is disposed on the first insulating layer 10.

[0161] The semiconductor pattern SP includes a semiconductor material. In an embodiment, for example, the semiconductor pattern SP may include group III elements, group V elements, combinations of group III and group V elements, or oxide semiconductors.

[0162] A semiconductor pattern SP can be divided into a channel region CA and two spaced-apart input regions IA and output regions OA, with the channel region CA located between the input regions IA and the output regions OA. The channel region CA, the input regions IA, and the output regions OA have an integral shape that is interconnected.

[0163] In the planar diagram, the channel region CA can be the region overlapping with the control electrode CE. Compared to the charge mobility of the channel region CA, the input region IA and the output region OA can have relatively high charge mobility. Charge within the semiconductor pattern SP can move from the input region IA through the channel region CA to the output region OA.

[0164] A control electrode CE is disposed on a second insulating layer 20. The second insulating layer 20 is disposed on a first insulating layer 10 to cover a semiconductor pattern SP. In cross-section, the control electrode CE may be spaced apart from the semiconductor pattern SP, and the second insulating layer 20 is located between the control electrode CE and the semiconductor pattern SP.

[0165] The input electrode IE and the output electrode OE are disposed on the third insulating layer 30. The third insulating layer 30 is disposed on the second insulating layer 20 to cover the control electrode CE.

[0166] The input electrode IE passes through the second insulating layer 20 and the third insulating layer 30 and is connected to the input region IA. The output electrode OE is spaced apart from the input electrode IE and is connected to the output region OA. Each of the input electrode IE and the output electrode OE may include a conductive material. The input electrode IE provides charge to the input region IA, and the output electrode OE transfers the charge moving to the output region OA to the light-emitting element ELD.

[0167] In this embodiment of the thin-film transistor TR, the input electrode IE and the output electrode OE can be omitted. That is, the thin-film transistor TR can be composed only of the control electrode CE and the semiconductor pattern SP. Here, the input region IA and the output region OA can be used as the input electrode IE and the output electrode OE, and the input electrode IE and the output electrode OE can be used as connection electrodes to connect the thin-film transistor TR to other signal lines or other components. The thin-film transistor TR in the embodiments of the present invention can be configured in various structures and is not limited to a specific embodiment.

[0168] The light-emitting element (ELD) may include a first electrode E1, a second electrode E2, and a light-emitting pattern EMP. The first electrode E1 is disposed on a fourth insulating layer 40. The fourth insulating layer 40 is disposed on a third insulating layer 30 to cover the thin-film transistor TR. The first electrode E1 is connected to the output electrode OE and is electrically connected to the thin-film transistor TR.

[0169] The second electrode E2 is disposed on the fifth insulating layer 50 disposed on the fourth insulating layer 40. The fifth insulating layer 50 may include organic and / or inorganic materials and has a single-layer structure or a multi-layer structure.

[0170] The second electrode E2 may have a region covering at least the entire surface of the active region AA. Therefore, multiple light-emitting elements (ELDs) may commonly include a single second electrode E2. However, this is merely an example. In implementations, for example, a second electrode E2 may be provided for each pixel PX to correspond to the first electrode E1, and the implementation is not limited to this particular embodiment.

[0171] The fifth insulating layer 50 may define an opening exposing at least a portion of the first electrode E1. A luminescent pattern EMP may be disposed in this opening. The luminescent pattern EMP may include a luminescent material, including fluorescent or phosphorescent materials. The luminescent material may include, but is not limited to, organic or inorganic luminescent materials. Figures 5A to 5C The configuration shown is different; the luminescent pattern EMP can be set as a common layer on the entire surface of the active region AA.

[0172] refer to Figures 5A to 5C The light-emitting element (ELD) may further include a control layer EL disposed between the first electrode E1 and the second electrode E2. The control layer EL may have a region covering the entire surface of at least the active region AA. The control layer EL may include an organic material. The control layer EL controls the movement of charge to improve the luminous efficiency and lifetime of the light-emitting element (ELD). The control layer EL may include an electron transport material, an electron injection material, a hole transport material, or a hole injection material.

[0173] exist Figures 5A to 5C In the embodiment shown, the control layer EL is depicted as being disposed on the light-emitting pattern EMP, but this is merely an example. In embodiments, for example, the control layer EL in the embodiments of the present invention may be disposed between the light-emitting pattern EMP and the first electrode E1, or multiple control layers EL may be disposed respectively between the light-emitting pattern EMP and the first electrode E1 and between the light-emitting pattern EMP and the second electrode E2, and the embodiment is not limited to the specific embodiment.

[0174] A TFE (Transmission overlay) layer can be disposed on a light-emitting element (ELD) to cover the ELD. The TFE layer is spaced from the ELD by a predetermined space GP between the TFE layer and the ELD to encapsulate the ELD. The space GP can be filled with air, inert gas, or adhesive material. The TFE layer can be a glass substrate disposed in the form of a packaging substrate. Therefore, an electronic device EA including a TFE layer can be a rigid electronic device EA.

[0175] In this embodiment, the sensing unit SU (reference) Figure 3C As an example, it is illustrated as being set in the display unit DU (reference). Figure 3A As described above, the first neighboring pattern SP1H, the second neighboring pattern SP2H, and the second connecting pattern CP2 can be some components of the sensing unit SU. The first neighboring pattern SP1H, the second neighboring pattern SP2H, and the second connecting pattern CP2 together with the sensing insulating layer SU-IL constitute the sensing unit SU. In this embodiment, the sensing electrode included in the sensing unit SU is illustrated by way of example as comprising a plurality of grid lines. That is, in this embodiment, each of the first neighboring pattern SP1H and the second neighboring pattern SP2H comprises a plurality of grid lines, and portions of the grid lines are respectively located on... Figures 5A to 5C The diagram is shown. However, this is merely an example, and each of the first neighboring pattern SP1H and the second neighboring pattern SP2H may include a transparent conductive oxide. Here, in the planar view, the first neighboring pattern SP1H or the second neighboring pattern SP2H may have a dimension that overlaps with the luminescent pattern EMP.

[0176] The sensing insulating layer SU-IL may include a first sensing insulating layer 71, a second sensing insulating layer 72, and a third sensing insulating layer 73 sequentially stacked on the encapsulation layer TFE. The sensing insulating layer SU-IL may overlap with each of the active region AA and the high-transmittance region HA.

[0177] Each of the first sensing insulating layer 71, the second sensing insulating layer 72, and the third sensing insulating layer 73 may be optically transparent. In an embodiment, for example, each of the first sensing insulating layer 71, the second sensing insulating layer 72, and the third sensing insulating layer 73 may have a transmittance equal to or greater than about 90% in the visible and near-ultraviolet range. Each of the first sensing insulating layer 71, the second sensing insulating layer 72, and the third sensing insulating layer 73 may have an inorganic layer, an organic layer, or a stacked structure thereof.

[0178] In this embodiment, the first adjacent pattern SP1H and the second adjacent pattern SP2H are disposed in the same layer, and the second connecting pattern CP2 is disposed in a different layer than the second adjacent pattern SP2H. The second connecting pattern CP2 may be disposed between the first sensing insulating layer 71 and the second sensing insulating layer 72, and the second adjacent pattern SP2H may pass through the second sensing insulating layer 72 and connect to the second connecting pattern CP2. The second connecting pattern CP2 connects the second main pattern SP2 (reference) Figure 3C (not shown) is connected to the second adjacent pattern SP2H. Although not shown, the first connecting pattern CP1 may be located in the same layer as the first main pattern SP1 and is directly connected to the first main pattern SP1.

[0179] However, this is merely an example. In implementations, for example, the second connection pattern CP2 may be disposed in the same layer as the second adjacent pattern SP2H, and the first connection pattern CP1 may be disposed in a different layer from the first adjacent pattern SP1H. In alternative implementations, the first sensing electrode TE1 (reference) Figure 3A ) and the second sensing electrode TE2 (reference) Figure 3A The sensing units SU in embodiments of the present invention can be arranged in various structures and are not limited to a specific embodiment.

[0180] The aperture signal lines HSL1, HSL2, and HSL3 are positioned within the high-transmission region HA. The high-transmission region HA may include a central region HMA and a line region LA.

[0181] The central area HMA can be essentially an electronic module EM that receives external inputs (e.g., Figure 1A The receiver (e.g., the one with "TC" in it) Figure 2 The area overlapping with the "TM2" in the document or the output unit providing the output. In an implementation, for example, when the electronic module EM is a camera module, the central region HMA can be the area of ​​the high-transmittance region HA that overlaps with the lens. The central region HMA can be the region on the high-transmittance region HA that has the highest light transmittance. Figure 5A For ease of description, the electronic module EM is simply shown as a rectangular shape. In this embodiment, the central region HMA may have a circular shape in the plan view.

[0182] The via signal lines HSL1, HSL2, and HSL3 are set in the line area LA. Figure 5A For ease of description, some of the corresponding first hole signal lines HSL1, second hole signal line HSL2, and third hole signal line HSL3 are shown.

[0183] The first signal line HSL1 and the second signal line HSL2 constitute the display unit DU (reference). Figure 3A The first aperture signal line HSL1 is shown as being disposed between the second insulating layer 20 and the third insulating layer 30. The first aperture signal line HSL1 may be a scan line connected to a pixel PX disposed adjacent to the high transmittance region HA (e.g., Figure 3A (GL in the text). The first aperture signal line HSL1 can provide the same scan signal to the pixels PX spaced apart from each other via the line region LA, wherein the high transmittance region HA is located between the pixels PX spaced apart from each other.

[0184] The second hole signal line HSL2 is shown disposed between the third insulating layer 30 and the fourth insulating layer 40. The second hole signal line HSL2 may be a data line connected to a pixel PX disposed adjacent to the high-transmittance region HA (e.g., Figure 3A (DL in the text). The second aperture signal line HSL2 is electrically connected to the pixels PX that are spaced apart from each other via the line region LA, wherein the high transmittance region HA is located between the pixels PX that are spaced apart from each other.

[0185] The third signal line HSL3 is disposed on the TFE encapsulation layer to form the sensing unit SU (reference). Figure 3A This is part of the embodiment. In this embodiment, the third hole signal line HSL3 is shown as being disposed between the first sensing insulating layer 71 and the second sensing insulating layer 72, but this is merely an example. In other embodiments, for example, the third hole signal line HSL3 may be disposed between the second sensing insulating layer 72 and the third sensing insulating layer 73.

[0186] The third aperture signal line HSL3 can be a connecting line to sensing patterns SP1H and SP2H located adjacent to the high-transmission region HA. In an embodiment, for example, the third aperture signal line HSL3 can connect two spaced-apart first adjacent patterns SP1H via a line region LA, with the high-transmission region HA located between these two spaced-apart first adjacent patterns SP1H; or the third aperture signal line HSL3 can connect two second adjacent patterns SP2H. Therefore, even when sensing electrodes TE1 and TE2 pass through the high-transmission region HA, limitations such as reduced sensitivity can be prevented.

[0187] An anti-reflective member POL may be defined with a hole HA-P passing through it, and the hole HA-P may overlap with the central region HMA. Figure 5A In this embodiment, the aperture HA-P is defined in the central region HMA, and the remainder of the antireflective member POL, except for the aperture HA-P, overlaps with the active region AA and the line region LA, but is not limited thereto. In an embodiment, for example, the aperture HA-P of the antireflective member POL may overlap with at least a portion of the line region LA.

[0188] refer to Figure 5A The antireflective member POL and the window WM can be attached by an adhesive layer ADL disposed on the antireflective member POL. The adhesive layer ADL may include a first adhesive pattern AD-1 and a second adhesive pattern AD-2, the first adhesive pattern AD-1 being disposed between the antireflective member POL and the window WM such that the antireflective member POL and the window WM are attached, and the second adhesive pattern AD-2 filling the hole HA-P defined in the antireflective member POL.

[0189] In an embodiment of the electronic panel EP according to the present invention, the central region HMA overlapping with the electronic module EM may be composed solely of an insulating layer with high light transmittance. Among the insulating layers constituting the electronic panel EP, a first sensing insulating layer 71, a second sensing insulating layer 72, and a third sensing insulating layer 73 with high light transmittance, a base substrate BS, and a packaging layer TFE (packaging substrate) may be disposed in the central region HMA, and a control layer EL or a plurality of first insulating layers 10, second insulating layers 20, third insulating layers 30, fourth insulating layers 40, and fifth insulating layers 50 with low light transmittance may be removed from the central region HMA. Therefore, a central region HMA with high light transmittance can be provided, enabling the electronic module EM to operate stably even without physical holes penetrating the central region HMA.

[0190] Figure 5B It shows that when with Figure 5A Compared to the time included in the sensing unit SU (reference) Figure 3C One embodiment defines an additional hole HA-SU in the sensing insulating layer SU-IL1 that overlaps with the central region HMA. The additional hole HA-SU defined in the sensing insulating layer SU-IL1 can be defined using the same process as the hole HA-P of the antireflective member POL, and therefore, the additional hole HA-SU and the hole HA-P can extend to each other. In a plan view, the additional hole HA-SU defined in the sensing insulating layer SU-IL1 and the hole HA-P of the antireflective member POL can have the same shape.

[0191] In the embodiment of electronic device EA-1, in addition to the hole HA-P in the anti-reflective member POL, the additional hole HA-SU defined in the sensing insulating layer SU-IL1 can also be filled by the second adhesive pattern AD-21 of the adhesive layer ADL. When the additional hole HA-SU is defined in the sensing insulating layer SU-IL1, the second adhesive pattern AD-21 can contact the top surface of the encapsulation layer TFE. In the electronic device EA-1 of the embodiment, only the base substrate BS with high light transmittance, the encapsulation layer TFE (encapsulation substrate), and the adhesive layer ADL can be disposed in the central region HMA overlapping with the electronic module EM, so that the electronic module EM can operate stably.

[0192] Figure 5C An embodiment is shown in which the encapsulation layer TFE-1 is not configured as an encapsulation substrate but as a thin-film encapsulation layer comprising multiple insulating layers. In the embodiment of electronic device EA-2, the encapsulation layer TFE-1 may include a first inorganic layer 61, an organic layer 62, and a second inorganic layer 63 sequentially stacked on a third-direction DR3. However, the invention is not limited thereto. In embodiments, for example, the encapsulation layer TFE-1 may also include multiple inorganic and organic layers.

[0193] The first inorganic layer 61 may cover the second electrode E2. The first inorganic layer 61 may prevent external moisture or oxygen from penetrating into the light-emitting element ELD. In an embodiment, for example, the first inorganic layer 61 may include silicon nitride, silicon oxide, or a combination thereof. The first inorganic layer 61 may be formed by a chemical vapor deposition process.

[0194] The light transmittance of the first inorganic layer 61 may be less than that of the base substrate BS. In an embodiment, for example, the first inorganic layer 61 may include silicon nitride (SiN). x ).

[0195] An organic layer 62 may be disposed on the first inorganic layer 61 in contact with the first inorganic layer 61. The organic layer 62 may provide a flat surface on the first inorganic layer 61. Curves on the top surface of the first inorganic layer 61 or particles present on the first inorganic layer 61 may be covered by the organic layer 62 to prevent the surface condition of the top surface of the first inorganic layer 61 from affecting the components disposed on the organic layer 62. Additionally, the organic layer 62 may reduce stress between layers in contact with each other. The organic layer 62 may include organic materials and may be provided by solution processes (such as spin coating, slot coating), inkjet processes, etc.

[0196] The second inorganic layer 63 can be disposed on the organic layer 62 to cover the organic layer 62. Compared with the second inorganic layer 63 disposed on the first inorganic layer 61, the second inorganic layer 63 can be disposed relatively stably on a flat surface. The second inorganic layer 63 can encapsulate moisture discharged from the organic layer 62 to prevent moisture from being introduced.

[0197] The second inorganic layer 63 may be optically transparent. In some embodiments, for example, the second inorganic layer 63 may have a transmittance equal to or greater than about 90% in the visible and near-ultraviolet range. The second inorganic layer 63 may have a relatively high transmittance compared to the first inorganic layer 61. The second inorganic layer 63 may comprise silicon oxide (SiO2). x ) or silicon nitride oxide (SiON).

[0198] The second inorganic layer 63 can be provided by a chemical vapor deposition process. Each of the first inorganic layer 61, the organic layer 62, and the second inorganic layer 63 may include multiple layers and is not limited to a particular embodiment.

[0199] The electronic panel EP may also include a dam portion DM and a planarization pattern OCT, and at least one groove GV1 and GV2 may be defined in the electronic panel EP. The grooves GV1 and GV2, the dam portion DM, and the planarization pattern OCT may be disposed in the high-transmittance region HA.

[0200] Grooves GV1 and GV2 may be defined in the line region LA of the high-transmittance region HA. Each of grooves GV1 and GV2 may be defined by recessing at least a portion of the base substrate BS. Each of grooves GV1 and GV2 may have a depth such that it does not penetrate the base substrate BS. Grooves GV1 and GV2 may include a first groove GV1 and a second groove GV2 spaced apart from each other.

[0201] The first groove GV1 may be relatively adjacent to the active region AA and is filled by the organic layer 62. The second groove GV2 may be relatively adjacent to the central region HMA and is sequentially covered by a first inorganic layer 61 and a second inorganic layer 63 spaced apart from the organic layer 62. Each of the first groove GV1 and the second groove GV2 has a closed line shape around the central region HMA, or an intermittent line shape around at least a portion of the edge of the central region HMA, but is not limited to a particular embodiment.

[0202] One end of the first insulating layer 10 may have an undercut shape by protruding from each of the first groove GV1 and the second groove GV2. The control layer EL and the second electrode E2 are respectively cut off by the first groove GV1 and the second groove GV2. In an embodiment of the invention, grooves GV1 and GV2 may be defined in the electronic panel EP to prevent the continuity of the control layer EL or the second electrode E2 (which provides a path for external moisture or oxygen to penetrate), thereby preventing damage to components disposed in the active region AA.

[0203] Although not shown, some patterns separate from the control layer EL or the second electrode E2 may be disposed inside each of the first groove GV1 and the second groove GV2, and covered by at least one of the first inorganic layer 61 and the second inorganic layer 63. Therefore, in the manufacturing process of the electronic panel EP, some patterns can be prevented from affecting other components due to movement. Thus, the process reliability of the electronic panel EP can be improved. However, this is merely an example. In another embodiment of the electronic panel EP of the present invention, for example, grooves GV1 and GV2 may be individually defined or omitted, and the invention is not limited to this particular embodiment.

[0204] The dam portion DM is disposed in the online region LA to divide the formation area of ​​the organic layer 62 into predetermined regions and to prevent the organic layer 62 from expanding further. The dam portion DM may be disposed between the first groove GV1 and the second groove GV2. The dam portion DM is shown in a laminated structure including multiple insulating patterns IP1 and IP2. However, this is merely an example. In embodiments, for example, the dam portion DM may have a single-layer structure and is not limited to a particular embodiment.

[0205] The planarization pattern OCT comprises an organic material. The planarization pattern OCT can be disposed on the entire surface of the high-transmittance region HA. The planarization pattern OCT covers the non-planarized surface of the high-transmittance region HA caused by the dam portion DM or the grooves GV1 and GV2, to provide a flat surface thereon. Therefore, a flat surface can be stably disposed in the high-transmittance region HA, even in areas where the organic layer 62 is not disposed.

[0206] The planarized patterned OCT can be optically transparent. In an embodiment, for example, the planarized patterned OCT may have a transmittance of about 90% or greater in the visible and near-ultraviolet range.

[0207] In embodiments of the present invention, the first inorganic layer 61 can be removed from the central region HMA. The first inorganic layer 61 may have a relatively low transmittance compared to the second inorganic layer 63. In embodiments of the present invention, the transmittance of the central region HMA can be improved by providing a first inorganic layer 61 that does not overlap with the central region HMA in shape.

[0208] Figure 6 This is a graph showing the light transmittance of the adhesive layer according to embodiments of the adhesive layer and related technologies for each wavelength. Figure 6 The graph shows the light transmittance of an adhesive layer comprising an embodiment of the thermosetting resin according to the invention and an adhesive layer made of a UV-curable resin of the related art in the range of about 380 nm to about 780 nm.

[0209] refer to Figure 6As a result, the thermosetting resin adhesive layer applied to embodiments of the present invention has a high light transmittance of about 92% or more in the near-ultraviolet and visible light regions. Specifically, it can be seen that embodiments of the thermosetting resin adhesive layer according to the present invention have a high light transmittance of about 92% or more in the wavelength range of about 380 nm to about 430 nm (which is the ultraviolet and near-ultraviolet range). Unlike embodiments of the present invention, in the case of adhesive layers made of ultraviolet-curable resins of related technologies, the adhesive layer may have a reduced light transmittance in the wavelength range of about 380 nm to about 430 nm (which is the ultraviolet and near-ultraviolet range), and more specifically, due to its absorption of ultraviolet light and curable properties, it has a light transmittance of about 70% or less in the wavelength range of about 400 nm or less. In the electronic device of an embodiment of the present invention, the thermosetting resin adhesive layer may have high light transmittance in the wavelength range of about 380 nm to about 430 nm in the ultraviolet and near-ultraviolet range to improve transmittance in the low wavelength range (i.e., blue light transmittance) and allow the electronic module overlapping the aperture to operate stably, wherein the window and the anti-reflective member are attached by the thermosetting resin adhesive layer and the thermosetting resin adhesive layer fills the aperture defined in the anti-reflective member.

[0210] Figure 7A This is an enlarged view of a cross section of an electronic device to which the adhesive layer of the related technology is applied. Figure 7B This is an enlarged cross-section of an electronic device to which the adhesive layer in an embodiment of the present invention is applied. Figure 7A An enlarged cross-sectional view according to a comparative example is shown, in which a separate adhesive resin pattern AD-2CP fills the hole HA-PCP defined in the antireflective member POL-CP, and the antireflective member POL-CP and the window (not shown) are attached by an optically clear adhesive (“OCA”). Figure 7B An enlarged cross-sectional view of an embodiment is shown, in which the second adhesive pattern AD-2, which fills the hole HA-P of the anti-reflective member POL, and the first adhesive pattern, which attaches the anti-reflective member POL to the window, are integrally formed.

[0211] like Figure 7A As shown, in the electronic device EA-CP, when the adhesive resin pattern AD-2CP filling the holes HA-PCP defined in the anti-reflective member POL-CP and the optically transparent adhesive film are provided separately, resin may overflow when the adhesive resin pattern AD-2CP is filled, and air bubbles BB may be generated when the adhesive resin pattern AD-2CP is cured. Therefore, the light transmittance of the holes HA-PCP in which the adhesive resin pattern AD-2CP is provided can be reduced. However, as... Figure 7BAs shown, when the second adhesive pattern AD-2 filling the hole HA-P of the anti-reflective member POL and the first adhesive pattern attaching the anti-reflective member POL to the window are integrally formed, resin overflow and bubble generation can be prevented, and thus the light transmittance of the hole HA-P can be prevented from decreasing.

[0212] Figures 8A to 8E These are cross-sectional views showing, in sequence, embodiments of the method for manufacturing an electronic device according to the present invention. Figures 8A to 8E In Figure 4A The method of manufacturing an electronic device is briefly illustrated in the cross-section corresponding to the cross-section shown. In the following text, with reference to... Figures 8A to 8C When describing embodiments of the method for manufacturing an electronic device according to the present invention, the same reference numerals will be assigned to the same components as those described above, and repeated descriptions will be omitted.

[0213] The method for manufacturing an electronic device according to embodiments of the present invention includes: a process for preparing an electronic panel, wherein the electronic panel defines a high-transmittance region and an active region surrounding at least a portion of the high-transmittance region; a process for forming an anti-reflective member, wherein the anti-reflective member defines a hole that overlaps at least a portion of the high-transmittance region; a process for applying an adhesive resin to the anti-reflective member to fill the hole; and a process for attaching a window to the anti-reflective member by means of the adhesive resin.

[0214] refer to Figure 8A and Figure 8B In the method for manufacturing an electronic device according to the embodiment, an initial anti-reflective member POL-P may be provided on an initial electronic panel EP-P to form an anti-reflective member POL. In the anti-reflective member POL, a hole HA-P is defined by a patterning process (see reference). Figure 4B and Figures 5A to 5C The aperture HA-P of the antireflective component POL can be formed by an etching process using a laser LS. In the process of forming the aperture HA-P using a laser LS, multiple insulating layers in the area of ​​the initial electronic panel EP-P overlapping with the aperture HA-P can be etched together to form the electronic panel EP. That is, the aperture HA-P of the antireflective component POL and the patterned portion EP-HA of the electronic panel EP can be defined using the same etching process of a laser LS.

[0215] refer to Figure 8B and Figure 8CIn the method for manufacturing an electronic device according to the embodiments, an adhesive resin ADR may be applied to an antireflective member POL in which a pore HA-P is defined to form an initial adhesive layer ADL-P. The adhesive resin ADR may be applied to fill the pore HA-P. The adhesive resin ADR may include a thermosetting resin. The adhesive resin ADR may include an epoxy resin. In embodiments, for example, the adhesive resin ADR may include a bisphenol F type epoxy resin. The adhesive resin ADR may include an epoxy resin having low viscosity, high reactivity, and curability at low temperatures. In embodiments, the adhesive resin ADR may include an epoxy resin represented by the following chemical formula 1.

[0216] [Chemical Formula 1]

[0217]

[0218] In addition to epoxy resins, adhesive resins (ADRs) may also include thermosetting agents. Thermosetting agents can be used without limitation, as long as they are materials used to cure epoxy resins. In embodiments, thermosetting agents can be materials used to initiate a curing reaction by heat and improve adhesion, reactivity, etc. In embodiments, thermosetting agents may include amine-based thermosetting agents or imidazole-based thermosetting agents. Amine-based thermosetting agents may include aliphatic amines, modified aliphatic amines, aromatic amines, secondary amines, or tertiary amines, for example, benzyldimethylamine, triethanolamine, triethylenetetramine, diethylenetriamine, triethyleneamine, dimethylaminoethanol, tris(dimethylaminomethyl)phenol, etc. Imidazole-based thermosetting agents may include imidazole, isimidazole, 2-methylimidazole, 2-ethyl-4-methylimidazole, 2,4-dimethylimidazole, butylimidazole, 2-heptadecenyl-4-methylimidazole, 2-undecenylimidazole, 1-vinyl-2-methylimidazole, 2-undecylimidazole, 2-heptadecylimidazole (e.g., 2-n-heptadecylimidazole), 1-benzyl-2-methylimidazole, 1-propyl-2-methylimidazole, 1-cyanoethyl-2-methylimidazole, 1-cyanoethyl-2-ethyl-4-methylimidazole, 1-cyanoethyl-2-undecylimidazole, 1-cyanoethyl-2-phenylimidazole, 1-guanidineaminoethyl-2-methylimidazole, addition products of imidazole and methylimidazole, addition products of imidazole and trimellitic acid, 2-n-decylimidazole, etc. Heptaalkyl-4-methylimidazole, phenylimidazole (e.g., 2-phenylimidazole), benzylimidazole, 2-methyl-4,5-diphenylimidazole, 2,3,5-triphenylimidazole, 2-styrylimidazole, 1-(dodecylbenzyl)-2-methylimidazole, 2-(2-hydroxy-4-tert-butylphenyl)-4,5-diphenylimidazole, 2-(2-methoxyphenyl)-4,5-diphenylimidazole, 2-(3-hydroxyphenyl)-4,5-diphenylimidazole, 2-(p-dimethylaminophenyl)-4,5-diphenylimidazole, 2-(2-hydroxyphenyl)-4,5-diphenylimidazole, di(4,5-diphenyl-2-imidazole)-phenyl-1,4,2-naphthyl-4,5-diphenylimidazole, and 2-p-methoxystyrylimidazole, etc.

[0219] The adhesive resin ADR can be applied by inkjet printing. When the adhesive resin ADR is applied by inkjet printing, an initial adhesive layer ADL-P can be provided, so that the pores HA-P defined in the antireflective member POL are filled without creating air gaps, etc.

[0220] refer to Figure 8C and Figure 8D In the method for manufacturing an electronic device according to the embodiments, after providing the initial adhesive layer ADL-P, a window WM can be disposed on the anti-reflective member POL, with the initial adhesive layer ADL-P positioned between the window WM and the anti-reflective member POL. The window WM may comprise an optically transparent insulating material, such as glass or plastic.

[0221] refer to Figure 8D and Figure 8E In the method for manufacturing an electronic device according to the embodiment, after the window WM is set on the initial adhesive layer ADL-P, a process of applying heat HT to form the adhesive layer ADL can be performed. The adhesive layer ADL can be set by thermally curing the initial adhesive layer ADL-P.

[0222] Figure 9A and Figure 9B This is a cross-sectional view illustrating an embodiment of a portion of the process in a method for manufacturing an electronic device according to the present invention. Figure 9A and Figure 9B Through with Figure 5B The cross-section shown corresponds to a portion of the process in a method for manufacturing electronic devices. Figure 9A and Figure 9B It shows Figure 8A The process shown is an etching process using a laser LS. In the following, in reference... Figure 9A and Figure 9B When describing the method for manufacturing an electronic device according to embodiments of the present invention, the same reference numerals will be assigned to the same components as those described above, and repeated descriptions will be omitted.

[0223] refer to Figure 8A , Figure 9A and Figure 9B In the method for manufacturing an electronic device according to the embodiment, a hole HA-P can be defined in the anti-reflective member POL by means of a laser LS. In the method for manufacturing an electronic device according to the embodiment, when the hole HA-P is formed in the anti-reflective member POL by means of a laser LS, it can be simultaneously etched into a sensing unit (e.g., Figure 3C The sensing insulating layer SU-IL in the “SU” of the anti-reflective member is used to form the additional aperture HA-SU. Additionally, in the central region HMA where the aperture HA-P is defined in the anti-reflective member POL, an etched state can be formed including the aperture in the electronic panel EP (e.g., reference EP). Figure 1BThe portions of the multiple first insulating layers 10, second insulating layers 20, third insulating layers 30, fourth insulating layers 40, and fifth insulating layers 50, as well as the control layer EL, that overlap with the central region HMA are etched in the electronic panel EP. That is, before the anti-reflective member POL is placed on the electronic panel EP, the portions of the multiple first insulating layers 10, second insulating layers 20, third insulating layers 30, fourth insulating layers 40, and fifth insulating layers 50, as well as the control layer EL, that overlap with the central region HMA are etched, and then the anti-reflective member POL can be placed. As a result, the multiple first insulating layers 10, second insulating layers 20, third insulating layers 30, fourth insulating layers 40, and fifth insulating layers 50, as well as the control layer EL, do not overlap with each other in the central region HMA, and the multiple sensing insulating layers SU-IL1 do not overlap with the central region HMA, wherein the electronic module EM (reference) Figure 5B This will be incorporated into the central region HMA in subsequent processes. Therefore, the transmittance of the central region HMA can be improved, and the functionality of the electronic module EM can be enhanced.

[0224] In embodiments of the present invention, the electronic module may overlap with the electronic panel to reduce the bezel area. Additionally, in embodiments of the present invention, the transmittance of light with a low wavelength range can be improved in the area where the electronic module is disposed, thereby improving the functionality of the electronic module.

[0225] It will be apparent to those skilled in the art that various modifications and variations can be made to the inventive concept. Therefore, this disclosure is intended to cover such modifications and variations.

Claims

1. An electronic device comprising: Electronic module, which outputs or receives signals; The electronic panel, in a plan view, is divided into a first region overlapping the electronic module, a second region surrounding at least a portion of the first region, and a third region adjacent to the second region; The window is located on the electronic panel; An anti-reflective component is located between the window and the electronic panel; as well as An adhesive layer is located between the window and the anti-reflective member. The anti-reflective member defines a hole that overlaps with at least a portion of the first region, and the adhesive layer fills the hole; The electronic panel includes a sensing unit, which comprises multiple conductive patterns and multiple sensing insulating layers disposed between the multiple conductive patterns. The multiple sensing insulating layers define additional holes that overlap with the aperture. The adhesive layer fills the additional holes.

2. The electronic device according to claim 1, wherein, The adhesive layer includes: A first adhesive pattern, wherein the window and the anti-reflective member are attached via the first adhesive pattern; and A second adhesive pattern is used to fill the holes.

3. The electronic device according to claim 2, wherein, The first adhesive pattern and the second adhesive pattern have an integral shape.

4. The electronic device according to claim 1, wherein, The adhesive layer comprises an optically transparent resin.

5. The electronic device according to claim 1, wherein, The adhesive layer comprises epoxy resin.

6. The electronic device according to claim 5, wherein, The adhesive layer also includes a thermosetting agent.

7. The electronic device according to claim 1, wherein, The electronic panel includes: Basic substrate; Multiple pixels are disposed on the base substrate and display an image on the second region; and An encapsulation layer is disposed on the base substrate and covers the plurality of pixels.

8. The electronic device according to claim 7, wherein, The adhesive layer contacts the top surface of the encapsulation layer.

9. The electronic device according to claim 1, wherein, The adhesive layer has a light transmittance of 92% or greater in a wavelength range of 400 nanometers or less.

10. A method for manufacturing an electronic device, the method comprising: An electronic panel is fabricated comprising a high-transmittance region and an active region surrounding at least a portion of the high-transmittance region, wherein the electronic panel includes a sensing unit, the sensing unit comprising a plurality of conductive patterns and a plurality of sensing insulating layers disposed between the plurality of conductive patterns; An aperture is defined in the antireflective member such that at least a portion of the aperture overlaps with the high-transmittance region, and additional apertures overlapping the aperture are defined in the plurality of sensing insulating layers; Apply adhesive resin to the antireflective member and the plurality of sensing insulating layers to fill the holes and the additional holes; and The window is attached to the anti-reflective member using the adhesive resin.

Images