Display device

Abstract

A display device is provided. The display device includes a plurality of first banks disposed on a base to extend in a first direction and spaced apart from each other, a plurality of first patterns disposed between the plurality of first banks and spaced apart from each other in the first direction, a first electrode and a second electrode extending in the first direction and disposed on different ones of the plurality of first banks and spaced apart from each other, a first insulating layer superposed with the plurality of first patterns, disposed on the base, and partially superposed with the first electrode and the second electrode, and a plurality of light emitting elements disposed on the first insulating layer such that a first end and a second end of each of the plurality of light emitting elements are disposed on the first electrode and the second electrode, respectively.

Description

Technical Field

[0001] This disclosure relates to a display device. Background Technology

[0002] With the development of multimedia, display devices have become very important, and various types of display devices (such as organic light-emitting diode (OLED) display devices, liquid crystal display (LCD) devices, etc.) have been used.

[0003] Display devices, as means for displaying images, include display panels (such as OLED display panels or LCD panels). Display panels may include light-emitting elements (such as light-emitting diodes (LEDs)), and LEDs can be classified into OLEDs that use organic materials as fluorescent materials and inorganic LEDs (ILEDs) that use inorganic materials as fluorescent materials. Summary of the Invention

[0004] Embodiments of this disclosure provide a display device that minimizes the number of light-emitting elements lost during its manufacture.

[0005] Embodiments of this disclosure provide a display device with improved alignment of the light-emitting element on the electrode.

[0006] However, the embodiments of this disclosure are not limited to those set forth herein. The above and other embodiments of this disclosure will become more apparent to those skilled in the art from the following detailed description of this disclosure.

[0007] According to the foregoing and other embodiments of this disclosure, a display device comprising a plurality of patterns disposed between dikes on which electrodes are arranged. The patterns are configured to be spaced apart from each other in the direction in which the electrodes and dikes extend, and thus a height difference can be formed between the dikes. Like the dikes, the patterns can provide space in which light-emitting elements are disposed, and during the manufacture of the display device, the light-emitting elements can be guided to be placed between the patterns that are separated from each other.

[0008] Therefore, the number of light-emitting elements that fail to connect with the electrodes and are lost due to being located in areas other than the areas between the dikes can be minimized. Furthermore, since the light-emitting elements located between the patterns can have their two ends properly positioned on the electrodes, the alignment of the light-emitting elements can be improved.

[0009] Other features and embodiments may become apparent from the following detailed description, drawings, and claims.

[0010] According to an exemplary embodiment of the present disclosure, a display device may include: a plurality of first dikes disposed on a substrate and extending in a first direction and spaced apart from each other; a plurality of first patterns disposed between the plurality of first dikes and spaced apart from each other in the first direction; a first electrode and a second electrode extending in the first direction, disposed on different first dikes among the plurality of first dikes and spaced apart from each other; a first insulating layer superimposed on the plurality of first patterns, disposed on the substrate, and partially superimposed on the first electrode and the second electrode; and a plurality of light-emitting elements disposed on the first insulating layer, such that a first end and a second end of each of the plurality of light-emitting elements are respectively disposed on the first electrode and the second electrode, the plurality of light-emitting elements including a first light-emitting element disposed between the plurality of first patterns and not superimposed on the plurality of first patterns in the thickness direction of the display device.

[0011] The plurality of light-emitting elements may further include a second light-emitting element superimposed on the plurality of first patterns in the thickness direction of the display device, and the distance between the first light-emitting element and the substrate may be less than the distance between the second light-emitting element and the substrate.

[0012] The thickness of multiple first patterns can be greater than the thickness of the first electrode and the thickness of the second electrode.

[0013] The thickness of multiple first patterns can be smaller than the diameter of multiple light-emitting elements.

[0014] Multiple first patterns can be disposed between the first electrode and the second electrode, and the width of the multiple first patterns can be less than the distance between the first electrode and the second electrode.

[0015] The width of the plurality of first patterns may be greater than the distance between the first electrode and the second electrode, and at least a portion of the first electrode and at least a portion of the second electrode may be disposed on the plurality of first patterns.

[0016] The display device may further include a planarization layer disposed on a substrate. A plurality of first dams and first insulating layers may be disposed on the planarization layer, and a plurality of first patterns and the planarization layer may be integral with each other.

[0017] Multiple first patterns may be superimposed on portions of the first electrode or the second electrode that are not superimposed on the multiple first dikes and arranged in a first direction.

[0018] The first pattern superimposed on the first electrode and the first pattern superimposed on the second electrode in the plurality of first patterns can be arranged parallel to the first electrode and the second electrode in a direction that is spaced apart from each other.

[0019] The first pattern superimposed on the first electrode in a plurality of first patterns and the first pattern superimposed on the second electrode in a plurality of first patterns can be arranged in an alternating manner.

[0020] The display device may further include a first contact electrode and a second contact electrode, wherein the first contact electrode is disposed on the first electrode to make electrical contact with the first end of a plurality of light-emitting elements, and the second contact electrode is disposed on the second electrode to make electrical contact with the second end of a plurality of light-emitting elements.

[0021] The first electrode may include: at least one curved portion extending in a second direction different from the first direction; an extension portion having a width greater than the width of the at least one curved portion; and at least one connecting portion electrically connecting the at least one curved portion and the extension portion and extending in the first direction, and a plurality of first patterns may be disposed between the extension portion of the first electrode and the second electrode.

[0022] The second electrode can be symmetrical with respect to the first electrode relative to a plurality of first patterns disposed therebetween. The plurality of first patterns can be disposed between the extension portion of the first electrode and the extension portion of the second electrode, and the first end and the second end of each of the plurality of light-emitting elements can be disposed on the extension portion of the first electrode and the extension portion of the second electrode, respectively.

[0023] The first distance between the extension portion of the first electrode and the second electrode may be less than the second distance between at least one connecting portion of the first electrode and the second electrode, and the minimum distance between at least one bent portion of the first electrode and the second electrode may be greater than the first distance and less than the second distance.

[0024] According to an exemplary embodiment of the present disclosure, a display device includes: a planarization layer disposed on a substrate; a plurality of first dams disposed on the planarization layer and spaced apart from each other; a first electrode and a second electrode disposed on different first dams of the plurality of first dams and spaced apart from each other; a first insulating layer disposed on the planarization layer and partially superimposed on the first electrode and the second electrode; a first light-emitting element disposed on the first insulating layer such that a first end and a second end of each of the first light-emitting elements are respectively disposed on the first electrode and the second electrode; and a second light-emitting element disposed on the first insulating layer such that a first end and a second end of each of the second light-emitting elements are respectively disposed on the first electrode and the second electrode, wherein the distance between the first light-emitting element and the substrate is less than the distance between the second light-emitting element and the substrate.

[0025] The planarization layer may include a first pattern, the first pattern including a top surface that partially protrudes between a plurality of first dikes, and a second light-emitting element may be disposed on the first pattern.

[0026] The planarization layer may include portions of the planarization layer between a plurality of first dikes where the first pattern is not formed, and the first light-emitting element may be disposed on the portions of the planarization layer where the first pattern is not formed.

[0027] The planarization layer may include recesses between a plurality of first diaphragms. The top surface of the planarization layer may be recessed, at least a portion of the first electrode and at least a portion of the second electrode may be disposed in the recesses, and a first light-emitting element may be disposed in the recesses.

[0028] The planarization layer may include portions of the planarization layer between a plurality of first dikes where no recesses are formed, and the second light-emitting element may be disposed on the portions of the planarization layer where no recesses are formed.

[0029] The display device may further include: a transistor disposed between a substrate and a planarization layer; and a data conductive layer disposed between the transistor and the planarization layer and including a first voltage line and a second voltage line, wherein a first electrode may be electrically connected to the first voltage line via the transistor, and a second electrode may be electrically connected to the second voltage line. Attached Figure Description

[0030] These and other aspects will become apparent and more readily understood from the following description of embodiments taken in conjunction with the accompanying drawings, in which:

[0031] Figure 1 This is a schematic plan view of a display device according to an embodiment of the present disclosure;

[0032] Figure 2 yes Figure 1 A schematic plan view of the pixels of a display device;

[0033] Figure 3 It is along Figure 2 A schematic cross-sectional view taken from lines Q1-Q1', Q2-Q2', and Q3-Q3';

[0034] Figure 4 It is along Figure 2 A schematic cross-sectional view taken by line Q4-Q4';

[0035] Figure 5 It is along Figure 2 A schematic cross-sectional view taken by line Q5-Q5';

[0036] Figure 6 yes Figure 4 A schematic enlarged cross-sectional view of part of the QA (Quality Assurance) section;

[0037] Figure 7 It is along Figure 2 A schematic cross-sectional view taken from line Q6-Q6';

[0038] Figure 8 This is a schematic partial cross-sectional view of a display device according to another embodiment of the present disclosure;

[0039] Figure 9This is a schematic perspective view of a light-emitting element according to an embodiment of the present disclosure;

[0040] Figures 10 to 12 This is a schematic cross-sectional view illustrating the process of manufacturing a display device according to an embodiment of the present disclosure;

[0041] Figure 13 Through Figure 12 A schematic plan view of the sub-pixels obtained by the process shown;

[0042] Figure 14 and Figure 15 This is a schematic cross-sectional view illustrating the process of manufacturing a display device according to an embodiment of the present disclosure;

[0043] Figure 16 Through Figure 14 and Figure 15 A schematic plan view of the sub-pixels obtained by the process shown;

[0044] Figures 17 to 19 It is shown Figure 16 A schematic cross-sectional view of the arrangement of light-emitting elements and the first pattern in the sub-pixels;

[0045] Figure 20 and Figure 21 This is a schematic cross-sectional view illustrating the process of manufacturing a display device according to an embodiment of the present disclosure;

[0046] Figures 22 to 24 This is a schematic partial cross-sectional view of a display device according to other embodiments of the present disclosure;

[0047] Figure 25 and Figure 26 This is a schematic partial cross-sectional view of a display device according to other embodiments of the present disclosure;

[0048] Figure 27 This is a schematic partial cross-sectional view of a display device according to another embodiment of the present disclosure;

[0049] Figure 28 yes Figure 27 A schematic plan view of the sub-pixels of a display device;

[0050] Figure 29 This is a schematic plan view of a sub-pixel of a display device according to another embodiment of the present disclosure;

[0051] Figure 30 It is along Figure 29 A schematic cross-sectional view taken from line QB-QB';

[0052] Figure 31This is a schematic plan view of a sub-pixel of a display device according to another embodiment of the present disclosure;

[0053] Figure 32 It is along Figure 31 Schematic cross-sectional views of lines QC-QC', QD-QD', and QE-QE';

[0054] Figure 33 This is a schematic plan view of a sub-pixel of a display device according to another embodiment of the present disclosure;

[0055] Figure 34 This is a schematic plan view of a sub-pixel of a display device according to another embodiment of the present disclosure; and

[0056] Figure 35 It is along Figure 34 A schematic cross-sectional view taken by line QX-QX'. Detailed Implementation

[0057] The invention will now be described more fully below with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. However, the invention may be embodied in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

[0058] It will also be understood that when a layer is referred to as being "on" another layer or substrate, the layer may be directly on said other layer or substrate, or one or more intermediate layers may be present. Throughout the specification, the same reference numerals denote the same components.

[0059] It will be understood that although the terms "first," "second," etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, the first element discussed below may be referred to as the second element without departing from the teachings of the invention. Similarly, the second element may also be referred to as the first element.

[0060] Unless otherwise specified or implied herein, all terms used (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will also be understood that terms (such as those defined in common dictionaries) shall be interpreted as having a meaning consistent with their meaning in the context of the relevant field, and shall not be interpreted in an idealized or overly formal sense unless clearly defined in the specification.

[0061] In the following description, embodiments will be illustrated with reference to the accompanying drawings.

[0062] Figure 1 This is a schematic plan view of a display device according to an embodiment of the present disclosure.

[0063] As used herein, the terms “above,” “top,” and “on” refer to an upward direction from the display device 10 (i.e., one direction from the third direction DR3), and as used herein, the terms “below,” “bottom,” and “below” refer to a downward direction from the display device 10 (i.e., another direction from the third direction DR3). As used herein, the terms “left,” “right,” “up,” and “down” refer to their respective directions as viewed from above the display device 10. For example, the terms “left,” “right,” “up,” and “down” refer to one direction of the first direction DR1, another direction of the first direction DR1, one direction of the second direction DR2, and another direction of the second direction DR2, respectively.

[0064] Reference Figure 1 The display device 10 displays moving or still images. The display device 10 can refer to virtually any type of electronic device including a display screen. Examples of the display device 10 may include televisions (TVs), laptop computers, monitors, billboards, Internet of Things (IoT) devices, mobile phones, smartphones, tablet PCs, electronic watches, smartwatches, watch phones, head-mounted displays, mobile communication terminals, electronic notebooks, e-books, portable multimedia players (PMPs), navigation devices, game consoles, digital cameras, and camcorders.

[0065] Display device 10 may include a display panel comprising a display screen. Examples of display panels include inorganic light-emitting diode (ILED) display panels, organic LED (OLED) display panels, quantum dot light-emitting diode (QLED) display panels, plasma display panels (PDP), and field emission display (FED) panels. The display panel of display device 10 will be described hereinafter as an ILED display panel, but this disclosure is not limited thereto.

[0066] The shape of the display device 10 can vary. For example, the display device 10 can have a rectangular shape that extends longer in the horizontal direction than in the vertical direction, a rectangular shape that extends longer in the vertical direction than in the horizontal direction, a square shape, a rectangular shape with rounded (rounded) corners, another polygonal shape, or a circular shape. The display area DPA of the display device 10 can have a shape similar to that of the display device 10. Figure 1 The display device 10 and the display area DPA are shown to have a rectangular shape that extends longer in the horizontal direction than in the vertical direction.

[0067] The display device 10 may include a display area DPA and a non-display area NDA. The display area DPA is the area where an image is displayed, and the non-display area NDA is the area where no image is displayed. The display area DPA may also be referred to as the active area, and the non-display area NDA may also be referred to as the inactive area. The display area DPA may occupy approximately the middle portion of the display device 10.

[0068] The display area DPA may include pixels PX. Pixels PX may be arranged in both row and column directions. Pixels PX may have a rectangular or square shape in a planar view, but this disclosure is not limited thereto. As another example, pixels PX may have an oblique rhomboid shape relative to a first direction DR1 or a second direction DR2. As another example, pixels PX may be arranged in a striped pattern or... Arrangement. Each pixel PX may include one or more light-emitting elements 30 that emit light within a predetermined wavelength range (see...). Figure 2 ( ), to emit light of a predetermined color.

[0069] The non-display area NDA can be disposed on the periphery of the display area DPA. The non-display area NDA can surround the entire display area DPA or a portion of the display area DPA. The display area DPA can have a rectangular shape, and the non-display area NDA can be disposed adjacent to the four sides of the display area DPA. The non-display area NDA can form the bezel of the display device 10. Wiring or circuit drivers included in the display device 10 can be disposed in the non-display area NDA, or external devices can be installed in the non-display area NDA.

[0070] Figure 2 yes Figure 1 A schematic plan view of the pixels of a display device.

[0071] Reference Figure 2 A pixel PX may include sub-pixels PXn (where n is an integer from 1 to 3). For example, a pixel PX may include a first sub-pixel PX1, a second sub-pixel PX2, and a third sub-pixel PX3. The first sub-pixel PX1 may emit light of a first color, the second sub-pixel PX2 may emit light of a second color, and the third sub-pixel PX3 may emit light of a third color. The first, second, and third colors may be blue, green, and red, respectively, but this disclosure is not limited thereto. As another example, sub-pixels PXn may emit light of the same color. Figure 2 The illustration shows that pixel PX comprises three sub-pixels PXn, but this disclosure is not limited thereto. As another example, pixel PX may include more than three sub-pixels PXn.

[0072] Each of the sub-pixels PXn may include an emitting region EMA and a non-emitting region. The emitting region EMA may be a region in which one or more light-emitting elements 30 are disposed to emit light of a specific wavelength range, and the non-emitting region may be a region in which light emitted from the light-emitting elements 30 does not extend to it and therefore no light is emitted from it. The emitting region EMA may include a region in which the light-emitting elements 30 are disposed and a region from which light emitted from the light-emitting elements 30 is output.

[0073] However, this disclosure is not limited thereto. The emission region EMA may also include a region in which light emitted from the light-emitting element 30 is reflected or refracted by another element. The light-emitting element 30 may be disposed in the sub-pixel PXn, and the emission region EMA, including the region where the light-emitting element 30 is disposed and the region adjacent to the region where the light-emitting element 30 is disposed, may be formed.

[0074] Each of the sub-pixels PXn may include a cut region CBA disposed in a non-emitting region. The cut region CBA may be disposed on one side of the emitting region EMA in the second direction DR2. The cut region CBA may be disposed in the second direction DR2 between the emitting regions EMA of a pair of adjacent sub-pixels PXn. In the display area DPA of the display device 10, emitting regions EMA and cut regions CBA may be arranged. For example, emitting regions EMA and cut regions CBA may be arranged one after another in the first direction DR1, and emitting regions EMA and cut regions CBA may be arranged alternately in the second direction DR2. The distance between cut regions CBA in the first direction DR1 may be less than the distance between emitting regions EMA in the first direction DR1. A second bank 45 may be disposed between the cut regions CBA and the emitting regions EMA, and the distance between the cut regions CBA and the emitting regions EMA may be determined by the width of the second bank 45. No light-emitting element 30 is disposed in the cut area CBA, so that no light is emitted from the cut area CBA, but the portions of electrodes 21 and 22 disposed in each of the sub-pixels PXn can be disposed separately from each other in the corresponding cut area CBA.

[0075] Figure 3 It is along Figure 2 A schematic cross-sectional view taken from lines Q1-Q1', Q2-Q2', and Q3-Q3'. Figure 4 It is along Figure 2 A schematic cross-sectional view taken from line Q4-Q4'. Figure 5 It is along Figure 2 A schematic cross-sectional view taken along line Q5-Q5'. Specifically, Figure 3 It shows Figure 2 A schematic cross-sectional view of the first sub-pixel PX1, but Figure 3The structure of the first sub-pixel PX1 shown can be directly applied to other pixels PX or other sub-pixels PXn. Figure 3 A schematic cross-sectional view of the first light-emitting element 30A and the second light-emitting element 30B of the first sub-pixel PX1, taken along the first direction DR1, is shown. Figure 4 A schematic cross-sectional view of the first pattern 70 of the first sub-pixel PX1, on which no light-emitting element 30 is disposed, is shown. Figure 5 A schematic cross-sectional view of a first pattern 70 on which a light-emitting element 30 is disposed is shown for the first sub-pixel PX1.

[0076] Reference Figures 3 to 5 And further refer to Figure 2 The display device 10 may include a first substrate 11 and a semiconductor layer, a conductive layer and an insulating layer disposed on the first substrate 11.

[0077] The first substrate 11 may be an insulating substrate. The first substrate 11 may be formed of an insulating material such as glass, quartz, or polymer resin. Alternatively, the first substrate 11 may be a rigid substrate, but may be a flexible substrate that is bendable, foldable, or rollable.

[0078] A light-blocking layer BML may be disposed on the first substrate 11. The light-blocking layer BML is configured to be stacked with the active layer ACT of the first transistor TR1. The light-blocking layer BML may include a material capable of blocking light and can prevent light from incident on the active layer ACT of the first transistor TR1. For example, the light-blocking layer BML may be formed of an opaque metal capable of blocking light transmission, but this disclosure is not limited thereto. In some embodiments, the light-blocking layer BML may not be disposed.

[0079] Buffer layer 12 can be disposed on the entire surface of the first substrate 11 and the light-blocking layer BML. Buffer layer 12 can be formed on the first substrate 11 to protect the moisture-sensitive first transistor TR1 from moisture that may penetrate the first substrate 11 and can perform surface planarization functions. Buffer layer 12 may include alternately stacked inorganic layers. For example, buffer layer 12 can be formed as a multilayer film, wherein the alternately stacked layers include silicon oxide (SiO2). x ), silicon nitride (SiN) x An inorganic layer of at least one of silicon oxynitride (SiON).

[0080] A semiconductor layer is disposed on the buffer layer 12. The semiconductor layer may include the active layer ACT of the first transistor TR1. The semiconductor layer may be configured to partially overlap with the gate electrode GE in the first gate conductive layer.

[0081] Figure 3Only the first transistor TR1 of the first sub-pixel PX1 is shown, but the number of transistors included in the first sub-pixel PX1 is not specifically limited. The first sub-pixel PX1 may include more than one transistor. For example, the first sub-pixel PX1 may include more than one transistor containing the first transistor TR1, such as two or three transistors.

[0082] The semiconductor layer may include polycrystalline silicon, monocrystalline silicon, or oxide semiconductors. When the semiconductor layer includes an oxide semiconductor, the active layer ACT may include conductor regions ACT_a and ACT_b and a channel region ACT_c between conductor regions ACT_a and ACT_b. The oxide semiconductor may be an oxide semiconductor including indium (In). In some embodiments, the oxide semiconductor may be indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium oxide (IGO), indium zinc tin oxide (IZTO), indium gallium tin oxide (IGTO), indium gallium zinc oxide (IGZO), or indium gallium zinc tin oxide (IGZTO), but this disclosure is not limited thereto.

[0083] As another example, the semiconductor layer may include polycrystalline silicon formed by crystallizing amorphous silicon. In this case, the conductor regions ACT_a and ACT_b of the active layer ACT may be regions doped with impurities.

[0084] A first gate insulating layer 13 is disposed on the semiconductor layer and the buffer layer 12. The first gate insulating layer 13 may include the semiconductor layer and may be disposed on the buffer layer 12. The first gate insulating layer 13 may serve as the gate insulating film for each of the transistors. The first gate insulating layer 13 may be formed comprising an inorganic material (such as SiO₂). x SiN x The inorganic layer (or SiON as an example) or formed as SiO x SiN x And / or SiON stacks.

[0085] A first gate conductive layer is disposed on a first gate insulating layer 13. The first gate conductive layer may include the gate electrode GE of a first transistor TR1 and a first capacitor electrode CSE of a storage capacitor. The gate electrode GE may be configured in the thickness direction to be stacked with the channel region ACT_c of the active layer ACT. The first capacitor electrode CSE may be configured in the thickness direction to be stacked with the second source / drain electrode SD2 of the first transistor TR1. In some embodiments, the first capacitor electrode CSE may be connected to the gate electrode GE and integrated with the gate electrode GE into a single layer, and the single layer may partially include the gate electrode GE and the first capacitor electrode CSE. The first capacitor electrode CSE may be configured in the thickness direction to be stacked with the first source / drain electrode SD1, such that a storage capacitor may be formed between the first capacitor electrode CSE and the first source / drain electrode SD1.

[0086] The first gate conductive layer may be formed as a single layer or multiple layers of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu) or alloys thereof, but this disclosure is not limited thereto.

[0087] A first passivation layer 15 is disposed on the first gate conductive layer. The first passivation layer 15 may cover the first gate conductive layer or be stacked with the first gate conductive layer to protect the first gate conductive layer. The first passivation layer 15 may be formed comprising an inorganic material (such as SiO2). x SiN x The inorganic layer (or SiON as an example) or formed as SiO x SiN x And / or SiON stacks.

[0088] A first data conductive layer is disposed on the first passivation layer 15. The first data conductive layer may include a first source / drain electrode SD1, a second source / drain electrode SD2, and a data line DTL.

[0089] The source / drain electrodes SD1 and SD2 of the first transistor TR1 can be electrically contacted with the conductor regions ACT_a and ACT_b of the active layer ACT via contact holes penetrating the first passivation layer 15 and the first gate insulating layer 13. The second source / drain electrode SD2 of the first transistor TR1 can be electrically connected to the light-blocking layer BML via another contact hole.

[0090] The data line DTL can apply data signals to other transistors (not shown) of the first sub-pixel PX1. Although not specifically shown, the data line DTL can be electrically connected to the source / drain electrodes of other transistors and can transmit data signals to the source / drain electrodes of other transistors.

[0091] The first data conductive layer may be formed as a single-layer film or a multilayer film including Mo, Al, Cr, Au, Ti, Ni, Nd, Cu or alloys thereof, but this disclosure is not limited thereto.

[0092] A first interlayer insulating layer 17 is disposed on the first data conductive layer. The first interlayer insulating layer 17 can serve as an insulating film between the first data conductive layer and the layers disposed on the first data conductive layer. Alternatively, the first interlayer insulating layer 17 can cover the first data conductive layer or be stacked with the first data conductive layer to protect it. The first interlayer insulating layer 17 can be formed to include inorganic materials (such as SiO₂). x SiN x The inorganic layer (or SiON as an example) or formed as SiO x SiN x And / or SiON stacks.

[0093] A second data conductive layer is disposed on the first interlayer insulating layer 17. The second data conductive layer may include a first voltage line VL1, a second voltage line VL2, and a first conductive pattern CDP. A high potential voltage (or a first power supply voltage) supplied to the first transistor TR1 may be applied to the first voltage line VL1, and a low potential voltage (or a second power supply voltage) supplied to the second electrode 22 may be applied to the second voltage line VL2. During the manufacture of the display device 10, a light-emitting element alignment signal for aligning the light-emitting element 30 may also be applied to the second voltage line VL2.

[0094] The first conductive pattern CDP can be electrically connected to the second source / drain electrode SD2 of the first transistor TR1 via a contact hole formed in the first interlayer insulating layer 17. The first conductive pattern CDP can be electrically contacted with the first electrode 21, which will be described below. The first transistor TR1 can transmit a first power supply voltage applied from the first voltage line VL1 to the first electrode 21 via the first conductive pattern CDP. The second data conductive layer is shown as including a first voltage line VL1 and a second voltage line VL2, but this disclosure is not limited thereto. As another example, the second data conductive layer may include more than one first voltage line VL1 and more than one second voltage line VL2.

[0095] The second data conductive layer may be formed as a single-layer film or a multilayer film including Mo, Al, Cr, Au, Ti, Ni, Nd, Cu or alloys thereof, but this disclosure is not limited thereto.

[0096] A first planarization layer 19 is disposed on the second data conductive layer. The first planarization layer 19 may include an organic insulating material (such as polyimide (PI) as an example) and may perform surface planarization functions.

[0097] The first dam 40, the first pattern 70, electrodes 21 and 22, the light-emitting element 30, the second dam 45, and contact electrodes 26 and 27 can be disposed on the first planarization layer 19. Insulating layers 51, 52, 53, and 54 can be further disposed on the first planarization layer 19.

[0098] The first dam 40 can be directly disposed on the first planarization layer 19. The first dam 40 can extend within the first sub-pixel PX1 along the second direction DR2, but may not extend into the adjacent sub-pixels PXn of the first sub-pixel PX1 along the second direction DR2, and can be disposed within the emission region EMA of the first sub-pixel PX1. The first dams 40 can be spaced apart from each other along the first direction DR1, and can form an area where the light-emitting element 30 is to be disposed. The first dam 40 can be disposed in each sub-pixel PXn to form a linear pattern in the display region DPA of the display device 10. Two first dams 40 are shown disposed in the first sub-pixel PX1, but this disclosure is not limited thereto. Depending on the number of electrodes 21 and 22 described below, more than two first dams 40 can be disposed in the first sub-pixel PX1.

[0099] The first dam 40 may at least partially protrude from the top surface of the first planarization layer 19. The protruding portion of the first dam 40 may have sloping side surfaces, and light emitted from the light-emitting element 30 may travel toward the sloping side surfaces. Electrodes 21 and 22 disposed on the first dam 40 may comprise a material with high reflectivity, and light emitted from the light-emitting element 30 may be reflected to be emitted in a direction upward from the first planarization layer 19. For example, the first dam 40 may not only provide an area in which the light-emitting element 30 is disposed, but may also serve as a reflective barrier capable of reflecting light emitted from the light-emitting element 30 in a direction upward from the first planarization layer 19. The side surfaces of the first dam 40 may be linearly sloping, but this disclosure is not limited thereto. As another example, the first dam 40 may have a semi-circular or elliptical shape with a curved outer surface. The first dam 40 may comprise an organic insulating material (such as PI), but this disclosure is not limited thereto.

[0100] The display device 10 may include a first pattern 70 disposed between the first dikes 40. The first pattern 70 may have a width smaller than the width of the first dikes 40, and may be spaced apart from each other in a second direction DR2 between the first dikes 40. The width of the first pattern 70 may be smaller than the distance between the first dikes 40, and the first pattern 70 may be spaced apart from the first dikes 40. In some embodiments, the first pattern 70 and the first dikes 40 may comprise the same material and may be formed simultaneously.

[0101] As mentioned above, the first dam 40 can form an area where the light-emitting elements 30 are to be disposed. During the manufacture of the display device 10, ink with the light-emitting elements 30 dispersed therein can be sprayed onto electrodes 21 and 22, and the light-emitting elements 30 can be arranged on electrodes 21 and 22 by the electric field generated between electrodes 21 and 22. Here, the first dam 40 can protrude from the top surface of the first planarization layer 19 to define the area between the first dams 40 and the area on the outside of the first dams 40, and the light-emitting elements 30 can be guided to be placed between the first dams 40. Similarly, the first pattern 70 disposed between the first dams 40 can create a height difference in the area between the first dams 40 where the light-emitting elements 30 are disposed. Therefore, the area where the first pattern 70 is disposed can be distinguished from the area between the first patterns 70 spaced apart from each other in the second direction DR2, and the light-emitting elements 30 can be guided to be placed between the first patterns 70. As a result, the light-emitting elements 30 can be densely arranged in a specific area between the first dams 40, and the two ends of each of the light-emitting elements 30 can be appropriately arranged on electrodes 21 and 22. The first pattern 70 will be described in detail below.

[0102] Electrodes 21 and 22 are disposed on the first embankment 40 and the first planarization layer 19. Electrodes 21 and 22 may include a first electrode 21 and a second electrode 22. The first electrode 21 and the second electrode 22 may extend in a second direction DR2 and may be spaced apart from each other in a first direction DR1.

[0103] The first electrode 21 and the second electrode 22 may extend in each sub-pixel PXn along the second direction DR2 and may be separated from other electrodes 21 and 22 by the cutting region CBA of the corresponding sub-pixel PXn. In some embodiments, the cutting region CBA may be disposed in the second direction DR2 between the emission regions EMA of two adjacent sub-pixels PXn, and the first electrode 21 and the second electrode 22 of one of the two adjacent sub-pixels PXn may be separated from the first electrode 21 and the second electrode 22 of the other sub-pixel PXn, but this disclosure is not limited thereto. As another example, some electrodes 21 and 22 may not be segmented between sub-pixels PXn, but may extend in the second direction DR2 across the boundary between each pair of adjacent sub-pixels PXn, or only one of the first electrode 21 and the second electrode 22 may be segmented between sub-pixels PXn.

[0104] The first electrode 21 can be electrically connected to the first transistor TR1 via the first contact hole CT1, and the second electrode 22 can be electrically connected to the second voltage line VL2 via the second contact hole CT2. For example, the first electrode 21 can be electrically contacted with the first conductive pattern CDP via the first contact hole CT1, which penetrates the first planarization layer 19 in the region where the second dike 45 extends in the first direction DR1, and the second electrode 22 can be electrically contacted with the second voltage line VL2 via the second contact hole CT2, which also penetrates the first planarization layer 19 in the region where the second dike 45 extends in the first direction DR1. However, this disclosure is not limited to this example. In another example, the first contact hole CT1 and the second contact hole CT2 can be disposed in the emitter region EMA surrounded by the second dike 45, without overlapping with the second dike 45.

[0105] A first electrode 21 and a second electrode 22 are shown as being disposed in each sub-pixel PXn, but this disclosure is not limited thereto. More than one first electrode 21 and more than one second electrode 22 may be disposed in each sub-pixel PXn. Furthermore, in each sub-pixel PXn, the first electrode 21 and the second electrode 22 do not necessarily extend in one direction, but can be arranged in various other ways. For example, the first electrode 21 and the second electrode 22 may be partially bent or folded, or one of the first electrode 21 and the second electrode 22 may be configured to surround the other electrode.

[0106] The first electrode 21 and the second electrode 22 may be disposed on their respective first dams 40. In some embodiments, the first electrode 21 and the second electrode 22 may be formed to have a width greater than the width of the first dam 40. For example, the first electrode 21 and the second electrode 22 may be formed to cover the outer surface of their respective first dams 40. The first electrode 21 and the second electrode 22 may be disposed on the side surfaces of their respective first dams 40, and the distance between the first electrode 21 and the second electrode 22 may be less than the distance between the first dams 40. The first electrode 21 and the second electrode 22 may be disposed at least partially directly on the first planarization layer 19, and therefore may be on the same plane.

[0107] Electrodes 21 and 22 may comprise conductive materials with high reflectivity. For example, electrodes 21 and 22 may comprise metals with high reflectivity (such as Ag, Cu, or Al), or alloys of Al, Ni, or La. Electrodes 21 and 22 may reflect light emitted from the light-emitting element 30 to travel toward the side of the first embankment 40 in a direction upward from each sub-pixel PXn.

[0108] However, this disclosure is not limited thereto, and electrodes 21 and 22 may also comprise transparent conductive materials. For example, electrodes 21 and 22 may comprise materials such as ITO, IZO, or ITZO. In some embodiments, each of electrodes 21 and 22 may be formed into a structure in which the transparent conductive material and a metal with high reflectivity are stacked in more than one layer, or may be formed into a single layer comprising the transparent conductive material and a metal with high reflectivity. For example, each of electrodes 21 and 22 may have a stack of ITO / Ag / ITO, ITO, ITO / Ag / IZO, or ITO / Ag / ITZO / IZO.

[0109] Electrodes 21 and 22 may be electrically connected to the light-emitting element 30, and a predetermined voltage may be applied to each of electrodes 21 and 22, such that the light-emitting element 30 may emit light. For example, electrodes 21 and 22 may be electrically connected to the light-emitting element 30 via contact electrodes 26 and 27, which will be described below, and electrical signals applied thereto may be transmitted to the light-emitting element 30 via contact electrodes 26 and 27.

[0110] One of the first electrode 21 and the second electrode 22 may be electrically connected to the anode electrode of the light-emitting element 30, and the other electrode of the first electrode 21 and the second electrode 22 may be electrically connected to the cathode electrode of the light-emitting element 30. However, this disclosure is not limited thereto. As another example, one of the first electrode 21 and the second electrode 22 may be electrically connected to the cathode electrode of the light-emitting element 30, and the other electrode of the first electrode 21 and the second electrode 22 may be electrically connected to the anode electrode of the light-emitting element 30.

[0111] Electrodes 21 and 22 can be used to generate an electric field in each sub-pixel PXn to align the light-emitting element 30. The light-emitting element 30 can be arranged between the first electrode 21 and the second electrode 22 by means of an electric field formed between the first electrode 21 and the second electrode 22. The light-emitting element 30 can be jetted onto the electrodes 21 and 22 via inkjet printing. If ink including the light-emitting element 30 is jetted onto the electrodes 21 and 22, an alignment signal can be applied to the electrodes 21 and 22 to generate an electric field. The light-emitting element 30 dispersed in the ink can receive a dielectric force from the electric field generated between the electrodes 21 and 22, and thus can be properly aligned on the electrodes 21 and 22.

[0112] A first insulating layer 51 is disposed on the first planarization layer 19. The first insulating layer 51 may be configured to cover the first embankment 40, the first electrode 21, the second electrode 22, and the first pattern 70 on the first planarization layer 19, but expose portions of the top surfaces of the first electrode 21 and the second electrode 22. In other words, the first insulating layer 51 may be formed substantially on the entire surface of the first planarization layer 19 and may include openings (not shown) exposing portions of the first electrode 21 and the second electrode 22.

[0113] For example, a portion of the top surface of the first insulating layer 51 may be recessed between the first electrode 21 and the second electrode 22 to create a height difference. When the first insulating layer 51 is configured to cover the first pattern 70 between the first embankments 40, the height difference can be generated in the portion of the top surface of the first insulating layer 51 along the direction in which the first pattern 70 is arranged (i.e., along the second direction DR2). Since the first insulating layer 51 is configured to cover the first electrode 21 and the second electrode 22, a height difference can be generated even in areas where the first pattern 70 is not provided, even in the portion of the top surface of the first insulating layer 51 between the first electrode 21 and the second electrode 22. However, this disclosure is not limited thereto.

[0114] The first insulating layer 51 protects the first electrode 21 and the second electrode 22, and also insulates the first electrode 21 and the second electrode 22 from each other. Furthermore, the first insulating layer 51 prevents the light-emitting element 30 disposed on the first insulating layer 51 from directly contacting other elements and being damaged by them.

[0115] The second dike 45 may be disposed on the first insulating layer 51. In a plan view, the second dike 45 may include portions extending in the first direction DR1 and portions extending in the second direction DR2, and may be arranged in a grid pattern across the entire surface of the display area DPA. The second dike 45 may be disposed along the boundary of each sub-pixel PXn to define each sub-pixel PXn.

[0116] The second dike 45 can be configured to surround the emission region EMA and the cut region CBA of each sub-pixel PXn, thereby separating the emission region EMA and the cut region CBA of each sub-pixel PXn. The first electrode 21 and the second electrode 22 can extend across the portion of the second dike 45 extending in the first direction DR1 and then in the second direction DR2. The portion of the second dike 45 extending in the second direction DR2 can have a width between the emission regions EMA of each pair of adjacent sub-pixels PXn that is greater than the width between the cut regions CBA of each pair of adjacent sub-pixels PXn. Therefore, the distance between the cut regions CBA can be smaller than the distance between the emission regions EMA.

[0117] The second dike 45 may be formed to have a greater height than the first dike 40. The second dike 45 can prevent ink from overflowing between different sub-pixels PXn during the inkjet printing process during the manufacture of the display device 10. The second dike 45 can separate the ink with the light-emitting elements 30 dispersed therein between the different sub-pixels PXn and can prevent ink mixing. Like the first dike 40, the second dike 45 may include polyimide (PI), but this disclosure is not limited thereto.

[0118] The light-emitting element 30 may be disposed on the first insulating layer 51. The light-emitting element 30 may be spaced apart from each other in the direction in which the electrodes 21 and 22 extend (i.e., in the second direction DR2) and may be aligned substantially parallel to each other. The distance between the light-emitting elements 30 is not specifically limited. The light-emitting element 30 may extend in one direction, and the direction in which the electrodes 21 and 22 extend may form substantially right angles with the direction in which the light-emitting element 30 extends. However, this disclosure is not limited thereto. As another example, the light-emitting element 30 may be arranged diagonally relative to the direction in which the electrodes 21 and 22 extend.

[0119] The light-emitting element 30 may include a light-emitting layer 36 of different materials (see Figure 9 The display device 10 may include light-emitting elements 30 that emit light of different wavelength ranges. Therefore, the first sub-pixel PX1, the second sub-pixel PX2, and the third sub-pixel PX3 may emit light of a first color, a second color, and a third color, respectively, but this disclosure is not limited thereto. As another example, sub-pixel PXn may include the same type of light-emitting element 30 and may emit light of substantially the same color.

[0120] The light-emitting elements 30 can be arranged between the first electrodes 40 such that both ends of the light-emitting elements 30 can be placed on electrodes 21 and 22. For example, the first end of the light-emitting element 30 can be disposed on the first electrode 21, and the second end of the light-emitting element 30 can be disposed on the second electrode 22. The length of the light-emitting element 30 can be greater than the distance between the first electrode 21 and the second electrode 22, and both ends of each of the light-emitting elements 30 can be disposed on the first electrode 21 and the second electrode 22.

[0121] The light-emitting elements 30 may be disposed between or on the first patterns 70. For example, the light-emitting elements 30 may include a first light-emitting element 30A disposed in an area where the first pattern 70 is not disposed and a second light-emitting element 30B disposed on the first pattern 70. The first insulating layer 51 may be disposed between the first embankments 40 and between the first electrode 21 and the second electrode 22 to cover the first pattern 70. The light-emitting elements 30 disposed on the first insulating layer 51 may be disposed on a portion of the first insulating layer 51 at a relatively low position between the first patterns 70, and at least some of the light-emitting elements 30 may be configured to overlap with the first pattern 70 in the thickness direction. Figure 3 A schematic cross-sectional view of one of the first light-emitting elements 30A, taken from one end to the other, is shown. Figure 5 A schematic cross-sectional view of one of the second light-emitting elements 30B, taken from one end to the other, is shown. For example, a first pattern 70 may be disposed between the first embankments 40 to create a height difference in the first insulating layer 51, and the light-emitting elements 30 may include a first light-emitting element 30A located at a relatively low position and a second light-emitting element 30B located at a relatively high position. Although the first pattern 70 is disposed, most of the light-emitting elements 30 may be the first light-emitting elements 30A located at a relatively low position. The first light-emitting element 30A may be a light-emitting element 30 guided by the height difference created by the first pattern 70 so that its two ends are positioned on electrodes 21 and 22. Some of the light-emitting elements 30 (e.g., the second light-emitting elements 30B) may be located at a relatively high position (e.g., on the first pattern 70) and may be electrically connected to the first electrode 21 and the second electrode 22.

[0122] However, this disclosure is not limited thereto. As another example, depending on the arrangement and shape of the first pattern 70, the light-emitting element 30 may not be arranged on the first pattern 70, and this will be described below.

[0123] In each of the light-emitting elements 30, a layer may be disposed in a direction perpendicular to the top surface of the first substrate 11 or the first planarization layer 19. The light-emitting elements 30 may be arranged such that the light-emitting element 30 extends parallel to the first planarization layer 19, and the semiconductor layers included in each of the light-emitting elements 30 may be sequentially disposed in a direction parallel to the top surface of the first planarization layer 19. However, this disclosure is not limited thereto. As another example, the semiconductor layers included in each of the light-emitting elements 30 may be disposed in a direction perpendicular to the first planarization layer 19.

[0124] Each of the light-emitting elements 30 can make electrical contact with contact electrodes 26 and 27 at both ends. For example, insulating film 38 (see...) Figure 9The insulating film 38 may not be formed at the ends of each of the light-emitting elements 30, such that some of the semiconductor layers included in each of the light-emitting elements 30 can be exposed and thus can be electrically contacted with the contact electrodes 26 and 27, but this disclosure is not limited thereto. As another example, the insulating film 38 may be removed from at least a portion of the light-emitting element 30, such that the sidewalls of the semiconductor layer of each of the light-emitting elements 30 can be partially exposed at both ends of each of the light-emitting elements 30, and thus can be in direct contact with the contact electrodes 26 and 27.

[0125] The second insulating layer 52 may be disposed on a portion of the light-emitting element 30. For example, the second insulating layer 52 may be disposed around a portion of the outer surface of the light-emitting element 30, but not covering both ends of each of the light-emitting elements 30. Contact electrodes 26 and 27 may make electrical contact with the ends of each of the light-emitting elements 30 that are not covered by the second insulating layer 52. In a plan view, the portion of the second insulating layer 52 on the light-emitting element 30 may be disposed on the first insulating layer 51 and extend in the second direction DR2, thus forming a linear pattern or island pattern in the first sub-pixel PX1. The second insulating layer 52 may protect and fix the light-emitting element 30 during the manufacture of the display device 10.

[0126] Contact electrodes 26 and 27 and the third insulating layer 53 can be disposed on the second insulating layer 52.

[0127] Contact electrodes 26 and 27 can extend in one direction. The first contact electrode 26 and the second contact electrode 27 can be respectively disposed on portions of the first electrode 21 and the second electrode 22. The first contact electrode 26 can be disposed on the first electrode 21, and the second contact electrode 27 can be disposed on the second electrode 22, and the first contact electrode 26 and the second contact electrode 27 can extend in a second direction DR2. The first contact electrode 26 and the second contact electrode 27 can be spaced apart from each other and face each other in the first direction DR1, and can form a stripe pattern in the emission region EMA of the first sub-pixel PX1.

[0128] In some embodiments, the widths of the first contact electrode 26 and the second contact electrode 27 may be the same as or smaller than the widths of the first electrode 21 and the second electrode 22. The first contact electrode 26 and the second contact electrode 27 may be configured to make electrical contact with both ends of each of the light-emitting elements 30 and cover portions of the top surfaces of the first electrode 21 and the second electrode 22.

[0129] Contact electrodes 26 and 27 can make electrical contact with the light-emitting element 30 and electrodes 21 and 22. The semiconductor layer included in each of the light-emitting elements 30 can be exposed at both ends of each of the light-emitting elements 30, and the first contact electrode 26 and the second contact electrode 27 can make electrical contact with the light-emitting element 30 at the exposed ends of the semiconductor layer of each of the light-emitting elements 30. A first end of the light-emitting element 30 can be electrically connected to the first electrode 21 via the first contact electrode 26, and a second end of the light-emitting element 30 can be electrically connected to the second electrode 22 via the second contact electrode 27.

[0130] A first contact electrode 26 and a second contact electrode 27 are shown disposed in the first sub-pixel PX1, but this disclosure is not limited thereto. The number of the first contact electrode 26 and the second contact electrode 27 may vary depending on the number of the first electrode 21 and the second electrode 22 disposed in the first sub-pixel PX1.

[0131] A third insulating layer 53 is disposed on the first contact electrode 26. The third insulating layer 53 can electrically insulate the first contact electrode 26 and the second contact electrode 27 from each other. The third insulating layer 53 can be configured to cover the first contact electrode 26, but it can be omitted from the second end of the light-emitting element 30, allowing the light-emitting element 30 to make electrical contact with the second contact electrode 27. The third insulating layer 53 can partially contact the first contact electrode 26 and the second contact electrode 27 on the top surface of the second insulating layer 52. The side surface of the third insulating layer 53 adjacent to or where the second electrode 22 is disposed can be aligned with the corresponding side surface of the second insulating layer 52. The third insulating layer 53 can also be disposed in the non-emitting region of the first sub-pixel PX1, for example, on the first planarization layer 19 and on the first insulating layer 51, but this disclosure is not limited thereto.

[0132] The second contact electrode 27 is disposed on the second electrode 22, the second insulating layer 52, and the third insulating layer 53. The second contact electrode 27 can make electrical contact with the second end of the light-emitting element 30 and the exposed portion of the top surface of the second electrode 22. The second end of the light-emitting element 30 can be electrically connected to the second electrode 22 via the second contact electrode 27.

[0133] The second contact electrode 27 may partially contact the second insulating layer 52, the third insulating layer 53, the second electrode 22, and the light-emitting element 30. The first contact electrode 26 and the second contact electrode 27 may not contact the second insulating layer 52 and the third insulating layer 53, but this disclosure is not limited thereto. In some embodiments, the third insulating layer 53 may not be provided.

[0134] Contact electrodes 26 and 27 may comprise conductive materials. Contact electrodes 26 and 27 may comprise ITO, IZO, ITZO, or Al. For example, contact electrodes 26 and 27 may comprise transparent conductive materials, and light emitted from the light-emitting element 30 may travel through contact electrodes 26 and 27. However, this disclosure is not limited thereto.

[0135] The fourth insulating layer 54 can be disposed on the entire surface of the first substrate 11. The fourth insulating layer 54 can protect the components disposed on the first substrate 11 from the influence of the external environment.

[0136] The first insulating layer 51, the second insulating layer 52, the third insulating layer 53, and the fourth insulating layer 54 may comprise inorganic or organic insulating materials. For example, the first insulating layer 51, the second insulating layer 52, the third insulating layer 53, and the fourth insulating layer 54 may comprise inorganic insulating materials (such as SiO2). x SiN x Silicon oxynitride (SiO) x N y (e.g., aluminum oxide (Al2O3) or aluminum nitride (AlN)). In another example, the first insulating layer 51, the second insulating layer 52, the third insulating layer 53, and the fourth insulating layer 54 may comprise organic insulating materials (such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene resin, polyphenylene sulfide resin, benzocyclobutene, cardo resin, siloxane resin, silsesquioxane resin, polymethyl methacrylate, polycarbonate, or polymethyl methacrylate-polycarbonate synthetic resin). However, this disclosure is not limited to these examples.

[0137] Figure 6 yes Figure 4 An enlarged schematic cross-sectional view of part of the QA section. Figure 7 It is along Figure 2 A schematic cross-sectional view taken along line Q6-Q6'. Specifically, Figure 6 It shows that it is set with Figure 4 An enlarged schematic cross-sectional view of a portion of the first pattern 70, and Figure 7 A schematic cross-sectional view is shown of a light-emitting element 30 arranged together with a first pattern 70 in a second direction DR2 between the first dikes 40.

[0138] Reference Figure 6 and Figure 7 And further refer to Figures 3 to 5The first pattern 70 can be arranged between the first dikes 40 to be spaced apart from each other in the second direction DR2. The first insulating layer 51 covering the first pattern 70 is configured to conform to the height difference created by the first pattern 70 arranged below the first insulating layer 51 between the first dikes 40. During the manufacture of the display device 10, ink including the light-emitting element 30 can be sprayed into the first sub-pixel PX1 after the first insulating layer 51 and the second dike 45 are formed. The light-emitting element 30 can be sprayed onto the electrodes 21 and 22 while dispersed in the ink, and the light-emitting element 30 can be arranged such that its two ends can be placed on the electrodes 21 and 22 when the position and alignment direction of the light-emitting element 30 change due to the electric field formed between the electrodes 21 and 22.

[0139] The light-emitting elements 30 dispersed in the ink can be randomly placed within the emission region EMA surrounded by the second dike 45, or even placed in areas other than those between the first dikes 40. Light-emitting elements 30 placed in areas other than those between the first dikes 40 may not be electrically connected to electrodes 21 and 22, and may be lost during the manufacture of the display device 10. If the loss rate of light-emitting elements 30 is high, the process yield may be reduced because a considerable amount of ink needs to be sprayed to maintain a predetermined number of light-emitting elements 30 in each sub-pixel PXn.

[0140] Because the top surface of the first dam 40 protrudes from the first planarization layer 19, the emitting region EMA can be appropriately defined, and a considerable number of light-emitting elements 30 can be guided to be placed within the space defined by the first dam 40. Similarly, because the top surface of the first pattern 70 rises from the first planarization layer 19, the area between the first dams 40 can be appropriately divided. The first insulating layer 51 can be positioned higher on the first pattern 70 than between the first patterns 70, so that if the position of the light-emitting elements 30 changes due to an electric field, the light-emitting elements 30 dispersed in the ink can be guided into the areas of the first patterns 70 spaced apart from each other. For example, as Figure 6 and Figure 7 As shown, the first insulating layer 51 may be positioned lower between the first patterns 70 than on the first pattern 70, relative to the top surface of the first substrate 11 or the top surface of the first planarization layer 19. Some of the light-emitting elements 30 dispersed in the ink may be directed to be positioned on the portion of the first insulating layer 51 that is located at the relatively lower position.

[0141] Similar to the first dike 40, the first pattern 70 can guide the light-emitting element 30 to a specific location within the emitting area EMA, resulting in a considerable number of light-emitting elements 30 being arranged between the first dikes 40. Therefore, the number of light-emitting elements 30 that may be lost during the manufacture of the display device 10 can be reduced, and the light-emitting elements 30 can be arranged between the first dikes 40 such that their ends can be placed on electrodes 21 and 22. Consequently, any contact defects between the contact electrodes 26 and 27 and the light-emitting elements 30 can be prevented.

[0142] The light-emitting element 30 may include a first light-emitting element 30A configured in the thickness direction not to overlap with the first pattern 70, and the first light-emitting element 30A may be arranged such that its two ends can be placed on the first electrode 21 and the second electrode 22. The first light-emitting element 30A may be aligned such that its two ends can be placed at desired positions. However, even if the light-emitting element 30 is disposed on the first pattern 70, the light-emitting element 30 may still be electrically connected to the electrodes 21 and 22, provided that the two ends of the light-emitting element 30 can properly make electrical contact with the contact electrodes 26 and 27.

[0143] The light-emitting element 30 may further include a second light-emitting element 30B disposed in the thickness direction and superimposed on the first pattern 70. Most of the light-emitting elements 30 (i.e., the first light-emitting element 30A) may not be superimposed on the first pattern 70, but at least some of the light-emitting elements 30 may be disposed on the first pattern 70 to make electrical contact with the contact electrodes 26 and 27. The second light-emitting element 30B may be disposed on the first pattern 70 at a position higher than the first light-emitting element 30A. The first light-emitting element 30A may be located lower than the second light-emitting element 30B relative to the top surface of the first substrate 11 or the top surface of the first planarization layer 19. The height difference between the first light-emitting element 30A and the second light-emitting element 30B may vary depending on the thickness of the first pattern 70.

[0144] The first pattern 70 can be thick enough to guide the light-emitting element 30 between the first dikes 40 by the height difference created by the first insulating layer 51. The thickness DP of the first pattern 70 can be greater than the thickness DE of the electrodes 21 and 22. Due to the presence of electrodes 21 and 22, the first insulating layer 51 can create a height difference between the first dikes 40 relative to the top surface of the first planarization layer 19. The portion of the first insulating layer 51 covering the first electrode 21 and the second electrode 22 can be located at a higher position than the portion of the first insulating layer 51 disposed on the top surface of the first planarization layer 19. Since the thickness DP of the first pattern 70 is greater than the thickness DE of the electrodes 21 and 22, the portion of the first insulating layer 51 disposed on the first pattern 70 can be located at a higher position than the portion of the first insulating layer 51 disposed on the first planarization layer 19 or on the electrodes 21 and 22. The first pattern 70 can create a significant height difference between the first dikes 40, thereby guiding the light-emitting element 30 to be placed in a specific location.

[0145] For example, the width W1 of the first pattern 70 can be less than the distance W3 between the first electrode 21 and the second electrode 22, and the first pattern 70 can be disposed between the first electrode 21 and the second electrode 22. The electrodes 21 and 22 can be configured to be spaced apart from the two side surfaces of each of the first pattern 70, and the height difference generated between the electrodes 21 and 22 can effectively guide the light-emitting element 30 to be placed at a specific position.

[0146] The width W1 of the first pattern 70 can be greater than the width W2 of the second insulating layer 52. The second insulating layer 52 can be configured to surround the outer surface of the light-emitting element 30, thus fixing the light-emitting element 30. The width W2 of the second insulating layer 52 can be less than the length h of the light-emitting element 30 (see...). Figure 9 This allows the two ends of each of the light-emitting elements 30 to be exposed for electrical contact with contact electrodes 26 and 27. The first pattern 70 may have a predetermined width such that even the second light-emitting element 30B can be positioned parallel to the top surface of the first planarization layer 19. If the width W1 of the first pattern 70 is too small, the first insulating layer 51 disposed on the first pattern 70 may not provide sufficient space for the arrangement of the second light-emitting element 30B, and the second light-emitting element 30B may be arranged at an angle. The first pattern 70 may be formed to have a width larger than the width of the second insulating layer 52, and to provide sufficient space for the arrangement of the second light-emitting element 30B thereon.

[0147] However, the width W1 and thickness DP of the first pattern 70 are not specifically limited. As another example, the width W1 of the first pattern 70 can be equal to or greater than the distance W3 between the first electrode 21 and the second electrode 22, and can even be greater than the length h of the light-emitting element 30. The first pattern 70 and the first embankment 40 can be formed simultaneously, or the first pattern 70 can be formed separately after the first embankment 40 is formed. In some embodiments, the first pattern 70 can be integrally formed with the first planarization layer 19 disposed below the first pattern 70.

[0148] The display device 10 may include a first pattern 70 arranged in one direction between the first dikes 40. During the manufacture of the display device 10, most of the light-emitting elements 30 can be guided to be aligned at specific locations, and the number of light-emitting elements 30 that may be lost from each sub-pixel PXn can be minimized.

[0149] Figure 8 This is a schematic partial cross-sectional view of a display device according to another embodiment of the present disclosure. Figure 4 Same, Figure 8 A schematic cross-sectional view of a first pattern 70 on which no light-emitting element 30 is disposed is shown.

[0150] Reference Figure 8 The display device 10 may not include Figure 4 The third insulating layer 53. The second contact electrode 27 can be directly disposed on a portion of the second insulating layer 52, and the first contact electrode 26 and the second contact electrode 27 can be spaced apart from each other on the second insulating layer 52. Even if the display device 10 does not include the third insulating layer 53, the second insulating layer 52 includes an organic insulating material and can fix the light-emitting element 30. The first contact electrode 26 and the second contact electrode 27 can be formed simultaneously by a patterning process. Except for not providing the third insulating layer 53, Figure 8 Implementation examples and Figure 4 The embodiments are almost identical, therefore, their detailed descriptions will be omitted.

[0151] Figure 9 This is a schematic perspective view of a light-emitting element according to an embodiment of the present disclosure.

[0152] Reference Figure 9 The light-emitting element 30 can be a light-emitting diode (LED), specifically an ILED having a size of a few micrometers to a few nanometers and formed of inorganic materials. If an electric field is formed in a specific direction between two opposing electrodes, the ILED can be aligned between the two polarized electrodes. The light-emitting element 30 can be aligned by the electric field formed between the two electrodes.

[0153] The light-emitting element 30 may have a shape extending in one direction. The light-emitting element 30 may have a rod, wiring, or tube shape. For example, the light-emitting element 30 may have a cylindrical or rod shape, but this disclosure is not limited thereto. In another example, the light-emitting element 30 may have a polygonal prism shape such as a regular cube, cuboid, or hexagonal prism, or may have a shape extending in one direction and having a partially inclined outer surface. Semiconductors included in the light-emitting element 30 may be sequentially arranged or stacked along the direction in which the light-emitting element 30 extends.

[0154] The light-emitting element 30 may include a semiconductor layer doped with impurities of any conductivity type (e.g., p-type or n-type). The semiconductor layer can receive electrical signals from an external power source to emit light within a specific wavelength range.

[0155] Reference Figure 9 The light-emitting element 30 may include a first semiconductor layer 31, a second semiconductor layer 32, a light-emitting layer 36, an electrode layer 37, and an insulating film 38.

[0156] The first semiconductor layer 31 may include an n-type semiconductor. For example, when the light-emitting element 30 emits light in the blue wavelength range, the first semiconductor layer 31 may include the semiconductor material Al. x Ga y In 1-x-y N (where 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, and 0 ≤ x + y ≤ 1). For example, semiconductor material Al. x Ga y In 1-x-y N can be at least one of AlGaInN, GaN, AlGaN, InGaN, AlN, and InN doped with an n-type dopant. The first semiconductor layer 31 can be doped with an n-type dopant, and the n-type dopant can be, for example, Si, Ge, or Sn. For example, the first semiconductor layer 31 can be n-GaN doped with n-type Si. The first semiconductor layer 31 can have a length of about 1.5 μm to about 5 μm, but this disclosure is not limited thereto.

[0157] The second semiconductor layer 32 is disposed on the light-emitting layer 36. The second semiconductor layer 32 may include a p-type semiconductor. For example, when the light-emitting element 30 emits light in the blue wavelength range or the green wavelength range, the second semiconductor layer 32 may include the semiconductor material Al. x Ga y In 1-x-y N (where 0 ≤ x ≤ 1, 0 ≤ y ≤ 1, and 0 ≤ x + y ≤ 1). For example, semiconductor material Al. x Ga y In 1-x-yN can be at least one of AlGaInN, GaN, AlGaN, InGaN, AlN, and InN doped with a p-type dopant. The second semiconductor layer 32 can be doped with a p-type dopant, and the p-type dopant can be, for example, Mg, Zn, Ca, Se, or Ba. For example, the second semiconductor layer 32 can be p-GaN doped with p-type Mg. The second semiconductor layer 32 can have a length of about 0.05 μm to about 0.10 μm, but this disclosure is not limited thereto.

[0158] The first semiconductor layer 31 and the second semiconductor layer 32 are shown as being formed as a single layer film, but this disclosure is not limited thereto. As another example, depending on the material of the light-emitting layer 36, each of the first semiconductor layer 31 and the second semiconductor layer 32 may include more than one layer, such as a cladding layer or a tensile strain barrier reduction (TSBR) layer.

[0159] A light-emitting layer 36 is disposed between a first semiconductor layer 31 and a second semiconductor layer 32. The light-emitting layer 36 may comprise a single quantum well structure material or a multi-quantum well structure material. When the light-emitting layer 36 comprises a material with a multi-quantum well structure, the light-emitting layer 36 may have a structure in which multiple quantum layers and multiple well layers are alternately stacked. The light-emitting layer 36 can emit light by combining electron-hole pairs according to an electrical signal applied to it via the first semiconductor layer 31 and the second semiconductor layer 32. For example, when the light-emitting layer 36 emits light in the blue wavelength range, the quantum layers may comprise materials such as AlGaN or AlGaInN. Specifically, when the light-emitting layer 36 has a multi-quantum well structure in which multiple quantum layers and multiple well layers are alternately stacked, the quantum layers may comprise materials such as AlGaN or AlGaInN, and the well layers may comprise materials such as GaN or AlInN. When the light-emitting layer 36 comprises AlGaInN as its quantum layer and AlInN as its well layer, the light-emitting layer 36 can emit blue light with a center wavelength range of about 450 nm to about 495 nm.

[0160] However, this disclosure is not limited thereto. As another example, the light-emitting layer 36 may have a structure in which semiconductor materials with large bandgap energies and semiconductor materials with small bandgap energies are stacked alternately, or may include group III or group V semiconductor materials depending on the wavelength of the light to be emitted. There is no specific limitation on the type of light emitted through the light-emitting layer 36. The light-emitting layer 36 may emit light in the red or green wavelength range instead of blue light, as needed. The light-emitting layer 36 may have a length of about 0.05 μm to about 0.10 μm, but this disclosure is not limited thereto.

[0161] Light can be emitted not only from the circumferential surface of the light-emitting element 30 along its length, but also from both sides of the light-emitting element 30. The directionality of the light emitted from the light-emitting layer 36 is not specifically limited.

[0162] Electrode layer 37 may be an ohmic contact electrode, but this disclosure is not limited thereto. As another example, electrode layer 37 may be a Schottky contact electrode. Light-emitting element 30 may include at least one electrode layer 37. Figure 9 The illustration shows a light-emitting element 30 including an electrode layer 37, but this disclosure is not limited thereto. As another example, the light-emitting element 30 may include more than one electrode layer 37, or may not have an electrode layer 37. However, the following description of the light-emitting element 30 can be directly applied to light-emitting elements 30 having more than one electrode layer 37 or having an electrode layer 37. Figure 9 The light-emitting element 30 has a different structure.

[0163] If the light-emitting element 30 is electrically connected to the electrode (or contact electrode), the electrode layer 37 can reduce the resistance between the light-emitting element 30 and the electrode (or contact electrode). The electrode layer 37 may include a conductive metal. For example, the electrode layer 37 may include at least one of Al, Ti, In, Au, Ag, ITO, IZO, and ITZO. Alternatively, the electrode layer 37 may include a semiconductor material doped with an n-type dopant or a p-type dopant. However, this disclosure is not limited thereto.

[0164] An insulating film 38 is configured to surround the first semiconductor layer 31, the second semiconductor layer 32, and the electrode layer 37. For example, the insulating film 38 may be configured to at least surround the light-emitting layer 36 and may extend along the direction in which the light-emitting element 30 extends. The insulating film 38 may protect the first semiconductor layer 31, the light-emitting layer 36, the second semiconductor layer 32, and the electrode layer 37. For example, the insulating film 38 may be formed to surround the sides of the first semiconductor layer 31, the light-emitting layer 36, the second semiconductor layer 32, and the electrode layer 37, but expose both ends of the light-emitting element 30 in the length direction.

[0165] The insulating film 38 is shown as being formed extending along the length of the light-emitting element 30 and covering the sides of the first semiconductor layer 31, the light-emitting layer 36, the second semiconductor layer 32, and the electrode layer 37, but this disclosure is not limited thereto. The insulating film 38 may cover only some of the sides of the light-emitting layer 36 and some of the first semiconductor layer 31 and the second semiconductor layer 32, or it may cover only a portion of the sides of the electrode layer 37, such that the sides of the electrode layer 37 can be partially exposed. The insulating film 38 may be formed in a circular shape in cross-sectional view in a region adjacent to at least one end of the light-emitting element 30.

[0166] The insulating film 38 may have a thickness of about 10 nm to about 1.0 μm, but this disclosure is not limited thereto. The insulating film 38 may have a thickness of about 40 nm.

[0167] The insulating film 38 may include a material with insulating properties, such as SiO2. x SiN x SiO x N y For example, AlN or Al2O3. Therefore, the insulating film 38 can prevent any short circuits that may occur if the light-emitting layer 36 is placed in direct contact with the electrodes that transmit electrical signals directly to the light-emitting element 30. Since the insulating film 38 protects the outer surface of the light-emitting element 30, including the light-emitting layer 36, any degradation of the emission efficiency of the light-emitting element 30 can be prevented.

[0168] In some embodiments, the outer surface of the insulating film 38 may undergo a surface treatment. The light-emitting element 30 may be sprayed onto the electrode while being dispersed in a predetermined ink. Here, the surface of the insulating film 38 may be treated with a hydrophobic or hydrophilic treatment to prevent the light-emitting elements 30 dispersed in the ink from agglomerating with other adjacent light-emitting elements 30.

[0169] The length h of the light-emitting element 30 can range from about 1 μm to about 10 μm, from about 2 μm to about 6 μm, or from about 3 μm to about 5 μm. The light-emitting element 30 can have a diameter from about 30 nm to about 700 nm and an aspect ratio from 1.2 to 100, but this disclosure is not limited thereto. Depending on the composition of the corresponding light-emitting layer 36 of the light-emitting element 30, different light-emitting elements 30 included in the display device 10 can have different diameters. Preferably, the light-emitting element 30 can have a diameter of about 500 nm.

[0170] The method of manufacturing the display device 10 will be described below.

[0171] Figures 10 to 12 This is a schematic cross-sectional view illustrating the process of manufacturing a display device according to an embodiment of the present disclosure. Figure 13 Through Figure 12 The diagram shows a schematic plan view of the sub-pixels obtained by the process shown.

[0172] First refer to Figure 10 The target substrate SUB is prepared to be provided with the first insulating layer 51 and electrodes 21 and 22. Although not specifically shown, the target substrate SUB may include the first substrate 11 and may also include circuit elements comprising conductive and insulating layers. For convenience, the first substrate 11 and the circuit elements are collectively referred to as the target substrate SUB below.

[0173] Subsequently, first embankments 40 are formed on the target substrate SUB in a spaced-apart configuration. As mentioned above, the first embankments 40 can protrude from the top surface of the target substrate SUB.

[0174] Subsequently, refer to Figure 11 A first pattern 70 is formed on a target substrate SUB between the first dams 40. The first pattern 70 may be spaced apart from the first dams 40 and may have a thickness less than that of the first dams 40. The first pattern 70 is shown as being formed after the formation of the first dams 40, but this disclosure is not limited thereto. As another example, the first pattern 70 and the first dams 40 may comprise the same material and may be formed simultaneously. For example, a halftone mask may be used during the formation of the first dams 40 to simultaneously form the first dams 40 and the first pattern 70 having a thickness different from that of the first dams 40.

[0175] Subsequently, refer to Figure 12 and Figure 13 A first electrode layer 21' and a second electrode layer 22' are formed on the first embankment 40. The first electrode layer 21' and the second electrode layer 22' extend in the second direction DR2 and are spaced apart from each other, with the first pattern 70 between the first electrode layer 21' and the second electrode layer 22'. During the manufacture of the display device 10, the first electrode layer 21' and the second electrode layer 22' can be extended in the second direction DR2 to be disposed in other sub-pixels PXn. After the light-emitting element 30 is arranged, the first electrode layer 21' and the second electrode layer 22' can be cut in the cutting area CBA of each sub-pixel PXn, and then the first electrode layer 21' and the second electrode layer 22' can be formed as the first electrode 21 and the second electrode 22, respectively.

[0176] The first pattern 70 can be arranged between the first dikes 40 or between the first electrode layer 21' and the second electrode layer 22', spaced apart from each other in the second direction DR2. The area between the first dikes 40 can be divided into an area with the first pattern 70 and an area without the first pattern 70, and the area with the first pattern 70 can have a different height than the area without the first pattern 70. Thereafter, a first insulating layer 51 covering the first pattern 70, the first electrode layer 21', and the second electrode layer 22', and a second dike 45 disposed on the first insulating layer 51 are formed, and a light-emitting element 30 is disposed between the first dikes 40.

[0177] Figure 14 and Figure 15 This is a schematic cross-sectional view illustrating the process of manufacturing a display device according to an embodiment of the present disclosure.

[0178] Reference Figure 14 and Figure 15A first insulating material layer 51' is formed, covering the first pattern 70 and electrode layers 21' and 22', and a second dike 45 is formed on the first insulating material layer 51' and surrounding the emitter region EMA and cutout region CBA of each sub-pixel PXn. The first insulating material layer 51' can be disposed on the entire surface of the target substrate SUB and can cover the first pattern 70 and electrode layers 21' and 22'. The first insulating material layer 51' can be partially removed in a subsequent process, so that the top surfaces of electrode layers 21' and 22' can be exposed, resulting in the formation of the first insulating layer 51. As mentioned above, the second dike 45 can be configured to surround and separate each sub-pixel PXn, and can also separate the emitter region EMA and cutout region CBA of each sub-pixel PXn.

[0179] Figure 16 Through Figure 14 and Figure 15 The diagram shows a schematic plan view of the sub-pixels obtained by the process shown. Figures 17 to 19 It is shown Figure 16 A schematic cross-sectional view of the arrangement of light-emitting elements and the first pattern in the sub-pixels. Specifically, Figure 17 The light-emitting element 30 is shown in the area where the first pattern 70 is not set. Figure 18 The light-emitting element 30 is shown in the area where the first pattern 70 is set. Figure 19 Light-emitting elements 30 are shown disposed between first patterns 70, which are spaced apart from each other in the second direction DR2.

[0180] Reference Figures 16 to 19 The light-emitting element 30 is disposed between the first dikes 40. The light-emitting element 30 can be configured such that its two ends can be placed on the first electrode layer 21' and the second electrode layer 22'. The light-emitting element 30 can be sprayed onto the target substrate SUB while being dispersed in ink. For example, the light-emitting element 30 can be prepared as being dispersed in ink and then sprayed onto the target substrate SUB by a printing process using an inkjet printing apparatus. The ink sprayed by the inkjet printing apparatus can settle in each area surrounded by the second dike 45. The second dike 45 can prevent ink from overflowing between different sub-pixels PXn.

[0181] Once ink including the light-emitting element 30 is sprayed, the light-emitting element 30 can be arranged on the first insulating material layer 51' by applying an electrical signal to the electrode layers 21' and 22'. When the electrical signal is applied to the electrode layers 21' and 22', an electric field can be generated between the electrode layers 21' and 22'. The light-emitting element 30 dispersed in the ink can receive the dielectric force from the electric field, and as a result, the alignment direction and position of the light-emitting element 30 can be changed, allowing the light-emitting element 30 to settle on the first insulating material layer 51'. Here, some of the light-emitting elements 30 (i.e., light-emitting elements 30A) can be arranged as follows: Figure 17 The arrangement shown is between the first patterns 70, and some of the light-emitting elements 30 (e.g., light-emitting element 30B) can be as follows: Figure 18 The arrangement shown is on the first pattern 70. Additionally, some of the first pattern 70 may not have light-emitting elements 30 disposed thereon. The first pattern 70 can guide the light-emitting elements 30 to be positioned such that each end of each of the light-emitting elements 30 can be arranged on a corresponding electrode of electrodes 21 and 22 or a corresponding electrode layer of electrode layers 21' and 22', and most of the light-emitting elements 30 can be arranged at a position relatively lower than the first pattern 70. However, as... Figure 5 As shown, at least some of the light-emitting elements 30 may be disposed on the first pattern 70, and even these light-emitting elements 30 may be electrically connected to electrodes 21 and 22 via contact electrodes 26 and 27.

[0182] Figure 20 and Figure 21 This is a schematic cross-sectional view illustrating the process of manufacturing a display device according to an embodiment of the present disclosure. Specifically, Figure 20 and Figure 21 A schematic cross-sectional view of a first pattern 70 without a light-emitting element 30 is shown.

[0183] Reference Figure 20 The first insulating layer 51 can be formed by removing a portion of the first insulating material layer 51' to expose the top surfaces of the first electrode layer 21' and the second electrode layer 22'. The first insulating layer 51 may include an opening OP that exposes portions of the electrode layers 21' and 22'. The top surfaces of the electrode layers 21' and 22' exposed by the opening OP can be in electrical contact with the contact electrodes 26 and 27.

[0184] Subsequently, a first electrode 21 and a second electrode 22 are formed by cutting the first electrode layer 21' and the second electrode layer 22' in the cut region CBA of each sub-pixel PXn, and a second insulating layer 52, a third insulating layer 53, and contact electrodes 26 and 27 are formed on the light-emitting element 30. Electrical signals for aligning the light-emitting element 30 can be applied to the electrode layers 21' and 22' electrically connected to each sub-pixel PXn. However, in order to drive the display device 10, the electrode layers 21' and 22' can be cut and separated in the cut region CBA of each sub-pixel PXn, thereby forming electrodes 21 and 22. As a result, electrodes 21 and 22 can be driven individually via the first transistor TR1 of each sub-pixel PXn.

[0185] Subsequently, although not specifically shown, a fourth insulating layer 54 covering the elements disposed on the target substrate SUB can be formed, thereby manufacturing the display device 10.

[0186] Other embodiments of the display device according to this disclosure will be described below.

[0187] The display device 10 includes a first pattern 70 disposed between first dikes 40 in each sub-pixel PXn. Figure 6 The width W1 of the first pattern 70 is shown to be smaller than the distance W3 between electrodes 21 and 22, but this disclosure is not limited thereto. For example, the width W1 and thickness DP of the first pattern 70 can be varied, as long as the light-emitting element 30 can be properly guided to be aligned at a specific location.

[0188] Figures 22 to 24 This is a schematic partial cross-sectional view of a display device according to other embodiments of the present disclosure. Specifically, Figure 22 and Figure 23 A schematic cross-sectional view of a first pattern 70_1 or 70_2 without a light-emitting element 30 is shown, and Figure 24 A schematic cross-sectional view of a first pattern 70_3 on which a second light-emitting element 30B is disposed is shown.

[0189] Reference Figure 22 The width W1 of the first pattern 70_1 can be the same as the distance W3 between electrodes 21_1 and 22_1, and the first pattern 70_1 can be in electrical contact with electrodes 21_1 and 22_1. The first pattern 70_1 can be formed to have a relatively large width W1 and be in electrical contact with electrodes 21_1 and 22_1, and the first insulating layer 51 disposed on the first pattern 70_1 can provide space in which the second light-emitting element 30B can be arranged horizontally.

[0190] Reference Figure 23The width W1 of the first pattern 70_2 can be greater than the distance W3 between electrodes 21_2 and 22_2, and the first side of electrodes 21_2 and 22_2 that does not overlap with the first embankment 40 can be disposed on the first pattern 70_2. Figure 23 The difference between this embodiment and other embodiments is at least in that: due to the relatively large width W1 of the first pattern 70_2, the first sides of electrodes 21_2 and 22_2 are disposed on the first pattern 70_2. Although not specifically shown, the second light-emitting element 30B disposed on the first pattern 70_2 can be arranged such that both ends of the second light-emitting element 30B can be placed on electrodes 21_2 and 22_2, resulting in proper electrical contact between the second light-emitting element 30B and contact electrodes 26 and 27. Figure 23 In the embodiments, with in Figure 5 In some embodiments, the number of light-emitting elements 30 electrically connected to electrodes 21_2 and 22_2 between the first dikes 40 can be further increased.

[0191] If the first pattern 70 has a relatively small width, the second light-emitting element 30B may not be able to make proper electrical contact with the contact electrodes 26 and 27. Depending on the width of the first pattern 70, the light-emitting element 30 may be arranged at an angle instead of horizontally, and due to contact defects, electrical signals may not be properly transmitted to the light-emitting element 30. If the light-emitting element 30 is aligned by an electric field, the light-emitting element 30 can be guided to be placed between the first patterns 70, rather than on the first patterns 70, by controlling the thickness of the first pattern 70.

[0192] Reference Figure 24The thickness DP_3 of the first pattern 70_3 can be greater than the thickness DE of electrodes 21 and 22, but smaller than the diameter DN of the light-emitting element 30. If the thickness DP_3 of the first pattern 70_3 is smaller than the diameter DN of the light-emitting element 30, the light-emitting element 30 can be easily moved away from the first pattern 70_3 by an electric field during the manufacture of the display device 10. If an electric field is generated to align the light-emitting element 30 and the electric field lasts for more than a predetermined amount of time, the light-emitting element 30 disposed on the first pattern 70_3 can be moved to a position where the first pattern 70_3 is not disposed. Even the light-emitting element 30 disposed in the area other than the area between the first dikes 40 can be moved above the first pattern 70_3. The second light-emitting element 30B is shown disposed on the first pattern 70_3, but in embodiments, similar to the first light-emitting element 30A, a considerable number of light-emitting elements 30 can be configured not to overlap with the first pattern 70_3. Since the first pattern 70_3 has a thickness DP_3 smaller than the diameter DN of the light-emitting element 30, most of the light-emitting elements 30 can be arranged similarly to the first light-emitting element 30A. For example, the thickness DP_3 of the first pattern 70_3 can be less than half the diameter DN of the light-emitting element 30.

[0193] The shape of the first pattern 70 can be varied, as long as the first pattern 70 can create a height difference between the first embankments 40 and can properly guide the light-emitting elements 30 to be placed in a specific position. For example, the shape of the first pattern 70 can be varied, as long as at least some of the light-emitting elements 30 electrically connected to the first electrode 21 and the second electrode 22 can be located at a position higher or lower than other light-emitting elements 30.

[0194] Figure 25 and Figure 26 This is a schematic partial cross-sectional view of a display device according to other embodiments of the present disclosure.

[0195] In particular, Figure 25 A schematic cross-sectional view of a first pattern 70_4, on which no light-emitting element 30 is disposed, is shown. (Refer to...) Figure 25 The first pattern 70_4 can be integrally formed with the first planarization layer 19 disposed below the first pattern 70_4. During the formation of the first planarization layer 19, a portion of the top surface of the first planarization layer 19 can be formed to protrude, thereby forming the first pattern 70_4. The first pattern 70_4 can be formed during the manufacture of the display device 10 using various processes. As mentioned above, the first pattern 70_4 can be formed during or after the formation of the first embankment 40, and the first pattern 70_4 can be formed by making a portion of the top surface of the first planarization layer 19 protrude. Figure 25 Implementation examples and Figure 5The difference in the embodiments is at least that the first pattern 70_4 is integrally formed with the first planarization layer 19. The first planarization layer 19 may include the first pattern 70_4 and portions where the first pattern 70_4 is not formed, the first pattern 70_4 being formed as a protrusion from the top surface of the first planarization layer 19. Among the light-emitting elements 30, the first light-emitting element 30A may be disposed on the portions of the first planarization layer 19 where the first pattern 70_4 is not formed, and the second light-emitting element 30B may be disposed on the first pattern 70_4. During the manufacture of the display device 10, most of the light-emitting elements 30 may be directed to be placed between the first patterns 70_4, rather than on the first pattern 70_4.

[0196] Reference Figure 26 The first planarization layer 19_5 may include recesses where a portion of the top surface of the first planarization layer 19_5 is lowered between the first dikes 40, and at least some of the light-emitting elements 30 may be disposed in the recesses. Recesses may be formed between the first dikes 40 during the formation of the first planarization layer 19_5. During the manufacture of the display device 10, processes that generate height differences may be performed to allow the light-emitting elements 30 to be placed in different locations. For example, after the formation of the first planarization layer 19_5, recesses may be formed between the first dikes 40 during the formation of the first contact hole CT1 and the second contact hole CT2. When recesses are formed between the first dikes 40, a height difference is generated in the second direction DR2, and the light-emitting elements 30 disposed between the first dikes 40 may be arranged to have a height different from the height of the top surface of the first substrate 11. Figure 26 The difference between this embodiment and other embodiments is at least in that a portion of the top surface of the first planarization layer 19_5 is reduced.

[0197] For example, the width W4 of the recess can be greater than the distance W3 between electrodes 21_5 and 22_5, and at least a portion of electrodes 21_5 and 22_5 can be disposed in the recess. The light-emitting element 30 can be guided to move into the recess by an electric field, and some or most of the light-emitting elements 30 can be disposed in the recess. The first light-emitting element 30A is shown disposed in the recess, but this disclosure is not limited thereto. The light-emitting element 30 may also include a second light-emitting element 30B, which is disposed on the portion of the first planarization layer 19_5 where the recess is not formed, and is located at a position higher than the first light-emitting element 30A.

[0198] The shapes of the first patterns 70, 70_1, 70_2, 70_3 and 70_4 are not specifically limited. The first patterns 70, 70_1, 70_2, 70_3 and 70_4 are shown as having rectangular shapes in plan views or sectional views, but this disclosure is not limited thereto.

[0199] Figure 27 This is a schematic partial cross-sectional view of a display device according to another embodiment of the present disclosure. Figure 28 yes Figure 27 A schematic plan view of the sub-pixels of the display device.

[0200] Reference Figure 27 and Figure 28 The top surface of the first pattern 70_6 can be curved. In some embodiments, the first pattern 70_6 may have a hemispherical shape and / or may be circular in a plan view and semi-circular in a cross-sectional view. The portion of the first insulating layer 51_6 on the first pattern 70_6 may not have a flat top surface, and the position of the light-emitting element 30 disposed on the portion of the first insulating layer 51_6 can be changed by an electric field, so that the light-emitting element 30 may not be superimposed on the first pattern 70_6. As a result, the light-emitting element 30 may not be disposed on the first pattern 70_6, and the portion of the second insulating layer 52_6 superimposed on the first pattern 70_6 may be in direct contact with the first insulating layer 51_6. Figure 27 and Figure 28 The difference between this embodiment and other embodiments is at least in that: the first pattern 70_6 may have a curved top surface and only the first light-emitting element 30A is provided (without the second light-emitting element 30B).

[0201] Figure 29 This is a schematic plan view of a sub-pixel of a display device according to another embodiment of the present disclosure. Figure 30 It is along Figure 29 A schematic cross-sectional view taken from line QB-QB'. Figure 31 This is a schematic plan view of a sub-pixel of a display device according to another embodiment of the present disclosure. Figure 32 It is along Figure 31 Schematic cross-sectional views taken from lines QC-QC', QD-QD', and QE-QE'. Figure 30 and Figure 32 A schematic cross-sectional view of the first pattern 70_7 or 70_8 and the light-emitting element 30 taken in the second direction DR2 is shown.

[0202] Reference Figures 29 to 32 The first pattern 70_7 or 70_8 can be stacked with the first electrode 21 or the second electrode 22. The first pattern 70_7 or 70_8 can be directly disposed on the first planarization layer 19 on which the first electrode 21 and the second electrode 22 are disposed, and a height difference can be created between the first electrode 21 and the second electrode 22. The first pattern 70_7 or 70_8 can have light-emitting elements 30 that can be easily removed from the first pattern 70_7 or 70_8 even if they are disposed on the first pattern 70_7 or 70_8, and can be configured with such a small width to be stacked with electrodes 21 and 22. Figures 29 to 32 In this embodiment, unlike the embodiment where the first pattern 70_7 or 70_8 is disposed between electrodes 21 and 22, a height difference is generated in the portions of electrodes 21 and 22 where the light-emitting elements 30 are disposed, so some or most of the light-emitting elements 30 (e.g., Figure 30 and Figure 32 The first light-emitting element 30A can be configured not to be superimposed on the first pattern 70_7 or 70_8.

[0203] In some embodiments, the first pattern 70_7 or 70_8 superimposed on the first electrode 21 and the first pattern 70_7 or 70_8 superimposed on the second electrode 22 can be arranged parallel to each other or in an alternating manner between the first embankments 40. For example, as Figure 29 and Figure 30 As shown, the first pattern 70_7 superimposed on the first electrode 21 and the first pattern 70_7 superimposed on the second electrode 22 can be arranged parallel to each other between the first embankments 40. In another example, as... Figure 31 and Figure 32 As shown, the first pattern 70_8 superimposed on the first electrode 21 and the first pattern 70_8 superimposed on the second electrode 22 can be arranged in an alternating manner between the first embankment 40.

[0204] During the manufacture of the display device 10, even if the first end of the light-emitting element 30 is disposed on the first pattern 70_7 or 70_8, the second end of the light-emitting element 30 may not be disposed on the first pattern 70_7 or 70_8, or vice versa. In this case, when an electric field is present, the light-emitting element 30 can move to the area where the first pattern 70_7 or 70_8 is not formed. Since the first pattern 70_7 or 70_8 has a relatively small width and is configured to overlap with the electrodes 21 and 22, even if the end of the light-emitting element 30 is disposed on the first pattern 70_7 or 70_8, the light-emitting element 30 can be appropriately guided toward the position where the first pattern 70_7 or 70_8 is not disposed.

[0205] The first electrode 21 and the second electrode 22 do not necessarily have to extend in one direction. In some embodiments, electrodes 21 and 22 may include portions extending in one direction with different widths and portions extending in another direction.

[0206] Figure 33 This is a schematic plan view of a sub-pixel of a display device according to another embodiment of the present disclosure.

[0207] Reference Figure 33Each of electrodes 21_9 and 22_9 may include an extension RE-E, bent portions RE-B1 and RE-B2, and connecting portions RE-C1 and RE-C2. The extension RE-E extends generally in the second direction DR2 and has a width greater than the width of the rest of the corresponding electrode. The bent portions RE-B1 and RE-B2 extend diagonally relative to the first direction DR1 or the second direction DR2. The connecting portions RE-C1 and RE-C2 connect the bent portions RE-B1 and RE-B2 and the extension RE-E. Electrodes 21_9 and 22_9 may extend generally in the second direction DR2, but portions of electrodes 21_9 and 22_9 may have relatively large widths or may be bent diagonally relative to the second direction DR2. The first electrode 21_9 and the second electrode 22_9 may be arranged symmetrically with respect to the first pattern 70_9 disposed therebetween. The shape of the first electrode 21_9 will be described below.

[0208] The first electrode 21_9 may include an extension RE-E, which has a width greater than the width of the rest of the first electrode 21_9. The extension RE-E of the first electrode 21_9 and the extension RE-E of the second electrode 22_9 may be positioned on the first embankment 40 in the emission region EMA of the first sub-pixel PX1 and extend in the second direction DR2. A first pattern 70_9 may be disposed between the extensions RE-E, and a light-emitting element 30 may be disposed on the extensions RE-E. The first contact electrode 26_9 and the second contact electrode 27_9 may be disposed on the extensions RE-E, but may have a width smaller than the width of the extensions RE-E.

[0209] Connection portions RE-C1 and RE-C2 may extend or connect to both sides of each of the extension portions RE-E in the second direction DR2. The first connection portion RE-C1 may be disposed on a first side of the extension portion RE-E in the second direction DR2, and the second connection portion RE-C2 may be disposed on a second side of the extension portion RE-E in the second direction DR2. Connection portions RE-C1 and RE-C2 may extend or connect to the extension portion RE-E of the corresponding electrode, and may be disposed in and across the emission region EMA and the second dike 45.

[0210] The first connecting portion RE-C1 and the second connecting portion RE-C2 may have a width smaller than the width of the extension portion RE-E. The first sides of the connecting portions RE-C1 and RE-C2 extending in the second direction DR2 may extend or connect to the first side of the corresponding extension portion RE-E extending in the second direction DR2, and lie on the same line as the first side of the corresponding extension portion RE-E extending in the second direction DR2. For example, the outer side of the extension portion RE-E of each of electrodes 21_9 and 22_9 may extend to electrically connect to the outer side of the connecting portions RE-C1 and RE-C2 of the corresponding electrodes. Therefore, the distance DE1 between the extension portion RE-E of the first electrode 21_9 and the extension portion RE-E of the second electrode 22_9 may be smaller than the distance DE2 between the connecting portion RE-C1 of the first electrode 21_9 and the connecting portion RE-C2 of the second electrode 22_9.

[0211] The curved portions RE-B1 and RE-B2 extend or connect to the connecting portions RE-C1 and RE-C2. The curved portions RE-B1 and RE-B2 may include a first curved portion RE-B1 and a second curved portion RE-B2. The first curved portion RE-B1 extends or connects to the first connecting portion RE-C1 and is disposed on the second embankment 45 and in the cutting region CBA. The second curved portion RE-B2 extends or connects to the second connecting portion RE-C2 and is disposed on the second embankment 45 and in the cutting region CBA of another sub-pixel PXn. The curved portions RE-B1 and RE-B2 may be electrically connected to the connecting portions RE-C1 and RE-C2 and may be curved diagonally relative to the second direction DR2 (e.g., in a direction toward the center of the first sub-pixel PX1). The minimum distance DE3 between the curved portions RE-B1 and RE-B2 may be less than the distance DE2 between the connecting portions RE-C1 and RE-C2, but may be greater than the distance DE1 between the extended portions RE-E.

[0212] The contact portion RE-P can be formed in the region where the first connecting portion RE-C1 and the first bent portion RE-B1 are electrically connected. The contact portion RE-P can be stacked with the second dam 45, such that the first contact hole CT1 of the first electrode 21_9 and the second contact hole CT2 of the second electrode 22_9 can be formed.

[0213] When the first electrode 21_9 and the second electrode 22_9 are separated into pieces in the cutting region CBA, the fragment portion RE-D obtained can be formed at the first end of the first curved portion RE-B1. The fragment portion RE-D can be the portion of the first electrode 21_9 and the second electrode 22_9 of the adjacent sub-pixel PXn in the second direction DR2 that is retained in the cutting region CBA.

[0214] Figure 33 Implementation examples and Figure 4 The difference in the embodiments is at least that each of the first electrode 21_9 and the second electrode 22_9 includes an extension portion RE-E, connecting portions RE-C1 and RE-C2, and bent portions RE-B1 and RE-B2, and is arranged symmetrically with respect to the center of the first sub-pixel PX1. However, this disclosure is not limited thereto. As another example, the first electrode 21_9 and the second electrode 22_9 may have different shapes.

[0215] Figure 34 This is a schematic plan view of a sub-pixel of a display device according to another embodiment of the present disclosure. Figure 35 It is along Figure 34 A schematic cross-sectional view taken by line QX-QX'.

[0216] Reference Figure 34 and Figure 35 The display device 10 may include a first electrode 21_10, a second electrode 22_10, and a first pattern 70_10 in each of its sub-pixels PXn (e.g., in the first sub-pixel PX1). The first electrode 21_10 may have a pattern 70_10 with... Figure 33 Their corresponding first electrodes 21_9 have the same shape, and the first electrodes 21_10 (e.g., two first electrodes 21_10) can be arranged symmetrically with respect to the center of the first sub-pixel PX1. The second electrode 22_10 can have the same shape as... Figure 2 Their corresponding second electrodes 22 have the same shape, and the second electrodes 22_10 (e.g., two second electrodes 22_10) can be arranged between the first electrodes 21_10. The distance between the first electrode 21_10 and the second electrode 22_10 can vary from one position on the first electrode 21_10 to another. For example, the distance DE1 between the extension portion RE-E of the first electrode 21_10 and the second electrode 22_10 can be smaller than the distance DE2 between the connecting portions RE-C1 and RE-C2 of the first electrode 21_10 and the second electrode 22_10, and the distance DE3 between the bent portions RE-B1 and RE-B2 of the first electrode 21_10 and the second electrode 22_10. The distance DE2 between the connecting portions RE-C1 and RE-C2 of the first electrode 21_10 and the second electrode 22_10 can be larger than the distance DE3 between the bent portions RE-B1 and RE-B2 of the first electrode 21_10 and the second electrode 22_10. However, this disclosure is not limited thereto. The shapes of electrodes 21_10 and 22_10 are similar to Figures 2 to 33 Each of them has the same shape of its corresponding electrode, so its detailed description will be omitted.

[0217] The arrangement and shape of the first sub-dam 41_10, the first insulating layer 51_10, and the contact electrodes 26_10, 27_10, and 28_10 can vary depending on the arrangement of the first electrode 21_10 and the second electrode 22_10.

[0218] The first insulating layer 51_10 can be disposed between the extension portion RE-E of the first electrode 21_10 and the second electrode 22_10 and in contact with the extension portion RE-E of the first electrode 21_10 and the second electrode 22_10. The first end of the light-emitting element 30 can be disposed on the extension portion RE-E of the first electrode 21_10, and the second end of the light-emitting element 30 can be disposed on the second electrode 22_10.

[0219] The first dike 40 may include a first sub-dike 41_10 and a second sub-dike 42_10. The first sub-dike 41_10 and the second sub-dike 42_10 may extend in the second direction DR2, and the first sub-dike 41_10 may have a width in the first direction DR1 different from the width of the second sub-dike 42_10. Since the first sub-dike 41_10 has a wider width in the first direction DR1 than the second sub-dike 42_10, the first sub-dike 41_10 may be configured to span the boundary between the first sub-pixel PX1 and its neighboring sub-pixel PXn in the first direction DR1. For example, the first sub-dike 41_10 may be located not only in the emission region EMA of the first sub-pixel PX1, but also between the emission region EMA of the first sub-pixel PX1 and the emission region EMA of its neighboring sub-pixel PXn. Therefore, the portion of the second dike 45_10 extending in the second direction DR2 may be located on the first sub-dike 41_10. Two first sub-dikes 41_10 can be partially set in each sub-pixel PXn, and a second sub-dike 42_10 can be set between the two first sub-dikes 41_10.

[0220] The second sub-dike 42_10 may extend in the second direction DR2 at the center of the emission region EMA of the first sub-pixel PX1. The second sub-dike 42_10 may have a width smaller than that of the first sub-dike 41_10 and may be spaced apart from the first sub-dike 41_10.

[0221] The extension portion RE-E of the first electrode 21_10 and the second dike 45_10 can be disposed on the first sub-dike 41_10. The extension portion RE-E of the first electrode 21_10 of adjacent sub-pixels PXn can be disposed on the first sub-dike 41_10. For example, the extension portions RE-E of two first electrodes 21_10 can be disposed on one first sub-dike 41_10, and two second electrodes 22_10 can be disposed on one second sub-dike 42_10. The second electrodes 22_10 can be disposed on both sides of the second sub-dike 42_10 extending in the second direction DR2, and can be spaced apart from each other and the second sub-dike 42_10 is between the second electrodes 22_10.

[0222] One of the first electrodes 21_10 may include a contact portion RE-P in which a first contact hole CT1 is formed, and the other first electrode 21_10 may not include the contact portion RE-P. Similarly, one of the second electrodes 22_10 may include a contact portion RE-P in which a second contact hole CT2 is formed, and the other second electrode 22_10 may not include the contact portion RE-P. Some of the electrodes 21_10 and 22_10 electrically connected to the first transistor TR1 or the second voltage line VL2 may receive electrical signals via contact holes CT1 and CT2, and the other electrodes 21_10 and 22_10 may receive electrical signals via contact electrodes 26_10, 27_10, and 28_10.

[0223] Each of the light-emitting elements 30 has its two ends disposed on the first insulating layer 51_10 and on the extension portion RE-E of the first electrode 21_10 and the second electrode 22_10. The first end of the light-emitting element 30, on which the second semiconductor layer 32 is disposed, can be disposed on the first electrode 21_10. Therefore, the first end of the first type of light-emitting element 30-1 disposed between the left-facing electrodes 21_10 and 22_10 on the left side of the center of the first sub-pixel PX1 and the first end of the second type of light-emitting element 30-2 disposed between the right-facing electrodes 21_10 and 22_10 on the right side of the center of the first sub-pixel PX1 can face opposite directions.

[0224] The display device 10 may include a relatively large number of electrodes 21_10 and 22_10, and therefore may include a relatively large number of contact electrodes 26_10, 27_10 and 28_10.

[0225] Contact electrodes 26_10, 27_10 and 28_10 may include a first contact electrode 26_10 disposed on one of the first electrodes 21_10, a second contact electrode 27_10 disposed on one of the second electrodes 22_10, and a third contact electrode 28_10 disposed on the other first electrode 21_10 and the other second electrode 22_10 and surrounding the second contact electrode 27_10.

[0226] The first contact electrode 26_10 can be disposed on one of the first electrodes 21_10. For example, the first contact electrode 26_10 can be disposed on the extension RE-E of the first end of the first type light-emitting element 30-1 disposed on the first electrode 21_10. The first contact electrode 26_10 can be in electrical contact with the first end of the first type light-emitting element 30-1 and with the extension RE-E of the first end of the first type light-emitting element 30-1 disposed on the first electrode 21_10. The second contact electrode 27_10 can be disposed on one of the second electrodes 22_10. For example, the second contact electrode 27_10 can be disposed on the second electrode 22_10 where the first end of the second type light-emitting element 30-2 is disposed. The second contact electrode 27_10 can be in electrical contact with the first end of the second type light-emitting element 30-2 and with the second electrode 22_10 where the first end of the second type light-emitting element 30-2 is disposed. The first contact electrode 26_10 and the second contact electrode 27_10 can make electrical contact with electrodes 21_10 and 22_10 having first contact holes CT1 and second contact holes CT2. The first contact electrode 26_10 can make electrical contact with the first electrode 21_10 electrically connected to the first transistor TR1 via the first contact hole CT1, and the second contact electrode 27_10 can make electrical contact with the second electrode 22_10 electrically connected to the second voltage line VL2 via the second contact hole CT2. The first contact electrode 26_10 and the second contact electrode 27_10 can transmit electrical signals applied to them from the first transistor TR1 or the second voltage line VL2 to the light-emitting element 30. The first contact electrode 26_10 and the second contact electrode 27_10 can make electrical contact with... Figures 2 to 33 The contact electrodes of each of them are basically the same.

[0227] Electrodes 21_10 and 22_10 without contact holes CT1 and CT2 can be further disposed in the first sub-pixel PX1. Electrodes 21_10 and 22_10 without contact holes CT1 and CT2 can be in a floating state and substantially no electrical signal is directly applied to electrodes 21_10 and 22_10 from the first transistor TR1 or the second voltage line VL2. A third contact electrode 28_10 can be disposed on electrodes 21_10 and 22_10 without contact holes CT1 and CT2, and the electrical signal transmitted to the light-emitting element 30 can flow through the third contact electrode 28_10.

[0228] The third contact electrode 28_10 can be disposed on electrodes 21_10 and 22_10 that do not have contact holes CT1 and CT2, and can be configured to surround the second contact electrode 27_10. The third contact electrode 28_10 may include a portion extending in the second direction DR2 and a portion extending in the first direction DR1 to connect with the portion extending in the second direction DR2, and thus can surround the second contact electrode 27_10. The portion of the third contact electrode 28_10 extending in the second direction DR2 can be disposed on electrodes 21_10 and 22_10 that do not have contact holes CT1 and CT2 to make electrical contact with the light-emitting element 30. For example, the portion of the third contact electrode 28_10 disposed on the second electrode 22_10 that does not have the second contact hole CT2 can make electrical contact with the second end of the first type light-emitting element 30-1, and the portion of the third contact electrode 28_10 disposed on the first electrode 21_10 that does not have the first contact hole CT1 can make electrical contact with the first end of the second type light-emitting element 30-2. Since there is an insulating layer (not shown) between the third contact electrode 28_10 and the second electrode 22_10, the portion of the third contact electrode 28_10 extending in the first direction DR1 can be stacked with the second electrode 22_10 having the second contact hole CT2, but can not be directly connected to the second electrode 22_10 having the second contact hole CT2.

[0229] The electrical signal transmitted from the first contact electrode 26_10 to the first end of the first type of light-emitting element 30-1 can be transmitted to the third contact electrode 28_10, which is in electrical contact with the second end of the first type of light-emitting element 30-1. The third contact electrode 28_10 can transmit these electrical signals to the first end of the second light-emitting element 30B, so that the signal can be transmitted to the second electrode 22_10 via the second contact electrode 27_10. Therefore, the electrical signal for emitting light by the light-emitting element 30 can be transmitted to only one of the first electrode 21_10 and the second electrode 22_10, and the first type of light-emitting element 30-1 and the second type of light-emitting element 30-2 can be connected in series via the third contact electrode 28_10.

[0230] In concluding this detailed description, those skilled in the art will understand that many variations and modifications can be made to the preferred embodiments without substantially departing from the principles of the invention. Therefore, the preferred embodiments disclosed in the invention are used only in a general and descriptive sense and not for purposes of limitation.

Claims

1. A display device, the display device comprising: Multiple first dikes are set on the base to extend in a first direction and are spaced apart from each other; A plurality of first patterns are disposed between the plurality of first dikes and spaced apart from each other in the first direction; The first electrode and the second electrode extend in the first direction, are disposed on different first dikes among the plurality of first dikes, and are spaced apart from each other; A first insulating layer, superimposed on the plurality of first patterns, is disposed on the substrate and partially superimposed on the first electrode and the second electrode; as well as A plurality of light-emitting elements are disposed on the first insulating layer, such that a first end and a second end of each of the plurality of light-emitting elements are respectively disposed on the first electrode and the second electrode. The plurality of light-emitting elements include a first light-emitting element and a second light-emitting element. The first light-emitting element is disposed between the plurality of first patterns and is not superimposed on the plurality of first patterns in the thickness direction of the display device. The second light-emitting element is superimposed on the plurality of first patterns in the thickness direction of the display device.

2. The display device according to claim 1, wherein, The distance between the first light-emitting element and the substrate is less than the distance between the second light-emitting element and the substrate.

3. The display device according to claim 1, wherein, The thickness of the plurality of first patterns is greater than the thickness of the first electrode and the thickness of the second electrode.

4. The display device according to claim 3, wherein, The thickness of the plurality of first patterns is less than the diameter of the plurality of light-emitting elements.

5. The display device according to claim 1, wherein, The plurality of first patterns are disposed between the first electrode and the second electrode, and The width of the plurality of first patterns is less than the distance between the first electrode and the second electrode.

6. The display device according to claim 1, wherein, The width of the plurality of first patterns is greater than the distance between the first electrode and the second electrode, and At least a portion of the first electrode and at least a portion of the second electrode are disposed on the plurality of first patterns.

7. The display device according to claim 1, further comprising: A planarization layer is disposed on the substrate, wherein the plurality of first dikes and the first insulating layer are disposed on the planarization layer, and the plurality of first patterns and the planarization layer are integral with each other.

8. The display device according to claim 1, wherein, The plurality of first patterns are superimposed on the portions of the first electrode or the second electrode that are not superimposed on the plurality of first dikes and are arranged in the first direction.

9. The display device according to claim 8, wherein, The first pattern among the plurality of first patterns that overlaps with the first electrode and the first pattern among the plurality of first patterns that overlaps with the second electrode are arranged parallel to the first electrode and the second electrode in a direction that is spaced apart from each other.

10. The display device according to claim 8, wherein, The first pattern superimposed on the first electrode and the first pattern superimposed on the second electrode in the plurality of first patterns are arranged in an alternating manner.

11. The display device according to claim 1, further comprising: A first contact electrode is disposed on the first electrode to make electrical contact with the first end of the plurality of light-emitting elements; as well as A second contact electrode is disposed on the second electrode to make electrical contact with the second end of the plurality of light-emitting elements.

12. The display device according to claim 11, wherein, The first electrode includes: at least one bent portion extending in a second direction different from the first direction; an extension portion having a width greater than the width of the at least one bent portion; and at least one connecting portion electrically connecting the at least one bent portion and the extension portion and extending in the first direction. The plurality of first patterns are disposed between the extension portion of the first electrode and the second electrode.

13. The display device according to claim 12, wherein, The second electrode is symmetrical to the first electrode with respect to the plurality of first patterns disposed therebetween. The plurality of first patterns are disposed between the extension portion of the first electrode and the extension portion of the second electrode, and The first end and the second end of each of the plurality of light-emitting elements are respectively disposed on the extension portion of the first electrode and the extension portion of the second electrode.

14. The display device according to claim 12, wherein, The first distance between the extension portion of the first electrode and the second electrode is less than the second distance between the at least one connecting portion of the first electrode and the second electrode, and The minimum distance between the at least one curved portion of the first electrode and the second electrode is greater than the first distance and less than the second distance.

15. A display device, the display device comprising: A planarization layer is applied to the substrate. Multiple first dikes are set on the planarization layer and spaced apart from each other; The first electrode and the second electrode are disposed on different first dikes among the plurality of first dikes and spaced apart from each other; A first insulating layer is disposed on the planarization layer and partially overlapped with the first electrode and the second electrode; A first light-emitting element is disposed on the first insulating layer, such that the first end and the second end of each of the first light-emitting elements are respectively disposed on the first electrode and the second electrode; as well as The second light-emitting element is disposed on the first insulating layer, such that the first end and the second end of each of the second light-emitting elements are respectively disposed on the first electrode and the second electrode. The planarization layer includes a first pattern, the first pattern including a top surface that partially protrudes between the plurality of first dikes. The second light-emitting element is disposed on the first pattern, and The distance between the first light-emitting element and the substrate is less than the distance between the second light-emitting element and the substrate.

16. The display device according to claim 15, wherein, The planarization layer includes the portions between the plurality of first dikes where the first pattern has not been formed, and The first light-emitting element is disposed on the portion of the planarization layer where the first pattern is not formed.

17. The display device according to claim 15, wherein, The planarization layer includes recesses between the plurality of first dikes, and the top surface of the planarization layer is recessed at the recesses. At least a portion of the first electrode and at least a portion of the second electrode are disposed in the recess, and The first light-emitting element is disposed in the recess.

18. The display device according to claim 17, wherein, The planarization layer includes the portions between the plurality of first dikes where the recesses are not formed, and The second light-emitting element is disposed on the portion of the planarization layer where the recess is not formed.

19. The display device according to claim 15, further comprising: A transistor is disposed between the substrate and the planarization layer; as well as A data conductive layer is disposed between the transistor and the planarization layer and includes a first voltage line and a second voltage line, wherein... The first electrode is electrically connected to the first voltage line via the transistor, and The second electrode is electrically connected to the second voltage line.

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