A solar cell and a method for manufacturing the same
By fleece making and top planarization treatment in the second direction of the N-type silicon wafer, the problem of difficulty in forming good back contact in the prior art is solved, and the photoelectric conversion efficiency and working performance of the solar cell are improved.
Patent Information
- Application Number
- CN202110843516.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-07-26
- Publication Date
- 2025-03-11
- Estimated Expiration
- 2041-07-26
AI Technical Summary
In manufacturing solar cells, it is difficult for existing methods to form good back contact while ensuring that the plating diffusion layer is completely removed, resulting in low photoelectric conversion efficiency of solar cells.
By fleece making on one side of the second direction of the N-type silicon wafer, a suede structure is formed, and on this basis, the top planarization is performed to increase the degree of fluctuation of the N-type silicon wafer to improve the contact area and contact quality between the lower electrode and the N-type silicon wafer.
It is achieved by completely removing the plating diffusion layer, increasing the contact area between the lower electrode and the N-type silicon wafer, reducing the contact resistance, and improving the photoelectric conversion efficiency and working performance of the solar cell.
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Figure CN113594296B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of solar cells, and in particular to a solar cell and a manufacturing method thereof. Background Art
[0002] In the actual process of manufacturing tunneling oxide passivation contact cells, it is necessary to perform boron diffusion treatment on the front side of the N-type silicon wafer to form a diffusion layer and a borosilicate glass layer stacked in sequence on the front side of the N-type silicon wafer. In addition, due to wrap-around plating, wrap-around diffusion layers and wrap-around borosilicate glass layers will be formed on the side and back sides of the N-type silicon wafer. Then, before the back side of the N-type silicon wafer is processed using the passivation contact process, it is also necessary to remove the wrap-around diffusion layer and the wrap-around borosilicate glass layer to prevent the upper electrode and the lower electrode of the manufactured solar cell from forming a short circuit through the wrap-around diffusion layer.
[0003] However, using the existing method to remove the wrap-around borosilicate glass layer and the wrap-around diffusion layer makes it difficult to form a good back contact while ensuring that the wrap-around diffusion layer is completely removed, thereby reducing the photoelectric conversion efficiency of the solar cell. Summary of the invention
[0004] The object of the present invention is to provide a solar cell and a method for manufacturing the same, which is used to increase the contact area between the lower electrode of the solar cell and the N-type silicon wafer while ensuring that the surrounding diffusion layer is completely removed, and reduce the contact resistance between the lower electrode and the N-type silicon wafer, thereby forming a good back contact and improving the photoelectric conversion efficiency of the solar cell.
[0005] In a first aspect, the present invention provides a method for manufacturing a solar cell, the method comprising:
[0006] A boron diffusion treatment is performed on one side of the N-type silicon wafer in the first direction to form a diffusion layer and a borosilicate glass layer stacked in sequence on the one side of the N-type silicon wafer in the first direction, and a wrap-around diffusion layer and a wrap-around borosilicate glass layer stacked in sequence are formed on the side surface and one side of the N-type silicon wafer in the second direction.
[0007] The borosilicate glass layer and the diffusion layer are removed in sequence, and a texture treatment is performed on one side of the N-type silicon wafer in the second direction to form a texture structure on one side of the N-type silicon wafer in the second direction.
[0008] The suede structure is subjected to a top planarization process to obtain a convex structure with a flat top on one surface of the N-type silicon wafer in the second direction.
[0009] In the case of adopting the above technical solution, after the boron diffusion treatment is performed on one side of the N-type silicon wafer in the first direction, not only a diffusion layer and a borosilicate glass layer stacked in sequence will be formed on one side of the N-type silicon wafer in the first direction, but also a wrap-around diffusion layer and a wrap-around borosilicate glass layer will be formed on at least part of the area of one side of the N-type silicon wafer in the second direction and on the side of the N-type silicon wafer due to wrap-around plating. Then, the above-mentioned wrap-around borosilicate glass layer and wrap-around diffusion layer are removed in sequence, and the one side of the N-type silicon wafer in the second direction is subjected to a texturing treatment. Compared with the prior art in which the wrap-around diffusion layer is removed and the one side of the N-type silicon wafer in the second direction is polished, the above-mentioned texturing treatment can increase the etching amount of the one side of the N-type silicon wafer in the second direction from about 0.16g to about 0.3g, ensuring that the wrap-around diffusion layer can be completely removed, preventing the upper and lower electrodes of the solar cell from forming a short circuit through the wrap-around diffusion layer, and improving the working reliability of the solar cell. At the same time, because the existing solar cells have leakage current, and the direction of the leakage current is opposite to the direction of the output current of the solar cell, the presence of the leakage current will offset part of the output current, so that the output current is reduced, which is equivalent to a resistor connected in parallel to a solar cell. The resistor is the parallel resistance of the solar cell itself. Based on this, after the surrounding plated diffusion layer is completely removed, the leakage current between the upper and lower electrodes of the solar cell is reduced. In addition, according to Ohm's law, the parallel resistance of the solar cell itself is inversely proportional to the leakage current. Therefore, when the leakage current is reduced, the parallel resistance of the solar cell itself can be increased, which is beneficial to improving the working performance of the solar cell.
[0010] Furthermore, after the surface of the N-type silicon wafer in the second direction is subjected to a texturing treatment, an uneven velvet structure is formed on the surface of the N-type silicon wafer in the second direction. The velvet structure is then subjected to a top flattening treatment, thereby forming a convex structure with a flat top on the surface of the N-type silicon wafer in the second direction. The existence of the convex structure increases the undulation of the surface of the N-type silicon wafer in the second direction. Based on this, when the lateral dimensions of the formation area of the electrode of the solar cell located on the surface of the N-type silicon wafer in the second direction are constant, compared with the prior art in which the electrode is formed above the surface of the N-type silicon wafer in the second direction after the polishing treatment, the contact area between the surface of the N-type silicon wafer in the second direction after the undulation is increased and the electrode formed subsequently is larger, which can reduce the contact resistance between the electrode and the N-type silicon wafer, is conducive to the electrode collecting the majority carriers, and can form a good back contact. At the same time, the series resistance of the solar cell can also be reduced. Based on this, since the fill factor of a solar cell is positively correlated with its parallel resistance, and the fill factor is negatively correlated with the series resistance of the solar cell, after the texturing treatment and top flattening treatment, the above fill factor will also increase with the increase of the parallel resistance and the decrease of the series resistance. Correspondingly, the photoelectric conversion efficiency of the solar cell is also higher, thereby improving the working performance of the solar cell.
[0011] In addition, after the texturing treatment, the top of the velvet structure is flattened to obtain a convex structure with a flat top, so that the tunneling oxide layer included in the solar cell can be formed on the convex structure which is relatively flatter than the top of the velvet structure, so as to improve the density of the formed tunneling oxide layer, thereby being able to enhance the back passivation effect while forming a good back contact, and further improve the working performance of the solar cell.
[0012] In a possible implementation, the borosilicate glass layer and the diffusion layer are removed in sequence, and a texturing process is performed on one side of the N-type silicon wafer in the second direction to form a texturing structure on one side of the N-type silicon wafer in the second direction, including:
[0013] The borosilicate glass layer is removed by chain cleaning equipment and acid cleaning solution.
[0014] A tank cleaning device is used and a first alkaline cleaning solution is adopted to remove the surrounding diffusion layer and to perform a texturing treatment on one side of the second direction of the N-type silicon wafer.
[0015] In the case of adopting the above technical solution, when the borosilicate glass layer is removed by the chain cleaning equipment, the N-type silicon wafer after the boron diffusion treatment can be transported to the cleaning tank containing the acidic cleaning solution by the conveying roller included in the chain cleaning equipment. In addition, the chain single-sided treatment method can be adopted to make only the borosilicate glass layer around the plated layer contact and react with the acidic cleaning solution, so as to facilitate the removal of the borosilicate glass layer around the plated layer by the acidic cleaning solution, and make the plated diffusion layer exposed to the outside, while the diffusion layer and borosilicate glass layer on one side of the first direction of the N-type silicon wafer after the acidic cleaning solution treatment can be retained, and then the borosilicate glass layer can be used as a mask for the subsequent removal of the plated diffusion layer and the texturing treatment by the tank cleaning equipment, so as to prevent the diffusion layer and one side of the N-type silicon wafer in the first direction from being affected by the subsequent treatment, thereby improving the yield of the solar cell. In addition, the above-mentioned removal of the surrounding plated diffusion layer by using the first alkaline cleaning solution and the texturing treatment of one side of the N-type silicon wafer in the second direction can be carried out in the same tank-type cleaning equipment, thereby ensuring that the surrounding plated borosilicate glass layer is completely removed while reducing the time wasted in transporting the N-type silicon wafers that have undergone corresponding treatments between different cleaning equipment, thereby improving the manufacturing efficiency of solar cells.
[0016] In a possible implementation, the first alkaline cleaning solution is a mixed solution of water, potassium hydroxide and a texturing additive, wherein the volume ratio of water, potassium hydroxide and the texturing additive is 354:5.5:2.
[0017] In the case of adopting the above technical solution, the potassium hydroxide in the first alkaline cleaning solution can perform corrosion cleaning on one side of the N-type silicon wafer in the second direction after being treated with the acidic cleaning solution, thereby removing the plating diffusion layer and performing a texturing treatment on one side of the N-type silicon wafer in the second direction. In the above corrosion cleaning process, the texturing additive can adjust the longitudinal and lateral corrosion rates of potassium hydroxide, so that the velvet structure formed on each area of the one side of the N-type silicon wafer in the second direction after the texturing treatment is more regular and uniform, which is conducive to obtaining a more regular and uniform convex structure on one side of the N-type silicon wafer in the second direction after the subsequent top flattening treatment of the velvet structure, thereby making the electrodes located above each area of the one side of the N-type silicon wafer in the second direction have a larger contact area with the N-type silicon wafer, which is conducive to the collection of majority carriers by each of the above electrodes, and further improves the photoelectric conversion efficiency of the solar cell. In addition, when the volume ratio of water, potassium hydroxide and texturing additive is 354:5.5:2, the corrosion intensity of potassium hydroxide in the first alkaline cleaning solution during corrosion cleaning is moderate, so that when the N-type silicon wafer treated with the acidic cleaning solution is immersed in the first alkaline cleaning solution contained in the tank cleaning equipment, the diffusion layer formed on one side of the first direction of the N-type silicon wafer can be ensured to be unaffected by the corrosion cleaning under the masking effect of the borosilicate glass layer, thereby improving the manufacturing efficiency of solar cells.
[0018] In one possible implementation, the processing conditions for removing the bypass diffusion layer with the first alkaline cleaning solution and performing texturing on one side of the second direction of the N-type silicon wafer are as follows: the temperature of the first alkaline cleaning solution is 77°C to 83°C, and the process time is 355s to 365s.
[0019] When the above technical solution is adopted, when the temperature of the first alkaline cleaning solution is 77°C to 83°C and the process time is 355s to 365s, the first alkaline cleaning solution can be used in the tank cleaning equipment to completely remove the around-plating diffusion layer and obtain a regular and uniform velvet structure, thereby ensuring a good cleaning effect while preventing the problem of reduced manufacturing efficiency due to excessive process time.
[0020] In a possible implementation, the velvet structure is a pyramid-shaped velvet structure, and the protrusion structure is a prism-shaped protrusion structure.
[0021] In the case of adopting the above technical solution, when the velvet structure is a pyramid-type velvet structure, the lateral cross-sectional area of the velvet structure gradually decreases along the direction from the bottom to the top of the velvet structure. Based on this, after the top of the velvet structure is flattened, a prism-type protrusion structure can be obtained. The side of the prism-type protrusion structure is an inclined surface. Under the same conditions of other factors, compared with a protrusion structure with the same height and a side perpendicular to the N-type silicon wafer, the side area of the protrusion structure with an inclined side is larger, thereby increasing the area of the electrode formed above the protrusion structure, increasing the contact area between the above-mentioned electrode and the second direction of the N-type silicon wafer, and further reducing the contact resistance between the above-mentioned electrode and the N-type silicon wafer, which is beneficial for the electrode to collect more majority carriers and further improve the formation quality of the back contact.
[0022] In a possible implementation, the top planarization process of the textured surface structure includes: using a tank cleaning device and a second alkaline cleaning solution to etch the top of the pyramid-shaped textured surface structure.
[0023] In the case of adopting the above technical scheme, the tank cleaning equipment and the chain cleaning equipment are two commonly used cleaning equipment in the process of manufacturing solar cells. In addition, the cleaning chamber included in the chain cleaning equipment is often provided with a conveying roller, and the object to be cleaned needs to be conveyed to the cleaning tank provided in the corresponding cleaning chamber by the conveying roller to complete the cleaning treatment of the object to be cleaned. Based on this, in order to make the pyramid-shaped velvet surface fully contact with the second cleaning solution, it is necessary to place the N-type silicon wafer after the velvet treatment on the conveying roller, and make the top of the pyramid-shaped velvet structure contact with the conveying roller. At this time, because the top of the pyramid-shaped velvet structure is relatively sharp, the contact between the N-type silicon wafer after the velvet treatment and the conveying roller is not stable, which is not conducive to conveying it by the conveying roller, thereby affecting the effect of the top flattening treatment of the velvet structure. In the process of cleaning the velvet structure with a sharp top by the tank cleaning equipment, it is only necessary to place the N-type silicon wafer after the velvet treatment in the second alkaline solution contained in the tank cleaning equipment through a device such as a silicon wafer basket, so that the velvet structure can be fully contacted with the second alkaline solution, so as to obtain a convex structure with a flat top.
[0024] In a possible implementation, the second alkaline cleaning solution is a mixed solution of water, potassium hydroxide and a polishing additive, wherein the volume ratio of water, potassium hydroxide and the polishing additive is 340:16:3-5.
[0025] In the case of adopting the above technical solution, in the process of etching the top of the velvet structure by potassium hydroxide in the second alkaline cleaning solution, the polishing additive can adjust the longitudinal and lateral etching rates of potassium hydroxide, so as to obtain a convex structure with a flat top. At the same time, the specific volume ratio of the above polishing additive in the second alkaline cleaning solution can be appropriately adjusted within a certain range, so that the top size of the convex structure finally obtained can be adjusted by adjusting the volume ratio of the polishing additive, so as to improve the controllability and practicality of the manufacturing method of the solar cell provided by the present invention.
[0026] In a possible implementation, the etching conditions for etching the top of the pyramid-shaped textured structure with the second alkaline cleaning solution are: the temperature of the second alkaline cleaning solution is 57° C. to 63° C., and the process time is 55 s to 65 s.
[0027] When the above technical solution is adopted, when the temperature of the second alkaline cleaning solution is 57°C to 63°C and the process time is 55s to 65s, it is beneficial to obtain a convex structure with a flat top. At the same time, the top size of the convex structure finally obtained can be adjusted by adjusting the specific temperature of the second alkaline cleaning solution and the specific process time within the above range, and then the contact area between the electrode and the second direction side of the N-type silicon wafer can be adjusted to improve the controllability and practicality of the solar cell manufacturing method provided by the present invention.
[0028] In a possible implementation, after the top of the suede structure is flattened, the method for manufacturing the solar cell further includes:
[0029] A passivation contact structure is formed on one side of the N-type silicon wafer in the second direction after the top planarization treatment. The passivation contact structure includes a tunneling oxide layer and a doped silicon layer stacked in sequence.
[0030] A first passivation layer is formed on the diffusion layer.
[0031] Passivation treatment is performed on the first passivation layer and the doped silicon layer respectively to form a second passivation layer on both the first passivation layer and the doped silicon layer. The material of the second passivation layer is different from that of the first passivation layer.
[0032] A metallization process is performed on each side of the second passivation layer to form electrodes on the second passivation layer.
[0033] When the above technical solution is adopted, the above passivation contact structure can provide field-induced passivation for one side of the N-type silicon wafer in the second direction after the top flattening treatment and has selective permeability to carriers of different electrical properties, so that the majority of carriers can pass through the passivation contact structure and be collected by the corresponding electrodes, while the minority carriers are blocked in the passivation contact structure, thereby achieving full-surface passivation, effectively reducing recombination losses, and improving the photoelectric conversion efficiency of solar cells. In addition, a first passivation layer and a second passivation layer are formed on the diffusion layer to reduce the recombination rate of one side of the N-type silicon wafer in the first direction after the passivation treatment, so that more majority carriers can be collected by the corresponding electrodes on one side of the N-type silicon wafer in the first direction after the metallization treatment, thereby improving the photoelectric conversion efficiency of the solar cell. Similarly, the role of the second passivation layer formed on the doped silicon layer can refer to the role of the first passivation layer and the second passivation layer formed on the diffusion layer, which will not be repeated here.
[0034] In a possible implementation, the forming of the passivation contact structure on one surface of the N-type silicon wafer in the second direction after the top planarization process includes:
[0035] A passivation contact process is used to process one side of the second direction of the N-type silicon wafer after the top flattening treatment, and a tunneling oxide layer, a doped silicon layer and a phosphosilicate glass layer are stacked in sequence on one side of the second direction of the N-type silicon wafer after the top flattening treatment, and a wrap-around silicon layer and a wrap-around phosphosilicate glass layer are formed on at least a portion of the borosilicate glass layer to obtain a passivation contact structure.
[0036] After forming a passivation contact structure on one surface of the N-type silicon wafer in the second direction after the top planarization treatment, and before forming a first passivation layer on the diffusion layer, the manufacturing method of the solar cell further includes:
[0037] The N-type silicon wafer treated by the passivation contact process is respectively subjected to etching and cleaning treatment on one side in the first direction and one side in the second direction to remove the coated silicon layer, the coated phosphosilicate glass layer, the borosilicate glass layer and the phosphosilicate glass layer.
[0038] In a second aspect, the present invention further provides a solar cell, the solar cell comprising an N-type silicon wafer, a diffusion layer and a protrusion structure. The diffusion layer is formed on one side of the N-type silicon wafer in a first direction. The protrusion structure is formed on one side of the N-type silicon wafer in a second direction, and the top of the protrusion structure is flat.
[0039] In a possible implementation, the top cross-sectional area of the protruding structure is smaller than the bottom cross-sectional area.
[0040] In a possible implementation, the protrusion structure is a prism-shaped protrusion structure.
[0041] In a possible implementation, the solar cell further includes a passivation contact structure, a first passivation layer, a second passivation layer, and an electrode. The passivation contact structure includes a tunneling oxide layer and a doped silicon layer stacked in sequence on one side of the second direction of the N-type silicon wafer. The first passivation layer is formed on the diffusion layer. A second passivation layer is formed on both the first passivation layer and the doped silicon layer, and the material of the second passivation layer is different from that of the first passivation layer. The electrode is formed on each side of the second passivation layer.
[0042] In a possible implementation, when the protruding structure is a pyramidal protruding structure, the diagonal length of the top cross section of the protruding structure is 1.5 μm to 4 μm.
[0043] The beneficial effects of the second aspect of the present invention and its various implementations can be analyzed by referring to the beneficial effects of the first aspect and its various implementations, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS
[0044] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:
[0045] Figure 1 It is a schematic diagram of a longitudinal cross-section of the structure of a solar cell in the prior art;
[0046] Figure 2 A flow chart of a method for manufacturing a solar cell provided by an embodiment of the present invention;
[0047] Figure 3 A longitudinal schematic diagram of a structure after boron diffusion treatment in an embodiment of the present invention;
[0048] Figure 4 It is a longitudinal schematic diagram of another structure after boron diffusion treatment in an embodiment of the present invention;
[0049] Figure 5 It is a schematic diagram of the operation of removing the coated borosilicate glass layer by using a chain cleaning device in an embodiment of the present invention;
[0050] Figure 6 It is a schematic diagram of the operation of removing the surrounding plated diffusion layer by using a tank cleaning device in an embodiment of the present invention;
[0051] Figure 7 It is a longitudinal schematic diagram of a structure after the texturing treatment in an embodiment of the present invention;
[0052] Figure 8 It is a longitudinal schematic diagram of another structure after the texturing treatment in the embodiment of the present invention;
[0053] Fig. 9 A schematic diagram of an operation of etching the top of a velvet structure using a second alkaline cleaning solution in an embodiment of the present invention;
[0054] Fig.10 Another schematic diagram of an operation of etching the top of a velvet structure using a second alkaline cleaning solution in an embodiment of the present invention;
[0055] Fig.11 It is a longitudinal schematic diagram of a structure after top flattening treatment in an embodiment of the present invention;
[0056] Fig.12 It is a longitudinal schematic diagram of another structure after top flattening treatment in an embodiment of the present invention;
[0057] Fig.13 It is a longitudinal schematic diagram of a structure after the passivation contact process is performed in an embodiment of the present invention;
[0058] Fig.14 It is a longitudinal schematic diagram of another structure after the passivation contact process is performed in an embodiment of the present invention;
[0059] Fig.15It is a longitudinal schematic diagram of the structure after the first passivation layer is formed in an embodiment of the present invention;
[0060] Fig.16 It is a longitudinal schematic diagram of the structure after forming the second passivation layer and the electrode in the embodiment of the present invention;
[0061] Fig.17 for Fig.16 A magnified view of a portion of the structure shown.
[0062] Reference numerals:
[0063] 1 is N-type silicon wafer, 2 is diffusion layer, 3 is borosilicate glass layer,
[0064] 4 is a plated diffusion layer, 5 is a plated borosilicate glass layer, 6 is a velvet structure,
[0065] 7 is a protruding structure, 8 is a tunneling oxide layer, 9 is a doped silicon layer,
[0066] 10 is a phosphorus-silicon glass layer, 11 is a winding-plated silicon layer, 12 is a winding-plated phosphorus-silicon glass layer,
[0067] 13 is a first passivation layer, 14 is a second passivation layer, 15 is an electrode,
[0068] 16 is an acidic cleaning solution, 17 is a conveying roller, 18 is a first alkaline cleaning solution,
[0069] 19 is a second alkaline cleaning solution. DETAILED DESCRIPTION
[0070] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present disclosure. In addition, in the following description, descriptions of well-known structures and technologies are omitted to avoid unnecessary confusion of the concepts of the present disclosure.
[0071] Various structural schematic diagrams according to embodiments of the present disclosure are shown in the accompanying drawings. These figures are not drawn to scale, and some details are magnified and some details may be omitted for the purpose of clear expression. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships therebetween are only exemplary, and may deviate in practice due to manufacturing tolerances or technical limitations, and those skilled in the art may further design regions / layers with different shapes, sizes, and relative positions according to actual needs.
[0072] In the context of the present disclosure, when a layer / element is referred to as being "on" another layer / element, the layer / element may be directly on the other layer / element, or there may be an intermediate layer / element between them. In addition, if a layer / element is "on" another layer / element in one orientation, then when the orientation is reversed, the layer / element may be "under" the other layer / element. In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.
[0073] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "multiple" is two or more, unless otherwise clearly and specifically defined. The meaning of "several" is one or more, unless otherwise clearly and specifically defined.
[0074] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0075] At present, the mainstream battery products in the photovoltaic market are Passivated Emitter and Rear Cell (PERC) batteries. The back of the PERC battery introduces a passivated local open hole contact structure of dielectric layers such as silicon oxide, aluminum oxide, and silicon nitride, which can reduce the electrical recombination rate of the back surface to a certain extent. However, the PERC battery limits the contact range of the back to the open hole area, which increases the process complexity and causes etching damage to the silicon substrate during the opening process, thereby increasing the recombination rate of the metal contact area, resulting in a low photoelectric conversion efficiency of the solar cell.
[0076] In response to the above technical problems, technicians in this field have developed a tunnel oxide passivated contact (Tunnel Oxide Passivated Contact, abbreviated as TOPCon) battery. The TOPCon battery is manufactured using a passivation contact process, which does not require openings on the back and can achieve full-surface passivation, thereby effectively reducing recombination losses. Specifically, the TOPCon battery uses a chemical method to form an ultra-thin silicon oxide layer on the back of the battery, and deposits a doped silicon thin layer on the ultra-thin silicon oxide layer, and the two together form a passivation contact structure. Because the thickness of the ultra-thin silicon oxide layer in the passivation contact structure is small. In addition, the doped silicon thin layer provides field passivation and has selective permeability to carriers, so the majority carriers can penetrate these two passivation layers, while the minority carriers are blocked. Based on this, a metal electrode is formed on the passivation contact structure to obtain a passivation contact without openings. At this time, the metal electrode can collect the majority carriers that penetrate the ultra-thin silicon oxide layer and the doped silicon thin layer, and the minority carriers blocked in the passivation contact structure cannot recombine with the majority carriers in the metal contact area, thereby reducing the recombination rate.
[0077] In the actual manufacturing process of the above-mentioned TOPCon battery, taking the silicon wafer as an N-type silicon wafer as an example, the front side of the N-type silicon wafer is first subjected to boron diffusion treatment to form a diffusion layer and a borosilicate glass layer stacked in sequence on the front side of the N-type silicon wafer. In addition, due to the wrapping plating, a wrapping diffusion layer and a wrapping borosilicate glass layer will be formed on the side and back of the N-type silicon wafer. Then, before the back side of the N-type silicon wafer is processed by the passivation contact process, the wrapping diffusion layer and the wrapping borosilicate glass layer need to be removed to prevent the upper electrode and the lower electrode of the manufactured solar cell from forming a short circuit through the wrapping diffusion layer. Finally, an oxide layer and a doped silicon layer can be formed in sequence on the back side of the N-type silicon wafer by the passivation contact process, and the front and back sides of the N-type silicon wafer after the passivation contact process are passivated and metallized in sequence to realize the manufacture of the TOPCon battery.
[0078] Specifically, after removing the surrounding diffusion layer using the existing manufacturing method, the sides and back of the processed N-type silicon wafer are usually fully polished to ensure that the formed surrounding diffusion layer is completely removed to prevent short circuit of the solar cell. Fully polishing the back of the N-type silicon wafer will make the back of the N-type silicon wafer flatter. At this time, although the oxide layer can be formed on the relatively flat back side, the back passivation effect of the solar cell can be improved by increasing the density of the oxide layer. However, if Figure 1As shown, when the lateral size of the area formed on the back of the lower electrode of the solar cell is constant, the flatter the back of the N-type silicon wafer 1, the smaller the contact area between the lower electrode and the back of the N-type silicon wafer 1 is relative to the contact area of the velvet structure, resulting in a large contact resistance between the lower electrode and the N-type silicon wafer 1, which is not conducive to the lower electrode collecting the majority of carriers, thereby making the photoelectric conversion efficiency of the solar cell low. It can be seen that the existing method for removing the borosilicate glass layer 5 and the diffusion layer 4 is difficult to form a good back contact while ensuring that the diffusion layer 4 is completely removed, which reduces the photoelectric conversion efficiency of the solar cell.
[0079] like Figure 2 As shown, in order to solve the above technical problems, the embodiment of the present invention provides a solar cell and a method for manufacturing the same. Figures 3 to 17 The cross-sectional view of the structure after corresponding processing is shown to describe the manufacturing method of the solar cell provided by the embodiment of the present invention. Specifically, the manufacturing method of the solar cell includes the following steps:
[0080] like Figure 3 and Figure 4 As shown, boron diffusion treatment is performed on one side of the N-type silicon wafer 1 in the first direction, and a diffusion layer 2 and a borosilicate glass layer 3 stacked in sequence are formed on one side of the N-type silicon wafer 1 in the first direction, and a wrap-around diffusion layer 4 and a wrap-around borosilicate glass layer 5 stacked in sequence are formed on the side surface and one side of the N-type silicon wafer 1 in the second direction.
[0081] Among them, one side of the N-type silicon wafer in the first direction can be the front side of the N-type silicon wafer, which is consistent with the front side of the solar cell. Correspondingly, one side of the N-type silicon wafer in the second direction can be the back side of the N-type silicon wafer, which is consistent with the back side of the solar cell. In addition, from a structural point of view, the N-type silicon wafer can be an N-type silicon wafer after a velvet treatment is performed on one side in the first direction. From a material point of view, the N-type silicon wafer can be an N-type single crystal silicon wafer or an N-type multi-crystalline silicon wafer. For example: the N-type silicon wafer can be an N-type single crystal silicon wafer, and one side in the first direction has a velvet structure.
[0082] Exemplarily, in the case of an N-type silicon wafer that has been subjected to a texturing treatment on one side in the first direction, an alkaline solution can be used to treat the one side in the first direction of the N-type silicon wafer to form a pyramid morphology or other texturing structure that meets the working requirements on the one side in the first direction of the N-type silicon wafer. The alkaline solution can be any alkaline solution that can achieve texturing treatment. For example, the alkaline solution can be a potassium hydroxide solution or a sodium hydroxide solution. The texturing structure on the one side in the first direction of the N-type silicon wafer can trap light to reduce the reflection of light by the solar cell, so that more light can be refracted into the solar cell, thereby improving the utilization rate of light energy by the solar cell. Then, a boron diffusion treatment can be performed on the one side in the first direction of the N-type silicon wafer by any one of a BBr3 liquid source diffusion process, an ion implantation process, and a doping source coating and advancement process. Specifically, as Figure 3 and Figure 4 As shown, after the boron diffusion treatment is performed on one side of the N-type silicon wafer 1 in the first direction, not only a diffusion layer 2 is formed on the one side of the N-type silicon wafer 1 in the first direction, but also a wrap-around diffusion layer 4 is formed on at least a partial area (the area is located at the edge of the one side in the second direction) and the side of the one side of the N-type silicon wafer 1 in the second direction due to wrap-around plating. For example: Figure 3 As shown, the plated diffusion layer 4 is formed on a partial area and side surface of one side in the second direction of the N-type silicon wafer 1. Figure 4 As shown, the wrap-around diffusion layer 4 covers the entire area and side surfaces of one side in the second direction of the N-type silicon wafer 1. Among them, the range of the wrap-around diffusion layer 4 on one side in the second direction of the N-type silicon wafer 1 is related to the process parameters set when the boron diffusion treatment is performed. For example: when the boron diffusion treatment is performed by the BBr3 liquid source diffusion process, the higher gas flow rate and diffusion temperature will cause the wrap-around diffusion layer 4 to be formed on one side in the second direction of the N-type silicon wafer 1. The range is increased. In addition, in the process of performing boron diffusion treatment on one side in the first direction of the N-type silicon wafer 1, not only the above-mentioned diffusion layer 2 and the above-mentioned wrap-around diffusion layer 4 will be formed on the surface of the N-type silicon wafer 1, but also a borosilicate glass layer 3 will be formed on the diffusion layer 2, and a wrap-around borosilicate glass layer 5 will be formed on the wrap-around diffusion layer 4.
[0083] It should be noted that in some solar cell manufacturing methods, the above-mentioned texturing process on one side of the N-type silicon wafer in the first direction can also be omitted. In addition, since boron is a trivalent element, the doping type of the diffusion layer and the surrounding diffusion layer after the boron diffusion process is P+ type.
[0084] like Figures 5 to 8 As shown, the borosilicate glass layer 5 and the diffusion layer 4 are removed in sequence. The second side of the N-type silicon wafer 1 is subjected to a texturing process to form a texturing structure 6 on the second side of the N-type silicon wafer 1 .
[0085] It is understandable that if Fig.16 and Fig.17 As shown, the upper and lower electrodes of the solar cell are respectively located on one side in the first direction and one side in the second direction of the N-type silicon wafer 1. Figure 3 and Figure 4 As shown, after the boron diffusion treatment, not only a diffusion layer 2 and a borosilicate glass layer 3 are formed on one side of the N-type silicon wafer 1 in the first direction, but also a plated diffusion layer 4 and a plated borosilicate glass layer 5 are formed on at least a partial area of one side of the second direction of the N-type silicon wafer 1 (the area is located at the edge of one side of the second direction) and the side surface due to the plated diffusion layer 4. Based on this, the existence of the plated diffusion layer 4 will cause a short circuit between the upper and lower electrodes of the solar cell. Therefore, before the subsequent treatment, the plated borosilicate glass layer 5 and the plated diffusion layer 4 plated on the N-type silicon wafer 1 are removed in sequence, and the one side of the second direction of the N-type silicon wafer 1 is subjected to a texturing treatment, which can prevent the upper and lower electrodes of the solar cell from being short-circuited through the plated diffusion layer 4, thereby improving the working reliability of the solar cell. Moreover, after the plated diffusion layer 4 is completely removed, the leakage current between the upper and lower electrodes of the solar cell is reduced. Moreover, according to Ohm's law, the parallel resistance of the solar cell itself is inversely proportional to the leakage current. Therefore, when the leakage current is reduced, the parallel resistance of the solar cell itself can be increased, which is beneficial to improving the working performance of the solar cell.
[0086] At the same time, if Figure 7 and Figure 8 As shown, compared with the prior art in which one side of the N-type silicon wafer in the second direction is polished after removing the bypass diffusion layer, the above-mentioned texturing treatment can increase the etching amount of one side of the N-type silicon wafer 1 in the second direction from about 0.16g to about 0.3g, ensuring that the bypass diffusion layer 4 can be completely removed while increasing the undulation of one side of the N-type silicon wafer 1 in the second direction, so as to facilitate the subsequent acquisition of a flat-topped convex structure on one side of the N-type silicon wafer 1 in the second direction based on the velvet structure 6.
[0087] Specifically, the specific shape and specifications of the velvet structure can be set according to actual needs, as long as it can be applied to the solar cell manufacturing method provided in the embodiment of the present invention. For example, the velvet structure can be a pyramid-shaped velvet structure or a V-shaped groove velvet structure. Figure 7 and Figure 8 As shown, compared with the V-groove velvet structure, the pyramid-shaped velvet structure is more densely distributed. Therefore, when the surface area of one side of the second direction of the N-type silicon wafer 1 is constant, more pyramid-shaped velvet structures can be formed on the surface, thereby increasing the density of the subsequent convex structure formed based on the velvet structure 6. Fig.16 and Fig.17As shown, when the lateral size of the electrode 15 is constant, obtaining more protruding structures on one side of the N-type silicon wafer 1 in the second direction can increase the contact area between the electrode 15 and one side of the N-type silicon wafer 1 in the second direction, which is more conducive to reducing the contact resistance between the above-mentioned electrode 15 and the N-type silicon wafer 1, thereby being more conducive to forming a good back contact.
[0088] Exemplarily, the above-mentioned sequentially removing the borosilicate glass layer and the diffusion layer, and performing a texturing process on one side of the N-type silicon wafer in the second direction to form a texturing structure on one side of the N-type silicon wafer in the second direction may include the following steps:
[0089] like Figure 5 As shown, a chain cleaning device is used and an acid cleaning solution 16 is adopted to remove the surrounding borosilicate glass layer 5 .
[0090] Specifically, the acidic cleaning solution can be any acidic solution that can remove the borosilicate glass layer. For example, the acidic cleaning solution can be hydrofluoric acid. The concentration and liquid level of the acidic cleaning solution, as well as the process conditions when removing the borosilicate glass layer by the acidic cleaning solution, can be set according to actual needs, as long as they can be applied to the method for manufacturing solar cells provided in the embodiment of the present invention. For example, when the acidic cleaning solution is hydrofluoric acid, the concentration of hydrofluoric acid can be about 40%.
[0091] In actual application, when the borosilicate glass layer is removed by using a chain cleaning device, the second side of the N-type silicon wafer after the boron diffusion treatment can be brought into contact with the conveying roller included in the chain cleaning device. The conveying roller is used to convey the N-type silicon wafer after the boron diffusion treatment to the pickling tank containing the above-mentioned acidic cleaning solution in the chain cleaning device. Figure 5As shown, the liquid level of the acid cleaning solution 16 in the pickling tank can be higher than the side of the N-type silicon wafer 1 in the second direction and lower than the side of the N-type silicon wafer 1 in the first direction. At this time, each area of the borosilicate glass layer 5 formed by the wrapping plating can contact and react with the acid cleaning solution 16 in the pickling tank, which is convenient for removing the borosilicate glass layer 5. At the same time, because the side of the N-type silicon wafer 1 in the second direction after the boron diffusion treatment faces the conveying roller 17, the diffusion layer 2 and the borosilicate glass layer 3 formed on the side of the N-type silicon wafer 1 in the first direction face upward. Moreover, the liquid level of the acidic cleaning solution 16 is lower than one side of the N-type silicon wafer 1 in the first direction, so the diffusion layer 2 and the borosilicate glass layer 3 cannot come into contact with the acidic cleaning solution 16 with a lower liquid level. As a result, after being treated with the acidic cleaning solution 16, the diffusion layer 2 and the borosilicate glass layer 3 are retained, and the borosilicate glass layer 3 can be used as a mask for subsequent removal of the coated diffusion layer 4 and texturing treatment by a tank cleaning device, thereby preventing the diffusion layer 2 and one side of the N-type silicon wafer 1 in the first direction from being affected by subsequent treatments, thereby improving the yield of solar cells.
[0092] like Figure 6 As shown, a tank cleaning device is used, and a first alkaline cleaning solution 18 is used to remove the surrounding plated diffusion layer 4, and to perform a texturing treatment on one side of the second direction of the N-type silicon wafer 1.
[0093] Specifically, the first alkaline cleaning solution can be any alkaline solution that can remove the diffusion layer around the plating and can perform texturing on one side of the second direction of the N-type silicon wafer. For example, the first alkaline cleaning solution can be a mixed solution of water, potassium hydroxide and a texturing additive. Among them, the texturing additive can be any texturing additive that can adjust the lateral and longitudinal corrosion rate of potassium hydroxide. For example, the texturing additive can be a texturing additive of model TS55 provided by Changzhou Shichuang Energy Technology Co., Ltd. In the above case, during the process of corrosion cleaning and texturing of the surrounding diffusion layer by potassium hydroxide in the first alkaline cleaning solution, the texturing additive can adjust the longitudinal and lateral corrosion rates of potassium hydroxide, so that the texturing structure formed on each area of the second direction side of the N-type silicon wafer after the texturing treatment is more regular and uniform, which is beneficial to obtain a more regular and uniform convex structure on the second direction side of the N-type silicon wafer after the subsequent top flattening treatment of the texturing structure, thereby making all electrodes located above each area of the second direction side of the N-type silicon wafer have a larger contact area with the N-type silicon wafer, which is beneficial to the collection of majority carriers by each of the above electrodes, and further improves the photoelectric conversion efficiency of solar cells.
[0094] Among them, the volume ratio of water, potassium hydroxide and texturing additive in the above-mentioned first alkaline cleaning solution can be: 354:5.5:2. At this time, the corrosion intensity of potassium hydroxide in the first alkaline cleaning solution during corrosion cleaning is moderate, so that when the N-type silicon wafer treated with the acidic cleaning solution is immersed in the first alkaline cleaning solution held by the tank cleaning equipment, it can also ensure that the diffusion layer formed on one side of the first direction of the N-type silicon wafer is not affected by the corrosion cleaning under the masking effect of the borosilicate glass layer, thereby improving the manufacturing efficiency of the solar cell. Of course, the volume ratio of the above three can also be adjusted according to the model of the texturing additive and actual needs, and is not limited to the above ratio.
[0095] In addition, the processing conditions for removing the bypass diffusion layer with the first alkaline cleaning solution and performing a velvet treatment on one side of the second direction of the N-type silicon wafer can also be set according to actual needs. For example, the above processing conditions can be that the temperature of the first alkaline cleaning solution is 77°C to 83°C, and the process time is 355s to 365s. In the above case, the bypass diffusion layer can be completely removed, and a regular and uniform velvet structure can be obtained, which ensures a good cleaning effect while preventing the problem of reduced manufacturing efficiency due to excessive process time.
[0096] In actual application, when using a tank cleaning device to remove the coated silicon layer and perform the above-mentioned texturing treatment, the side of the N-type silicon wafer in the second direction after being treated with the acidic cleaning solution can be brought into contact with the bottom of a transport device such as a silicon wafer basket. And the N-type silicon wafer treated with the acidic cleaning solution is placed in the first alkaline cleaning solution contained in the tank cleaning device through a transport device such as a silicon wafer basket. Specifically, the liquid level of the first alkaline cleaning solution can be higher than the side of the N-type silicon wafer in the second direction. The upper limit of the liquid level of the first alkaline cleaning solution can be set according to the actual application scenario. For example: Figure 6 As shown, the liquid level of the first alkaline cleaning solution 18 can be higher than one side of the N-type silicon wafer 1 in the first direction after being treated with the acidic cleaning solution, that is, the first alkaline cleaning solution 18 can completely immerse all regions of the N-type silicon wafer 1 treated with the acidic cleaning solution. Then, under the masking effect of the borosilicate glass layer 3, the first alkaline cleaning solution 18 can be used to remove the surrounding plated diffusion layer 4, and the one side of the N-type silicon wafer 1 in the second direction can be textured.
[0097] It should be noted that, when all regions of the N-type silicon wafer treated with the acidic cleaning solution are immersed in the first alkaline cleaning solution, after removing the plated diffusion layer located on at least part of the first direction of the N-type silicon wafer and the side surface, the second direction of the N-type silicon wafer and the side surface will be exposed. Based on this, in the process of texturing the second direction of the N-type silicon wafer with the first alkaline cleaning solution, the side surface of the N-type silicon wafer will also be texturized. Correspondingly, Figure 7 As shown in FIG. 1 , a corresponding textured surface structure 6 is also formed on the side of the N-type silicon wafer 1 after the textured surface treatment. Figure 8 As shown, the texturing treatment can also be performed only on one side of the N-type silicon wafer 1 in the second direction by adjusting the liquid level of the first alkaline cleaning solution 18 to obtain the textured structure 6. Specifically, the formation range of the textured structure can be set according to actual needs and is not specifically limited here.
[0098] It can be understood that the above-mentioned removal of the surrounding diffusion layer by using the first alkaline cleaning solution and the texturing treatment of one side of the N-type silicon wafer in the second direction can be carried out in the same tank cleaning equipment, thereby ensuring that the surrounding borosilicate glass layer is completely removed while reducing the time wasted in transporting the N-type silicon wafers after the corresponding treatment between different cleaning equipment, thereby improving the manufacturing efficiency of solar cells.
[0099] like Figures 9 to 12 As shown, the textured structure 6 is subjected to a top planarization process to obtain a convex structure 7 with a flat top on one surface of the N-type silicon wafer 1 in the second direction.
[0100] It is understandable that if Fig.11 and Fig.12 As shown, the protruding structure 7 is formed on one side of the N-type silicon wafer 1 in the second direction, and protrudes from one side of the N-type silicon wafer 1 in the second direction along a direction away from the N-type silicon wafer 1. Therefore, the existence of the protruding structure 7 increases the undulation of one side of the N-type silicon wafer 1 in the second direction. Based on this, Fig.16 and Fig.17As shown, when the lateral size of the formation area of the electrode 15 of the solar cell is located on one side of the second direction of the N-type silicon wafer 1 is constant, compared with the prior art in which the electrode is formed above one side of the second direction of the N-type silicon wafer after polishing, the contact area between the one side of the second direction of the N-type silicon wafer 1 with increased undulation and the subsequently formed electrode 15 is larger, which reduces the contact resistance between the electrode 15 and the N-type silicon wafer 1, and is conducive to the electrode 15 to collect the majority of carriers, so that a good back contact can be formed. At the same time, the series resistance of the solar cell can also be reduced. Based on this, because the fill factor of the solar cell is positively correlated with its parallel resistance, and the fill factor is negatively correlated with the series resistance of the solar cell, after the texturing treatment and top flattening treatment, the above fill factor will also increase with the increase of the parallel resistance and the decrease of the series resistance. Correspondingly, the photoelectric conversion efficiency of the solar cell is also higher, which can improve the working performance of the solar cell. In addition, after the texturing treatment, the top of the velvet structure is flattened to obtain a convex structure 7 with a flat top, so that the tunneling oxide layer 8 included in the solar cell can be formed on one side of the relatively flat N-type silicon wafer 1 in the second direction, so as to improve the density of the formed tunneling oxide layer 8, thereby being able to enhance the back passivation effect while forming a good back contact, thereby further improving the working performance of the solar cell.
[0101] Specifically, the specific shape of the protruding structure is determined by the shape of the velvet structure formed on one side of the N-type silicon wafer in the second direction. For example, when the velvet structure is a pyramidal velvet structure, the protruding structure is a prism-shaped protruding structure. Figures 7 to 12 As shown, when the velvet structure 6 is a pyramid-shaped velvet structure, the lateral cross-sectional area of the velvet structure 6 gradually decreases from the bottom to the top of the velvet structure 6. Therefore, after the top of the velvet structure 6 is flattened, the side of the prism-shaped protrusion structure obtained is an inclined surface. Fig.16 and Fig.17 As shown, under the condition that other factors are the same, compared with the protruding structure with the same height and the side perpendicular to the N-type silicon wafer, the protruding structure 7 with the inclined side has a larger side area, thereby increasing the area of the electrode 15 formed above the protruding structure 7, increasing the contact area between the electrode 15 and the one side of the N-type silicon wafer 1 in the second direction, further reducing the contact resistance between the above-mentioned electrode 15 and the N-type silicon wafer 1, making it more conducive for the electrode 15 to collect more majority carriers, and further improving the formation quality of the back contact.
[0102] In addition, as mentioned above, the presence of the above-mentioned raised structure increases the degree of undulation of one side of the N-type silicon wafer in the second direction, which can ultimately affect the contact quality between the electrode and one side of the N-type silicon wafer in the second direction. At the same time, the raised structure will also affect the compactness of the subsequently formed tunneling oxide layer, and thus can affect the passivation effect on one side of the N-type silicon wafer in the second direction. Based on this, the specifications of the raised structure after the top flattening treatment can be set according to the requirements for the above-mentioned contact quality and passivation effect in the actual application scenario. Specifically, under the same other factors, the greater the height of the raised structure (the lower the degree of top flattening treatment), the smaller the top flat surface area of the raised structure. The degree of undulation of one side of the N-type silicon wafer in the second direction is large. At this time, the contact area between the electrode located above one side of the N-type silicon wafer in the second direction and the N-type silicon wafer is larger, and the contact quality between the electrode and one side of the N-type silicon wafer in the second direction is higher. However, the smaller the top flat surface area of the raised structure will result in the poorer compactness of the tunneling oxide layer, and the corresponding poorer passivation effect of one side of the N-type silicon wafer in the second direction. Similarly, under the same conditions as other factors, the smaller the height of the protruding structure (the higher the degree of top flattening), the lower the contact quality between the electrode and the second direction side of the N-type silicon wafer, while the passivation effect of the second direction side of the N-type silicon wafer is higher.
[0103] For example, when the velvet structure is a pyramid-shaped velvet structure and the protrusion structure is a prism-shaped protrusion structure, the top flattening treatment of the velvet structure may include: Fig. 9 and Fig.10 As shown, a tank-type cleaning device is used and a second alkaline cleaning solution 19 is used to etch the top of the pyramid-shaped textured structure.
[0104] Specifically, the second alkaline cleaning solution can be any alkaline solution that can flatten the top of the velvet structure. For example, the second alkaline cleaning solution can be a mixed solution of water, potassium hydroxide and a polishing additive. The volume ratio of water, potassium hydroxide and polishing additive in the second alkaline cleaning solution can be 340:16:3-5 (for example, the volume ratio can be 340:16:3, 340:16:3.5, 340:16:4, 340:16:4.5 or 340:16:5, etc.). In this case, in the process of etching the top of the velvet structure by potassium hydroxide in the second alkaline cleaning solution, the polishing additive can adjust the longitudinal and lateral etching rate of potassium hydroxide, so as to obtain a convex structure with a flat top. Among them, the polishing additive can be any polishing additive that can adjust the lateral and longitudinal corrosion rate of potassium hydroxide. For example, the polishing additive can be a polishing additive of model BP51 provided by Shaoxing Tuobang Electronic Technology Co., Ltd. In addition, the volume ratio of the above three can also be adjusted according to the model of the polishing additive and actual needs, and is not limited to the above ratio.
[0105] In addition, the etching conditions for etching the top of the pyramid-shaped velvet structure with the second alkaline cleaning solution can be set according to actual needs. For example, the etching conditions can be: the temperature of the second alkaline cleaning solution is 57° C. to 63° C., and the process time is 55s to 65s.
[0106] In the actual application process, the specific operation of using a tank-type cleaning device to flatten the top of the velvet structure can refer to the specific operation of using a tank-type cleaning device to remove the surrounding plated diffusion layer and perform a velvet treatment as described above, and will not be repeated here. It should be additionally explained that the liquid level of the second alkaline cleaning solution contained in the tank-type cleaning device for top flattening can be set according to the formation range of the velvet structure obtained after the above-mentioned velvet treatment on the N-type silicon wafer, as well as actual needs. For example: Fig.10 As shown, when the textured structure obtained after the above-mentioned texture treatment is only formed on one side of the N-type silicon wafer 1 in the second direction, the liquid level of the second alkaline cleaning solution 19 is greater than or equal to one side of the N-type silicon wafer 1 in the second direction. Fig. 9 As shown, when the textured structure obtained after the above-mentioned texture treatment is formed on the side surface and one surface in the second direction of the N-type silicon wafer 1, the liquid level of the second alkaline cleaning solution 19 needs to be greater than or equal to one surface in the first direction of the N-type silicon wafer 1.
[0107] In addition, it is conceivable that the etching conditions of the top flattening treatment are different, and the specifications of the convex structure obtained on the second direction side of the N-type silicon wafer are also different. Specifically, within a certain range, the higher the temperature of the second alkaline cleaning solution or the longer the process time of the top flattening treatment, the higher the degree of top flattening treatment of the velvet structure. Correspondingly, the smaller the height of the convex structure obtained after the top flattening treatment, the larger its top surface area. As mentioned above, when the second alkaline cleaning solution is a mixed solution composed of water, potassium hydroxide and polishing additives, the smaller the volume ratio of the polishing additive in the second alkaline cleaning solution, the lower the degree of reduction of the longitudinal rate of potassium hydroxide corrosion of the velvet structure by the polishing additive. Correspondingly, the smaller the height of the convex structure obtained after the top flattening treatment, the larger its top surface area. In the above case, the target temperature of the second alkaline cleaning solution, the target process time, and the target volume ratio of the polishing additive in the second alkaline cleaning solution can be determined according to the requirements for the target top size of the convex structure obtained after the top flattening treatment, so that a convex structure with a target top size can be obtained by the second alkaline cleaning solution under the above target value. Accordingly, the undulation degree of one side of the N-type silicon wafer in the second direction is determined, so that the contact area between the electrode and one side of the N-type silicon wafer in the second direction meets the working requirements, that is, a good back contact can be obtained. In other words, the method for manufacturing a solar cell provided by an embodiment of the present invention can adjust the top size of the protruding structure and the back contact quality by adjusting the etching conditions of the top flattening treatment and the volume ratio of the polishing additive, so as to improve the controllability and practicality of the method for manufacturing a solar cell provided by the present invention.
[0108] In one example, after the top of the velvet structure is flattened, the above-mentioned method for manufacturing a solar cell may further include the following steps:
[0109] like Fig.13 and Fig.14 As shown, a passivation contact structure is formed on one side of the second direction of the N-type silicon wafer 1 after the top flattening treatment. The passivation contact structure includes a tunneling oxide layer 8 and a doped silicon layer 9 stacked in sequence. It should be understood that the above-mentioned passivation contact structure can provide field-induced passivation on one side of the second direction of the N-type silicon wafer after the top flattening treatment and has selective permeability to carriers of different electrical properties, so that the majority of carriers can pass through the passivation contact structure and be collected by the corresponding electrode, while the minority carriers are blocked in the passivation contact structure, thereby achieving full-surface passivation, effectively reducing recombination losses, and improving the photoelectric conversion efficiency of solar cells.
[0110] Specifically, the material and thickness of the tunneling oxide layer and the doped silicon layer can be set according to the actual application scenario, and are not specifically limited here. For example, the tunneling oxide layer can be a silicon oxide layer. The doped silicon layer can be a doped amorphous silicon layer or a doped polycrystalline silicon layer.
[0111] Exemplarily, the passivation contact structure formed on one side of the N-type silicon wafer in the second direction after the top planarization process may include: Fig.13 and Fig.14 As shown, a passivation contact process is used to process one side of the second direction of the N-type silicon wafer 1 after the top flattening treatment, and a tunneling oxide layer 8, a doped silicon layer 9 and a phosphosilicate glass layer 10 are stacked in sequence on one side of the second direction of the N-type silicon wafer 1 after the top flattening treatment, and a wrap-around silicon layer 11 and a wrap-around phosphosilicate glass layer 12 are formed on at least a portion of the borosilicate glass layer 3 to obtain a passivation contact structure.
[0112] In actual application, a tunneling oxide layer and a silicon layer can be sequentially deposited on one side of the second direction of the N-type silicon wafer after top flattening by low-pressure chemical vapor deposition, plasma enhanced chemical vapor deposition or atomic layer deposition. Among them, because the silicon layer will form a doped silicon layer after subsequent phosphorus diffusion treatment, the material of the silicon layer can refer to the material of the doped silicon layer described above, and will not be repeated here. In addition, while the silicon layer is deposited on the tunneling oxide layer, a wrap-around silicon layer will be formed on at least part of the borosilicate glass layer due to wrap-around plating (the wrap-around silicon layer is made of the same material as the silicon layer). For example: Fig.13 As shown, the wrap-around silicon layer 11 may be formed only on the edge region of the borosilicate glass layer 3. Fig.14 As shown, the wrap-around silicon layer 11 can cover the entire surface of the borosilicate glass layer 3. Specifically, the formation range of the wrap-around silicon layer on the borosilicate glass layer is related to the process parameters set when depositing the silicon layer. For example: when depositing the silicon layer, when the gas flow rate of the silicon-based gas introduced into the deposition chamber is large, the formation range of the wrap-around silicon layer is large. Then, the silicon layer can be treated with phosphorus diffusion through a thermal diffusion process or an ion implantation process, so that the silicon layer forms a doped silicon layer. Correspondingly, the wrap-around silicon layer is also doped with phosphorus impurities. At the same time, as Fig.13 and Fig.14 As shown, during the phosphorus diffusion process, a phosphosilicate glass layer 10 is formed on the doped silicon layer 9 , and a coated phosphosilicate glass layer 12 is formed on the coated silicon layer 11 .
[0113] After forming a passivation contact structure on one side in the second direction of the N-type silicon wafer after top flattening treatment, before forming a first passivation layer on the diffusion layer, the above-mentioned solar cell manufacturing method may also include: respectively performing etching and cleaning treatment on one side in the first direction and one side in the second direction of the N-type silicon wafer after the passivation contact process, to remove the coated silicon layer, the coated phosphosilicate glass layer, the borosilicate glass layer and the phosphosilicate glass layer.
[0114] It is understandable that, as described above, after the silicon layer is formed and the silicon layer is subjected to phosphorus diffusion treatment, not only will a doped silicon layer and a phosphosilicate glass layer be formed in sequence on the tunneling oxide layer, but also a doped silicon layer and a doped phosphosilicate glass layer will be formed in sequence on at least part of the borosilicate glass layer due to the doping. And it is only necessary to form a passivation contact structure on one side of the second direction of the N-type silicon wafer after the top flattening treatment, so before subsequent processing, it is necessary to remove the excess doped silicon layer, doped phosphosilicate glass layer, borosilicate glass layer and phosphosilicate glass layer. Specifically, the order of removal between the above four layers of film to be removed, the cleaning solution corresponding to the corresponding film to be removed, and the cleaning conditions when removing the corresponding film to be removed can be set according to the actual application scenario, and are not specifically limited here.
[0115] In the actual application process, a chain cleaning device can be used first, and hydrofluoric acid can be used to remove only the phosphosilicate glass layer on the wrapped silicon layer, so that the phosphosilicate glass layer on the doped silicon layer can be retained, so that the phosphosilicate glass layer can be used as a mask in the process of removing the wrapped silicon layer to protect the doped silicon layer from the influence of cleaning, thereby improving the manufacturing yield of solar cells. Then, a tank cleaning device can be used to remove the wrapped silicon layer with a potassium hydroxide solution. Then, a tank cleaning device or a chain cleaning device can be used to remove the phosphosilicate glass layer and the borosilicate glass layer respectively with hydrofluoric acid.
[0116] like Fig.15 As shown, a first passivation layer 13 is formed on the diffusion layer 2 .
[0117] Exemplarily, the first passivation layer can be formed by chemical vapor deposition or atomic layer deposition. The material and thickness of the first passivation layer can be set according to actual needs. For example, the material of the first passivation layer can be aluminum oxide. In this case, because the doping type of the diffusion layer is P+ type, and the negative fixed charge carried by aluminum oxide has a shielding effect on the electron carriers (minority carriers) on the silicon surface, the concentration of surface electron carriers can be reduced, thereby reducing the surface recombination rate, so that the electrode located on one side of the first direction of the N-type silicon wafer can collect more hole carriers, thereby improving the photoelectric conversion efficiency of the solar cell.
[0118] like Fig.16As shown, the first passivation layer 13 and the doped silicon layer 9 are respectively subjected to passivation treatment to form a second passivation layer 14 on both the first passivation layer 13 and the doped silicon layer 9. The material of the second passivation layer 14 is different from that of the first passivation layer 13.
[0119] Exemplarily, the second passivation layer can be formed on the first passivation layer and the doped silicon layer respectively by chemical vapor deposition or atomic layer deposition. The material and thickness of the second passivation layer can be set according to actual needs. For example, the material of the second passivation layer can be silicon nitride. In this case, since the silicon nitride layer has an anti-reflection effect, forming the second passivation layer on the first passivation layer and the doped silicon layer can increase the absorption of light by the solar cell and improve the utilization rate of light energy by the solar cell.
[0120] like Fig.16 and Fig.17 As shown, a metallization process is performed on each side of the second passivation layer 14 to form an electrode 15 on the second passivation layer 14 .
[0121] Exemplarily, the electrodes can be formed by printing and sintering. The electrode located on one side of the N-type silicon wafer in the first direction is the upper electrode of the solar cell. The electrode located above one side of the N-type silicon wafer in the second direction is the lower electrode of the solar cell. In addition, the specific position of the electrode on the second passivation layer and the material of the electrode can be set according to actual needs. For example, the material of the electrode can be a metal material such as silver, copper or nickel.
[0122] In a second aspect, an embodiment of the present invention further provides a solar cell. Fig.16 and Fig.17 As shown, the solar cell comprises an N-type silicon wafer 1, a diffusion layer 2 and a protruding structure 7. The diffusion layer 2 is formed on one surface of the N-type silicon wafer 1 in a first direction. The protruding structure 7 is formed on one surface of the N-type silicon wafer 1 in a second direction, and the top of the protruding structure 7 is flat.
[0123] The N-type silicon wafer may be an N-type single crystal silicon wafer or an N-type multi-crystalline silicon wafer. In addition, a velvet structure may be formed on one surface of the N-type silicon wafer in the first direction. The diffusion layer is the diffusion layer formed after the boron diffusion treatment as described above. Moreover, the convex structure is the convex structure obtained after the top flattening treatment as described above, so the specific specifications of the diffusion layer and the convex structure can be referred to in the above text, and will not be repeated here.
[0124] In some cases, such as Fig.16 and Fig.17As shown, the solar cell further includes a passivation contact structure, a first passivation layer 13, a second passivation layer 14 and an electrode 15. The passivation contact structure includes a tunneling oxide layer 8 and a doped silicon layer 9 stacked in sequence on one side of the second direction of the N-type silicon wafer 1. The first passivation layer 13 is formed on the diffusion layer 2. A second passivation layer 14 is formed on both the first passivation layer 13 and the doped silicon layer 9, and the material of the second passivation layer 14 is different from that of the first passivation layer 13. The electrode 15 is formed on each side of the second passivation layer 14. For information such as the materials and specifications of the passivation contact structure, the first passivation layer 13, the second passivation layer 14 and the electrode 15, please refer to the previous text.
[0125] Compared with the prior art, the beneficial effects of the solar cell provided by the embodiment of the present invention can be analyzed by referring to the beneficial effects of the method for manufacturing the solar cell provided by the above embodiment, which will not be described in detail here.
[0126] For example, Fig.16 and Fig.17 As shown, the top cross-sectional area of the above-mentioned raised structure 7 can be smaller than the bottom cross-sectional area. At this time, the side of the raised structure 7 is an inclined surface. Under the same conditions of other factors, compared with the raised structure with the same height and the side perpendicular to the N-type silicon wafer 1, the raised structure 7 with an inclined side has a larger side area, thereby increasing the area of the electrode 15 formed above the raised structure 7, increasing the contact area between the electrode 15 and the second direction of the N-type silicon wafer 1, and further reducing the contact resistance between the above-mentioned electrode 15 and the N-type silicon wafer, which is beneficial for the electrode 15 to collect more majority carriers and improve the formation quality of the back contact. Specifically, the degree to which the top cross-sectional area of the raised structure 7 is reduced compared to the bottom cross-sectional area can be set according to actual needs. For example: along the direction from the bottom to the top of the raised structure 7, the lateral cross-sectional area of the raised structure 7 can be reduced in a linear or arc-shaped manner. As Fig.16 and Fig.17 As shown, when the lateral cross-sectional area of the protruding structure 7 decreases linearly and the shape of the lateral cross-sectional area is rectangular, the protruding structure 7 is a prism-shaped protruding structure. At this time, the tunneling oxide layer 8, the doped silicon layer 9 and the lower electrode can be sequentially formed on the protruding structure 7 with an inclined plane, which facilitates the formation of the above structure.
[0127] For example, when the protrusion structure is a prism-shaped protrusion structure, the diagonal length of the top cross section of the protrusion structure can be 1.5 μm to 4 μm. At this time, the height and the top cross-sectional area of the protrusion structure are moderate, so that while forming a good back contact, the tunneling oxide layer formed on the second direction side of the N-type silicon wafer can have a certain density, taking into account the passivation effect of the second direction side of the N-type silicon wafer.
[0128] In the above description, the technical details of the patterning and etching of each layer are not described in detail. However, those skilled in the art should understand that various technical means can be used to form layers, regions, etc. of desired shapes. In addition, in order to form the same structure, those skilled in the art can also design methods that are not completely the same as the methods described above. In addition, although the various embodiments are described above separately, this does not mean that the measures in the various embodiments cannot be used in combination to advantage.
[0129] The embodiments of the present disclosure are described above. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of the present disclosure. The scope of the present disclosure is defined by the appended claims and their equivalents. Without departing from the scope of the present disclosure, a person skilled in the art may make a variety of substitutions and modifications, which should all fall within the scope of the present disclosure.
Claims
1. A method for manufacturing a solar cell, characterized in that: include: Performing boron diffusion treatment on one side of the N-type silicon wafer in the first direction, forming a diffusion layer and a borosilicate glass layer stacked in sequence on the one side of the N-type silicon wafer in the first direction, and forming a wrap-around diffusion layer and a wrap-around borosilicate glass layer stacked in sequence on the side surface of the N-type silicon wafer and one side of the second direction; The borosilicate glass layer and the diffusion layer are removed in sequence; and a texture treatment is performed on one side of the N-type silicon wafer in the second direction to form a texture structure on one side of the N-type silicon wafer in the second direction; The velvet structure is subjected to a top planarization process to obtain a convex structure with a flat top on one surface of the N-type silicon wafer in the second direction.
2. The method for manufacturing a solar cell according to claim 1, characterized in that: The method of sequentially removing the wrap-around borosilicate glass layer and the wrap-around diffusion layer; and performing a texturing process on one side of the N-type silicon wafer in the second direction to form a texturing structure on one side of the N-type silicon wafer in the second direction includes: Using a chain cleaning device and an acidic cleaning solution to remove the coated borosilicate glass layer; A tank cleaning device is used and a first alkaline cleaning solution is adopted to remove the plated diffusion layer and to perform the texturing treatment on one side of the second direction of the N-type silicon wafer.
3. The method for manufacturing a solar cell according to claim 2, characterized in that: The first alkaline cleaning solution is a mixed solution of water, potassium hydroxide and a texturing additive; the volume ratio of the water, the potassium hydroxide and the texturing additive is: 354:5.5:2; and / or, The processing conditions for using the first alkaline cleaning solution to remove the bypass diffusion layer and performing the texturing treatment on one side of the second direction of the N-type silicon wafer are as follows: the temperature of the first alkaline cleaning solution is 77°C to 83°C, and the process time is 355s to 365s.
4. The method for manufacturing a solar cell according to claim 1, characterized in that: The velvet structure is a pyramid-shaped velvet structure; and the protrusion structure is a prism-shaped protrusion structure.
5. The method for manufacturing a solar cell according to claim 4, characterized in that: The top flattening process of the suede structure comprises: A tank cleaning device is used and a second alkaline cleaning solution is adopted to etch the top of the pyramid-shaped textured structure.
6. The method for manufacturing a solar cell according to claim 5, characterized in that: The second alkaline cleaning solution is a mixed solution of water, potassium hydroxide and a polishing additive; the volume ratio of the water, the potassium hydroxide and the polishing additive is 340:16:3-5; and / or, The etching conditions for etching the top of the pyramid-shaped velvet structure using the second alkaline cleaning solution are: the temperature of the second alkaline cleaning solution is 57° C. to 63° C., and the process time is 55s to 65s.
7. The method for manufacturing a solar cell according to any one of claims 1 to 6, characterized in that: After the velvet structure is subjected to top planarization treatment, the method for manufacturing a solar cell further comprises: Forming a passivation contact structure on one side of the N-type silicon wafer in the second direction after the top planarization treatment; the passivation contact structure comprises a tunneling oxide layer and a doped silicon layer stacked in sequence; forming a first passivation layer on the diffusion layer; Performing passivation treatment on the first passivation layer and the doped silicon layer respectively to form a second passivation layer on both the first passivation layer and the doped silicon layer; the material of the second passivation layer is different from that of the first passivation layer; A metallization process is performed on each side of the second passivation layer to form an electrode on the second passivation layer.
8. The method for manufacturing a solar cell according to claim 7, characterized in that: The forming of a passivation contact structure on one surface of the N-type silicon wafer in the second direction after the top planarization process comprises: A passivation contact process is used to process one side of the N-type silicon wafer in the second direction after the top planarization process, and the tunneling oxide layer, the doped silicon layer and the phosphosilicate glass layer are stacked in sequence on the one side of the N-type silicon wafer in the second direction after the top planarization process, and a wrap-around silicon layer and a wrap-around phosphosilicate glass layer are formed on at least part of the borosilicate glass layer to obtain the passivation contact structure; After forming the passivation contact structure on one surface of the N-type silicon wafer in the second direction after the top planarization treatment and before forming the first passivation layer on the diffusion layer, the method for manufacturing a solar cell further includes: The N-type silicon wafer treated by the passivation contact process is respectively subjected to etching and cleaning treatment on one side in the first direction and one side in the second direction to remove the plated silicon layer, the plated phosphosilicate glass layer, the borosilicate glass layer and the phosphosilicate glass layer.
9. A solar cell, characterized in that: include: N-type silicon wafer, diffusion layer and protrusion structure; The diffusion layer is formed on one surface of the N-type silicon wafer in the first direction; The protruding structure is formed on one face and a side face in the second direction of the N-type silicon wafer, and the top of the protruding structure is flat; the protruding structure is a prism-shaped protruding structure, and the diagonal length of the top cross section of the protruding structure is 1.5 μm to 4 μm.
10. The solar cell according to claim 9, characterized in that: The top cross-sectional area of the protrusion structure is smaller than the bottom cross-sectional area; and / or, The solar cell also includes a passivation contact structure, a first passivation layer, a second passivation layer and an electrode; wherein the passivation contact structure includes a tunneling oxide layer and a doped silicon layer stacked in sequence on one side of the second direction of the N-type silicon wafer; the first passivation layer is formed on the diffusion layer; the second passivation layer is formed on both the first passivation layer and the doped silicon layer, and the material of the second passivation layer is different from that of the first passivation layer; the electrode is formed on each side of the second passivation layer.
Citation Information
Patent Citations
Selective emitter solar cell and preparation method thereof
CN112466967A