Optoelectronic semiconductor component having an insulating layer and method for producing an optoelectronic semiconductor component

By designing step structures and multi-layer insulating structures in LEDs, the problem of low heat discharge efficiency of LEDs is solved, and more efficient heat dissipation and longer service life are achieved.

CN113614934BActive Publication Date: 2025-04-25OSRAM OPTO SEMICON GMBH & CO OHG
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Patent Information

Application Number
CN202080021800.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-03-19
Filing Date
2020-03-16
Publication Date
2025-04-25
Estimated Expiration
2040-03-16

AI Technical Summary

Technical Problem

LEDs generate heat during operation, resulting in reduced efficiency, and it is difficult for the prior art to effectively discharge heat.

Method used

A photoelectric semiconductor component is designed, which includes a stepped structure formed by the first and second semiconductor layers, the first insulating layer as a conformal layer, the second insulating layer thickness is smaller than the minimum layer thickness of the first insulating layer, and is electrically connected to the second current expansion structure to improve heat dissipation.

Benefits of technology

By reducing thermal resistance, the heat dissipation efficiency of photoelectric semiconductor components is improved, the service life of LEDs is extended, and the optical output power and efficiency are improved.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention relates to an optoelectronic semiconductor component (10), comprising a first semiconductor layer (110) of a first conductivity type and a second semiconductor layer (120) of a second conductivity type. The optoelectronic semiconductor component (10) further comprises: a first contact layer (130) which is arranged to be in direct contact with the first semiconductor layer (110) and is conductive; and a first insulating layer (125) which is formed on the first and second semiconductor layers (110, 120); and a second current spreading structure (135) which is electrically connected to the second semiconductor layer (120). The maximum lateral dimension of the second semiconductor layer (120) is greater than the maximum lateral dimension of the first semiconductor layer (110), thereby forming a step structure, and the first insulating layer (125) is designed as a conformal layer on the step structure of the first and second semiconductor layers. The optoelectronic semiconductor component further comprises a second insulating layer (127) between the horizontal surface of the first contact layer (130) and the second current spreading structure (135). The layer thickness of the second insulating layer (127) is less than the minimum layer thickness of the first insulating layer (125) on the step structure.
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Description

Technical Field

[0001] This patent application claims the priority of German patent application DE 10 2019 106 938.6, the disclosure content of which is incorporated herein by reference. Background Art

[0002] A light emitting diode (LED) is a light emitting device based on semiconductor materials. For example, an LED comprises a pn junction. When electrons and holes recombine with each other in the region of the pn junction, for example due to application of a corresponding voltage, electromagnetic radiation is generated.

[0003] A problem in the operation of LEDs is the generation of heat. In order to increase the efficiency of LEDs, designs are sought which can dissipate the generated heat in an improved manner. Summary of the invention

[0004] The object of the present invention is to provide an improved optoelectronic semiconductor component and an improved method for producing an optoelectronic semiconductor component.

[0005] According to the invention, the above-mentioned technical problem is solved by the objects and methods of the independent claims. Advantageous developments are defined in the dependent claims.

[0006] The optoelectronic semiconductor component comprises a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type, wherein the first and second semiconductor layers are stacked one above the other to form a semiconductor layer stack. The optoelectronic semiconductor component further comprises a first contact layer, which is arranged to be in direct contact with the first semiconductor layer and is conductive; a first insulating layer formed on the first and second semiconductor layers; and a second current spreading structure electrically connected to the second semiconductor layer. The maximum lateral dimension of the second semiconductor layer is greater than the maximum lateral dimension of the first semiconductor layer, thereby forming a stepped structure. The first insulating layer is designed as a conformal layer (konforme Schicht) on the stepped structure of the first and second semiconductor layers. The optoelectronic semiconductor component further comprises a second insulating layer between the horizontal surface of the first contact layer and the second current spreading structure, wherein the layer thickness of the second insulating layer is less than the minimum layer thickness of the first insulating layer on the stepped structure.

[0007] According to an embodiment, the optoelectronic semiconductor component further comprises a first current spreading layer which is arranged on a side of the first contact layer facing away from the first semiconductor layer and is in direct contact with the first contact layer.

[0008] For example, the lateral dimensions of the current spreading layer are smaller than the lateral dimensions of the contact layer.

[0009] The current spreading layer may adjoin at least two side surfaces of the contact layer.

[0010] The optoelectronic semiconductor component further comprises a passivation layer adjoining the exposed region of the step structure. The passivation layer can be removed from the horizontal surface of the current spreading layer.

[0011] According to another embodiment, the optoelectronic semiconductor component includes a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type, wherein the first and second semiconductor layers are stacked one above the other to form a semiconductor layer stack. The optoelectronic semiconductor component also has a first contact layer, which is arranged to be in direct contact with the first semiconductor layer and is conductive. In addition, the optoelectronic semiconductor component also includes a passivation layer, a first insulating layer formed on the first and second semiconductor layers, and a second current spreading structure electrically connected to the second semiconductor layer. The lateral dimensions of the second semiconductor layer are larger than the lateral dimensions of the first semiconductor layer, thereby forming a stepped structure, and the passivation layer is designed as a conformal layer on the side surface of the contact layer. The optoelectronic semiconductor component also has a second insulating layer between the horizontal surface of the first contact layer and the second current spreading structure, wherein the layer thickness of the second insulating layer is less than the minimum layer thickness of the first insulating layer on the stepped structure.

[0012] According to an embodiment, the optoelectronic semiconductor component further comprises a first current spreading layer which is arranged on a side of the first contact layer facing away from the first semiconductor layer and is in direct contact with the first contact layer, wherein the first current spreading layer adjoins a lateral surface of the contact layer.

[0013] For example, the lateral dimension of the current spreading layer is smaller than the lateral dimension of the contact layer.

[0014] For example, the current spreading layer may adjoin at least two side surfaces of the contact layer.

[0015] According to an embodiment, the passivation layer is removed from the horizontal surfaces of the current spreading layer.

[0016] For example, the layer thickness of the second insulating layer is less than half of the minimum layer thickness of the first insulating layer on the stepped structure. According to another embodiment, the layer thickness of the second insulating layer is less than one third of the minimum layer thickness of the first insulating layer on the stepped structure.

[0017] For example, the second current spreading structure is at least partially arranged on a side of the horizontal surface of the first contact layer facing away from the first semiconductor layer.

[0018] A method for manufacturing an optoelectronic semiconductor component comprises: forming a layer stack comprising a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type; forming a conductive first contact layer in direct contact with the first semiconductor layer, wherein the maximum lateral dimension of the second semiconductor layer is greater than the maximum lateral dimension of the first semiconductor layer, thereby forming a workpiece having a stepped structure; and conformally forming a first insulating layer on the stepped structure of the first and second semiconductor layers. The method also comprises forming a second insulating layer on a horizontal surface of the first contact layer, wherein the layer thickness of the second insulating layer is less than the minimum layer thickness of the first insulating layer on the stepped structure; and forming a second current spreading structure on the second insulating layer, wherein the second contact structure is electrically connected to the second semiconductor layer.

[0019] The method may further include forming a first current spreading layer after forming the contact layer.

[0020] For example, the method may additionally include forming a sacrificial metal layer before forming the first insulating layer. The method may further include forming a passivation layer before forming the first insulating layer.

[0021] According to an embodiment, a first insulating layer is formed on the horizontal region of the contact layer, and the method comprises subsequently removing the first insulating layer from the horizontal region of the workpiece before applying the second insulating layer.

[0022] According to another embodiment, a method for manufacturing an optoelectronic semiconductor component includes: forming a layer stack, the layer stack including a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type; forming a conductive first contact layer in direct contact with the first semiconductor layer, wherein the maximum lateral dimension of the second semiconductor layer is greater than the maximum lateral dimension of the first semiconductor layer, thereby forming a workpiece having a stepped structure; and conformally forming a passivation layer on the side surface of the first contact layer. The method also includes: forming a first insulating layer on the resulting workpiece; removing a portion of the first insulating layer from the horizontal surface of the workpiece; forming a second insulating layer on the horizontal surface of the first contact layer, wherein the layer thickness of the second insulating layer is less than the minimum layer thickness of the first insulating layer on the stepped structure; and forming a second current spreading structure on the second insulating layer, wherein the first contact layer is electrically connected to the second semiconductor layer.

[0023] For example, forming the first insulating layer may include forming the first insulating layer such that a minimum distance between a horizontal surface of the first insulating layer and a first major surface of the second semiconductor layer is greater than a maximum distance between the first major surface of the passivation layer and the first major surface of the second semiconductor layer.

[0024] According to an embodiment, an optoelectronic semiconductor device comprises an optoelectronic semiconductor component as described above. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The accompanying drawings are used to understand the embodiments of the present invention. The accompanying drawings show the embodiments and are used to explain these embodiments together with the description. Further embodiments and numerous intended advantages are directly derived from the detailed description below. The elements and structures shown in the accompanying drawings are not necessarily shown in proportion to each other. The same reference numerals indicate the same or corresponding elements and structures.

[0026] Figure 1A A schematic cross-sectional view of an optoelectronic semiconductor component according to one embodiment is shown.

[0027] Figure 1B A schematic cross-sectional view of an optoelectronic semiconductor component according to a further embodiment is shown.

[0028] FIG. 2A to FIG. 2F A schematic cross-sectional view of a workpiece in which a method according to an embodiment is performed is illustrated.

[0029] FIG. 3A to FIG. 3D A schematic cross-sectional view of a workpiece in which a method according to an embodiment is performed is illustrated.

[0030] 4A to 4D A schematic cross-sectional view of a workpiece in which a method according to an embodiment is performed is illustrated.

[0031] Figure 5 A schematic horizontal cross-sectional view of an optoelectronic semiconductor component according to one embodiment is shown.

[0032] Fig. 6A and Figure 6B A flow chart is shown for explaining a method according to an embodiment.

[0033] Figure 7 An optoelectronic device according to an embodiment is shown. DETAILED DESCRIPTION

[0034] In the following detailed description, reference is made to the accompanying drawings which form a part of the present disclosure and in which specific embodiments are shown for illustration purposes. In the present invention, directional terms such as "top", "bottom", "front", "back", "above", "above", "front", "back", "front", "back" and the like refer to the direction of the drawing being described. Since components of the embodiments can be positioned in different directions, the directional terms are used for explanation only and are not limiting.

[0035] The description of the embodiments is not restrictive, as there are other embodiments, and structural or logical changes may be made without departing from the scope defined by the claims. In particular, elements of the embodiments described below may be combined with elements of other embodiments described, unless the context indicates otherwise.

[0036] The semiconductor materials mentioned within the scope of this specification can be based in particular on direct semiconductor materials. Examples of semiconductor materials that are particularly suitable for generating electromagnetic radiation include in particular nitride semiconductor compounds such as GaN, InGaN, AlN, AlGaN, AlGalnN, AlGalnBN, through which ultraviolet, blue or longer wavelength light can be generated, and phosphide semiconductor compounds such as GaAsP, AlGalnP, GaP, AlGaP, through which green or longer wavelength light can be generated, and other semiconductor materials such as GaAs, AlGaAs, InGaAs, AlInGaAs, SiC, ZnSe, ZnO, Ga2O3, diamond, hexagonal BN and combinations of the above materials. The stoichiometric ratio of the composite semiconductor material can vary. Other examples of semiconductor materials can include silicon, silicon germanium and germanium. In the context of this description, the term "semiconductor" also includes organic semiconductor materials.

[0037] The terms “lateral” and “horizontal” as used in this specification are intended to describe an orientation or direction extending substantially parallel to a first surface of a substrate or semiconductor body, which may be, for example, the surface of a wafer or a chip.

[0038] The horizontal direction can lie, for example, in a plane perpendicular to the growth direction during layer growth.

[0039] The term “vertical” as used in this description is intended to describe an orientation which extends substantially perpendicularly to the first surface of the substrate or semiconductor body. The vertical direction can correspond, for example, to the growth direction during layer growth.

[0040] When the terms “comprising”, “including”, “having” and the like are used herein, they are open terms indicating the presence of stated elements or features but do not exclude the presence of additional elements or features. Indefinite and definite articles include both the plural and the singular, unless clearly indicated by the context.

[0041] In the context of this specification, the term "electrically connected" means a low-resistance electrical connection between connected elements. Electrically connected elements do not necessarily have to be directly connected to each other. Other elements may be arranged between electrically connected elements.

[0042] The term "electrical connection" also includes tunnel contacts between connection elements.

[0043] Figure 1AA vertical cross-sectional view of an optoelectronic semiconductor component according to an embodiment is shown. The optoelectronic semiconductor component 10 includes a first semiconductor layer 110 of a first conductivity type (e.g., p-conductivity) and a second semiconductor layer 120 of a second conductivity type (e.g., n-conductivity). The first semiconductor layer 110 and the second semiconductor layer 120 are stacked one above the other to form a semiconductor layer stack. The active region 115 can be arranged between the first semiconductor layer 110 and the second semiconductor layer 120. For example, the active region can be suitable for generating or receiving electromagnetic radiation 20. For example, the generated electromagnetic radiation 20 can be output through the first main surface 25 of the optoelectronic semiconductor component 10. In addition, the incident electromagnetic radiation can penetrate into the semiconductor layer stack through the main surface 25 of the optoelectronic semiconductor component 10. For example, the first main surface 25 of the optoelectronic semiconductor component 10 can be structured to increase the decoupling efficiency.

[0044] For example, the active region can have a pn junction, a double heterostructure, a single quantum well structure (SQW) or a multi quantum well structure (MQW) for generating radiation. Here, the term "quantum well structure" has no meaning for the quantized dimension. Therefore, quantum well structures include, among others, quantum wells, quantum wires and quantum dots, as well as any combination of these layers.

[0045] The first contact layer 130 is designed to be directly adjacent to the first semiconductor layer 110. For example, the first contact layer 130 may contain a highly reflective material, such as silver. According to an embodiment, the first contact layer 130 may also include a plurality of sublayers, for example, a transparent sublayer on one side of the first semiconductor layer 130 and a sublayer containing a highly reflective material. The transparent sublayer may, for example, contain zinc oxide or indium tin oxide (ITO). According to an embodiment, a first current spreading layer 132 may be further arranged on a first major surface 131 of the contact layer 130 facing away from the first semiconductor layer 110.

[0046] A lateral dimension d2 of the second semiconductor layer 120 is greater than a lateral dimension d1 of the first semiconductor layer 110. In addition, a lateral dimension d1 of the first semiconductor layer 110 is greater than a lateral dimension d3 of the contact layer 130. Accordingly, a step structure is formed by the second semiconductor layer 120, the first semiconductor layer 110, and the first contact layer 130. In addition, a lateral dimension d4 of the first current spreading layer 132 may be smaller than a lateral dimension d3 of the first contact layer 130. Accordingly, in this case, the step structure further includes the first current spreading layer 132. According to another embodiment, the first current spreading layer 132 may also cover the first contact layer 130. For example, in this case, a portion of the first current spreading layer 132 is arranged adjacent to the side wall 129 of the first contact layer 130, thereby encapsulating it. This will refer to FIG. 3A to FIG. 3DFor example, the material of the first current spreading layer 132 may include Au, Cu, Al, Ti, Pt or Pd.

[0047] The first insulating layer 125 is now arranged on the side of the resulting layer structure and covers the stepped structure. The optoelectronic semiconductor component 10 further includes a second current spreading structure 135 electrically connected to the second semiconductor layer 120. The second current spreading structure 135 is arranged on the side of the first contact layer 130 or the first current spreading layer 132 facing away from the first semiconductor layer. The material of the second current spreading structure 135 can include aluminum, for example.

[0048] The second insulating layer 127 is arranged between the horizontal surface 131 of the first contact layer 130 and the second current spreading structure 135. For example, the second insulating layer 127 may be adjacent to the horizontal surface 133 of the first current spreading layer 132. The layer thickness of the second insulating layer 127 is smaller than the minimum layer thickness of the first insulating layer 125 on the stepped structure.

[0049] For example, the material of the second insulating layer 127 may be the same as that of the first insulating layer 125. According to further embodiments, the material of the second insulating layer 127 may also be different from that of the first insulating layer 125. For example, the first insulating layer 125 may include a layer stack including silicon oxide, silicon nitride, or a combination of these materials.

[0050] According to an embodiment, a passivation layer 123 may be formed on at least a portion of the stepped structure. For example, the passivation layer 123 may include an insulating material, such as aluminum oxide. For example, the passivation layer 123 may cover the side surface 129 of the first contact layer 130 and the exposed horizontal area of ​​the adjacent first semiconductor layer 110. In particular, the passivation layer may be arranged on the exposed surface area of ​​the first contact layer 130. The passivation layer 123 may further cover the horizontal surface 133 of the first current spreading layer 132. For example, the passivation layer 123 may be designed as a conformal layer, for example by an ALD ("Atomic Layer Deposition") method, so that the first contact layer 130 is wrapped by the passivation layer and the migration of silver ions is suppressed or prevented. The passivation layer 123 may be suitable for representing a chemical barrier against corrosive gases. In addition, the passivation layer 123 also represents a protective layer against environmental influences.

[0051] exist Figure 1AIn the optoelectronic semiconductor component shown, the second insulating layer 127 is used to provide electrical insulation between the conductive layer electrically connected to the first semiconductor layer 110 and the second current spreading structure 135. The layer thickness s2 of the second insulating layer 127 can be measured so that it avoids electrical breakdown between the second current spreading structure 135 and the conductive layer connected to the first semiconductor layer 110. For example, the layer thickness s2 of the second insulating layer 127 can be less than 300nm, for example less than 200nm or less than 150nm. For example, in the case of a layer thickness S2 of about 100nm, effective protection against breakdown at a voltage of up to about 50V can be achieved. The first insulating layer 125 covering the stepped structure of the first and second semiconductor layers can also prevent electrical breakdown between the second current spreading structure 135 and the first semiconductor layer 110 and the conductive layer connected to the first semiconductor layer. In order to optimally insulate the stepped structure, a layer thickness s1 is used, which is greater than the layer thickness s2 of the second insulating layer 127, which is arranged on the horizontal main surface of the first contact layer 130 or the first current spreading layer 132. The first insulating layer 125 is designed as a conformal layer. That is, a step structure is formed in the first insulating layer 125, which roughly corresponds to the step structure of the substrate material (i.e., the second semiconductor layer 120, the first semiconductor layer 110, the first contact layer 130, and the possible first current spreading layer 132). For example, the thickness s2 of the second insulating layer 127 can be less than half of the thickness s1 of the first insulating layer 125, or even less than one-third of the thickness s1 of the first insulating layer 125.

[0052] As will be explained below, for example, the first insulating layer 125 and the second insulating layer 127 can be manufactured by different processes, respectively. Accordingly, the first and second insulating layers 125, 127 can be optimized according to the application. Due to the reduced layer thickness of the second insulating layer 127, the thermal resistance between the first contact layer 130 and the second current spreading structure 135 is greatly reduced. For example, the minimum layer thickness s1 of the first insulating layer 125 can be about 600nm. If the layer thickness s2 of the second insulating layer 127 is reduced to the value as described above relative to this value, the thermal resistance of the insulating layer can be reduced by about 80%. For example, the thermal resistance of the first insulating layer 125, 126 can be 0.6K / W. The thermal resistance of the second insulating layer 127 can be 0.1K / W.

[0053] The second insulating layer 127 overlaps with the active area 115 that generates electromagnetic radiation. Therefore, heat can be discharged immediately in the area where it is generated. Therefore, the optoelectronic semiconductor component is cooled, and the light output power and the efficiency of the optoelectronic semiconductor component are improved. In addition, due to the reduced thermal resistance, the conversion layer on the first main surface 25 of the optoelectronic semiconductor component can also be cooled in an improved manner. Therefore, the temperature in the optoelectronic semiconductor component is reduced in the converter material and the packaging material. Therefore, an extended service life of the LED is generated.

[0054] For example, by the passivation layer 123 adjoining the side surface 129 and the adjacent horizontal surface of the adjacent layer, an effective encapsulation of the first contact layer 130 can be achieved. In the case of setting the thickness of the first insulating layer 125 and the second insulating layer 127 independently of each other, the layer thickness of the first insulating layer 125 can be selected relatively large without thereby increasing the thermal resistance of the second insulating layer 127. Accordingly, the robustness of the component with respect to dielectric breakdown or with respect to corrosive chemicals is not affected. As a further result of the increased layer thickness of the first insulating layer 125, the layer thickness of the first current spreading layer 132 can also be further increased. For example, the first current spreading layer can have a layer thickness of approximately 400 to 600 nm, for example 500 nm. As a result, the current spreading into the first semiconductor layer 110 can be improved and made more uniform. As a result, the maximum current can be increased, so that the emission of the optoelectronic semiconductor component can be increased.

[0055] The optoelectronic semiconductor component 10 may further comprise a carrier 100 , for example a silicon carrier. For example, the silicon carrier 100 may be connected to the second current spreading structure 135 via a suitable connecting material 105 , for example solder.

[0056] Figure 1B 1 shows a vertical cross-sectional view of an optoelectronic semiconductor component according to a further embodiment. Figure 1A In the structure shown in FIG. 1 , the first insulating layer 126 is not designed as a conformal layer on the stepped structure. Instead, the first insulating layer 126 is designed as a planarized layer on the stepped structure. Figure 1B As shown, the passivation layer 123 is adjacent to the side surface 129 of the first contact layer 130 and is arranged on the exposed horizontal surface area of ​​the adjacent first semiconductor layer 110 and on the exposed portion of the first main surface 131 of the first contact layer 130. In addition, the passivation layer 123 can be arranged adjacent to the side surface 134 of the first current spreading layer 132.

[0057] According to an embodiment, a portion of the passivation layer may also be arranged adjacent to the first main surface 133 of the first current spreading layer 132 or adjacent to the first main surface 131 of the first contact layer 130 .

[0058] FIG. 2A to FIG. 2F A vertical cross-sectional view of a workpiece during the manufacture of an optoelectronic semiconductor component according to an embodiment is illustrated. A second semiconductor layer 120 is applied by an epitaxial method on a growth substrate (not shown in FIG. 2 ) and, if necessary, is subsequently used to form the layers of an active region (not shown in the following figures) and a first semiconductor layer 110. Furthermore, a first contact layer 130 and a possible first current spreading layer 132 are applied on the first semiconductor layer 110. Additionally, a sacrificial metal layer 137 may be formed on the first current spreading layer 132. For example, the first current spreading layer 132 may contain gold. The sacrificial metal layer 137 may include, for example, a metal that is harder than gold, such as chromium or nickel. The layer thickness of the sacrificial metal layer 137 may be, for example, a maximum of 200 nm, for example, less than 150 nm. As Figure 2A As shown, the coated layers are structured to form a stepped structure. For example, a portion of the surface of the second semiconductor layer 120 is not covered by the first semiconductor layer 110. A portion of the surface of the first semiconductor layer 110 may not be covered by the first contact layer 130. A portion of the first contact layer 130 may not be covered by the first current spreading layer 132.

[0059] Subsequently, a passivation layer containing, for example, Al2O3 is conformally coated on the first semiconductor layer 110, the exposed areas of the first contact layer 130, the possible first current spreading layer 132, and the sacrificial metal layer 137. A conformal layer is formed. For example, the layer thickness of the passivation layer 123 can be greater than 20nm, for example, about 30 to 50nm, for example 40nm. For example, the layer thickness of the passivation layer 123 can be less than 100nm. Then, the first insulating layer 125 is coated on the entire surface. For example, the layer thickness of the first insulating layer 125 can be greater than 400nm, for example, about 600nm. For example, the first insulating layer 125 can have a plurality of layers. For example, these layers can contain silicon oxide and silicon nitride. The first insulating layer 125 can be conformally formed on the stepped structure. A portion of the first insulating layer 125 is directly adjacent to the first and second semiconductor layers 110, 120.

[0060] Figure 2A An example of a cross-sectional view produced is shown. The surface of the sacrificial metal layer 137 is then exposed. This can be done, for example, by a polishing method, such as a CMP ("chemical mechanical polishing") method. The end of this polishing step can be identified, for example, by a reduced resistance. The end of this polishing step can also be identified by reaching the surface of the sacrificial metal layer 137.

[0061] Figure 2B A cross-sectional view of the resulting workpiece is shown. Figure 2BAs shown, the horizontal surface above the first contact layer is now exposed or not covered by the insulating material. Subsequently, the remaining sacrificial metal layer 137 can be removed from the surface of the first current spreading layer 132, for example, by a selective etching method. However, according to other embodiments, the sacrificial metal layer 137 can also be retained.

[0062] Figure 2C An example of a workpiece produced is shown. Subsequently, a second insulating layer 127 is applied. The second insulating layer 127 has a layer thickness s2, which is less than the minimum vertical layer thickness s1 of the first insulating layer 125. In the case of a stepped structure, the minimum vertical layer thickness s1 corresponds to the layer thickness deposited when there is a horizontal surface instead of a stepped structure. For example, the stepped structure can have larger horizontal areas, on which the first insulating layer 125 is deposited respectively, which has a constant minimum layer thickness s1.

[0063] Figure 2D A cross-sectional view of the resulting example is shown. The first insulating layer can then be further structured, for example using a photolithography method. For example, a portion of the first insulating layer 125 can be removed at a horizontal region of the second semiconductor layer 120 .

[0064] Figure 2E A cross-sectional view of the resulting workpiece is shown.The electrically conductive material of the second current spreading structure 135 can then be formed on the resulting surface.

[0065] Figure 2F An example of a cross-sectional view of the resulting workpiece is shown. The second current spreading structure 135 is electrically connected to the second semiconductor layer 120 at locations where the first insulating layer 125 has been removed from horizontal regions of the second semiconductor layer 120 .

[0066] FIG. 3A to FIG. 3D A method is described in which the first insulating layer 126 is not deposited as a conformal layer, but rather is deposited by a planarization method or with a greater layer thickness than the layer stack to be coated. If the first insulating layer 126 has a layer thickness greater than the height of the layer stack to be coated, the gap that is created between two layer stacks to be coated is completely filled by the first insulating layer 126.

[0067] Figure 3A shows a workpiece having a layer stack similar to Figure 2A A conformal passivation layer 123 is formed on the horizontal surface 133 of the first current spreading layer 132 and on the side surfaces and exposed surface areas of the stepped structure of the layer stack. Figure 3AAs shown in FIG. 1 , the first insulating layer 126 is formed with a layer thickness greater than the height of the layer stack to be coated. According to an embodiment, a sacrificial metal layer (at Figure 3A First, a polishing method, such as a CMP method, is performed, whereby a smooth, non-topographical, level surface of the workpiece is obtained. For example, the end point of the polishing method can be identified by a minimum friction force.

[0068] Then, according to an embodiment, a photoresist mask 139 may be formed on the resultant surface. Figure 3B A cross-sectional view of an example of a resulting workpiece with a photoresist mask 139 is shown.

[0069] However, according to further embodiments, further processing can also be performed without the photoresist mask 139 with appropriate process control.

[0070] Then, an etching method is performed to expose the first main surface 133 of the first current spreading layer 132 or possibly the sacrificial metal layer 137. For example, this may include an isotropic etching method, such as a plasma etching method. According to an embodiment, the method may stop on the sacrificial metal layer 137.

[0071] Figure 3C An example of a produced workpiece is shown. After removing the optional photoresist mask 137, a thin second insulating layer 127 is formed on the produced surface. For example, the layer thickness s2 of the second insulating layer 127 can be selected to ensure sufficient insulation between the first current spreading layer 132 and the second current spreading layer to be applied. For example, the layer thickness s2 of the second insulating layer 127 can be smaller than the layer thickness s1 of the first insulating layer 126. For example, the layer thickness s1 of the first insulating layer 126 can correspond to the smallest vertical dimension of the first insulating layer 126 on the stepped structure. According to further embodiments, the layer thickness s2 of the second insulating layer can be less than half or one third of the layer thickness s1 of the first insulating layer 126. For example, the layer thickness s2 of the second insulating layer can be less than 200 nm, for example less than 150 nm, for example approximately 100 nm.

[0072] Figure 3D A cross-sectional view of the resulting workpiece is shown. Further processing of the workpiece can be performed as described with reference to FIG. 2E to FIG. 2F Descriptive.

[0073] According to FIG. 3A to FIG. 3D A modification of the embodiment described in Figure 3A Starting from the structure shown in , a polishing method can also be performed until the surface of the first current spreading layer 132 or the sacrificial metal layer 137 is not covered. Then, as shown in reference Figure 3C and Figure 3D As described, the second insulating layer 127 may be formed.

[0074] In the following method variant, the first insulating layer 125 is again deposited as a conformal layer and is subsequently structured by masked etching.

[0075] Figure 4A Shown with Figure 2A If necessary, a sacrificial metal layer 137 may be formed on the first major surface 133 of the first current spreading layer 132. According to another embodiment, the sacrificial metal layer 137 may also be omitted. A photomask 139 is formed so that most of the horizontal surface 133 of the first current spreading layer 132 is not covered.

[0076] Figure 4B An example of the resulting workpiece is shown. An etching method is then performed, thereby exposing the horizontal surface 133 of the first current spreading layer 132. In the case where a sacrificial metal layer 137 is present, the surface of the sacrificial metal layer 137 is also exposed in this step.

[0077] Figure 4C An example of the resulting workpiece is shown.After removing the photoresist material 139, a thin second insulating layer 127 is deposited over the resulting structure.

[0078] Figure 4D An example of the resulting workpiece is shown. Figure 2E and Figure 2F A similar approach is performed as described.

[0079] According to the embodiments described herein, the second insulating layer 127 may be deposited by a different method than the first insulating layers 125, 126. For example, a spray coating or evaporation method may be performed to form the second insulating layer 127. In contrast, the conformal first insulating layer 125 is formed, for example, by an ALD method, by which a reliable covering of the step structure is ensured.

[0080] Figure 5 A horizontal cross-sectional view of an optoelectronic semiconductor component is illustrated. Figure 5In particular, the area share of the second insulating layer 127 relative to the area share of the first insulating layers 125, 126 is indicated. The second insulating layer 127 occupies a significantly larger area share than the first insulating layers 125, 126. Accordingly, heat dissipation can be significantly improved by reducing the thermal resistance in the region of the second insulating layer 127. More precisely, the thermal resistance in the region of approximately 90% of the chip surface can be reduced by the presence of the second insulating layer 127 with a reduced layer thickness. Thus, the thermal resistance can be reduced by approximately 70% to 80%. Accordingly, the efficiency and life of the semiconductor component can be greatly increased. In addition, heat can be discharged via the second contact structure 135.

[0081] Fig. 6A The method according to the embodiment is summarized. The method for manufacturing an optoelectronic semiconductor component includes: forming (S100) a layer stack, the layer stack including a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type; and forming (S110) a conductive first contact layer in direct contact with the first semiconductor layer, wherein the lateral dimension of the second semiconductor layer is larger than the lateral dimension of the first semiconductor layer, thereby forming a workpiece with a stepped structure. The method further includes: conformally forming (S120) a first insulating layer on the stepped structure of the first and second semiconductor layers; forming (S130) a second insulating layer on a horizontal surface of the first contact layer, wherein the layer thickness of the second insulating layer is less than the minimum layer thickness of the first insulating layer on the stepped structure; and forming (S140) a second current spreading structure on the second insulating layer, wherein the second contact structure is electrically connected to the second semiconductor layer.

[0082] Figure 6B Methods according to further embodiments are summarized. The method for manufacturing an optoelectronic semiconductor component comprises: forming (S100) a layer stack, the layer stack comprising a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type; and forming (S110) a conductive first contact layer in direct contact with the first semiconductor layer, wherein the lateral dimensions of the second semiconductor layer are greater than the lateral dimensions of the first semiconductor layer, thereby forming a workpiece having a stepped structure. The method further comprises: conformally forming (S115) a passivation layer on a side surface of the first contact layer; forming (S125) a first insulating layer on the resulting workpiece. The method further comprises: removing (S127) a portion of the first insulating layer from a horizontal surface of the workpiece; forming (S130) a second insulating layer on a horizontal surface of the first contact layer, wherein the layer thickness of the second insulating layer is less than the minimum layer thickness of the first insulating layer on the stepped structure; and forming (S140) a second current spreading structure on the second insulating layer, wherein the first contact layer is electrically connected to the second semiconductor layer.

[0083] Figure 7An optoelectronic semiconductor device 30 according to an embodiment is shown. The optoelectronic semiconductor device 30 includes the optoelectronic semiconductor components 10, 15 described above. The optoelectronic semiconductor device 30 may be, for example, a motor vehicle headlight or a very strong lighting device, such as a floodlight for stage performances. Due to improved heat dissipation, the power density of the optoelectronic semiconductor device may be increased. For example, the optoelectronic semiconductor device may have a power density of more than 3 to 4 Watt / mm 2 , for example, more than 10Watt / mm 2 The power density of the optoelectronic semiconductor device can be increased accordingly. In addition, for example, the area of ​​the optoelectronic semiconductor device can be reduced while maintaining the same power. This makes it possible to use smaller optical components for the optoelectronic semiconductor device. As a result, space and costs can be saved.

[0084] Although specific embodiments have been illustrated and described herein, those skilled in the art will recognize that the specific embodiments shown and described may be replaced by a plurality of alternative and / or equivalent embodiments without departing from the scope of the invention. This application is intended to cover any adjustments or variations of the specific embodiments discussed herein. Therefore, the present invention is limited only by the claims and their equivalents.

[0085] Reference numerals list

[0086] 10 Optoelectronic semiconductor components

[0087] 15 Optoelectronic semiconductor components

[0088] 20 Electromagnetic Radiation

[0089] 25 First main surface of an optoelectronic semiconductor component

[0090] 30 Optoelectronic semiconductor devices

[0091] 100 vectors

[0092] 105 Connection material

[0093] 110 first semiconductor layer

[0094] 115 Active Area

[0095] 120 Second semiconductor layer

[0096] 123 Passivation layer

[0097] 125 First insulation layer

[0098] 126 First insulation layer

[0099] 127 Second insulation layer

[0100] 129 Side surface of the first contact layer

[0101] 130 First contact layer

[0102] 131 Horizontal surface of the first contact layer

[0103] 132 First current expansion layer

[0104] 133 Horizontal surface of the first current spreading layer

[0105] 134 Side surface of the first current spreading layer

[0106] 135 Second current expansion structure

[0107] 137 Sacrificial Metal Layer

[0108] 139 Photoresist mask

Claims

1. An optoelectronic semiconductor component (10), comprising: A first semiconductor layer (110) of a first conductivity type; A second semiconductor layer (120) of a second conductivity type, wherein the first and second semiconductor layers (110, 120) are stacked one above the other to form a semiconductor layer stack; a first contact layer (130), the first contact layer being arranged to be in direct contact with the first semiconductor layer (110) and being electrically conductive; a first insulating layer (125), the first insulating layer being formed on the first and second semiconductor layers (110, 120); and a second current spreading structure (135), the second current spreading structure being electrically connected to the second semiconductor layer (120), The maximum lateral dimension of the second semiconductor layer (120) is greater than the maximum lateral dimension of the first semiconductor layer (110), thereby forming a stepped structure, and the first insulating layer (125) is designed as a conformal layer on the stepped structure of the first and second semiconductor layers, and is directly adjacent to the first and second semiconductor layers (110, 120), respectively, and the optoelectronic semiconductor component further comprises: A second insulating layer (127) between the horizontal surface of the first contact layer (130) and the second current spreading structure (135), wherein the second insulating layer (127) is directly adjacent to the horizontal surface of the first contact layer, wherein the second insulating layer (127) is also directly adjacent to the second current spreading structure (135), and wherein the layer thickness of the second insulating layer (127) is less than the minimum layer thickness of the first insulating layer (125) on the stepped structure.

2. The optoelectronic semiconductor component according to claim 1, further comprising a first current spreading layer (132), which is arranged on a side of the first contact layer (130) facing away from the first semiconductor layer (110) and is in direct contact with the first contact layer (130).

3. The optoelectronic semiconductor component according to claim 2, wherein the lateral dimensions of the first current spreading layer (132) are smaller than the lateral dimensions of the contact layer (130). 4 . The optoelectronic semiconductor component according to claim 2 , wherein the first current spreading layer ( 132 ) adjoins at least two side surfaces ( 129 ) of the contact layer ( 130 ). 5 . The optoelectronic semiconductor component according to claim 1 , further comprising a passivation layer ( 123 ) which adjoins the exposed regions of the stepped structure.

6. The optoelectronic semiconductor component according to claim 5, wherein the optoelectronic semiconductor component (15) further comprises a first current spreading layer (132), and the passivation layer (123) is removed from a horizontal surface of the first current spreading layer (132).

7. An optoelectronic semiconductor component (15) comprising: A first semiconductor layer (110) of a first conductivity type; A second semiconductor layer (120) of a second conductivity type, wherein the first and second semiconductor layers (110, 120) are stacked one above the other to form a semiconductor layer stack; a first contact layer (130), the first contact layer being arranged to be in direct contact with the first semiconductor layer (110) and being electrically conductive; a passivation layer (123); a first insulating layer (126) formed on the first and second semiconductor layers (110, 120); as well as a second current spreading structure (135), the second current spreading structure being electrically connected to the second semiconductor layer (120), The lateral dimension of the second semiconductor layer (120) is greater than the lateral dimension of the first semiconductor layer (110), thereby forming a step structure, and the passivation layer (123) is designed as a conformal layer on the side surface of the contact layer (130), and the optoelectronic semiconductor component (15) further has: A second insulating layer (127) between the horizontal surface of the first contact layer (130) and the second current spreading structure (135), wherein the second insulating layer (127) is directly adjacent to the horizontal surface of the first contact layer, wherein the second insulating layer (127) is also directly adjacent to the second current spreading structure (135), and wherein the layer thickness of the second insulating layer (127) is less than the minimum layer thickness of the first insulating layer (126) on the stepped structure.

8. The optoelectronic semiconductor component (15) according to claim 7, wherein the first insulation layer (126) directly adjoins the first and second semiconductor layers (110, 120).

9. The optoelectronic semiconductor component (15) according to claim 7 or 8 further comprises a first current spreading layer (132), which is arranged on the side of the first contact layer (130) facing away from the first semiconductor layer (110) and is in direct contact with the first contact layer (130), wherein the passivation layer (123) is adjacent to the side surface (129) of the contact layer (130).

10. The optoelectronic semiconductor component (15) according to claim 9, wherein the lateral dimensions of the first current spreading layer (132) are smaller than the lateral dimensions of the contact layer (130).

11. The optoelectronic semiconductor component (15) according to claim 9, wherein the current spreading layer (132) adjoins at least two side surfaces (129) of the contact layer (130).

12. A method for producing an optoelectronic semiconductor component (10, 15), comprising: forming (S100) a layer stack, the layer stack comprising a first semiconductor layer (110) of a first conductivity type and a second semiconductor layer (120) of a second conductivity type; forming (S110) a conductive first contact layer (130) in direct contact with the first semiconductor layer (110), wherein the maximum lateral dimension of the second semiconductor layer (120) is greater than the maximum lateral dimension of the first semiconductor layer (110), thereby forming a workpiece having a step structure; Conformally forming (S120) a first insulating layer (125) on the stepped structure of the first and second semiconductor layers (110, 120) and directly contacting the first and second semiconductor layers (110, 120), respectively; forming (S130) a second insulating layer (127) on a horizontal surface (131) of the first contact layer (130), wherein the second insulating layer (127) is directly adjacent to the horizontal surface of the first contact layer, wherein the second insulating layer (127) is also directly adjacent to the second current spreading structure (135), and wherein the layer thickness of the second insulating layer (127) is smaller than the minimum layer thickness of the first insulating layer (125) on the stepped structure; and A second current spreading structure (135) is formed (S140) on the second insulating layer (127), wherein the second current spreading structure (135) is electrically connected to the second semiconductor layer (120).

13. The method of claim 12, further comprising forming a first current spreading layer (132) after forming the contact layer (130).

14. The method according to claim 12 or 13, further comprising forming a sacrificial metal layer (137) before forming the first insulating layer (125).

15. The method according to claim 12 or 13, further comprising forming a passivation layer (123) before forming the first insulating layer (125).

16. A method according to claim 12 or 13, wherein the first insulating layer (125) is formed on a horizontal area (131) of the first contact layer (130), and the method includes subsequently removing the first insulating layer (125) from the horizontal area of ​​the workpiece before applying the second insulating layer (127).

17. A method for manufacturing an optoelectronic semiconductor component, comprising: forming (S100) a layer stack, the layer stack comprising a first semiconductor layer (110) of a first conductivity type and a second semiconductor layer (120) of a second conductivity type; forming (S110) a conductive first contact layer (130) directly contacting the first semiconductor layer (110), wherein the maximum lateral dimension of the second semiconductor layer (120) is greater than the maximum lateral dimension of the first semiconductor layer (110), thereby forming a workpiece having a step structure; Conformally forming (S115) a passivation layer (123) on a side surface (129) of the first contact layer (130); forming (S125) a first insulating layer (126) on the produced workpiece; removing (S127) a portion of the first insulating layer (125) from a horizontal surface of the workpiece; forming (S130) a second insulating layer (127) on a horizontal surface (131) of the first contact layer (130), wherein the second insulating layer (127) is directly adjacent to the horizontal surface of the first contact layer, wherein the second insulating layer (127) is also directly adjacent to the second current spreading structure (135), and wherein the layer thickness of the second insulating layer (127) is smaller than the minimum layer thickness of the first insulating layer (126) on the stepped structure; and A second current spreading structure (135) is formed (S140) on the second insulating layer (127), wherein the second current spreading structure (135) is electrically connected to the second semiconductor layer (120).

18. The method according to claim 17, wherein the first insulating layer (126) is designed to be in direct contact with the first and second semiconductor layers (110, 120).

19. A method according to claim 17 or 18, wherein forming the first insulating layer (126) includes forming the first insulating layer (126) as follows, so that the minimum distance between the horizontal surface of the first insulating layer and the first main surface of the second semiconductor layer (120) is greater than the maximum distance between the first main surface of the passivation layer (123) and the first main surface of the second semiconductor layer (120).

20. An optoelectronic semiconductor device (30) comprising an optoelectronic semiconductor component (10, 15) according to any one of claims 1 to 11.

Citation Information

Patent Citations

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