Radio frequency device based on carbon nanotubes

Abstract

Also provided are high performance carbon nanotube (CNT) based millimeter wave transistor technology and monolithic millimeter wave integrated circuits (MMICs) based on the technology and methods and processes for their fabrication. The CNT technology and MMICs show improved performance in power efficiency, linearity, noise, and dynamic range compared to existing GaAs, SiGe, and RF-CMOS technologies. Methods and processes in CNT alignment and deposition, material contact and doping are configured to fabricate high quality CNT arrays beyond existing technologies and produce high performance RF transistors scalable to wafer size to enable fabrication of CNT based monolithic integrated circuits.

Description

Technical Field

[0001] This invention generally relates to methods and systems for manufacturing millimeter-wave transistors and monolithic millimeter-wave integrated circuits (MMICs) based on high-performance carbon nanotubes (CNTs), as well as devices and apparatuses based thereon. Background Technology

[0002] The primary driver of commercial applications for radio frequency (RF) power amplifiers is smartphones and tablets. For example, modern smartphones contain four to five power amplifiers based on complementary metal-oxide-semiconductor (CMOS) devices with III-V compound semiconductors and silicon-on-insulator switches. With the increasing prevalence of 4G technology, global mobile phone production has steadily grown from 1.5 billion units in 2010 to over 2 billion units in 2015. Furthermore, production of wirelessly connected tablets is growing rapidly, from 8 million units in 2010 to over 300 million units in 2015, and is projected to exceed 500 million units by 2020. Other commercial markets for power amplifiers include base stations, satellite communications, and GPS equipment, which are expected to require greater and faster data transmission and reception. The LTE base station market was projected to generate $600 million in revenue in 2015 and is expected to exceed $1.4 billion by 2020. The machine-to-machine satellite communications market was estimated to be worth approximately $3 billion in 2014 and is projected to reach around $4.8 billion by 2019. This reflects the growing demand for higher and faster data transmission capabilities in mobile communications and computing consumer devices. Therefore, to support this increasing demand for greater data bandwidth, continued enhancements to current technologies and new developments in next-generation power amplifier prototypes with superior low power consumption and high linearity are required. Summary of the Invention

[0003] In many embodiments, the present invention relates to methods and systems for manufacturing millimeter-wave transistors and monolithic millimeter-wave integrated circuits (MMICs) based on high-performance carbon nanotubes (CNTs), as well as devices and apparatuses based thereon.

[0004] Many implementations are directed to carbon nanotube-based radio frequency devices, including:

[0005] • A substrate on which a parallel nanochannel array is disposed;

[0006] • Source and drain electrodes are disposed on a substrate and define a channel in which nanochannels are disposed;

[0007] • Multiple individually oriented, purely single-chiral, single-walled carbon nanotubes with narrow diameter distribution are arranged within nanochannels and directly bridged to the channels;

[0008] • A conjugate electrolyte layer positioned between the carbon nanotube array and the source and drain electrodes; and

[0009] • At least one gate electrode is disposed within the channel.

[0010] In many embodiments, the carbon nanotubes have a purity of at least 99%, a length greater than 1 micrometer, a diameter greater than 0.7 nanometers, and a diameter distribution of ±0.1 nanometers.

[0011] In many implementations, the diameter of the carbon nanotubes is approximately 1.6 nanometers ± 0.1 nanometers.

[0012] In many implementations, carbon nanotubes are arranged within nanochannels such that there are no point intersections between the individual carbon nanotubes.

[0013] In many implementations, the nanochannel has a length of at least 1 micrometer and a width of 60 nanometers.

[0014] In many implementations, the nanochannels are functionalized with poly(L-lysine).

[0015] In many other embodiments, the carbon nanotube density is approximately 10 to 30 carbon nanotubes per micrometer.

[0016] In many implementations, the gate electrode is selected from T-gate, back gate, and embedded back gate.

[0017] In many other embodiments, the nanochannels are formed from polymethyl methacrylate (PMMA) material.

[0018] In many embodiments, the device has ION / W > 500 mA / mm, ION / IOFF > 1000, and f T and f max >50GHz and a third-order intercept (IP3) that is at least 10dB higher than its 1dB compression power (P1dB).

[0019] Various implementations relate to methods for forming a top-gate radio frequency device based on carbon nanotubes, including:

[0020] • Provide a substrate and form multiple nanochannels;

[0021] • Multiple individually oriented, electron-pure monochiral single-walled carbon nanotubes with narrow diameter distribution are placed in nanochannels to form a carbon nanotube array;

[0022] • Clean the carbon nanotube array to remove unwanted carbon nanotubes;

[0023] • Deposit a drain pre-pad and a source pre-pad on top of the carbon nanotube array to form a channel between the drain and the source pre-pad, and allow the carbon nanotube array to directly bridge the channel;

[0024] • A dielectric gate electrode structure is formed within the channel at the top of the carbon nanotube array;

[0025] • Deposit an interfacial conjugated electrolyte layer on top of the carbon nanotube array; and

[0026] • A set of conductive power electrode, drain electrode, and gate electrode layers are deposited on the drain pre-pad, source pre-pad, gate electrode structure, and interface layer to electrically interconnect the electrodes and carbon nanotube array.

[0027] In other various embodiments, the method further includes purifying pure single-chiral single-walled carbon nanotubes by iterative gradient ultracentrifugation, such that the carbon nanotubes have a purity of at least 99%, a length greater than 1 micrometer, and a diameter greater than 0.7 nanometers, with a diameter distribution of ±0.1 nanometers.

[0028] In some other embodiments, forming a carbon nanotube array further includes:

[0029] • Deposit an electron beam shielding layer on top of the substrate;

[0030] • Multiple nanochannels are formed in the electron beam resistant layer by electron beam etching;

[0031] • Functionalize the channel using polylysine materials;

[0032] • Cleaning-functionalized channels;

[0033] • A solution of carbon nanotubes deposited on a functionalized channel, wherein the solution is a mixture of carbon nanotubes dispersed by one or more surfactants;

[0034] Baking the substrate;

[0035] • Clean the baked substrate to remove excess carbon nanotubes; and

[0036] • Remove the electron beam shielding material from the substrate.

[0037] In various other embodiments, the surfactants are sodium cholate and sodium dodecyl sulfate.

[0038] In other various embodiments, carbon nanotubes are arranged within nanochannels such that there are no point intersections between the individual carbon nanotubes.

[0039] Some implementations relate to methods for forming carbon nanotube-based back-gate radio frequency devices, including:

[0040] • Provide a substrate and form drain, source and gate pre-pads thereon to define the channel;

[0041] • Deposit a dielectric layer on the pre-pad;

[0042] • Multiple nanochannels are formed on top of the dielectric layer, and multiple individually oriented, electron-pure single-chiral single-walled carbon nanotubes with narrow distribution diameters are arranged within the nanochannels to form a carbon nanotube array that directly bridges the channels.

[0043] • Clean the carbon nanotube array to remove unwanted carbon nanotubes;

[0044] • Deposit an interfacial conjugated electrolyte layer on top of the carbon nanotube array; and

[0045] • A set of conductive power electrode, drain electrode, and gate electrode layers are deposited on the drain pre-pad, source pre-pad, and interface layer to electrically interconnect the electrodes and the carbon nanotube array.

[0046] In some embodiments, the method further includes purifying pure single-chiral single-walled carbon nanotubes by iterative gradient ultracentrifugation, such that the carbon nanotubes have a purity of at least 99%, a length greater than 1 micrometer, and a diameter greater than 0.7 nanometers, with a diameter distribution of ±0.1 nanometers.

[0047] In some embodiments, forming a carbon nanotube array further includes:

[0048] • Deposit an electron beam resistant layer on top of the dielectric layer;

[0049] • Multiple nanochannels are formed in the electron beam resistant layer by electron beam etching;

[0050] • Functionalize the channel using polylysine materials;

[0051] • Cleaning-functionalized channels;

[0052] • A solution of carbon nanotubes deposited on a functionalized channel, wherein the solution is a mixture of carbon nanotubes dispersed by one or more surfactants;

[0053] Baking the substrate;

[0054] • Clean the baked substrate to remove excess carbon nanotubes; and

[0055] • Remove the electron beam shielding material from the substrate.

[0056] In some other embodiments, the surfactants are sodium cholate and sodium dodecyl sulfonate.

[0057] In some other embodiments, carbon nanotubes are arranged within nanochannels such that there are no point intersections between the individual carbon nanotubes.

[0058] Other embodiments and features are set forth in the description which follows, and some will become apparent to those skilled in the art upon viewing this specification, or may be learned by practice based on the disclosed subject matter. A further understanding of the nature and advantages of this application can be achieved by reference to the remainder of the specification and drawings, which form a part of this application. Attached Figure Description

[0059] This application will be more fully understood by referring to the following figures and data charts, which are presented as exemplary embodiments of the invention and should not be construed as a complete description of the scope of the invention.

[0060] Figure 1A A carbon nanotube-based radio frequency (RF) device according to various embodiments of the present invention is shown.

[0061] Figure 1B A carbon nanotube-based radio frequency (RF) device having a top gate (top), a back gate (middle), and an embedded back gate (bottom) according to various embodiments of the present invention is shown.

[0062] Figure 2A The interface regions of carbon nanotubes according to various embodiments of the present invention are shown.

[0063] Figure 2B Data showing the resistance-to-contact length of unmodified carbon nanotubes according to various embodiments of the present invention are provided.

[0064] Figure 2C Data are provided showing the resistance-to-contact length of carbon nanotubes with associated interface layers according to various embodiments of the present invention.

[0065] Figure 3A and 3B Data showing the spectra of high-purity carbon nanotubes according to various embodiments of the present invention are provided.

[0066] Figure 3C Data showing the resistance to channel length of carbon nanotubes according to various embodiments of the present invention are provided.

[0067] Figure 3D Images of carbon nanotube arrays according to various embodiments of the present invention are provided.

[0068] Figure 3E Images of exemplary CNT RF FET devices according to various embodiments of the present invention are provided.

[0069] Figure 3FData on the power gain and frequency of exemplary CNT RF FET devices according to various embodiments of the present invention are provided.

[0070] Figure 3G Gain data for exemplary CNT RF FET devices according to various embodiments of the present invention are provided.

[0071] Figure 3H Noise data for exemplary CNT RF FET devices according to various embodiments of the present invention are provided.

[0072] Figure 4A Process diagrams of carbon nanotube purification processes according to various embodiments of the present invention are provided.

[0073] Figures 4B to 4E Spectra of purified carbon nanotubes according to various embodiments of the present invention are provided.

[0074] Figure 4F Data on the current versus bias voltage of Schottky contacts according to various embodiments of the present invention are provided.

[0075] Figure 4G Io of PMOS and NMOSFETs according to various embodiments of the present invention is provided. DS data.

[0076] Figure 5A Nanochannel arrays according to various embodiments of the present invention are shown.

[0077] Figure 5B Images of nanochannel arrays and CNT RF devices according to various embodiments of the present invention are provided.

[0078] Figure 6 The process of forming a nanochannel array according to various embodiments of the present invention is illustrated.

[0079] Figure 7A and 7B AFM images of deposited nanotubes according to various embodiments of the present invention are provided.

[0080] Figures 8A to 8D Images of carbon nanotube arrays according to various embodiments of the present invention are provided.

[0081] Figure 9 A process flow diagram of the process for forming a top-gate CNT RF FET device according to various embodiments of the present invention is provided.

[0082] Figure 10 The characteristics of a T-gate CNT RF FET device according to various embodiments of the present invention are shown.

[0083] Figure 11 A process flow diagram of the process for forming a back-gate CNT RF FET device according to various embodiments of the present invention is provided.

[0084] Figure 12A Transmission data of a CNT RF FET device according to various embodiments of the present invention is provided.

[0085] Figure 12B Output data of a CNT RF FET device according to various embodiments of the present invention are provided.

[0086] Figure 13A An RF measurement setup according to various embodiments of the present invention is shown.

[0087] Figure 13B Typical Smith charts of CNT RF FET devices according to various embodiments of the present invention are provided.

[0088] Figure 13C S-parameters measured by CNT RF FET devices according to various embodiments of the present invention are provided.

[0089] Figure 13D The intended intrinsic and extrinsic f-types of the CNT RF FET device according to various embodiments of the present invention are provided. T and f MAX .

[0090] Figure 14A Images of wafer-level CNT RF devices according to various embodiments of the present invention are provided.

[0091] Figure 14B Transfer characteristics of wafer-level CNT RF devices according to various embodiments of the present invention are provided.

[0092] Figures 15A to 15D Provided are: 15A) SEM images of the internal source-drain contacts of the CNT; 15B) SEM images of the T-gate; 15C) 1dB compression of the T-gate CNT RF device; and 15D) typical f-images of the T-gate CNT RF device. MAX As a result, all of these conform to various embodiments of the present invention.

[0093] Figure 16A Images of exemplary CNT TF TRF devices according to various embodiments of the present invention are provided.

[0094] Figure 16B Various embodiments of the present invention are provided. Figure 16A Typical f of the equipmentMAX data. Detailed Implementation

[0095] Turning now to the accompanying figures and data, embodiments of the present invention generally relate to millimeter-wave transistor technology based on high-performance carbon nanotubes (CNTs) and demonstrate monolithic millimeter-wave integrated circuits (MMICs) based on this technology, along with their fabrication methods and processes. Various embodiments of this CNT technology and monolithic integrated circuits (MMICs) exhibit improved power efficiency, linearity, noise, and dynamic range performance compared to existing GaAs, SiGe, and RF-CMOS technologies. According to the embodiments, high-performance CNT-based transistor technology and wafer-scale monolithic integrated circuits at millimeter-wave frequencies can be commercialized at a lower cost than existing high-frequency semiconductor technologies (GaAs, SiGe, RF-CMOS). Embodiments of methods and processes in CNT alignment and deposition, material contact, and doping are configured to fabricate high-quality CNT arrays that surpass current technology levels. These embodiments also establish robust processes capable of producing high-performance radio frequency (RF) transistors that can be scaled down to wafer size, thereby enabling the fabrication of CNT-based monolithic integrated circuits.

[0096] Semiconductor single-walled carbon nanotubes (CNTs) possess highly desirable properties, making them ideal materials for field-effect transistor (FET) channels, such as one-dimensional (1D) ballistic transport, high carrier mobility, intrinsic linearity, and small size. The room-temperature ballistic transport of single-CNT FETs approaches the quantum conductance limit (2 GHz). o =4e² / h=155µS) was confirmed more than a decade ago (see, e.g., Javey, A., et al., Nature 2003, 424, 654-657, the contents of which are incorporated herein by reference). Based on inferences about the characteristics of individual CNTs, it is expected that FETs composed of parallel arrays of CNTs will significantly improve energy delay, thereby improving the speed and power consumption of logic devices and enhancing the linearity and efficiency of RF applications. This enabling technology will have a significant impact on reducing the size, weight, power, and cost (SWAP-C) of electronic components. However, this potential has not yet been fully realized due to several technical challenges: 1) the lack of technology to eliminate inter-tube cross-connections and obtain parallel-oriented CNT arrays with optimal CNT stacking density; 2) the presence of metallic CNTs leading to suboptimal semiconductor purity; and 3) the difficulty in forming highly conductive ohmic contacts with CNT arrays.

[0097] Recent developments have made significant progress in overcoming the challenges of sorting, handling, alignment, and contact in CNT arrays, and have led to CNTFETs outperforming conventional silicon and GaAsFETs (see, for example, GJ Brady et al., Sci. Adv. 2016;2:e1601240, the disclosure of which is incorporated herein by reference). For the first time, parallel-oriented CNT arrays with semiconductor purity exceeding 99.98% have been realized on silicon and quartz substrates.

[0098] FETs constructed using these CNT arrays achieved room-temperature quasi-ballistic transport with channel conductance approaching the quantum conductance limit, up to 7 times higher than previous state-of-the-art CNT array FETs. Furthermore, a high-frequency FET using a well-oriented CNT array deposited on a quartz substrate achieved a current gain cutoff frequency (f0). t ) and the maximum oscillation frequency (f) greater than 70 GHz max (See, for example, Y. Cao et al., ACS Nano, Vol. 10, pp. 6782-6790, 2016, the contents of which are incorporated herein by reference).

[0099] While these device performance breakthroughs have opened the door to improving high-frequency circuit performance by ultimately leveraging the one-dimensional (1D) transport characteristics of thousands of oriented, gate-controlled conduction paths with linear current density, CNTFETs have only proven suitable for microwave frequencies. To date, CNTFETs have not been demonstrated for millimeter-wave frequencies or higher. Implementations targeting higher f... t and f max (e.g., greater than 100 GHz) and CNTFETs with improved array purity, alignment, and contact resistance. Implementations also relate to high-performance CNT-based transistor technologies and wafer-level monolithic integrated circuits capable of outperforming existing semiconductor high-frequency technologies (GaAs, SiGe, RF-CMOS) at millimeter-wave frequencies at lower costs. Implementations further relate to methods and processes for CNT alignment and deposition, material contact, and doping, capable of producing high-quality CNT arrays and, based on these CNTs, producing environmentally stable, high-performance RF transistors. Implementations of these methods and processes are scalable to the wafer scale for the fabrication of monolithic integrated circuits. The high-performance carbon nanotube RDFETs according to the implementations will also offer advantages in terms of simple manufacturing, high data transfer rates, low power consumption, long battery life, and low cost, which will allow for applications in wireless communications such as mobile, GPS, WIFI, garage door remote controls, radio, and television (satellite and broadcast).

[0100] Specifically, to meet the increasingly demanding technical requirements of such products, RF chip technology must continue to evolve to improve cost and performance. Implementation methods will allow the manufacture of electronic devices capable of use in smartphones and emerging mobile communications markets, featuring integrated RF transceiver chips with various wireless devices (LTE, WCDMA, WiMAX, WiFi, etc.) based on superior device technology using CNTFETs with excellent performance as a "ballistic" result. Broader impacts include (1) pin-to-pin reduction of RF transistors for replacement in radio communications products, (2) discrete power amplifier modules for base stations and emerging femtocellular trends, (3) advanced millimeter-wave communications and imaging from 25 to 250 GHz, and (4) integration methods for advanced 5G features such as general networks and cognitive radio.

[0101] By introducing a ballistic transport mechanism into one-dimensional nanomaterials such as carbon nanotubes (CNTs), this implementation surpasses traditional silicon and III-V-based semiconductor device solutions. Ballistic device transport achieves the highest device efficiency and spectral linearity to accommodate 5G interference averaging techniques such as spectral efficiency, filtering techniques, and frequency hopping with insufficient interference cancellation. The RFCNT device according to this implementation has the potential to provide higher bandwidth (GHz to THz operation), improved linearity (fewer RF components and filtering requirements), higher efficiency (increased battery life), and compatibility with existing CMOS integration processes (reduced cost).

[0102] Implementation of CNTRF devices

[0103] Implementations have resulted in carbon nanotube-enabled RF devices, such as TFT RF devices. Many such implementations have resulted in device architectures, such as... Figure 1A As generally shown, it includes the following elements:

[0104] • A substrate formed from a suitable substrate material, such as quartz, glass, silicon, oxide, etc.

[0105] • Source and drain electrode pre-pads are provided on the substrate, with a gap defined between them.

[0106] • The gate electrode is positioned within the gap and at the top ( Figure 1B (top), back ( Figure 1B (middle) or embedded back ( Figure 1B (bottom) one of them.

[0107] • A nanoscale channel array is formed in the substrate and bridges the gap between the drain and source, and individually aligned single-walled carbon nanotubes are disposed therein.

[0108] • A conjugated polyelectrolyte interface layer disposed between the carbon nanotube array and the source / drain electrodes ( Figure 2A This reduces contact resistance (e.g., from 120 kΩ per carbon nanotube to 3 kΩ per carbon nanotube), thereby improving carrier injection, as demonstrated by all-printing equipment and photolithography fabrication equipment (e.g., see...). Figure 2B and 2C ).

[0109] The implementation methods provide functional millimeter-wave monolithic integrated circuits that surpass GaAs, SiGe, and RF-CMOS in both DC and RF metrics through a hysteresis-free CMOS-compatible process flow that can be integrated into existing commercial CMOS processes. CNT RF transistors and CMOS circuits according to these implementation methods demonstrate the following metrics (as shown in the appendix). Figures 3A to 3H (As summarized in the text)

[0110] • DC: ION / W > 500mA / mm, ION / IOFF > 1000, in some implementations ION / W > 700mA / mm, gm / W > 700ms / mm;

[0111] ·RF: f T and f max >50GHz, in some implementations f T >130GHz, f max >180GHz;

[0112] • The third-order intermodulation intercept (IP3) is at least 10 dB higher than its 1 dB compression power (P1 dB), and in some embodiments at least 15 dB higher than its 1 dB compression power (P1 dB).

[0113] exist Figure 3G and 3H In the illustrated embodiment, this CNT-enabled device allows for the design of any number of functional circuits, including low-noise amplifiers with a noise figure of less than 2 dB and power amplifiers with an output power greater than 30 dB (both operating at 30 GHz). Due to the inherent linearity of carbon nanotube FETs, high-performance RF devices can be widely used in the RF front-ends of low-noise amplifiers, mixers, and power amplifiers.

[0114] As will be described in more detail below, in order to form an RF device capable of exhibiting the desired performance metrics, implementation methods employ a number of specific processes and design configurations.

[0115] Implementation method for manufacturing electronically pure SWCNTs

[0116] The implementation incorporates large-scale separation methods to produce electronically pure monochiral (e.g., (6, 5)) SWCNTs. In many such implementations, the CNTs exhibit a narrow distribution of large-diameter semiconductor carbon nanotubes (e.g., >0.7 nm, and in some implementations approximately 1.6 nm ± 0.1 nm). According to such implementations, these large-diameter carbon nanotubes exhibit high transconductance.

[0117] Due to the polydispersity of large-diameter carbon nanotubes, their electrical properties typically vary from device to device. As the diameter increases, the number of exponents (m, n) forming the carbon nanotubes increases. Consequently, chiral differences decrease, and the abundance of each chirality is lower. Overall, separating the single chirality of large-diameter CNTs is more challenging than separating small-diameter carbon nanotube CNTs. Therefore, various implementations employ large-scale sorting methods for narrowly distributed large-diameter semiconductor single-walled carbon nanotubes (~1.6 nm ± 0.1 nm). Many such embodiments employ self-forming gradient ultracentrifugation for the purification of single-walled carbon nanotubes (see, for example, Seo, J.-WT et al., *The Journal of Physical Chemistry Letters*, Vol. 4, pp. 2805-2810, 2013, the disclosure of which is incorporated herein by reference), and in some embodiments, iterative density gradient ultracentrifugation (i-DGU) is used (see, for example, Kawai, M. et al., *The Journal of the American Chemical Society*, Vol. 134, pp. 9545-9548, 2012, the disclosure of which is incorporated herein by reference). In some such embodiments, large-diameter carbon nanotubes are enriched by chromatography.

[0118] More specifically, the implementation will develop an i-DGU process using a uniformly loaded medium with a single or dual surfactant and a density gradient medium for each iteration. Figures 4A to 4CVarious implementations utilize a one-step gradient (iodixanol as the density gradient medium) and sodium cholate (SC) as the sole surfactant in the first iteration to isolate well-individualized populations of semiconductor carbon nanotubes with diameters relatively larger than other species. The diameter distribution of larger-diameter carbon nanotubes in the CsCl medium (self-forming density gradient) can be further reduced by exchanging the surfactant for Pluronic block copolymer F68 or by adding sodium dodecyl sulfate as a co-surfactant to the SC. In such embodiments, the exchange of surfactant and density gradient medium between iterations can be achieved through temporary aggregation of SC-individualized semiconductor SWCNTs via a scalable process involving organic solvent mixing, filtration, and rinsing, followed by redispersion in a CsCl and F68-based aqueous solution. For the co-surfactant method, the SC-individualized SWCNTs can be further dialyzed to minimize the concentration of iodixanol and simply added to a CsCl and SC / SDS-based aqueous solution.

[0119] According to one embodiment, self-formed density gradient ultracentrifugation using F68 provides a scalable and rapid method for high-yield electron-type sorting of single-walled carbon nanotubes (SWCNTs) with a large diameter range of 1.2–1.6 nm. Furthermore, the density slope generated by CsCl is much smaller than that of iodixanol, thus providing the higher separation resolution required to separate various diameter types of SWCNTs with subtle differences in buoyancy density. According to one embodiment, a second iteration of i-DGU separates and enables the extraction of well-individualized s-SWCNTs from the first iteration, which has the lowest buoyancy density and narrow diameter distribution. According to one embodiment, the steps and the use of a self-formed density gradient eliminate the requirements for linear density gradients and associated equipment, effort, and preparation time, while maximizing yield by allowing CNTs to be loaded across the entire gradient, thus facilitating upward scalability.

[0120] Using this process and method, the purity of the isolated large-diameter semiconductor single-walled carbon nanotubes will be >99%. According to various implementation schemes, in a 1 liter solution with a concentration of 0.01 mg / ml / day, the diameter distribution of the isolated large-diameter SWCNTs is ~1.6 nm ± 0.1 nm.

[0121] Large-diameter carbon nanotubes exhibit greater transconductance than small-diameter carbon nanotubes (see, for example, Chen, Z. et al., Nano Letters, Vol. 5, pp. 1497-1502, 2005; and Tersoff, J. et al., Physical Review Letters, Vol. 111, pp. 236802, 2013, the contents of which are incorporated herein by reference). For RF applications according to embodiments, semiconductor carbon nanotubes with a diameter of ~1.6 nm can provide an average bandgap of ≈0.55 eV. For these energy levels of carbon nanotubes, it is believed that charge carriers propagate along the tube axis at the CNT surface with a significantly reduced scattering probability. Recently, CNT RFFETs fabricated with narrowly distributed large-diameter CNTs (~1.6 nm) have exhibited eigenvalue fT and fMAX of 23 GHz and 20 GHz, respectively.

[0122] The purity and chirality of the separated s-SWCNTs can be identified using Vis-NIR absorption, NIR luminescence, and Raman spectroscopy (see, for example, [link to relevant documentation]). Figures 4B to 4E The purely semiconductor characteristics of the nonlinear current bias curves were demonstrated in metal|carbon nanotube network|metal dual diodes. Based on these Shottky diodes, the fabricated PMOS and NMOS field-effect transistors exhibited fi behavior on both p and n charge carriers. A Cut-off current and >108ION / IOFF ratio (see, for example) Figure 4F and 4G Third-party testers confirmed the electronic purity of SWCNTs. The purity of CNTs allows implementations to provide improved performance in CNT circuits.

[0123] Implementation of a single-walled carbon nanotube arrangement

[0124] Currently, the reported best CFET device performance has an f / s of 70 GHz. T and f MAX And an OIP3 of 33 dB measured at 1 GHz for purified single-walled carbon nanotubes encapsulated with a oriented polymer (see, e.g., Park, H. et al., *Nature Nanotechnology*, Vol. 7, pp. 787–791, 2012, the disclosure of which is incorporated herein by reference). To improve these results, embodiments achieve the orientation of individual, isolated carbon nanotubes disposed in nanogrooves with an oriented carbon nanotube length of at least 1 micrometer and a narrow density range (e.g., 10–30 CNT / micrometer), such as Figure 5A and 5BAs shown. Single carbon nanotubes are used to mitigate changes in electronic properties and a high carbon nanotube density is achieved to generate sufficient current density. Thus, implementations have been found to utilize depletion forces to improve the performance of RF devices (see, for example, Wu, J. et al., Advanced Materials, Vol. 26, pp. 6151-6156, 2014, the disclosure of which is incorporated herein by reference).

[0125] Specifically, oriented carbon nanotubes reduce the contact resistance and point crossings that dominate conventional carbon nanotube networks for entangled carrier transport. Furthermore, the uncontrolled bundles in the oriented pattern introduce avoidable variations in electrical properties. According to one implementation, the nanoscale trench confinement combined with the depletion force of the surfactant surrounding the carbon nanotubes allows for the formation of individually oriented carbon nanotube arrays to directly bridge channel regions without crossing or forming a permeable network, where carrier mobility is determined by the “point” contacts formed by the crossings, and is therefore much lower than that in the tube itself. The complexity of this implementation lies in scaling up the arrangement of single-electron, purely chiral, single-walled carbon nanotubes to operate on a wafer scale.

[0126] Several methods have been reported for arranging separated carbon nanotubes, such as low-frequency dielectric electrophoresis (Krupke, R. et al., *Applied Physics A*, Vol. 76, pp. 397-400, 2003; Cao, Q. et al., *Nature Communications*, Vol. 5, p. 5071, 2014; Hennrich, F. et al., *ACSNano*, Vol. 10, acsnano. 5b05572, 2016), molecular attraction self-assembly, and crystal templates (Kawai, H. et al., *Applied Physics*). Letters, Vol. 105, pp. 093-102, 2014), Evaporation-Driven Self-Alignment (Shastry, TA et al., Small, Vol. 9, pp. 45-51, 2013; also Joo, YH et al., Langmuir, Vol. 30, pp. 3460-3466), Langmuir-Blodgett (Li, X. et al., Journal of the American Chemical Society, Vol. 129, pp. 4890-4891-2007), Langmuir-Shaeffer, Solution Shearing (Park, S. et al., Advanced Materials, Vol. 27, pp. 2656-2662 (2015), and consumption power (Li, S. et al., Small, Vol. 3, pp. 616-621, 2007 and Wu, J. et al., Small, Vol. 9, pp. 4142-4148, 2013). However, these techniques are difficult to extend to the wafer side.

[0127] The implementation method utilizes the interaction between surfactants and various surfaces to arrange electron-pure monochiral semiconductor single-walled carbon nanotubes within nanoscale trenches formed within a substrate (e.g., through electron beam patterning). Specifically, such as... Figure 6 As shown, in various embodiments on the substrate, electron beam resistant PMMA is coated. Then, electron beam lithography is used to define the channel patterns in these embodiments. The channel size can be customized according to the specific application and the required CNT density. For example, in a 1 μm (channel length) × 50 μm (channel width) profile, 1 μm × 60 nm strips are etched and separated by 40 nm polymethyl methacrylate (PMMA) sidewalls. If only one carbon nanotube is oriented within each strip, the density will be 10 carbon nanotubes per μm. To increase the carbon nanotube density, the strip width can be reduced from 60 nm, while the PMMA sidewalls can be reduced from 40 nm.

[0128] To facilitate the alignment of carbon nanotubes, patterned strips can be functionalized with a suitable material (e.g., an aqueous solution of polylysine). Due to the hydrophobicity of PMMA, the aqueous solution of polylysine will be confined within these patterned strips. After removing the aqueous solution of polylysine and washing extensively with deionized (DI) water, an electronically pure aqueous solution of monochiral single-walled carbon nanotubes will be deposited on these polylysine-functionalized strips. Many embodiments employ aerosol jet printing techniques to deposit a consistent and uniform carbon nanotube network and employ cleaning methods to completely desorb the surfactant used to disperse the carbon nanotubes in the aqueous solution. The orderliness and uniformity of the CNT networks deposited according to these embodiments are demonstrated in AFM height images (see, e.g., Figure 7A &7B).

[0129] Carbon nanotubes dispersed with sodium cholate (SC) rapidly adsorb onto the polylysine surface, while carbon nanotubes dispersed with sodium dodecyl sulfonate (SDS) slowly interact with the polylysine. Depending on the implementation, the appropriate SC / SDS ratio can be optimized to align the carbon nanotubes within the polylysine-functionalized strips. To avoid bunching, the carbon nanotube concentration can also be optimized to have one carbon nanotube per strip. After removing the carbon nanotube solution, the substrate is baked on a hot plate at 120°C for 10 minutes. This step is necessary to retain the oriented carbon nanotubes in their original positions. The substrate is then thoroughly rinsed with DI water to remove any surfactant residue. The final step is to remove the electron beam resistant PMMA by immersing the substrate in a suitable bath (e.g., acetone).

[0130] According to the implementation method, the obtained pattern of oriented carbon nanotubes will be characterized using scanning electron microscopy (SEM) and atomic force microscopy (AFM). Figures 8A to 8D SEM and AFM images of oriented carbon nanotubes according to these embodiments are shown.

[0131] In summary, in many implementations, CNT-enabled RF transistors (e.g., field-effect transistors) include the following characteristics:

[0132] High-purity (>99%), narrow-distribution, large-diameter (~1.6 nm ± 0.1 nm) semiconductor carbon nanotubes. Figure 3B ).

[0133] • By aligning the interface dipole moments between the device substrate and CNTs, the carrier injection barrier and contact resistance are reduced. Figure 2A ).

[0134] • Multiple channels, each equipped with multiple directional CNTs Figure 4A ).

[0135] Implementation methods of manufacturing process

[0136] While the above discussion focuses on device architecture, many implementations also involve methods and processes for CNT alignment and deposition, material contact, and doping for device engineering to produce high-quality CNT arrays beyond current standards and to establish robust processes capable of supporting high-performance RF transistors in stable CNT manufacturing environments. All these process developments will scale to the wafer scale, enabling the fabrication of monolithic integrated circuits. More specifically, implementations allow for the fabrication of CNT films with clean arrangements of ultrapure semiconductor single-walled carbon nanotubes having a single chirality and a narrow distribution diameter, at which the contact resistance of the carbon nanotubes with the interface conjugated polyelectrolyte contacts is less than 25 kΩ. Implementations of the methods and processes are configured to fabricate wafer-level hysteresis-free CNTRF devices (e.g., field-effect transistors) with at least the following metrics:

[0137] • DC: ION / W > 500mA / mm, ION / IOFF > 1000, in some implementations ION / W > 700mA / mm, gm / W > 700ms / mm;

[0138] ·RF: f T and f max >50GHz, in some implementations f T >130GHz, f max >180GHz; and

[0139] • The third-order intermodulation intercept (IP3) is at least 10 dB higher than its 1 dB compression power (P1 dB), and in some embodiments at least 15 dB higher than its 1 dB compression power (P1 dB).

[0140] Many implementations of the methods and processes are configured to be compatible with existing silicon infrastructure and integrated with CMOS production lines.

[0141] As previously described, the device for realizing individually oriented single-chiral semiconductor single-walled carbon nanotube arrays according to the embodiments inherently mitigates electrical variations caused by nanotube diameter distribution and nanotube bundles. The oriented carbon nanotube array directly bridges the drain / source to eliminate cross-linking and the formation of permeation networks between nanotubes. The oriented patterning eliminates the need for etching carbon nanotubes for patterning, which can introduce defects, doping, and undesirable materials leading to hysteresis and carrier scattering. Furthermore, the cleaning method according to the embodiments effectively removes the surfactants used for carbon nanotube dispersion to limit hysteresis. Finally, the use of interfacial dipole moment alignment of the conjugated electrolyte according to the embodiments can significantly reduce contact resistance from >120 kΩ per carbon nanotube to 3 kΩ per carbon nanotube.

[0142] The implementation methods discussed herein realize these processes and architectures to construct exemplary RF devices. Radio frequency carbon nanotube field-effect transistors have been extensively studied. Early studies reported that a single carbon nanotube FET could achieve a transconductance of ~20 μS in a short channel (300 nm) (see, e.g., Li, S. et al., *Nano Letters*, Vol. 4, pp. 753–756, 2004; Yu, Z. et al., *Applied Physics Letters*, Vol. 88, pp. 233–115, 2006; and Wang, D. et al., *IEEE Transactions on Nanotechnology*, Vol. 6, pp. 400–403, 2007, the contents of each of which are incorporated herein by reference). The RFCNTFET constructed by chemical vapor deposition on oriented carbon nanotubes achieves a transconductance of ~20 μS at the intriguing cutoff current gain frequency (f0). T ) and intrinsic maximum power gain frequency (f MAX The f(x) exhibited frequencies of 25 GHz and 9 GHz, respectively. A 7 GHz f(x) was obtained by arranging the separated semiconductor carbon nanotubes. T and 15GHz f MAX The report details recent advancements in RFCNTFETs, including those with discrete semiconductor carbon nanotube networks. T For 23GHz, f MAX For 20 GHz, with directional polymer-separated CNTs, f T and f max The intrinsic hysteresis is 70 GHz. Despite these promising characteristics, RFCNT FET devices formed from discrete semiconductor carbon nanotubes appear to exhibit strong hysteresis and significant contact resistance. Among these RF CNT FETs, some devices use top gates with dielectrics such as Al₂O₃, HfO₂, Y₂O₃, and BCB / HfO₂. Some devices use back gates with Al₂O₃ and HfO₂ dielectric layers. In particular, using these embedded back gates, intrinsic hysteresis up to 153 GHz has been reported. T and up to 30GHz f MAX Even their non-intrinsic f T and f MAX Approximately 7GHz and 15GHz.

[0143] To realize such a device according to the embodiments, the methods and processes must fabricate submicron channel lengths and adhere to precise gate alignment. The device structure of the carbon nanotube array FET according to the embodiments is configured with suitable channel lengths and optimized dielectric layers. Fabrication processes can be used to realize hysteresis-free devices. Embodiments using the processes and methods can be used to form top-gate or back-gate structures, as discussed above. Figure 1B The subject of discussion.

[0144] In many implementations, top-gate single-carbon nanotube FETs are realized. In some such implementations, T-gate devices can be fabricated, such as... Figure 9 As shown in the figure, to fabricate a T-gate CNTFET, electron-pure single-chiral semiconductor carbon nanotubes are oriented onto a suitable substrate (e.g., silicon, quartz, etc.) as previously described. Drain / source pre-pads are then placed on the oriented carbon nanotubes to form channels of suitable length and width (e.g., 1 micrometer in length and 50 micrometers in width). Figure 9 Step 1). Inside the channel, after dielectric deposition, the dielectric material is deposited into a patterned shape structure on the MMA / PMMA resistor using electron beam etching. Figure 9 Step 2). The final step is spin-coating the interface CPE layer and forming the drain / source pattern by peeling off the gate dielectric layer along the T and the 10nm gate electrode. Figure 9 (Step 3). Figure 10 The advantages of T-gate RF devices are summarized. In short, using T-gate RF devices, transconductance and f... T This is expected to more than double. This combination also allows for control of the CNTFET's conduction, thereby achieving the inherent linearity of the material.

[0145] In other embodiments, a bottom-gate controlled single carbon nanotube FET can be fabricated (either on a substrate or embedded within a substrate). For example... Figure 11 As shown, in such an implementation, a suitable substrate (e.g., a silicon wafer (silicon dioxide thickness > 1 micrometer)) is etched using photolithography patterns. Figure 11 Step 1). Then, after metal (titanium / palladium) deposition, the bottom gate is patterned by stripping. Figure 11 Step 2). Then, after the development process, a dielectric layer is deposited ( Figure 11 Step 3). On the deposited dielectric layer, as described above, electron-pure monochiral carbon nanotubes are oriented as described above ( Figure 11 Step 4). The final step is spin coating to coat the interface CPE layer and assemble the drain / source, thereby forming the short channel ( Figure 11 (Step 5).

[0146] While some specific methods and processes have been described above, it should be understood that these methods and processes (e.g., materials, methods, temperatures, etc.) can be optimized according to the implementation by comparing the maximum transconductance of various device structures and the selection and deposition of dielectric materials.

[0147] Exemplary Implementation

[0148] The following describes specific exemplary devices and the results of tests and studies conducted on such devices. The disclosed embodiments are for illustrative purposes only and are not intended to limit the scope of possible implementations.

[0149] Example 1: Characterization Study of the Implementation Method

[0150] The performance of different device structures employing different dielectric materials and deposition methods can be characterized to allow for optimization. The Keithley 4200SCS can be used for characterization. Its transmission (IDS-VGS) and output (IDS-VDS) characteristics will be measured (see, for example, [link to documentation]). Figure 12A &12B). The results showed that these devices were air-stable and showed no degradation after two years.

[0151] Based on the measurement data, transconductance, mobility, subthreshold swing, ION / IOFF ratio, and hysteresis can be estimated. These results can be compared with those obtained from a single carbon nanotube FET to check their consistency. Furthermore, the DC characterization results are processed to obtain optimized bias points for subsequent RF characterization, for example, the points where transconductance is maximized in the 3D plots of transconductance versus VDS and VGS (where the 3D plots are extracted from IDS-VDS curves of different VGS).

[0152] RF characterization: To characterize the RF performance of carbon nanotube array RFFETs, standard spectrometer measurements can be performed using a grounded (GSG) probe and an N5242APNA-X vector network analyzer (VNA). Measurement settings are as follows: Figure 13A As shown, the source is grounded, and a DC bias is provided to the gate and drain via bias-T. For RF measurements, the gate and drain may be biased to a value that will give the maximum gm, such as the value extracted from the 3D transconductance plot in the DC characterization. Before performing RF measurements, the VNA probe measurement system can be calibrated using the short-on-load-through (SOLT) method.

[0153] Since two types of CNTFET performance need to be extracted—extrinsic and intrinsic—two calibration standards can be used. For intrinsic performance, a calibration substrate from GGBINDUSTRIESINC can be used as the calibration standard; for intrinsic performance, to eliminate parasitic capacitance and inductance of the gate and drain, such as through pads specifically designed for probes, custom short-circuit (CNT region filled with metal) and open-circuit (blank, no CNT) structures can be used.

[0154] After calibration, the S-parameters of the carbon nanotube array field FET will be measured at different biases from 50 MHz to 20 GHz. Figure 13C ). Figure 13BA typical Smith chart is shown. Based on the S-parameters, the high-frequency performance of the carbon nanotube array FET, such as current gain, maximum available gain, small-signal input impedance, and output impedance, can be easily derived.

[0155] (EQ.1)

[0156] (EQ.2)

[0157] or

[0158] (EQ.3)

[0159] Where K is the stability coefficient, which can be calculated using the following equation:

[0160] (EQ.4)

[0161] The derived h 21 and G MAX will be as Figure 13D A function of the mid-frequency. From the graph, we can define the gain h at the current frequency. 21 and G MAX The eigenf at 0dB T and f MAX These frequencies represent the highest frequencies at which electrical signals propagate within transistors and achieve power gain. (Extrinsic f) T This refers to the frequency at which the ratio of the output current to the input current is equal to 1 when the transistor output is short-circuited to ground. (Non-eigenvalue f) MAX This refers to the frequency at which the ratio of output power to input power is equal to 1 when the output is connected to the system's characteristic impedance. (Non-eigenvalue f) MAX Compared to non-intrinsic f T More importantly, in practical applications, the output is typically matched to the characteristic impedance. To reveal the transistor's inherent electrical transport characteristics, SOLT de-embedding techniques, which eliminate the influence of parasitic capacitance, can be performed to derive h. 21 and G MAX The inherent properties of a transistor (f) are obtained as a function of frequency. T and f MAX ).

[0162] Intrinsic and non-intrinsic f T and f MAX It is expected to outperform current RF performance (intrinsic f-values ​​at 153 GHz and 30 GHz). T and f MAX Non-intrinsic f T and f MAX(23 GHz and 20 GHz), which is due to the arrangement of electronically pure monochiral carbon nanotubes and the improved carrier injection through the use of interfacial conjugated polyelectrolytes (extremely low contact resistance), resulting in ultra-high transconductance greater than 20 μS per carbon nanotube.

[0163] Example 2: Wafer-level DNTRF equipment manufacturing

[0164] Various implementations involve manufacturing processes to obtain robust and air-stable CNT RF devices capable of being fabricated at the wafer scale. Although RF devices with oriented CNTs... T and f MAX The performance index is greater than 70GHz, and the third-order intermodulation intercept (IP3) is 22dBm, which is higher than its...

[0165] While the 1dB compression power (P1dB) is approximately 7dBm high, the on / off ratio of these devices is less than 100, and CNTRF devices become air-stable and severely degrade after one or two months. Furthermore, existing oriented CNT films are limited by their orientation devices, typically having an area size smaller than 1cm × 1cm. Current implementations seek to achieve wafer-level air-stable CNT devices with an on / off ratio greater than 1000, and consistent performance after three years. Figure 14A &14B).

[0166] A key challenge in implementing such implementations includes the large-scale deposition of T-gate stacks in channels smaller than 100 nanometers, comprising oxide deposition and metallization as well as etching processes. Using large-scale casting equipment, wafer-scale, air-stable, uniform, pure electronic single-walled carbon nanotube (CNT) transistors have been produced. Based on these electronically pure CNT thin films (… Figure 15A ), T gate Al / Al2O3 ( Figure 15B CNTRF devices have been produced. A 1dB compression study was conducted on a T-gate RF device with the following parameters (50 μm total width, 200 nm length, -0.5 V gate bias, 1.0 V drain bias, 8.4 mA total drain current), showing a reference output of 11.9 dB and a power gain of 6 dB. Figure 15C A typical f was obtained. MAX At 524MHz, the RF device has a total width of 50 micrometers and a length of 200 nanometers, exhibiting p-type behavior. When biased with a gate-source voltage of -0.5V and a drain-source voltage of -1.0V, it generates a drain current of 8.4mA. Figure 15D ).

[0167] According to the implementation method, using this technology, a T-gate carbon nanotube TF TRF device was fabricated and operated at 5 GHz. MAX The preliminary results were characterized (see, for example, see...). Figure 16A and 16B ).

[0168] Principle of Equivalence

[0169] While the above description includes many specific embodiments of the invention, these should not be construed as limiting the scope of the invention, but rather as examples of one embodiment. Therefore, the scope of the invention should not be determined by the illustrated embodiments, but rather by the technical solutions described in this application and their equivalents.

Claims

1. A radio frequency device based on carbon nanotubes, comprising: A substrate having a plurality of parallel nanochannels configured as an array on its surface; The source and drain are disposed on the substrate, and define a channel in which multiple parallel nanochannels are disposed; Multiple individually oriented, narrow-diameter distributed single-walled carbon nanotubes, each single-walled carbon nanotube disposed within each of multiple parallel nanochannels and directly bridging the source and drain, wherein each of the individually oriented single-walled carbon nanotubes is electronically pure, has a single-chiral structure, and is individually configured to be oriented within one of multiple parallel nanochannels. A conjugate electrolyte layer is disposed between multiple individually oriented single-walled carbon nanotubes and the source and drain electrodes; and At least one gate is disposed within the channel.

2. The radio frequency device based on carbon nanotubes according to claim 1, wherein the plurality of individually oriented single-walled carbon nanotubes have a purity of at least 99%, a length of >1 micrometer, a diameter of >0.7 nanometers, and a diameter distribution of ±0.1 nanometers.

3. The radio frequency device based on carbon nanotubes according to claim 1, wherein the diameter of the plurality of individually oriented single-walled carbon nanotubes is 1.6 nm ± 0.1 nm.

4. The radio frequency device based on carbon nanotubes according to claim 1, wherein the plurality of individually oriented single-walled carbon nanotubes are arranged in a plurality of parallel nanochannels such that there are no point intersections between the individual single-walled carbon nanotubes.

5. The carbon nanotube-based radio frequency device according to claim 1, wherein the plurality of parallel nanochannels have a length of at least 1 micrometer and a width of 60 nanometers.

6. The carbon nanotube-based radio frequency device according to claim 1, wherein the plurality of parallel nanochannels are functionalized with polylysine.

7. The radio frequency device based on carbon nanotubes according to claim 1, wherein the plurality of individually oriented single-walled carbon nanotubes have a density of 10 to 30 carbon nanotubes per micrometer.

8. The radio frequency device based on carbon nanotubes according to claim 1, wherein, The at least one gate is selected from T-gate, back gate, and embedded back gate.

9. The carbon nanotube-based radio frequency device according to claim 1, wherein the plurality of parallel nanochannels are formed of PMMA material.

10. The carbon nanotube-based radio frequency device according to claim 1, wherein the carbon nanotube-based radio frequency device has an ION / W greater than 500 mA / mm, an ION / IOFF greater than 1000, and an f / W greater than 50 GHz. T and f max It also has a third-order intermodulation intercept (IP3) that is at least 10 dB higher than its 1 dB compression power (P1dB).

11. A method for forming a top-gate radio frequency device based on carbon nanotubes, comprising: Provide a substrate and form multiple nanochannels; A carbon nanotube array is formed by placing each of a plurality of individually oriented single-walled carbon nanotubes with narrow diameter distribution within each of a plurality of nanochannels. Each of the plurality of individually oriented single-walled carbon nanotubes is electronically pure, has a single-chiral structure, and is individually configured to be oriented within one of the plurality of nanochannels. Clean the carbon nanotube array to remove unwanted carbon nanotubes; Drain pre-pads and source pre-pads are deposited on top of a carbon nanotube array to form a channel between the drain pre-pads and the source pre-pads, and to allow the carbon nanotube array to directly bridge the drain pre-pads and the source pre-pads. A dielectric gate structure is formed within the channel at the top of the carbon nanotube array; An interfacial conjugated electrolyte layer is deposited on top of the carbon nanotube array; and A set of conductive power electrodes, drain and gate layers is deposited on drain pre-pads, source pre-pads, dielectric gate structure and interface layer to electrically interconnect the set of conductive power electrodes, drain and gate layers and carbon nanotube array.

12. The method of claim 11, further comprising purifying a plurality of individually oriented single-walled carbon nanotubes by iterative gradient ultracentrifugation, such that the plurality of individually oriented single-walled carbon nanotubes have a purity of at least 99%, a length of >1 micrometer, a diameter of >0.7 nanometers, and a diameter distribution of ±0.1 nanometers.

13. The method of claim 11, wherein forming the carbon nanotube array further comprises: An electron beam shielding layer is deposited on top of the substrate; Multiple nanochannels are formed in the electron beam resistant layer by electron beam etching; Functionalizing multiple nanochannels using polylysine materials; Cleaning functionalized multiple nanochannels; A solution of multiple individually oriented single-walled carbon nanotubes deposited on multiple functionalized nanochannels, wherein the solution is a mixture of multiple individually oriented single-walled carbon nanotubes dispersed by one or more surfactants. Baking the substrate; Clean the baked substrate to remove excess carbon nanotubes; as well as Remove the electron beam shielding layer from the substrate.

14. The method of claim 13, wherein one or more surfactants are sodium cholate and sodium dodecyl sulfonate.

15. The method of claim 11, wherein the plurality of individually oriented single-walled carbon nanotubes are arranged within the plurality of nanochannels such that there are no point intersections between the individual single-walled carbon nanotubes.

16. A method for forming a carbon nanotube-based back-gate radio frequency device, comprising: A substrate is provided and drain pre-pads, source pre-pads and gate pre-pads are formed thereon to define channels; Dielectric layers are deposited on the drain pre-pad, source pre-pad, and gate pre-pad; Multiple nanochannels are formed on top of the dielectric layer. Each of the multiple individually oriented single-walled carbon nanotubes with narrow distribution diameters is placed in each of the multiple nanochannels to form a carbon nanotube array that directly bridges the drain pre-pad and the source pre-pad. Each of the single-walled carbon nanotubes is electronically pure, has a single-chiral structure, and is individually configured to be oriented within one of the multiple nanochannels. Clean the carbon nanotube array to remove unwanted carbon nanotubes; An interfacial conjugated electrolyte layer is deposited on top of the carbon nanotube array; and A set of conductive power, drain, and gate electrode layers are deposited on top of the drain pre-pad, source pre-pad, and interface layer to electrically interconnect the drain pre-pad, source pre-pad, and gate pre-pad with the carbon nanotube array.

17. The method of claim 16, further comprising purifying a plurality of individually oriented single-walled carbon nanotubes by iterative gradient ultracentrifugation, such that the single-walled carbon nanotubes have a purity of at least 99%, a length of >1 micrometer, a diameter of >0.7 nanometers, and a diameter distribution of ±0.1 nanometers.

18. The method of claim 16, wherein forming the carbon nanotube array further comprises: An electron beam resistant layer is deposited on top of the dielectric layer; Multiple nanochannels are formed in the electron beam resistant layer by electron beam etching; Functionalizing multiple nanochannels using polylysine materials; Cleaning functionalized multiple nanochannels; A solution of multiple individually oriented single-walled carbon nanotubes deposited on multiple functionalized nanochannels, wherein the solution is a mixture of multiple individually oriented single-walled carbon nanotubes dispersed by one or more surfactants. Baking the substrate; Clean the baked substrate to remove excess single-walled carbon nanotubes; as well as Remove the electron beam shielding layer from the substrate.

19. The method of claim 18, wherein one or more surfactants are sodium cholate and sodium dodecyl sulfonate.

20. The method of claim 16, wherein the plurality of individually oriented single-walled carbon nanotubes are arranged within the plurality of nanochannels such that there are no point intersections between the individual single-walled carbon nanotubes.

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