Hardware-Software Design Flow for Heterogeneous Programmable Devices

CN113826068BActive Publication Date: 2025-09-23XILINX INC
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Patent Information

Application Number
CN202080035811.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-05-23
Filing Date
2020-05-11
Publication Date
2025-09-23
Estimated Expiration
2040-05-11

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Abstract

For an application that specifies a software portion to be implemented within a data processing engine (DPE) array of a device and a hardware portion to be implemented within programmable logic (PL) of the device, a logical architecture and a first interface solution for the application are generated, the first interface solution specifying a mapping of logic resources to hardware interface circuit blocks between the DPE array and the programmable logic. A block diagram of the hardware portion is constructed based on the logical architecture and the first interface solution. An implementation flow is executed on the block diagram. The software portion of the application is compiled for implementation in one or more DPEs of the DPE array.
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Citation Information

Patent Citations

  • Computing system with hardware scheduled reconfiguration mechanism and method of operation thereof

    US20120284492A1

  • Shared memory interface in a programmable logic device using partial reconfiguration

    US7546572B1