Internal voltage generation circuit of a smart card and smart card comprising the same

Abstract

An internal voltage generation circuit of a smart card performing fingerprint authentication and a smart card are provided, the internal voltage generation circuit including a first contact switch, a second contact switch, a switched capacitor converter, and a bidirectional switched capacitor converter. The first contact switch selectively switches a contact voltage to a first node based on a first switch enable signal in a contact mode. The second contact switch selectively switches the contact voltage to a second node based on a second switch enable signal in the contact mode. The bidirectional switched capacitor converter steps down a first drive voltage of the first node to provide a second voltage to the second node in a contactless mode, and steps down the first drive voltage or steps up a second drive voltage of the second node to provide a stepped-up voltage to the first node based on a level of the contact voltage in the contact mode.

Claims

1. An internal voltage generation circuit for a smart card, the smart card being configured to perform fingerprint authentication, the internal voltage generation circuit comprising: A first contact switch is configured to selectively switch to a first node in contact mode based on a first switch enable signal received from an external card reader. A second contact switch is configured to selectively switch the contact voltage to a second node based on a second switch enable signal in the contact mode. A switched capacitor converter is configured to step down a contactless voltage induced by electromagnetic waves received from the card reader in order to provide a first drive voltage for contactless mode to the first node. A bidirectional switched capacitor converter, connected to the first node and the second node, is configured to: In the contactless mode, the first driving voltage of the contactless mode at the first node is reduced to provide the second driving voltage of the contactless mode to the second node. and In the contact mode, the first drive voltage of the contact mode at the first node is stepped down to provide the second drive voltage of the contact mode to the second node, or the second drive voltage of the contact mode at the second node is stepped up based on the level of the contact voltage to provide the stepped voltage to the first node; A mode selector is configured to output a first mode signal and a second mode signal, the first mode signal specifying one of the contact mode and the non-contact mode, and the second mode signal specifying one of a plurality of sub-modes of the contact mode. The mode selector is also configured to select the highest voltage among the contact voltage, the non-contact voltage and the first drive voltage, and output the selected voltage as a control voltage. as well as A control signal generator is configured to generate a first power-down signal to enable / disable the switched capacitor converter, a second power-down signal to enable / disable the bidirectional switched capacitor converter, a first switch enable signal, and a second switch enable signal based on the first mode signal and the second mode signal.

2. The internal voltage generation circuit according to claim 1, wherein, In the contactless mode, The control signal generator is configured to, in response to the first mode signal, disable the first contact switch and the second contact switch respectively by using the first switch enable signal and the second switch enable signal. The switched capacitor converter is configured to be enabled in response to the first power-down signal and is configured to step down a contactless voltage having a first voltage level to output the first drive voltage of the contactless mode having a second voltage level less than the first voltage level to the first node. The bidirectional switched capacitor converter is configured to step down the first drive voltage of the contactless mode to output a second drive voltage of the contactless mode with a third voltage level to the second node, the third voltage level being less than the second voltage level.

3. The internal voltage generation circuit according to claim 1, wherein, In the first sub-mode of the contact mode, when the voltage level of the contact voltage is greater than the reference voltage, The control signal generator is configured to, in response to the first mode signal and the second mode signal, disable the switched capacitor converter and the second contact switch respectively by using the first power-down signal and the second switch enable signal. The first contact switch is configured to switch a contact voltage having a first voltage level to the first node as the first drive voltage, and The bidirectional switched capacitor converter is configured to be enabled in response to the second power-down signal and is configured to step down the first drive voltage to output a contact-mode second drive voltage with a second voltage level to the second node, the second voltage level being less than the first voltage level.

4. The internal voltage generation circuit according to claim 1, wherein, In the second sub-mode of the contact mode, when the voltage level of the contact voltage is less than the first reference voltage and greater than the second reference voltage, The control signal generator is configured to, in response to the first mode signal and the second mode signal, disable the switched capacitor converter and the bidirectional switched capacitor converter respectively by using the first power-down signal and the second power-down signal. The first contact switch is configured to switch the contact voltage to the first node as the first drive voltage for the contact mode, and The second contact switch is configured to switch the contact voltage to the second node as the second drive voltage for the contact mode.

5. The internal voltage generation circuit according to claim 1, wherein, In the third sub-mode of the contact mode, when the voltage level of the contact voltage is less than the first reference voltage and the second reference voltage, and the second reference voltage is less than the first reference voltage, The control signal generator is configured to, in response to the first mode signal and the second mode signal, disable the switched capacitor converter and the first contact switch respectively by using the first power-down signal and the first switch enable signal. The second contact switch is configured to switch a contact voltage having a first voltage level to the first node as the second drive voltage, and The bidirectional switched capacitor converter is configured to be enabled in response to the second power-down signal and is configured to boost the second drive voltage to output the contact mode first drive voltage having a second voltage level to the first node, the second voltage level being greater than the first voltage level.

6. The internal voltage generation circuit according to claim 1, wherein, The mode selector includes: A comparator configured to compare the non-contact voltage and the contact voltage to output a comparison signal; A contact detector is configured to output a detection signal associated with detecting the external reset signal based on an external reset signal received from the card reader in the contact mode; A pattern signal generator is configured to generate a first pattern signal and a contact pattern signal specifying the contact pattern based on the comparison signal and the detection signal; A category detector, configured to be enabled in response to the contact pattern signal, is configured to compare the contact voltage with a first reference voltage and a second reference voltage to generate a second mode signal indicating the category of the reader associated with a sub-mode among the plurality of sub-modes, the second reference voltage being less than the first reference voltage; A level comparator configured to compare the contact voltage, the non-contact voltage, and a first node voltage at the first node to output a selection signal indicating the highest voltage among the contact voltage, the non-contact voltage, and the first node voltage; and A multiplexer is configured to output the highest of the contact voltage, the non-contact voltage, and the first node voltage as the control voltage in response to the selection signal.

7. The internal voltage generation circuit according to claim 6, wherein, The pattern signal generator is configured to generate the first pattern signal and to enable the contact pattern signal based on the level of the comparison signal and the level of the detection signal.

8. The internal voltage generation circuit according to claim 1, wherein, The first contact switch includes: A main switch includes a first p-channel metal-oxide-semiconductor transistor having a source coupled to the contact voltage and a drain coupled to the first node. An auxiliary switch includes a second p-channel metal-oxide-semiconductor transistor having a source coupled to the gate of the main switch at a first internal node, a drain coupled to the contact voltage, and a gate receiving an on-state voltage associated with generating the control voltage. A first delay circuit includes a plurality of first inverters connected in stages, the first delay circuit being configured to operate based on the control voltage and being configured to delay an auxiliary switch power-down signal to generate the turn-on voltage; A second delay circuit, connected to a second internal node, is configured to operate based on the control voltage and is configured to delay the first switch enable signal to provide the delayed first switch enable signal to the second internal node. A second inverter is connected between the first internal node and the second internal node; A third inverter, which is connected to the second inverter at a third internal node and between the third internal node and ground voltage, is configured to invert the turn-on voltage to provide the inverted turn-on voltage to the fourth internal node. A third p-channel metal-oxide-semiconductor transistor has a source coupled to the third internal node, a gate coupled to the fourth internal node, and a drain coupled to the fifth internal node. An n-channel metal-oxide-semiconductor capacitor coupled between the fifth internal node and the ground voltage; A fourth p-channel metal-oxide-semiconductor transistor having a drain coupled to the fifth internal node, a source coupled to a sixth internal node connected to the control voltage, and a gate coupled to a seventh internal node; and A fourth inverter, connected between the sixth internal node and the ground voltage, is configured to invert the turn-on voltage to provide the inverted turn-on voltage to the seventh internal node.

9. The internal voltage generation circuit according to claim 8, wherein, The auxiliary switch is configured to turn on in response to the turn-on voltage before the control voltage is generated, and is configured to prevent overcurrent from flowing into the main switch.

10. The internal voltage generation circuit according to claim 8, wherein, The auxiliary switch is configured to turn off in response to the on-voltage after the control voltage is generated, and is configured to maintain the voltage at the gate of the main switch at a high level. In the contact mode, the main switch is turned on in response to a delayed first switch enable signal.

11. The internal voltage generation circuit according to claim 8, wherein, In the contact mode, The control voltage changes to the level of the contact voltage in response to the contact voltage changing to the target level. The gate voltage of the third p-channel metal-oxide-semiconductor transistor changes to a high level in response to the turn-on voltage being low, and changes to a low level in response to the turn-on voltage changing to a high level. The auxiliary switch power-off signal changes to a high level in response to the generation of the control voltage.

12. The internal voltage generation circuit according to claim 11, wherein, In the contact mode, The gate voltage of the main switch is maintained at a high level based on the contact voltage during a first interval in which the gate voltage of the third p-channel metal-oxide-semiconductor transistor is maintained at a high level, and is maintained at a high level based on the control voltage during a second interval after the first interval, and the first switch enable signal is deactivated during the second interval.

13. The internal voltage generation circuit according to claim 8, wherein, In the contactless mode, The gate voltage of the fourth p-channel metal-oxide-semiconductor transistor changes to the level of the contactless voltage in response to the change of the contactless voltage to the level of the contactless voltage, and changes to the low level in response to the change of the auxiliary switch power-down signal to the high level.

14. The internal voltage generation circuit according to claim 13, wherein, The gate voltage of the main switch is maintained at a high level based on the turn-on voltage during a first interval in which the auxiliary switch power-down signal is maintained at a low level, and transitions to a high level during a second interval in which the auxiliary switch power-down signal is maintained at a high level.

15. The internal voltage generation circuit according to claim 8, wherein, The first ratio associated with the channel width divided by the channel length of the main switch is M times the second ratio associated with the channel width divided by the channel length of the auxiliary switch, where M is an integer greater than one.

16. The internal voltage generation circuit according to claim 1, wherein, The second contact switch includes: A main switch includes a first p-channel metal-oxide-semiconductor transistor having a source coupled to the contact voltage and a drain coupled to the second node. An auxiliary switch includes a second p-channel metal-oxide-semiconductor transistor having a source coupled to the gate of the main switch at a first internal node, a drain coupled to the contact voltage, and a gate receiving an on-state voltage associated with generating the control voltage. A first delay circuit includes a plurality of first inverters connected in stages, the first delay circuit being configured to operate based on the control voltage and being configured to delay an auxiliary switch power-down signal to generate the turn-on voltage; A second delay circuit, connected to a second internal node, is configured to operate based on the control voltage and is configured to delay the first switch enable signal to provide the delayed first switch enable signal to the second internal node. A second inverter is connected between the first internal node and the second internal node; A third inverter, which is connected to the second inverter at a third internal node and between the third internal node and ground voltage, is configured to invert the turn-on voltage to provide the inverted turn-on voltage to the fourth internal node. A third p-channel metal-oxide-semiconductor transistor has a source coupled to the third internal node, a gate coupled to the fourth internal node, and a drain coupled to the fifth internal node. An n-channel metal-oxide-semiconductor capacitor coupled between the fifth internal node and the ground voltage; A fourth p-channel metal-oxide-semiconductor transistor has a drain coupled to the fifth internal node, a source coupled to a sixth internal node connected to the control voltage, and a gate coupled to a seventh internal node. A fourth inverter, connected between the sixth internal node and the ground voltage, is configured to invert the turn-on voltage to provide the inverted turn-on voltage to the seventh internal node.

17. A smart card configured to perform fingerprint authentication, the smart card comprising: A matching circuit is configured to provide a contactless voltage induced from electromagnetic waves transmitted by the card reader when there is no electrical contact between the smart card and an external card reader. as well as The smart card chip is coupled to the matching circuit via a first power terminal and a second power terminal. The smart card chip includes: A connection terminal is configured to receive a contact voltage from the card reader when the smart card makes electrical contact with the card reader; An internal voltage generation circuit is configured to generate a first driving voltage and a second driving voltage based on the contactless voltage in a contactless mode, and is configured to generate the first driving voltage and the second driving voltage based on the contact voltage based on a corresponding level of a category associated with the level of the contact voltage in a contact mode. A fingerprint recognition sensor, which operates based on the first driving voltage, is configured to generate a fingerprint image signal based on an input fingerprint; and A processor, which operates based on the second driving voltage, is configured to perform fingerprint authentication based on the fingerprint image signal. The internal voltage generation circuit includes: A first contact switch is configured to selectively switch the contact voltage to a first node based on a first switch enable signal in the contact mode. A second contact switch is configured to selectively switch the contact voltage to a second node based on a second switch enable signal in the contact mode. A switched capacitor converter configured to reduce the contactless voltage in the contactless mode to provide a first voltage to the first node; A bidirectional switched capacitor converter, connected to the first node and the second node, is configured to: In the contactless mode, the first drive voltage of the first node is stepped down to provide a second voltage to the second node; and In the contact mode, based on the level of the contact voltage, the first drive voltage of the first node is reduced to provide a third voltage to the second node, or the second drive voltage of the second node is increased to provide the increased voltage to the first node.

18. The smart card according to claim 17, wherein, The internal voltage generation circuit also includes: A mode selector is configured to output a first mode signal and a second mode signal, the first mode signal specifying one of the contact mode and the contactless mode, and the second mode signal specifying one of the sub-modes of the contact mode. The mode selector is also configured to select the highest voltage among the contact voltage, the contactless voltage, and the first drive voltage, and output the selected voltage as a control voltage. A control signal generator is configured to generate a first power-down signal, a second power-down signal, a first switch enable signal, and a second switch enable signal based on the first mode signal and the second mode signal.

19. The smart card according to claim 18, wherein, In the contactless mode, The switched capacitor converter is configured to step down the contactless voltage to output the first drive voltage to the first node, and The bidirectional switched capacitor converter is configured to step down the first drive voltage to output the second drive voltage to the second node, and In the contact mode, The bidirectional switched capacitor converter is configured to either step down a first drive voltage provided from the first contact switch or step up a second drive voltage provided from the second contact switch based on the level of the contact voltage.

20. A smart card, comprising: A matching circuit is configured to provide a contactless voltage induced from electromagnetic waves transmitted by the card reader when there is no electrical contact between the smart card and an external card reader. as well as The smart card chip is coupled to the matching circuit via a first power terminal and a second power terminal. The smart card chip includes: A connection terminal is configured to receive a contact voltage from the card reader when the smart card makes electrical contact with the card reader; The internal voltage generation circuit is configured as follows: In contactless mode, a first driving voltage and a second driving voltage are generated based on the contactless voltage, wherein the second driving voltage is lower than the first driving voltage; and In contact mode, a first driving voltage and a second driving voltage are generated from the contact voltage, corresponding to the level of a category associated with the level of the contact voltage. A first circuit component, configured to operate optimally within a first operating voltage range, receives the first drive voltage to power its operation; and A second circuit component is configured for optimal operation within a second operating voltage range, the midpoint of which is lower than the midpoint of the first operating voltage range. This second circuit component receives the second drive voltage to power its operation. The internal voltage generation circuit includes: A first contact switch is configured to selectively switch the contact voltage to a first node based on a first switch enable signal in the contact mode. A second contact switch is configured to selectively switch the contact voltage to a second node based on a second switch enable signal in the contact mode. A switched capacitor converter configured to reduce the contactless voltage in the contactless mode to provide a first voltage to the first node; A bidirectional switched capacitor converter, connected to the first node and the second node, is configured to: In the contactless mode, the first drive voltage of the first node is stepped down to provide a second voltage to the second node; and In the contact mode, based on the level of the contact voltage, the first drive voltage of the first node is reduced to provide a third voltage to the second node, or the second drive voltage of the second node is increased to provide the increased voltage to the first node.

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