Display device

Abstract

A display device is provided and includes a display panel including a pixel layer displaying an image and a pad portion electrically connected to the pixel layer. The display device includes a flexible circuit film bonded with the pad portion of the display panel. The flexible circuit film includes a base film, a first conductive wire disposed on a first surface of the base film, a first conductive pad extending from the first conductive wire and electrically connected to the pad portion of the display panel, a cover layer covering the first conductive wire and exposing the first conductive pad, and a protrusion pattern disposed on the cover layer, adjacent to the first conductive pad, and facing a side surface of the display panel.

Description

Technical Field

[0001] This disclosure relates to a display device with improved bonding reliability. Background Technology

[0002] Various types of display devices are used to provide image information. A display device may include a display panel for displaying an image and a flexible circuit film coupled to the display panel and applying drive signals to it. The display panel may include a display area through which an image can be displayed, and panel pads may be arranged outside the display area to provide drive signals to the display portion of the image.

[0003] The panel pads are electrically connected to the flexible circuit film and receive drive signals through the flexible circuit film. The film pads can be arranged on the flexible circuit film to correspond to the panel pads. The flexible circuit film can be formed of a flexible material and can be easily deformed by heat. Specifically, if bending occurs in the flexible circuit film due to heat generated during the mounting of the driver chip, the film pads and panel pads may not be aligned.

[0004] It will be understood that the background section of this technical section is partly intended to provide useful context for understanding the technology. However, the background section of this technical section may also include ideas, concepts, or understandings that were not part of what a person skilled in the art knew or understood prior to the corresponding valid application date of the subject matter disclosed herein. Summary of the Invention

[0005] This disclosure provides a display device that can improve the bonding reliability between the display panel and the flexible circuit film.

[0006] Embodiments of the present invention can provide a display device including a display panel, the display panel including a pixel layer for displaying images and pads electrically connected to the pixel layer. The display device may include a flexible circuit film bonded to the pads of the display panel.

[0007] The flexible circuit film may include a base film, a first conductor disposed on a first surface of the base film, a first conductive pad extending from the first conductor and electrically connected to a pad portion of the display panel, a cover layer covering the first conductor and exposing the first conductive pad, and a protruding pattern disposed on the cover layer, adjacent to the first conductive pad and facing the side surface of the display panel.

[0008] The prominent pattern may include a metallic pattern arranged on the cover layer and an insulating pattern covering the metallic pattern.

[0009] The metal pattern, the first conductor, and the first conductive pad may be made of the same material.

[0010] The insulating pattern and the overlay may be made of the same material.

[0011] The prominent pattern can have an integrated structure with the cover layer.

[0012] The flexible circuit film may also include a first compensation pattern disposed on a second surface of the base film and overlapping with the first conductive pad, the second surface of the base film being opposite to the first surface of the base film.

[0013] The first compensation pattern may include a first metal pattern disposed on a second surface of the base film and a first insulating pattern covering the first metal pattern.

[0014] The first metal pattern, the first wire, and the first conductive pad may be made of the same material.

[0015] The first insulating pattern and the overlay may be made of the same material.

[0016] The display device may also include a printed circuit board bonded to a flexible circuit film.

[0017] The flexible circuit film may include: a second conductor disposed on a first surface of a base film, and a second conductive pad extending from the second conductor and bonded to a printed circuit board.

[0018] The flexible circuit film may also include a second compensation pattern disposed on a second surface of the base film and overlapping with a second conductive pad, the second surface of the base film being opposite to the first surface of the base film.

[0019] The second compensation pattern may include a second metal pattern disposed on a second surface of the base film opposite to the first surface, and a second insulating pattern covering the second metal pattern.

[0020] The display device may also include a driver chip disposed on a flexible circuit film.

[0021] The highlighted pattern can have a strip shape that extends along the driver chip.

[0022] The flexible circuit film may include a first compensation pattern and a second compensation pattern spaced apart from each other, and a driving chip may be disposed between the first compensation pattern and the second compensation pattern.

[0023] The first compensation pattern and the second compensation pattern may have a strip shape extending along the driver chip.

[0024] Embodiments of the present invention can provide a display device including a display panel, the display panel including a pixel layer for displaying images and pads electrically connected to the pixel layer. The display device may include a flexible circuit film bonded to the pads of the display panel, and a printed circuit board bonded to the flexible circuit film.

[0025] The flexible circuit film may include a base film, a first conductor disposed on a first surface of the base film, a first conductive pad extending from the first conductor and electrically connected to a pad portion of the display panel, a cover layer covering the first conductor and exposing the first conductive pad, and a first compensation pattern disposed on a second surface of the base film, the second surface of the base film being opposite to the first surface of the base film.

[0026] The first compensation pattern may overlap with the first conductive pad.

[0027] The flexible circuit film may also include a second conductor disposed on a first surface of the base film, a second conductive pad extending from the second conductor and bonded to a printed circuit board, and a second compensation pattern disposed on a second surface of the base film and overlapping the second conductive pad.

[0028] Based on the above, misalignment between the display panel and the flexible circuit film, as well as the flexural deformation of the flexible circuit film, can be prevented, and thus, the bonding reliability of the display device can be improved. Attached Figure Description

[0029] The above and other advantages of this disclosure will become readily apparent when considered in conjunction with the accompanying drawings, and by referring to the following detailed description, in which:

[0030] Figure 1 This is a schematic plan view showing a display device according to an embodiment of the present disclosure;

[0031] Figure 2A This is a schematic plan view showing a display panel according to an embodiment of the present disclosure;

[0032] Figure 2B It is along Figure 2A The schematic cross-sectional view shown is taken by line I-I'.

[0033] Figure 2C It is along Figure 1 A schematic cross-sectional view taken by line II-II' shown;

[0034] Figure 3A This is a schematic plan view showing a first flexible circuit film according to an embodiment of the present disclosure;

[0035] Figure 3B It is along Figure 3A A schematic cross-sectional view taken by line III-III' shown;

[0036] Figure 3C It is shown Figure 3A A schematic cross-sectional view of the first flexible circuit film, display panel, and printed circuit board shown in the diagram, in a state where they can be combined with each other;

[0037] Figure 3D It is shown Figure 3B A partially enlarged schematic cross-sectional view of part AA shown in the diagram;

[0038] Figure 4A This is a schematic plan view showing a first flexible circuit film according to an embodiment of the present disclosure;

[0039] Figure 4B It is shown Figure 4A A partially enlarged schematic cross-sectional view of the first flexible circuit film shown;

[0040] Figures 5A to 5E It shows the manufacturing process. Figure 4B A schematic view of the process of the first flexible circuit film shown;

[0041] Figure 6A This is a schematic plan view showing a first flexible circuit film according to an embodiment of the present disclosure;

[0042] Figure 6B It is along Figure 6A A schematic cross-sectional view taken by line IV-IV' shown;

[0043] Figure 6C It is shown Figure 6A A schematic cross-sectional view of the first flexible circuit film, display panel, and printed circuit board shown in the diagram, in a state where they can be combined with each other;

[0044] Figure 6D It is shown Figure 6B A partially enlarged schematic cross-sectional view of part BB shown;

[0045] Figure 7A This is a schematic plan view showing a first flexible circuit film according to an embodiment of the present disclosure;

[0046] Figure 7B It is along Figure 7A The schematic cross-sectional view shown is taken by line V-V'.

[0047] Figure 7C It is shown Figure 7A A schematic cross-sectional view of the first flexible circuit film, display panel, and printed circuit board shown in the diagram, in a state where they can be combined with each other;

[0048] Figure 7D It is shown Figure 7B A partially enlarged schematic cross-sectional view of part of CC shown;

[0049] Figure 8A This is a schematic plan view showing a first flexible circuit film according to an embodiment of the present disclosure;

[0050] Figure 8B It is along Figure 8A A schematic cross-sectional view taken by line VI-VI' shown;

[0051] Figure 8C It is shown Figure 8A A schematic cross-sectional view of the first flexible circuit film, display panel, and printed circuit board shown in the diagram, in a state where they can be combined with each other;

[0052] Figure 9A This is a schematic plan view illustrating a first flexible circuit film according to an embodiment of the present disclosure; and

[0053] Figure 9B It is along Figure 9A The schematic cross-sectional view shown is taken by line VII-VII'. Detailed Implementation

[0054] The present disclosure will be explained in detail below with reference to the accompanying drawings.

[0055] In this disclosure, it will be understood that when an element or layer is referred to as being “on,” “connected to,” or “attached to” another element or layer, the element or layer may be directly on, connected to, or attached to the other element or layer, or there may be intermediate elements or layers present.

[0056] Throughout this specification, similar reference numerals refer to similar elements. In the accompanying drawings, the thickness, scale, and dimensions of parts may be exaggerated for the purpose of effective description of the technical content.

[0057] As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. For example, “A and / or B” can be understood to mean “A, B, or A and B”. The terms “and” and “or” can be used in combination or separately and can be understood as equivalent to “and / or”.

[0058] The term “overlap” may include layering, stacking, face or facing, extending above, extending below, covering or partially covering, or any other suitable terminology as will be understood and appreciated by one of ordinary skill in the art.

[0059] It will be understood that although the terms “first,” “second,” etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. Therefore, without departing from the teachings of this disclosure, the first element discussed below can be referred to as the second element. Unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “the,” as used herein, are also intended to include the plural forms.

[0060] Spatial relative terms, such as “beneath,” “below,” “lower,” “above,” and “upper,” may be used herein for descriptive convenience to describe the relationship between one element or feature and another element or feature as shown in the figure.

[0061] It will also be understood that terms such as “comprises,” “has,” and “includes” indicate the presence of the stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or clusters thereof.

[0062] Taking into account the measurements discussed and the errors associated with a particular number of measurements (i.e., limitations of the measurement system), the terms "about," "approximately," or "substantially" as used herein include the stated values ​​and mean within an acceptable deviation for a particular value as determined by one of ordinary skill in the art. For example, "about" may mean within one or more standard deviations, or within ±30%, 20%, or 5% of the stated value.

[0063] Unless otherwise specified or implied, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will also be understood that, unless expressly defined in this specification, terms, such as those defined in common dictionaries, shall be interpreted as having the meaning consistent with their meaning in the context of the relevant art and shall not be interpreted in an idealized or overly formal sense.

[0064] Figure 1 This is a schematic plan view showing a display device DD according to an embodiment of the present disclosure. Figure 2A This is a schematic plan view illustrating a display panel DP according to an embodiment of the present disclosure. Figure 2B It is along Figure 2A The schematic cross-sectional view shown is taken by line I-I', and Figure 2C It is along Figure 1 The schematic cross-sectional view shown is taken by line II-II'.

[0065] Reference Figure 1 and Figures 2A to 2CThe display device DD may include a display panel DP for displaying images and a panel driver for driving the display panel DP. For example, the panel driver may include a gate driver GDC and a data driver DDC.

[0066] The display panel DP may include a display area DA for displaying an image and a non-display area NDA defined adjacent to the display area DA. The display area DA may be an area where an image can be substantially displayed, and the non-display area NDA may be an area where an image can not be displayed. Figure 1 The structure of the non-display area NDA surrounding the display area DA is shown; however, this disclosure should not be limited thereto or thereby restricted. The non-display area NDA may be defined as being adjacent to at least one side of the display area DA.

[0067] The display panel DP may include a plurality of gate lines GL1 to GLn, a plurality of data lines DL1 to DLm, and a plurality of pixels PX11 to PXnm. The plurality of gate lines GL1 to GLn may extend along a first direction DR1 and may be arranged substantially parallel to each other along a second direction DR2 intersecting the first direction DR1. As an example, the second direction DR2 may be substantially perpendicular to the first direction DR1. The plurality of data lines DL1 to DLm may be arranged substantially parallel to each other along the first direction DR1 and extend along the second direction DR2.

[0068] Multiple pixels PX11 to PXnm can be arranged in the display area DA along a first direction DR1 and a second direction DR2. As an example, the multiple pixels PX11 to PXnm can be arranged in a matrix. Each of the multiple pixels PX11 to PXnm can be electrically connected to one of a plurality of gate lines GL1 to GLn and a plurality of data lines DL1 to DLm. Each of the multiple pixels PX11 to PXnm can be turned on in response to a gate signal applied to it through the corresponding gate line and receives a data voltage applied to it through the corresponding data line to display an image corresponding to, for example, a desired grayscale.

[0069] A gate driver GDC can sequentially output gate signals to a plurality of gate lines GL1 to GLn. Correspondingly, a plurality of pixels PX11 to PXnm can be sequentially scanned line by line by the gate signals. As an example, the gate driver GDC may include a first gate driver GDC1 and a second gate driver GDC2. The first gate driver GDC1 may be electrically connected to one end of each of the plurality of gate lines GL1 to GLn, and the second gate driver GDC2 may be electrically connected to the other end of each of the plurality of gate lines GL1 to GLn. Each of the first gate driver GDC1 and the second gate driver GDC2 may include a shift register that sequentially outputs gate signals. The first gate driver GDC1 and the second gate driver GDC2 may be driven substantially simultaneously and output gate signals to the same gate line. Accordingly, each of the plurality of gate lines GL1 to GLn may receive a gate signal from the first gate driver GDC1 and the second gate driver GDC2 through its opposite ends.

[0070] Figure 1 and Figure 2A A structure is shown in which two gate drivers GDC1 and GDC2 can be electrically connected to opposite ends of a plurality of gate lines GL1 to GLn, respectively. However, this disclosure should not be limited thereto or thereby restricted. For example, a display device DD may employ a structure in which only one of the first gate driver GDC1 and the second gate driver GDC2 can be electrically connected to the plurality of gate lines GL1 to GLn.

[0071] The first gate driver GDC1 and the second gate driver GDC2 can be integrated into the display panel DP. For example, the first gate driver GDC1 and the second gate driver GDC2 can be formed in the non-display area NDA of the display panel DP by a thin film process that forms multiple pixels PX11 to PXnm in the display area DA of the display panel DP.

[0072] The data driver DDC converts the image signal into a data voltage and outputs the data voltage to multiple data lines DL1 to DLm of the display panel DP. The data driver DDC may include multiple data driver chips DIC1 to DIC4. Each of the multiple data driver chips DIC1 to DIC4 is electrically connected to a corresponding data line among the multiple data lines DL1 to DLm. Figure 1 Four data driver chips, DIC1 to DIC4, are shown; however, the number of data driver chips should not be particularly limited.

[0073] The display device DD also includes a plurality of flexible circuit films CF1 to CF4 and a printed circuit board PCB. The plurality of flexible circuit films CF1 to CF4 can be disposed between the display panel DP and the printed circuit board PCB, and electrically connect the display panel DP to the printed circuit board PCB. One end of each of the plurality of flexible circuit films CF1 to CF4 can be connected to the display panel DP, and the other end of each of the plurality of flexible circuit films CF1 to CF4 can be connected to the printed circuit board PCB.

[0074] Figure 1 A structure is shown in which multiple data driver chips DIC1 to DIC4 can be respectively mounted on multiple flexible circuit films CF1 to CF4; however, this disclosure should not be limited thereto or thereby restricted. For example, the multiple data driver chips DIC1 to DIC4 can be mounted (e.g., directly mounted) on a display panel DP using a chip-on-glass (COG) method.

[0075] Various circuits can be arranged on a printed circuit board (PCB), and these circuits can generate various control signals and power signals, which can be used to drive the display panel (DP) and panel driver as needed.

[0076] The display panel DP may further include a first pad portion PD1 and a second pad portion PD2. The first pad portion PD1 and the second pad portion PD2 may be arranged in the non-display area NDA. The first pad portion PD1 may include data pads electrically connected to multiple data lines DL1 to DLm. The first pad portion PD1 may be coupled to multiple flexible circuit films CF1 to CF4 and receive data voltage from multiple data driver chips DIC1 to DIC4 mounted on the multiple flexible circuit films CF1 to CF4.

[0077] The second pad portion PD2 may include a first drive pad portion PD2_1 electrically connected to the first gate driver GDC1 and a second drive pad portion PD2_2 electrically connected to the second gate driver GDC2. The first drive pad portion PD2_1 may include a first drive pad that applies a first gate drive signal to the first gate driver GDC1, and the second drive pad portion PD2_2 may include a second drive pad that applies a second gate drive signal to the second gate driver GDC2.

[0078] The second pad portion PD2 can be connected to a portion of the plurality of flexible circuit films CF1 to CF4. As an example, the first drive pad portion PD2_1 can be connected to the first flexible circuit film CF1 among the plurality of flexible circuit films CF1 to CF4, and the second drive pad portion PD2_2 can be connected to the fourth flexible circuit film CF4 among the plurality of flexible circuit films CF1 to CF4. The first gate drive signal can be a signal output from the first data driver chip DIC1 mounted on the first flexible circuit film CF1, or a signal provided from the printed circuit board PCB. The second gate drive signal can be a signal output from the fourth data driver chip DIC4 mounted on the fourth flexible circuit film CF4, or a signal provided from the printed circuit board PCB.

[0079] Although not shown in the figure, the display device DD may also include a light-emitting portion that provides light to the display panel DP. In the case of an organic light-emitting diode (OLED), for example, the light-emitting portion may emit light itself. If the display panel DP is a liquid crystal display panel that does not emit light itself, the light-emitting portion may be arranged on the rear side of the liquid crystal display panel and provide light to it. Each of the plurality of pixels PX11 to PXnm can control the transmittance of the light provided from the light-emitting portion to display an image with, for example, a desired grayscale.

[0080] Reference Figure 2A and Figure 2B The display panel DP may include a first display substrate FS, a second display substrate SS, and a liquid crystal layer LC. The first display substrate FS may include a first base substrate BS1 and a pixel layer PP disposed on the first base substrate BS1. The pixel layer PP may include thin-film transistors forming each of a plurality of pixels PX11 to PXnm, pixel electrodes, and an insulating layer. The pixel layer PP may be configured to correspond to the display area DA of the display panel DP. A first gate driver GDC1 and a second gate driver GDC2 may be disposed on the first base substrate BS1 to correspond to the non-display area NDA.

[0081] The second display substrate SS may include a second base substrate BS2 and a reference electrode RE. The second base substrate BS2 may be arranged facing the first base substrate BS1. A liquid crystal layer LC may be interposed between the first display substrate FS and the second display substrate SS. The reference electrode RE may be disposed on the second base substrate BS2 facing the pixel electrode, while the liquid crystal layer LC is interposed between the reference electrode RE and the pixel electrode. A reference voltage may be applied to the reference electrode RE. The reference electrode RE may be disposed on the entire rear surface of the second base substrate BS2. Accordingly, the reference electrode RE may face the first gate driver GDC1 and the second gate driver GDC2 in the non-display area NDA. The second display substrate SS may also include a color filter layer and a black matrix layer.

[0082] The display panel DP may further include a sealant SLT disposed in the non-display area NDA to bond the first display substrate FS and the second display substrate SS. The space between the first display substrate FS and the second display substrate SS may be sealed by the sealant SLT. The first gate driver GDC1 and the second gate driver GDC2 may overlap with the sealant SLT.

[0083] Reference Figures 1 to 2C One end of each of the first flexible circuit film CF1 to the fourth flexible circuit film CF4 can be connected to the display panel DP, and the other end of each of the first flexible circuit film CF1 to the fourth flexible circuit film CF4 can be connected to the printed circuit board PCB.

[0084] As an example, the display panel DP may have a quadrilateral shape in a plan view. Multiple flexible circuit films CF1 to CF4 may be bonded to one side of the display panel DP. Specifically, the multiple flexible circuit films CF1 to CF4 may be bonded to a first display substrate FS of the display panel DP. The first display substrate FS may extend further than the second display substrate SS to bond with the multiple flexible circuit films CF1 to CF4. A first pad portion PD1 and a second pad portion PD2 may be disposed on the first display substrate FS and exposed without being covered by the second display substrate SS. The multiple flexible circuit films CF1 to CF4 may be electrically connected to the first pad portion PD1 and the second pad portion PD2 disposed on the first display substrate FS.

[0085] As an example, the multiple flexible circuit films CF1 to CF4 may comprise a flexible material. Multiple data driver chips DIC1 to DIC4 may be respectively mounted on the respective flexible circuit films CF1 to CF4. For example, the first data driver chip DIC1 may be mounted on the first flexible circuit film CF1. The first data driver chip DIC1 may be disposed between one end and the other end of the first flexible circuit film CF1.

[0086] Multiple flexible circuit films CF1 to CF4 can be arranged spaced apart from each other in a first direction DR1. Each of multiple data driver chips DIC1 to DIC4 can extend in the first direction DR1. Each of the multiple flexible circuit films CF1 to CF4 is flexible enough that a printed circuit board PCB can be arranged on the rear surface of the display panel DP.

[0087] Each of the plurality of flexible circuit films CF1 to CF4 may include a protruding pattern PT1 facing the side surface of the display panel DP. The protruding pattern PT1 may face the side surface of the first display substrate FS. If a bonding process is performed to bond the plurality of flexible circuit films CF1 to CF4 to the display panel DP, the position of the plurality of flexible circuit films CF1 to CF4 may be guided by the protruding pattern PT1. Specifically, the protruding pattern PT1 extending along the first data driver chip DIC1 may be disposed on the first flexible circuit film CF1. If the first flexible circuit film CF1 is bonded to the display panel DP, the protruding pattern PT1 may be arranged to face the side surface of the first display substrate FS to restrict the movement of the first flexible circuit film CF1 in the y-axis direction. The y-axis direction may be substantially parallel to the second direction DR2.

[0088] Figure 3A This is a schematic plan view showing a first flexible circuit film CF1 according to an embodiment of the present disclosure, and Figure 3B It is along Figure 3A The schematic cross-sectional view shown is taken by line III-III'. Figure 3C It is shown Figure 3A The schematic cross-sectional view shown depicts the first flexible circuit film CF1, the display panel DP, and the printed circuit board PCB in a state where they can be bonded to each other. Figure 3D It is shown Figure 3B The diagram shows a partially enlarged schematic cross-sectional view of part AA.

[0089] Reference Figure 3A and Figure 3B The first flexible circuit film CF1 may include a base film BF, a first conductor CL1, and a second conductor CL2.

[0090] The base membrane (BF) may comprise a polymeric material, such as polyimide, polyester, or a combination thereof. The base membrane (BF) may be flexible. A first conductor CL1 and a second conductor CL2 may be disposed on the base membrane (BF).

[0091] The first flexible circuit film CF1 may include a central region MA, a first pad region EA1 defined on a first side of the central region MA, and a second pad region EA2 defined on a second side of the central region MA. A first data driver chip DIC1 may be mounted on the central region MA of the first flexible circuit film CF1.

[0092] A first conductor CL1 can be electrically connected to a first data driver chip DIC1 in the central region MA, and a second conductor CL2 can be electrically connected to the first data driver chip DIC1 in the central region MA. The first data driver chip DIC1 may include a first bump LD1 and a second bump LD2. Multiple first bumps LD1 can be electrically connected to multiple first conductors CL1, and multiple second bumps LD2 can be electrically connected to multiple second conductors CL2. The first data driver chip DIC1 can be bonded to a first flexible circuit film CF1 via an encapsulation adhesive layer AL.

[0093] The first flexible circuit film CF1 may further include a first conductive pad F_PD1 extending from a first conductor CL1 and a second conductive pad F_PD2 extending from a second conductor CL2. The first conductive pad F_PD1 may be disposed on a first pad region EA1 of the base film BF, and the second conductive pad F_PD2 may be disposed on a second pad region EA2 of the base film BF. The first conductive pad F_PD1 may be electrically connected to pad PD1_1 of the display panel DP, and the second conductive pad F_PD2 may be electrically connected to pad P_PD of the printed circuit board PCB. Pad P_PD may be disposed on the printed circuit board substrate PCB-BS.

[0094] like Figure 3C As shown, the first pad area EA1 of the first flexible circuit film CF1 can be bonded to the display panel DP, and the second pad area EA2 of the first flexible circuit film CF1 can be bonded to the printed circuit board PCB. A first conductive adhesive film ACF1 can be inserted between the first pad area EA1 of the first flexible circuit film CF1 and the display panel DP. Accordingly, the first pad area EA1 of the first flexible circuit film CF1 can be fixed to the display panel DP via the first conductive adhesive film ACF1. The first conductive pad F_PD1 can be electrically connected to the pad PD1_1 of the display panel DP via the first conductive adhesive film ACF1. A second conductive adhesive film ACF2 can be inserted between the second pad area EA2 of the first flexible circuit film CF1 and the printed circuit board PCB. Accordingly, the second pad area EA2 of the first flexible circuit film CF1 can be fixed to the printed circuit board PCB via the second conductive adhesive film ACF2. The second conductive pad F_PD2 can be electrically connected to the pad P_PD of the printed circuit board PCB via the second conductive adhesive film ACF2.

[0095] Figure 3C The diagram illustrates a structure in which a first flexible circuit film CF1 can be bonded to a display panel (DP) and a printed circuit board (PCB) via a first conductive adhesive film ACF1 and a second conductive adhesive film ACF2, respectively. However, this disclosure should not be limited thereto or thereby restricted. For example, the first flexible circuit film CF1 can be bonded to the display panel (DP) and the printed circuit board (PCB) via an ultrasonic bonding process.

[0096] The first flexible circuit film CF1 may further include a cover layer CVL disposed in the central region MA to cover the first conductor CL1 and the second conductor CL2. The cover layer CVL may not be disposed in the first pad region EA1 and the second pad region EA2. Accordingly, the first conductive pad F_PD1 and the second conductive pad F_PD2 may be exposed without being covered by the cover layer CVL. The cover layer CVL may be a solder mask layer.

[0097] As an example, a raised pattern PT1 may be disposed on a cover layer CVL. The raised pattern PT1 may extend along a first data driver chip DIC1. For example, the raised pattern PT1 may have a strip shape extending in a first direction DR1. If the first data driver chip DIC1 extends in the first direction DR1, the raised pattern PT1 may extend in the first direction DR1 and may be spaced apart from the first data driver chip DIC1 in a second direction DR2. The raised pattern PT1 may be disposed between the first data driver chip DIC1 and a first conductive pad F_PD1. Specifically, the raised pattern PT1 may be disposed closer to the first conductive pad F_PD1 than the first data driver chip DIC1.

[0098] The raised pattern PT1 and the cover layer CVL may comprise substantially the same material. For example, the raised pattern PT1 may comprise solder resist. Figure 3B The diagram shows that the protruding pattern PT1 can be configured as a layer independent of the cover layer CVL; however, this disclosure should not be limited thereto or thereby restricted. For example, the protruding pattern PT1 can be integrally formed with the cover layer CVL.

[0099] like Figure 3D As shown, the prominent pattern PT1 may include a metal pattern M_PT disposed on the cover layer CVL and an insulating pattern I_PT covering the metal pattern M_PT. The insulating pattern I_PT may be configured to cover the metal pattern M_PT. As an example, the metal pattern M_PT, the first conductor CL1, and the second conductor CL2 may include substantially the same material. The insulating pattern I_PT and the cover layer CVL may include substantially the same material. For example, the metal pattern M_PT and the first conductor CL1 may include copper (Cu) material.

[0100] As described above, due to each of the multiple flexible circuit films CF1 to CF4 (see above) Figure 1The display panel DP may include a protruding pattern PT1, thus restricting the movement of each of the multiple flexible circuit films CF1 to CF4 in the y-axis direction. Specifically, the protruding pattern PT1 may physically contact the side surface of the first display substrate FS of the display panel DP and restrict the movement of each of the multiple flexible circuit films CF1 to CF4 in the y-axis direction. Accordingly, if a bonding process is performed to bond the multiple flexible circuit films CF1 to CF4 to the display panel DP, the first conductive pads F_PD1 of the multiple flexible circuit films CF1 to CF4 can be easily aligned with the pads PD1_1 of the display panel DP in the y-axis direction. Therefore, the bonding reliability between the multiple flexible circuit films CF1 to CF4 and the display panel DP can be improved. Specifically, although the multiple flexible circuit films CF1 to CF4 may deform due to heat generated during the process of mounting multiple data driver chips DIC1 to DIC4 onto their respective corresponding flexible circuit films CF1 to CF4, the alignment position of the multiple flexible circuit films CF1 to CF4 with the display panel DP can be guided by the protruding pattern PT1. Accordingly, it can prevent the deterioration of the joint reliability caused by misalignment.

[0101] Although not shown in the figures, the first flexible circuit film CF1 may also include a virtual protruding pattern arranged adjacent to the second conductive pad F_PD2. If a bonding process is performed to bond the multiple flexible circuit films CF1 to CF4 to a printed circuit board (PCB), the virtual protruding pattern can guide the second conductive pad F_PD2 of the multiple flexible circuit films CF1 to CF4 to be easily aligned with the leads of the PCB in the y-axis direction. Accordingly, the bonding reliability between the multiple flexible circuit films CF1 to CF4 and the PCB can be improved.

[0102] Figure 4A This is a schematic plan view showing a first flexible circuit film CF1 according to an embodiment of the present disclosure, and Figure 4B It is shown Figure 4A A partially enlarged schematic cross-sectional view of the first flexible circuit film CF1 shown. Figure 4A and Figure 4B In the figures, the same reference numerals indicate Figures 3A to 3C The same elements are used in the same way, and therefore, detailed descriptions of the same elements will be omitted.

[0103] Reference Figure 4A and Figure 4BThe first flexible circuit film CF1 may further include a protruding pattern PT2. A plurality of protruding patterns PT2 may be arranged on a plurality of first conductors CL1 to correspond to the plurality of first conductors CL1 respectively. Specifically, the plurality of protruding patterns PT2 may be electrically connected to the plurality of first conductors CL1 respectively. The protruding patterns PT2 and the first conductors CL1 may comprise substantially the same metallic material. As an example, the protruding patterns PT2 and the first conductors CL1 may comprise copper (Cu) material.

[0104] like Figure 4B As shown, the protruding pattern PT2 can be covered by the cover layer CVL. For example, the protruding pattern PT2 can be arranged between the first conductor CL1 and the cover layer CVL.

[0105] Although not shown in the figure, the first flexible circuit film CF1 may also include a virtual protruding pattern arranged on the second conductor CL2 adjacent to the second conductive pad F_PD2.

[0106] Figures 5A to 5E It shows the manufacturing process. Figure 4B A schematic view of the process of the first flexible circuit film CF1 shown.

[0107] Reference Figure 5A A first metal layer CTL1 may be disposed on a base membrane BF. The base membrane BF may include a polymeric material, such as polyimide, polyester, or a combination thereof. The first metal layer CTL1 may include a metallic material. As an example, the metallic material may be copper.

[0108] Reference Figure 5B A photosensitive film DFL can be formed on the first metal layer CTL1. The photosensitive film DFL can be, but is not limited to, a dry film photoresist. The photosensitive film DFL can be exposed and developed, and as a result, a film resembling... Figure 5C The photosensitive pattern layer P_DFL of the opening pattern OP shown can be formed. The opening pattern OP can be formed in conjunction with... Figure 4A and Figure 4B The location corresponding to the prominent pattern PT2 shown in the diagram.

[0109] Reference Figure 5D A second metal layer CTL2 can be formed in the opening pattern OP. The second metal layer CTL2 can be disposed on (e.g., directly on) the first metal layer CTL1.

[0110] If the photosensitive pattern layer P_DFL is removed and the first metal layer CTL1 and the second metal layer CTL2 can be etched, then as Figure 5E As shown, the first conductor CL1, the first conductive pad F_PD1, and the raised pattern PT2 can be disposed on the base film BF. For example, the raised pattern PT2 can be formed substantially simultaneously with the first conductor CL1 and the first conductive pad F_PD1.

[0111] according to Figure 4A , Figure 4B and Figures 5A to 5E , with the prominent pattern PT1 (see Figures 3A to 3C Compared to structures that can be arranged on the cover layer CVL, structures where the protruding pattern PT2 is arranged (e.g., directly on) the first conductor CL1 have high process efficiency.

[0112] Figure 6A This is a schematic plan view showing a first flexible circuit film CF1 according to an embodiment of the present disclosure, and Figure 6B It is along Figure 6A The schematic cross-sectional view shown is taken by line IV-IV'. Figure 6C It is shown Figure 6A The schematic cross-sectional view shown depicts the first flexible circuit film CF1, the display panel DP, and the printed circuit board PCB in a state where they can be bonded to each other. Figure 6D It is shown Figure 6B The diagram shows a partially enlarged schematic cross-sectional view of part BB.

[0113] Reference Figures 6A to 6D The first flexible circuit film CF1 may include a central region MA, a first pad region EA1 arranged adjacent to a first side of the central region MA, and a second pad region EA2 arranged adjacent to a second side of the central region MA. A first data driver chip DIC1 may be mounted on the central region MA of the first flexible circuit film CF1.

[0114] A first conductor CL1 can be electrically connected to a first data driver chip DIC1 in the central region MA, and a second conductor CL2 can be electrically connected to the first data driver chip DIC1 in the central region MA. The first data driver chip DIC1 may include a first bump LD1 and a second bump LD2. Multiple first bumps LD1 can be electrically connected to multiple first conductors CL1, and multiple second bumps LD2 can be electrically connected to multiple second conductors CL2. The first data driver chip DIC1 can be bonded to a first flexible circuit film CF1 via an encapsulation adhesive layer AL.

[0115] The first flexible circuit film CF1 may further include a first conductive pad F_PD1 extending from a first conductor CL1 and a second conductive pad F_PD2 extending from a second conductor CL2. The first conductive pad F_PD1 may be disposed on a first pad region EA1 of the base film BF, and the second conductive pad F_PD2 may be disposed on a second pad region EA2 of the base film BF. The first conductive pad F_PD1 may be electrically connected to pad PD1_1 of the display panel DP, and the second conductive pad F_PD2 may be electrically connected to pad P_PD of the printed circuit board PCB.

[0116] The first flexible circuit film CF1 may further include a cover layer CVL disposed in the central region MA to cover the first conductor CL1 and the second conductor CL2. The cover layer CVL may not be disposed in the first pad region EA1 and the second pad region EA2. Accordingly, the first conductive pad F_PD1 and the second conductive pad F_PD2 may be exposed without being covered by the cover layer CVL. The cover layer CVL may be a solder mask layer.

[0117] The first flexible circuit film CF1 may further include a first compensation pattern CT1 disposed in the first pad region EA1. The first compensation pattern CT1 may be disposed on the rear surface (or second surface) of the base film BF. Specifically, the first conductor CL1 and the second conductor CL2 may be disposed on the front surface (or first surface) of the base film BF, and the first compensation pattern CT1 may be disposed on the rear surface of the base film BF opposite to the front surface of the base film BF.

[0118] A first compensation pattern CT1 may be disposed in a first pad region EA1 to overlap with a first conductive pad F_PD1. The first compensation pattern CT1 may extend in a direction in which the first conductive pad F_PD1 may be arranged (e.g., a first direction DR1). The first compensation pattern CT1 may have a strip shape extending in the longitudinal direction of the first data driver chip DIC1 and may be disposed in a second direction DR2 to be spaced apart from the first data driver chip DIC1.

[0119] The first compensation pattern CT1 may have a structure protruding from the rear surface of the base membrane BF. For example, as an example, the first compensation pattern CT1 may be integrally formed with the base membrane BF. However, the structure of the first compensation pattern CT1 according to this disclosure should not be limited thereto or thereby restricted. Figure 6D As shown, the first compensation pattern CT1 may include a first metal pattern M_CT1 and a first insulating pattern I_CT1 covering the first metal pattern M_CT1. The first metal pattern M_CT1 may be disposed on (e.g., directly on) the back surface of the base film BF, and the first insulating pattern I_CT1 may be configured to cover the first metal pattern M_CT1. As an example, the first metal pattern M_CT1, the first conductor CL1, and the second conductor CL2 may comprise substantially the same material. The first insulating pattern I_CT1 and the cover layer CVL may comprise substantially the same material. For example, the first metal pattern M_CT1 and the first conductor CL1 comprise copper (Cu) material.

[0120] As another example, the first compensation pattern CT1 may consist only of the first insulation pattern I_CT1. The first insulation pattern I_CT1 and the cover layer CVL may comprise substantially the same material.

[0121] If the first compensation pattern CT1 is disposed on the rear surface of the base film BF to overlap with the first conductive pad F_PD1, the thickness of the first flexible circuit film CF1 can be increased in the first pad region EA1. As a result, flexural deformation in the first pad region EA1 can be reduced if the first flexible circuit film CF1 can deform due to heat. If the first compensation pattern CT1 also includes a first metallic pattern M_CT1 that is more heat-resistant than the capping layer CVL or the base film BF, deformation due to heat can be prevented.

[0122] like Figure 6C As shown, the first pad area EA1 of the first flexible circuit film CF1 can be bonded to the display panel DP, and the second pad area EA2 of the first flexible circuit film CF1 can be connected to the printed circuit board PCB. For example, in multiple flexible circuit films CF1 to CF4 (see...) Figure 1 After being combined with the display panel DP, the first compensation pattern CT1 can overlap with the first display substrate FS of the display panel DP in the first pad area EA1.

[0123] According to embodiments of this disclosure, since the first compensation pattern CT1 can be disposed in the first pad region EA1, deformation of the first flexible circuit film CF1 can be reduced or prevented. As a result, misalignment between the first conductive pad F_PD1 of the first flexible circuit film CF1 and the data pad of the display panel DP can be prevented. Accordingly, the bonding reliability between the first flexible circuit film CF1 and the display panel DP can be improved.

[0124] Figure 7A This is a schematic plan view showing a first flexible circuit film CF1 according to an embodiment of the present disclosure, and Figure 7B It is along Figure 7A The schematic cross-sectional view shown is taken by line V-V'. Figure 7C It is shown Figure 7A The schematic cross-sectional view shown depicts the first flexible circuit film CF1, the display panel DP, and the printed circuit board PCB in a state where they can be bonded to each other. Figure 7D It is shown Figure 7B The diagram shows a partially enlarged schematic cross-sectional view of part of CC.

[0125] Reference Figures 7A to 7D The first flexible circuit film CF1 may further include a second compensation pattern CT2 disposed in the second pad region EA2. The second compensation pattern CT2 may be disposed together with the first compensation pattern CT1 on the rear surface of the base film BF. Specifically, the first conductor CL1 and the second conductor CL2 may be disposed on the front surface of the base film BF, and the first compensation pattern CT1 and the second compensation pattern CT2 may be disposed on the rear surface of the base film BF opposite to the front surface of the base film BF.

[0126] The second compensation pattern CT2 may be disposed in the second pad region EA2 to overlap with the second conductive pad F_PD2. The second compensation pattern CT2 may extend in a direction in which the second conductive pad F_PD2 may be arranged (e.g., the first direction DR1). The second compensation pattern CT2 may have a strip shape extending in the longitudinal direction of the first data driver chip DIC1, and may be disposed spaced apart from the first data driver chip DIC1 in the second direction DR2. The second compensation pattern CT2 may be disposed substantially parallel to the first compensation pattern CT1.

[0127] The second compensation pattern CT2 may have a structure protruding from the rear surface of the base membrane BF. For example, the second compensation pattern CT2 may be integrally formed with the base membrane BF. However, the structure of the second compensation pattern CT2 according to this disclosure should not be limited thereto or thereby restricted. Figure 7D As shown, the second compensation pattern CT2 may include a second metal pattern M_CT2 and a second insulating pattern I_CT2 covering the second metal pattern M_CT2. The second metal pattern M_CT2 may be disposed on (e.g., directly on) the back surface of the base film BF, and the second insulating pattern I_CT2 may be configured to cover the second metal pattern M_CT2. As an example, the second metal pattern M_CT2, the first conductor CL1, and the second conductor CL2 may comprise substantially the same material. The second insulating pattern I_CT2 and the capping layer CVL may comprise substantially the same material. For example, the second metal pattern M_CT2 and the first conductor CL1 may comprise copper (Cu) material.

[0128] As another example, the second compensation pattern CT2 may consist only of the second insulation pattern I_CT2. The second insulation pattern I_CT2 and the cover layer CVL may comprise substantially the same material.

[0129] like Figure 7C As shown, the first pad area EA1 of the first flexible circuit film CF1 can be bonded to the display panel DP, and the second pad area EA2 of the first flexible circuit film CF1 can be connected to the printed circuit board PCB. For example, in multiple flexible circuit films CF1 to CF4 (see...) Figure 1 After being combined with the display panel DP, the first compensation pattern CT1 can overlap with the first display substrate FS of the display panel DP in the first pad area EA1, and the second compensation pattern CT2 can overlap with the printed circuit board PCB in the second pad area EA2.

[0130] As described above, since the first compensation pattern CT1 and the second compensation pattern CT2 can be respectively disposed in the first pad region EA1 and the second pad region EA2, deformation of the first flexible circuit film CF1 can be reduced or prevented. Because deformation of the first flexible circuit film CF1 can be reduced or prevented, misalignment between the first flexible circuit film CF1 and the display panel DP, and misalignment between the first flexible circuit film CF1 and the printed circuit board PCB, can be prevented. Accordingly, the bonding reliability between the first flexible circuit film CF1 and the display panel DP, and between the first flexible circuit film CF1 and the printed circuit board PCB, can be improved.

[0131] Figure 8A This is a schematic plan view showing a first flexible circuit film CF1 according to an embodiment of the present disclosure. Figure 8B It is along Figure 8A The schematic cross-sectional view shown is taken by line VI-VI', and Figure 8C It is shown Figure 8A The schematic cross-sectional view shown shows the first flexible circuit film CF1, the display panel DP, and the printed circuit board PCB in a state where they can be combined with each other.

[0132] Reference Figures 8A to 8C The first flexible circuit film CF1 may further include a protruding pattern PT1 located in the central region MA. The protruding pattern PT1 may be disposed between a first compensation pattern CT1 and a second compensation pattern CT2. The first compensation pattern CT1 and the second compensation pattern CT2 may be disposed on the rear surface of the base film BF, and the protruding pattern PT1 may be disposed on the capping layer CVL.

[0133] In embodiments, a structure in which a protruding pattern PT1 may be arranged between a first compensation pattern CT1 and a first data driver chip DIC1 may be shown as a representative example; however, this disclosure should not be limited thereto or thereby restricted. For example, the protruding pattern PT1 may be arranged between a second compensation pattern CT2 and a first data driver chip DIC1. In addition to the protruding pattern PT1 arranged between the first compensation pattern CT1 and the first data driver chip DIC1, the first flexible circuit film CF1 may also include a virtual protruding pattern arranged between the second compensation pattern CT2 and the first data driver chip DIC1.

[0134] As described above, due to each of the multiple flexible circuit films CF1 to CF4 (see above) Figure 1The display panel DP may include a protruding pattern PT1, thus restricting the movement of each of the multiple flexible circuit films CF1 to CF4 in the y-axis direction. Specifically, the protruding pattern PT1 may physically contact the side surface of the first display substrate FS of the display panel DP and restrict the movement of each of the multiple flexible circuit films CF1 to CF4 in the y-axis direction. Accordingly, if a bonding process is performed to bond the multiple flexible circuit films CF1 to CF4 to the display panel DP, the first conductive pads F_PD1 of the multiple flexible circuit films CF1 to CF4 can be easily aligned with the pads PD1_1 of the display panel DP in the y-axis direction. Therefore, the bonding reliability between the multiple flexible circuit films CF1 to CF4 and the display panel DP can be improved.

[0135] Figure 9A This is a schematic plan view showing a first flexible circuit film CF1 according to an embodiment of the present disclosure, and Figure 9B It is along Figure 9A The schematic cross-sectional view shown is taken by line VII-VII'.

[0136] Reference Figure 9A and Figure 9B The first flexible circuit film CF1 may further include a virtual compensation pattern D_CT disposed between the first compensation pattern CT1 and the second compensation pattern CT2. The virtual compensation pattern D_CT may be disposed on the rear surface of the base film BF to correspond to the central region MA. The virtual compensation pattern D_CT and at least one of the first compensation pattern CT1 and the second compensation pattern CT2 may have substantially the same construction.

[0137] The virtual compensation pattern D_CT may overlap with the first data driver chip DIC1 in the central region MA. The virtual compensation pattern D_CT may have a strip shape extending along the first data driver chip DIC1 in the first direction DR1. The virtual compensation pattern D_CT may be arranged to be spaced apart from the first compensation pattern CT1 and the second compensation pattern CT2 in the second direction DR2.

[0138] If the first flexible circuit film CF1 includes a virtual compensation pattern D_CT, it can more effectively prevent flexural deformation in the central region MA compared to a structure that only includes at least one of the first compensation pattern CT1 and the second compensation pattern CT2.

[0139] Although embodiments of this disclosure have been described, it is to be understood that this disclosure should not be limited to these embodiments. Rather, those skilled in the art can make various changes and modifications without departing from the spirit and scope of this disclosure as claimed in the appended claims.

[0140] Therefore, the subject matter disclosed should not be limited to any single embodiment described herein, and the scope of the inventive concept should be determined by the appended claims, which include its equivalents.

Claims

1. A display device, comprising: The display panel includes: Pixel layer, the pixel layer displaying the image; and The pad portion is electrically connected to the pixel layer; A flexible circuit film, said flexible circuit film being bonded to the pad portion of the display panel; and A driver chip, wherein the driver chip is disposed on the flexible circuit film, The flexible circuit film includes: Base membrane; A first conductive line is disposed on a first surface of the base membrane; A first conductive pad extends from the first wire and is electrically connected to the pad portion of the display panel; A cover layer that covers the first conductor and exposes the first conductive pad; and A raised pattern is provided, which is disposed on the cover layer adjacent to the first conductive pad and facing the side surface of the display panel. The protruding pattern has a strip shape that extends along the extension direction of the driving chip.

2. A display device, comprising: The display panel includes: Pixel layer, the pixel layer displaying the image; and Pad portions, the pad portions being electrically connected to the pixel layer; and A flexible circuit film, wherein the flexible circuit film is bonded to the pad portion of the display panel. The flexible circuit film includes: Base membrane; A first conductive line is disposed on a first surface of the base membrane; A first conductive pad extends from the first wire and is electrically connected to the pad portion of the display panel; A cover layer that covers the first conductor and exposes the first conductive pad; and A raised pattern is provided, which is disposed on the cover layer adjacent to the first conductive pad and facing the side surface of the display panel. The highlighted pattern includes: Metallic patterns, the metallic patterns being arranged on the cover layer; and An insulating pattern that covers the metal pattern.

3. The display device according to claim 2, wherein, The metal pattern, the first conductor, and the first conductive pad are made of the same material.

4. The display device according to claim 2, wherein, The insulating pattern and the covering layer comprise the same material.

5. The display device according to claim 1, wherein, The protruding pattern and the cover layer have an integral structure.

6. The display device according to claim 1, wherein, The flexible circuit film further includes a first compensation pattern, which is disposed on the second surface of the base film and overlaps with the first conductive pad, wherein the second surface of the base film is opposite to the first surface of the base film.

7. The display device according to claim 6, wherein, The first compensation pattern includes: A first metallic pattern is disposed on the second surface of the base film; and A first insulating pattern, which covers the first metal pattern.

8. The display device according to claim 7, wherein, The first metal pattern, the first wire, and the first conductive pad are made of the same material.

9. The display device according to claim 7, wherein, The first insulating pattern and the cover layer comprise the same material.

10. The display device according to claim 1, further comprising a printed circuit board bonded to the flexible circuit film.

11. The display device according to claim 10, wherein, The flexible circuit film includes: A second conductive wire is disposed on the first surface of the base membrane; and The second conductive pad extends from the second conductor and is bonded to the printed circuit board.

12. The display device according to claim 11, wherein, The flexible circuit film further includes a second compensation pattern, which is disposed on the second surface of the base film and overlaps with the second conductive pad, wherein the second surface of the base film is opposite to the first surface of the base film.

13. The display device according to claim 12, wherein, The second compensation pattern includes: A second metal pattern is disposed on the second surface of the base film; and A second insulating pattern covers the second metal pattern.

14. The display device according to claim 1, wherein, The flexible circuit film includes a first compensation pattern and a second compensation pattern spaced apart from each other, and The driver chip is arranged between the first compensation pattern and the second compensation pattern.

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