Semiconductor Devices

Abstract

In an embodiment, a semiconductor device is disclosed, including: a substrate; a first and a second semiconductor layer, which are arranged on the substrate and have different conductivity types; a third semiconductor layer, which is arranged between the first semiconductor layer and the second semiconductor layer; a first electrode, which is arranged on the first semiconductor layer so as to be electrically connected to the first semiconductor layer; a second electrode, which is arranged on the second semiconductor layer so as to be electrically connected to the second semiconductor layer; and a first insulating layer, which is arranged between the first electrode and the second electrode on the exposed first, second and third semiconductor layers, wherein at least one of the first end of the two ends of the first electrode close to the second electrode and the second end of the second electrode close to the first electrode has an electric field dispersion portion.

Description

[0001] This application is a divisional application of an invention patent application with an international application date of June 14, 2017, an international application number of PCT / KR2017 / 006205, an application number of 201780037125.3 entering the Chinese national phase, and an invention name of “Semiconductor Device”.

[0002] CROSS-REFERENCE TO RELATED APPLICATIONS

[0003] This application claims the benefit of Korean Patent Application No. 10-2016-0074006 filed in Korea on Jun. 14, 2016, which is hereby incorporated by reference in its entirety. Technical Field

[0004] An embodiment of the present application relates to a semiconductor device. Background Art

[0005] Semiconductor devices including compounds such as GaN, AlGaN, etc. have many advantages such as wide and easily adjustable band gap energy, so that the semiconductor devices can be variously used as light emitting devices, light receiving devices, various diodes, etc.

[0006] In particular, light-emitting devices such as light-emitting diodes (LEDs) or laser diodes using compound semiconductor materials of group III-V or group II-VI compound semiconductors can achieve light of various colors, such as red light, green light, blue light and ultraviolet light, with the development of thin film growth technology and element materials. They can also achieve high-efficiency white light using fluorescent materials or combined colors, and have the advantages of low power consumption, semi-permanent life, fast response speed, safety and environmental friendliness compared to traditional light sources such as fluorescent lamps and incandescent lamps.

[0007] In addition, when a light receiving device such as a photodetector or a solar cell is manufactured using a III-V or II-VI compound semiconductor material, due to the development of component materials, the light receiving device absorbs light in various wavelength regions to generate photocurrent, making it possible to detect light in various wavelength regions from gamma rays to radio wavelengths. In addition, such a light receiving device has the advantages of fast response speed, safety, environmental friendliness, and easy control of device materials, so that the light receiving device can also be easily used as various sensors for power control, microwave circuits, communication modules, or detection of gas or ultraviolet (UV).

[0008] Therefore, the application of semiconductor devices has been expanded to be applied as transmission modules of optical communication equipment, LED backlights replacing cold cathode fluorescent lamps (CCFL) configuring backlights of liquid crystal display (LCD) equipment, white LED lighting devices capable of replacing fluorescent lamps or incandescent lamps, headlights of vehicles, traffic lights, sensors for detecting gas or fire, etc. In addition, the application of semiconductor devices can be expanded to be applied to high-frequency application circuits, other power control devices, and communication modules.

[0009] In a conventional semiconductor device, an electric field is strongly formed at the edge of an electrode, so that there is a problem that the semiconductor device can be damaged. Summary of the invention

[0010] Technical issues

[0011] Example embodiments are directed to providing a semiconductor device having improved reliability by dispersing a local large electric field.

[0012] Technical Solution

[0013] One aspect of the present invention provides a semiconductor device, comprising:

[0014] substrate;

[0015] a first semiconductor layer and a second semiconductor layer, the first semiconductor layer and the second semiconductor layer being arranged on the substrate and having different conductivity types;

[0016] a third semiconductor layer, the third semiconductor layer being arranged between the first semiconductor layer and the second semiconductor layer;

[0017] a first electrode disposed on the first semiconductor layer and electrically connected to the first semiconductor layer;

[0018] a second electrode disposed on the second semiconductor layer and electrically connected to the second semiconductor layer; and

[0019] a first insulating layer disposed on the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer exposed between the first electrode and the second electrode,

[0020] At least one of a first end portion close to the second electrode among the two ends of the first electrode and a second end portion close to the first electrode of the second electrode has an electric field dispersion portion.

[0021] The electric field dispersion portion includes at least one protrusion protruding toward the first semiconductor layer or the second semiconductor layer.

[0022] a fifth distance from the at least one protrusion protruding toward the first semiconductor layer to an edge of the first end portion is shorter than a sixth distance from the at least one protrusion protruding toward the first semiconductor layer to a center of the first electrode; and

[0023] A seventh distance from the at least one protrusion protruding toward the second semiconductor layer to an edge of the second end portion is shorter than an eighth distance from the at least one protrusion protruding toward the second semiconductor layer to a center of the second electrode.

[0024] The at least one protrusion comprises a plurality of protrusions; and

[0025] One or more of widths or depths and separation distances of the plurality of protrusions are different from each other, and the plurality of protrusions are separated from each other by the separation distances.

[0026] The electric field dispersion portion included in the second end portion has an edge spaced apart from a first interface between the first electrode and the first insulating layer by a ninth distance and overlaps the first insulating layer and the first semiconductor layer in a vertical direction.

[0027] The first end portion and the second end portion are arranged to face each other on the first semiconductor layer.

[0028] The electric field dispersion portion included in the first end portion has an edge spaced apart from a second interface between the first insulating layer and the second electrode by a tenth distance and overlaps the first insulating layer and the first to third semiconductor layers in the vertical direction.

[0029] The first end portion and the second end portion are arranged to face each other on the second semiconductor layer.

[0030] The electric field dispersion portion includes the at least one cavity in contact with the first semiconductor layer or the second semiconductor layer.

[0031] The first insulating layer includes a first insulating portion disposed on the first semiconductor layer, a second insulating portion disposed on the second semiconductor layer, and a third insulating portion at sides of the first to third semiconductor layers disposed between the first insulating portion and the second insulating portion.

[0032] Beneficial Effects

[0033] The semiconductor device according to the embodiment can provide high reliability by dispersing a local large electric field to prevent damage due to a strong electric field. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 is a plan view of a semiconductor device according to an embodiment.

[0035] Figure 2 It is along Figure 1 A cross-sectional view taken along line II' is shown in FIG.

[0036] Figure 3 According to another embodiment Figure 1 and 2 A partially exploded cross-sectional view of the semiconductor device shown in FIG.

[0037] Figure 4 is a plan view of a semiconductor device according to another embodiment.

[0038] Figure 5 It is along Figure 1 A cross-sectional view taken along line II-II' is shown in FIG.

[0039] Figure 6 According to another embodiment Figure 4 and Figure 5 A partially exploded cross-sectional view of the semiconductor device shown in FIG.

[0040] Figure 7 is a plan view of a semiconductor device according to still another embodiment.

[0041] Figure 8 It is along Figure 7 A cross-sectional view taken along line III-III'.

[0042] Fig. 9 is a plan view of a semiconductor device according to still another embodiment.

[0043] Fig.10 It is along Fig. 9 A cross-sectional view taken along line IV-IV' shown in FIG.

[0044] Fig.11 is a plan view of a semiconductor device according to a comparative example.

[0045] Fig.12 It is along Fig.11 0 is a cross-sectional view of the semiconductor device taken along line VV′ shown in FIG.

[0046] Fig.13a and 13b is based on Fig.11 A photograph of an actual light-emitting device of the comparative example shown in FIG. DETAILED DESCRIPTION

[0047] Hereinafter, exemplary embodiments of the present invention capable of achieving the above-mentioned object will be described with reference to the accompanying drawings.

[0048] In the description of the embodiment according to the present invention, when an element is described as being formed "on" or "under" another element, the term "on..." or "under..." includes the meaning of being in contact with each other (directly) and the meaning that one or more other elements are arranged and formed between the two elements (indirectly). In addition, when an element is described as being formed "on" or "under" another element, the description may include the meaning of another element being formed in an upward direction of the element and being formed in a downward direction of the element.

[0049] The semiconductor device may include various electronic devices such as a light emitting device and a light receiving device. Both the light emitting device and the light receiving device may include first and second semiconductor layers and a third semiconductor layer (or active layer) having a different conductivity type.

[0050] Light-emitting devices emit light through the recombination of electrons and holes, and the wavelength of the light is determined by the intrinsic energy band gap of the material. Therefore, the emitted light can vary depending on the composition of the material.

[0051] The light emitting device can be used as a light source of a lighting system by being configured as a light emitting device package. For example, the light emitting device package can be used as a light source of an image display device or a lighting device.

[0052] When the light emitting device package is used as a backlight unit of an image display device, the light emitting device package can be used as an edge type backlight unit or a direct type backlight unit. When the light emitting device package is used as a light source of a lighting device, the light emitting device package can be used as a lamp or can be used in the form of a bulb, and the light emitting device package can also be used as a light source of a mobile terminal.

[0053] The light emitting device includes a light emitting diode or a laser diode.

[0054] The light emitting diode may include the above-mentioned structure of the first semiconductor layer, the second semiconductor layer and the third semiconductor layer. The similarity between the light emitting diode and the laser diode is that the electroluminescence (electroluminescence) phenomenon is used, in which light is emitted when the first p-type semiconductor layer and the second n-type semiconductor layer are combined and current flows, but the light emitting diode and the laser diode are different in the directionality and phase of the emitted light. That is, the laser diode can emit light with the same phase in the same direction of a specific single wavelength (i.e., a monochromatic light beam) using a phenomenon called stimulated emission and a constructive interference phenomenon, and, using the above-mentioned characteristics, the laser diode can be used for optical communications, medical equipment, semiconductor processing equipment, etc.

[0055] Meanwhile, an example of a light receiving device may include a photodetector, which is a transducer that detects light and converts the intensity of the detected light into an electrical signal. Such a photodetector may include a photocell (silicon or selenium), a photoconductive element (cadmium sulfide or cadmium selenide), a photodiode (PD) (e.g., a PD having a peak wavelength in a visible blind spectral region or a true blind spectral region), a phototransistor, a photomultiplier, a phototube (vacuum or gas-filled), an infrared (IR) detector, etc., but the present invention is not limited thereto.

[0056] In addition, semiconductor devices such as photodetectors can be manufactured using direct bandgap semiconductors, and their light conversion efficiency is generally high. Alternatively, the photodetector has various structures, and includes a needle-type photodetector using a pn junction as the most common structure, a Schottky photodetector using a Schottky junction, and a metal-semiconductor-metal (MSM) type photodetector.

[0057] Similar to the light emitting device, the light receiving device such as PD may include the above-mentioned structure of the first semiconductor layer, the second semiconductor layer and the third semiconductor layer, and may be configured with a pn junction or a pin structure. The photodiode operates by applying a reverse bias or a zero bias, and when light is incident on the photodiode, electrons and holes are generated, and thus current flows. At this time, the amount of current may be approximately proportional to the intensity of the light incident on the photodiode.

[0058] A photovoltaic cell or solar cell is a photodiode and can convert light into electric current. Similar to a light emitting device, a solar cell may include a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer.

[0059] In addition, the photodiode (PD) can be used as a rectifier of an electronic circuit by using the rectification characteristics of a general diode of a pn junction, and can be applied to an oscillation circuit or the like by being adopted in a microwave circuit.

[0060] In addition, the semiconductor devices described above are not necessarily implemented with semiconductors, and in some cases, the semiconductor devices may also include metal materials. For example, semiconductor devices such as light receiving devices may be implemented using at least one of Ag, Al, Au, In, Ga, N, Zn, Se, and As, or may be implemented using semiconductor materials doped with p-type or n-type dopants or intrinsic semiconductor materials.

[0061] Hereinafter, an orthogonal coordinate system (x, y, z) will be used to describe semiconductor devices according to exemplary embodiments, but the exemplary embodiments are not limited thereto. That is, other coordinate systems may be used to describe exemplary embodiments. In the accompanying drawings, the x-axis, y-axis, and z-axis will be described as being perpendicular to each other, but the exemplary embodiments are not limited thereto. That is, the x-axis, y-axis, and z-axis may intersect each other without being perpendicular to each other.

[0062] In addition, the semiconductor devices 100A to 100D according to the exemplary embodiments described below refer to light receiving devices, but the exemplary embodiments are not limited thereto. That is, the semiconductor devices 100A to 100D according to the exemplary embodiments may be light emitting devices. Specifically, the semiconductor devices according to the exemplary embodiments may be avalanche photodiodes (APDs) for improving gain by multiplying carriers, but the exemplary embodiments are not limited thereto.

[0063] Figure 1 is a plan view of a semiconductor device 100A according to an embodiment, and Figure 2 It is along Figure 1 Cross-sectional view taken along line I-I'.

[0064] Figure 1 The semiconductor device 100A shown in FIG. Figure 2 The different cross-sectional shapes shown in Figure 2 The semiconductor device 100A shown in FIG. Figure 1 Different plane shapes are shown in .

[0065] To help understand, Figure 1 Invisible layers arranged below the first electrode ED1 and the second electrode ED2 in FIG. 5 are indicated by dotted lines.

[0066] refer to Figure 1 and Figure 2 According to an embodiment, a semiconductor device 100A may include a substrate 110 , a buffer layer 120 , a first semiconductor layer 130 , a second semiconductor layer 140 , a third semiconductor layer 150 , first and second electrodes ED1 and ED2 , a first insulating layer 192 , and second insulating layers 194 and 196 .

[0067] The substrate 110 may include a conductive material or a non-conductive material. For example, the substrate 110 may include sapphire (Al 2 O 3 ), GaN, SiC, ZnO, GaP, InP, Ga 2 O 3 , GaAs and Si, but the present embodiment is not limited to a specific material of the substrate 110.

[0068] The light receiving structure may include first to third semiconductor layers 130, 140, and 150. When the semiconductor device 100A according to the present embodiment is a light emitting device, the first to third semiconductor layers 130, 140, 150 may be a light emitting structure.

[0069] In order to improve the difference in thermal expansion coefficient and lattice mismatch between the substrate 110 and the light receiving structures 130, 140 and 150, the buffer layer 120 may be arranged between the substrate 110 and the first semiconductor. In some cases, the buffer layer 120 may be omitted. For example, the buffer layer 120 may include at least one material selected from the group consisting of Al, In, N and Ga, but the present invention is not limited thereto. In addition, the buffer layer 120 may have a single-layer structure or a multi-layer structure. For example, the buffer layer 120 may be made of AlN.

[0070] The first semiconductor layer 130 and the second semiconductor layer 140 may be arranged on the substrate 110. The first semiconductor layer 130 and the second semiconductor layer 140 may have different conductivity types. For example, the first semiconductor layer 130 may be a first conductive semiconductor layer doped with a first conductive dopant, and the second semiconductor layer 140 may be a second conductive semiconductor layer doped with a second conductive dopant.

[0071] Alternatively, the first semiconductor layer 130 may be a semiconductor layer doped with a second conductive dopant, and the second semiconductor layer 140 may include a semiconductor layer doped with a first conductive dopant. Here, the first conductive type dopant may include Si, Ge, Sn, Se, or Te as an n-type dopant, but the present invention is not limited thereto. In addition, the second conductive dopant may include Mg, Zn, Ca, Sr, or Ba as a p-type dopant, but the present invention is not limited thereto.

[0072] The first semiconductor layer 130 may be disposed on the substrate 110 (or the buffer layer 120). The first semiconductor layer 130 may be disposed between the substrate 110 (or the buffer layer) and the third semiconductor layer 150. When the buffer layer 120 is not omitted, the first semiconductor layer 130 may be disposed between the buffer layer 120 and the third semiconductor layer 150.

[0073] The second semiconductor layer 140 may be disposed on the third semiconductor layer 150. The second semiconductor layer 140 may be disposed between the third semiconductor layer 150 and the second electrode ED2.

[0074] The second semiconductor layer 140 may be formed by stacking a plurality of semiconductor layers. For example, the second semiconductor layer 140 may include a second-first semiconductor layer 142 and a second-second semiconductor layer 144.

[0075] The second-first semiconductor layer 142 may be disposed between the third semiconductor layer 150 and the second-second semiconductor layer 144. The second-second semiconductor layer 144 may be disposed between the second-first semiconductor layer 142 and the second electrode ED2, but the embodiment is not limited thereto.

[0076] According to another embodiment, the second-first semiconductor layer 142 may have the same conductivity type as that of the first semiconductor layer 130. For example, when the first semiconductor layer 130 is an n-type semiconductor layer, the second-first semiconductor layer 142 may be an n-type semiconductor layer. In this case, the second-first semiconductor layer 142 may have a second doping concentration N2 lower than the first doping concentration N1 of the first semiconductor layer 130.

[0077] In addition, if Figure 2 As shown in , the second semiconductor layer 140 of the semiconductor device 100A is illustrated as including both the second-first semiconductor layer 142 and the second-second semiconductor layer 144, but the present embodiment is not limited thereto. That is, according to another embodiment, the second semiconductor layer 140 may include only the second-first or second-second semiconductor layer 142 or 144, or may further include a second-third semiconductor layer (not shown).

[0078] The third semiconductor layer 150 may be disposed between the first semiconductor layer 130 and the second semiconductor layer 140. When the semiconductor device 100A is a light receiving device, the third semiconductor layer 150 serves to absorb photons, and when the semiconductor device 100A is a light emitting device, the third semiconductor layer 150 serves to emit light.

[0079] When the semiconductor device 100A is a light receiving device, the third semiconductor layer 150 may include an intrinsic semiconductor layer. Here, the intrinsic semiconductor layer may be an undoped semiconductor layer or an unintentionally doped semiconductor layer. An unintentionally doped semiconductor layer may mean that N-vacancies occur during the semiconductor layer growth process without doping with a dopant such as an n-type dopant such as a silicon (Si) atom. In this case, when the number of N vacancies increases, the concentration of additional electrons increases, so that the semiconductor layer may have electrical characteristics similar to those when doped with an n-type dopant, although doping with the n-type dopant is not unintentional in the manufacturing process.

[0080] For example, each of the first semiconductor layer 130, the second-first-second semiconductor layers 142 and 144, and the third semiconductor layer 150 may be formed of a semiconductor compound, and may include an In x Al y Ga 1-x-yA semiconductor material with a composition formula of N (0≤x≤1, 0≤y≤1, and 0≤x+y≤1) or one or more of InAlAs, GaN, InN, AlN, InGaN, AlGaN, InAlGaN, AlInN, AlGaAs, InGaAs, AlInGaAs, GaP, AlGaP, InGaP, AlInGaP, and InP.

[0081] For example, the first semiconductor layer 130 may include n-type AlGaN, the second-first semiconductor layer 142 may include p-type AlGaN, and the second-second semiconductor layer 144 may include p-type AlGaN. + type GaN, and the third semiconductor layer 150 may include i-AlGaN (or n-type AlGaN).

[0082] Alternatively, the second-first semiconductor layer 142 of the second semiconductor layer 140 may include n-type AlGaN instead of p-type AlGaN.

[0083] Alternatively, the first semiconductor layer 130 may include n-type InP, the second semiconductor layer 140 may include p-type InP, and the third semiconductor layer 150 may include undoped InGaAs. In this case, the second-first semiconductor layer 142 of the second semiconductor layer 140 may include p-type or n-type InP.

[0084] When the second-first semiconductor layer 142 has a conductivity type different from that of the second-second semiconductor layer 144, the depletion region between the second-first semiconductor layer 142 and the second-second semiconductor layer 144 can be used to multiply carriers. In addition, a strong electric field is generated at the boundary between the second-first semiconductor layer 142 and the third semiconductor layer 150 and at the second-first semiconductor layer 142 adjacent to the boundary, and carriers (e.g., electrons) continuously generate other carriers in the second-first semiconductor layer 142 due to the strong electric field, and the current is amplified to cause avalanche, so that the gain of the semiconductor device 100A can be improved.

[0085] Alternatively, when the second-first semiconductor layer 142 includes p-AlGaN, the second-second semiconductor layer 144 may include p-GaN for ohmic bonding. In this case, the Al content of the second-second semiconductor layer 144 may be less than the Al content of the second-first semiconductor layer 142. With this structure, the resistance is reduced so that the current injection amount can be increased. At the same time, the first electrode ED1 may be arranged on the first semiconductor layer 130 exposed by mesa etching the second semiconductor layer 140 and the third semiconductor layer 150. The first electrode ED1 may be electrically connected to the first semiconductor layer 130. The second electrode ED2 may be arranged on the second semiconductor layer 140. The second electrode ED2 may be electrically connected to the second semiconductor layer 140.

[0086] In addition, the first electrode ED1 may be arranged to extend to an upper surface of a first insulating layer 192 arranged on the first semiconductor layer 130 , and the second electrode ED2 may be arranged to extend to the first insulating layer 192 arranged on the second semiconductor layer 140 , but the embodiment is not limited thereto.

[0087] In addition, the first electrode ED1 may include a first ohmic layer 160A and a first metal layer 182A. The first metal layer 182A may be disposed on the first ohmic layer 160A. Figure 2 As shown in , the first ohmic layer 160A may be disposed on the first semiconductor layer 130 .

[0088] like Figure 2 As shown in , when the first ohmic layer 160A and the first metal layer 182A are implemented separately as shown by the dotted line, the first metal layer 182A may be used to cover (or cover) the first ohmic layer 160A, but the present embodiment is not limited thereto. According to another embodiment, as shown in Figure 2 As shown in FIG. 1 , the first ohmic layer 160A and the first metal layer 182A may be integrally formed.

[0089] The second electrode ED2 may include a second ohmic layer 170A and a second metal layer 184A. The second metal layer 184A may be disposed on the second ohmic layer 170A. Figure 2 As shown in , the second ohmic layer 170A may be disposed on the second semiconductor layer 140 .

[0090] like Figure 2 As shown in , when the second ohmic layer 170A and the second metal layer 184A are implemented separately as shown by the dotted line, the second metal layer 184A can be used to cover the second ohmic layer 170A, but the present embodiment is not limited thereto. According to another embodiment, as shown in Figure 2 As shown in FIG. 1 , the second ohmic layer 170A and the second metal layer 184A may be integrally formed.

[0091] Each of the first ohmic layer 160A and the second ohmic layer 170A may include an ohmic contact material and may be a transparent conductive oxide (TCO) layer. For example, each of the first ohmic layer 160A and the second ohmic layer 170A may be made of indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IAZO), indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), IZO nitride (IZON), Al-Ga ZnO (AGZO), IGZO, ZnO, IrO x 、RuO x 、NiO、RuO x / ITO、Ni / IrO x / Au、Ni / IrO x / Au / ITO, Ag, Ni, Cr, Ti, Al, Rh, Pd, Ir, Sn, In, Ru, Mg, Zn, Pt, Au and Hf are formed, but the present invention is not limited thereto.

[0092] Alternatively, each of the first ohmic layer 160A and the second ohmic layer 170A may be formed of a metal selected from Ag, Ni, Ti, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Hf, Cr, and selective combinations thereof, but the present embodiment is not limited thereto and may include various metal materials.

[0093] In addition, each of the first metal layer 182A and the second metal layer 184A may be made of a material having high electrical conductivity. For example, each of the first metal layer 182A and the second metal layer 184A may selectively include at least one selected from the group consisting of Ti, Au, Ni, In, Co, W, Fe, Rh, Cr, Al, etc., but the present invention is not limited thereto.

[0094] The first insulating layer 192 may be disposed on at least one of the first, second, and third semiconductor layers 130, 140, and 150 exposed between the first electrode ED1 and the second electrode ED2. That is, the first insulating layer 192 may be disposed on the side and upper portion of the light receiving structure exposed by the mesa etching. For example, the first insulating layer 192 may be disposed on the first semiconductor layer 130 together with the first electrode ED1. In addition, the first insulating layer 192 may be disposed on the side portions of the first to third semiconductor layers 130, 140, and 150 exposed by the mesa etching. In addition, the first insulating layer 192 may be disposed on the second semiconductor layer 140 together with the second electrode ED2.

[0095] The first insulating layer 192 may include at least one of first, second, and third insulating parts 192A, 192B, and 192C.

[0096] The first insulating portion 192A may be disposed on the first semiconductor layer 130 exposed by the mesa etching. Figure 2 , the first insulating portion 192A has been illustrated as being disposed under the first electrode ED1, but the present embodiment is not limited thereto. That is, the first insulating portion 192A may be disposed and separated from the first electrode ED1 while not contacting therewith.

[0097] The second insulating portion 192B may be disposed on the second semiconductor layer 140 together with the second ohmic layer 170A. Figure 2 , the second insulating portion 192B has been illustrated as being disposed under the second electrode ED2, but the present embodiment is not limited thereto. That is, the second insulating portion 192B may be disposed and separated from the second electrode ED2 while not contacting therewith.

[0098] The third insulating portion 192C may be disposed between the first insulating portion 192A and the second insulating portion 192B to connect the first insulating portion 192A and the second insulating portion 192B. The third insulating portion 192C may be disposed on the side portions of the first to third semiconductor layers 130, 140, and 150 exposed by mesa etching. The third insulating portion 192C may be disposed to cover the side surface of the third semiconductor layer 150 exposed by mesa etching.

[0099] The first to third insulating portions 192A to 192C are merely examples, and the semiconductor device 100A according to the present embodiment is not limited to a specific cross-sectional shape of the first insulating layer 192 .

[0100] The first insulating layer 192 may be disposed as described above to prevent in advance a problem in which the first electrode ED1 and the second electrode ED2 are electrically connected to each other in a manufacturing process.

[0101] At the same time, in the semiconductor device according to the present embodiment, the end of the two ends of the first electrode ED1 close to the second electrode ED (hereinafter referred to as the "first end") and at least one of the two ends of the second electrode ED2 (hereinafter referred to as the "second end") may have an electric field dispersion portion (or an electric field dispersion structure or a protective structure).

[0102] refer to Figure 1 , Figure 4 , Figure 7 or Fig. 9, in the semiconductor device 100A, 100B, 100C, or 100D according to the exemplary embodiment, one of the two ends of the first electrode ED1 having a ring-shaped plane shape corresponds to a portion adjacent to the outer circumference and the other end thereof corresponds to a portion adjacent to the inner circumference. In this case, the end of the first electrode ED1 adjacent to the inner circumference corresponds to the first end as an end close to the second electrode ED2. In addition, referring to Figure 1 , 4 , 7 or 9, the outer side of the circle in the second electrode ED2 having a circular planar shape corresponds to the second end portion close to the first electrode ED1.

[0103] like Figure 1 , 4 As shown in FIGS. 7 or 9 , each of the first and second electrodes ED1 and ED2 of the semiconductor device 100A, 100B, 100C or 100D according to the exemplary embodiment may have a circular or annular plan shape or may have a polygonal plan shape.

[0104] Figure 3 According to another embodiment Figure 1 and Figure 2 A partially exploded cross-sectional view of a semiconductor device 100A is shown in FIG.

[0105] Figure 3 The reference numeral 210 in the figure may correspond to the first or second semiconductor layer 130 or 140, and the reference numeral 220 may correspond to the first or second electrode ED1 or ED2. That is, the reference numerals 210 and 220 may correspond to the first semiconductor layer 130 and the first electrode ED1 or to the second semiconductor layer 140 and the second electrode ED2, respectively.

[0106] exist Figure 1 and Figure 2 In the semiconductor device 100A according to one embodiment shown in , the first end portion of the first electrode ED1 may include at least one first cavity H1 in contact with the first semiconductor layer 130 as an electric field dispersion portion. The at least one first cavity H1 is a recessed portion in the thickness direction (e.g., +z-axis direction) of the first semiconductor layer 130 or 210, and may be in contact with the first semiconductor layer 130. In this case, the second insulating layer 194 (hereinafter referred to as "second-first insulating layer 194") may be disposed in the at least one first cavity H1. The second-first insulating layer 194 also serves to disperse the electric field, and thus may be included in the electric field dispersion portion.

[0107] Since the first end portion of the first electrode ED1 has the electric field dispersion portion, the second end portion of the second electrode ED2 may also have the following electric field dispersion portion.

[0108] The second end portion of the second electrode ED2 may include at least one second cavity H2 in contact with the second semiconductor layer 140 as an electric field dispersion portion. The at least one second cavity H2 is a recessed portion in the thickness direction (e.g., +z-axis direction) of the second semiconductor layer 140 or 220, and may be in contact with the second semiconductor layer 140. In this case, a second insulating layer 196 (hereinafter referred to as "second-second insulating layer 196") may be disposed in the at least one second cavity H2. The second-second insulating layer 196 may also function as electric field dispersion, and thus may be included in the electric field dispersion portion.

[0109] The second-first-second-second insulating layers 194 and 196 may be formed of the same material or different materials. In addition, each of the second-first-second-second insulating layers 194 and 196 may be formed of the same material as or different from that of the first insulating layer 192 .

[0110] Each of the first, second-first and second-second insulating layers 192, 194 and 196 may be made of a non-conductive oxide or nitride, for example, silicon oxide (SiO 2 ) layer, oxynitride layer, Al 2 O 3 Or an Al oxide layer is formed, but the embodiment is not limited thereto.

[0111] When the first electrode ED1 includes the first ohmic layer 160A and the first metal layer 182A, the first cavity H1 may be formed by dividing the end of the first ohmic layer 160A. In addition, when the second electrode ED2 includes the second ohmic layer 170A and the second metal layer 184A, the second cavity H2 may be formed by dividing the end of the second ohmic layer 170A.

[0112] refer to Figure 1 In the plan view shown in FIG. 1 , the number of each of the first cavity H1 and the second cavity H2 is illustrated as one, but the present embodiment is not limited thereto. That is, according to another embodiment, the number of the first cavity H1 and the second cavity H2 may be two or more.

[0113] For example, refer to Figure 3 , the at least one first cavity H1 may include three first cavities HX1, HX2, and HX3. In this case, the three second-first insulating layers 194-1, 194-2, and 194-3 may be disposed in the three first cavities HX1, HX2, and HX3, respectively. Similarly, referring to Figure 3 , the at least one second cavity H2 may include three second cavities HX1, HX2, and HX3. In this case, three second-second insulating layers 196-1, 196-2, and 196-3 may be disposed in the three second cavities HX1, HX2, and HX3, respectively.

[0114] In addition, a first distance D1 from at least one first cavity H1 in contact with the first semiconductor layer 130 or 210 to an edge ED1-1 of the first end of the first electrode ED1 may be shorter than a second distance D2 from at least one first cavity H1 to the center C1 of the first electrode ED1. The fact that the first distance D1 is shorter than the second distance D2 means that at least one first cavity H1 is arranged at the first end of the first electrode ED1. Here, the first distance D1 may be measured from one surface H11 of the first cavity H1, and the second distance D2 may be measured from another surface H12 of the first cavity H1. Here, one surface H11 of the first cavity H1 may be an outer surface arranged in a direction from the first cavity H1 to the first insulating layer 192, and another surface of the first cavity H1 may be a surface arranged in a direction opposite to the one surface H11. However, the present embodiment is not limited thereto. That is, according to another embodiment, the first distance D1 may be measured from the center of the first cavity H1 or another surface H12 thereof, and the second distance D2 may be measured from the center of the first cavity H1 or one surface H11 thereof.

[0115] refer to Figure 2 , the first end portion TE1 of the first electrode ED1 may be defined as a region from an edge ED1-1 among edges of the first electrode ED1 that contacts the first semiconductor layer 130 to the other surface H12 of the first cavity H1. Figure 3 As shown in , when a plurality of first cavities H1 are provided, the first end portion TE1 of the first electrode ED1 may be defined as a region from an edge ED1-1 among edges of the first electrode in contact with the first semiconductor layer 130 to another surface H12 of the outermost first cavity HX3.

[0116] In addition, the third distance D3 from the edge ED2-1 of the second end of the at least one second cavity H2 in contact with the second semiconductor layer 140 or 220 to the second electrode ED2 may be shorter than the fourth distance D4 from the at least one second cavity H2 to the center C2 of the second electrode ED2. The fact that the third distance D3 is shorter than the fourth distance D4 means that the at least one second cavity H2 is arranged at the second end of the second electrode ED2. Here, the third distance D3 may be measured from the other surface H22 of the second cavity H2, and the fourth distance D4 may be measured from the one surface H21 of the second cavity H2. Here, the one surface H21 of the second cavity H2 may be an outer surface arranged in the direction from the first insulating layer 192 to the second cavity H2, and the other surface of the first cavity H1 may be a surface arranged in the opposite direction to the one surface H21. However, the present embodiment is not limited thereto. That is, according to another embodiment, the third distance D3 may be measured from the center of the second cavity H2 or one surface H21 thereof, and the fourth distance D4 may be measured from the center of the second cavity H2 or another surface H22 thereof.

[0117] refer to Figure 2 , the second end portion TE2 of the second electrode ED2 may be defined as a region from an edge ED2-1 of the second electrode ED2 that contacts the second semiconductor layer 140 to a surface H21 of the second cavity H2. Figure 3 The second cavity HX shown in FIG. 1 corresponds to the Figure 2 Another embodiment of the cavity at the left side of the two second cavities H2 arranged on the second semiconductor layer 140 shown in FIG. Figure 3 As shown in , a plurality of second cavities H2 are provided, and the second end portion TE2 of the second electrode ED2 may be defined as a region from an edge ED2 - 1 among edges of the second electrode ED2 contacting the second semiconductor layer 140 to another surface H22 of an outermost second cavity HX3 .

[0118] exist Figure 1 and Figure 2 In the semiconductor device 100A shown in FIG. 1 , the electric field dispersion portion has been illustrated as being formed at both the first end portion TE1 of the first electrode ED1 and the second end portion TE2 of the second electrode ED2, but the present embodiment is not limited thereto. Alternatively, according to another embodiment, the electric field dispersion portion may be formed only at the first end portion TE1 or only at the second end portion TE2.

[0119] like Figure 3 As shown in FIG. 1 , when each of the first cavity H1 and the second cavity H2 is configured with a plurality of cavities HX1 , HX2 , and HX3 , separation distances SD1 and SD2 by which the plurality of cavities HX1 , HX2 , and HX3 are separated may be equal to or different from each other.

[0120] In addition, the widths WI1 , WI2 , and WI3 of the plurality of cavities HX1 , HX2 , and HX3 may be the same as or different from each other.

[0121] Furthermore, depths DE11 , DE12 , and DE13 of the plurality of cavities HX1 , HX2 , and HX3 may be the same as or different from one another.

[0122] As described below, the number of cavities HX1, HX2, and HX3, separation distances SD1 and SD2, widths WI1, WI2, WI3, WJ1, WJ2, and WJ3, and depths DE11, DE12, and DE13 (eg, Figure 7 at least one of the foregoing) disperses the local large electric field to the desired location by the expected amount.

[0123] Figure 4 is a plan view of a semiconductor device 100B according to another embodiment, and Figure 5 It is along Figure 4 A cross-sectional view taken along line II-II' is shown in FIG.

[0124] Figure 4 The semiconductor device 100B shown in FIG. 1 may have Figure 5 The different cross-sectional shapes shown in FIG. Figure 5 The semiconductor device 100B shown in FIG. 1 may have Figure 4 Different plane shapes are shown in .

[0125] To help understand, Figure 4 Invisible layers arranged below the first electrode ED1 and the second electrode ED2 in FIG. 5 are indicated by dotted lines.

[0126] refer to Figure 4 and Figure 5 , a semiconductor device 100B according to another embodiment may include a substrate 110 , a buffer layer 120 , a first semiconductor layer 130 , a second semiconductor layer 140 , a third semiconductor layer 150 , first and second electrodes ED1 and ED2 , and a first insulating layer 192 .

[0127] Except that the first and second electrodes ED1 and ED2 have different shapes and do not include the second-first-second insulating layers 194 and 196, Figure 4 and Figure 5 The semiconductor device 100B shown in FIG. Figure 1 and 2 The semiconductor device 100A shown in FIG. 1 is identical to that of FIG. 1 , so that the same reference numerals are used, redundant descriptions are omitted, and only differences will be described.

[0128] Figure 6 According to another embodiment Figure 4 and Figure 5 A partially exploded cross-sectional view of a semiconductor device 100B is shown in FIG.

[0129] Figure 6 The reference numeral 210 in the figure may correspond to the first or second semiconductor layer 130 or 140, and the reference numeral 220 may correspond to the first or second electrode ED1 or ED2. That is, the reference numerals 210 and 220 may correspond to the first semiconductor layer 130 and the first electrode ED1 or to the second semiconductor layer 140 and the second electrode ED2, respectively.

[0130] exist Figure 4 and Figure 5 In the semiconductor device 100B according to another embodiment shown in , the first end portion of the first electrode ED1 may include at least one first protrusion PR1 protruding toward the first semiconductor layer 130 or 210 as an electric field dispersion portion. The first protrusion PR1 may be a protruding portion in the thickness direction (e.g., -z axis direction) of the first semiconductor layer 130 or 210, and may be inserted into the first semiconductor layer 130 or 210. To this end, the first semiconductor layer 130 or 210 may include a first trench T1 for accommodating the first protrusion PR1. As described above, in Figure 4 and Figure 5 In the semiconductor device 100B shown in FIG. 1 , the first protrusion PR1 and the first trench T1 may be included in the electric field dispersion portion.

[0131] Since the first end portion of the first electrode ED1 has the electric field dispersion portion, the second end portion of the second electrode ED2 may also have the following electric field dispersion portion.

[0132] The second end portion of the second electrode ED2 may include at least one second protrusion PR2 protruding toward the second semiconductor layer 140 or 220 as an electric field dispersion portion. The second protrusion PR2 may be a protruding portion in the thickness direction (e.g., -z axis direction) of the second semiconductor layer 140 or 220, and may be inserted into the second semiconductor layer 140 or 220. To this end, the second semiconductor layer 140 or 220 may include a second trench T2 for accommodating the second protrusion PR2. As described above, in Figure 4 and Figure 5 In the semiconductor device 100B shown in FIG. 1 , the second protrusion PR2 and the second trench T2 may be included in the electric field dispersion portion.

[0133] refer to Figure 4 In the plan view shown in FIG. 1 , the number of each of the first and second protrusions PR1 and PR2 is illustrated as one, but the present embodiment is not limited thereto. That is, according to another embodiment, the number of the first and second protrusions PR1 and PR2 may be two or more.

[0134] For example, refer to Figure 6 , the at least one first protrusion PR1 may include three first protrusions PRX1, PRX2, and PRX3. In this case, three first trenches TX1, TX2, and TX3 may be formed at the first semiconductor layer 130 or 210 to accommodate the three first protrusions PRX1, PRX2, and PRX3. Similarly, referring to Figure 6 , the at least one second protrusion PR2 may include three second protrusions PRX1, PRX2, and PRX3. In this case, three second trenches TX1, TX2, and TX3 may be formed at the second semiconductor layer 140 or 220 to accommodate the three second protrusions PRX1, PRX2, and PRX3.

[0135] For example, the number of each of the first protrusions PR1 and the second protrusions PR2 may be in the range of 1 to 5, but the embodiment is not limited thereto.

[0136] In addition, a fifth distance D5 in a horizontal direction (e.g., -y axis direction) from at least one first protrusion PR1 protruding toward the first semiconductor layer 130 or 210 to an edge ED1-2 of a first end portion of the first electrode ED1 may be shorter than a sixth distance D6 in a horizontal direction (e.g., -y axis direction) from at least one first protrusion PR1 to a center C1 of the first electrode ED1. The fact that the fifth distance D5 is shorter than the sixth distance D6 means that at least one first protrusion PR1 is arranged at the first end portion of the first electrode ED1. Here, the fifth distance D5 may be measured from one surface PR11 of the first protrusion PR1, and the sixth distance D6 may be measured from another surface PR12 of the first protrusion PR1. Here, one surface PR11 of the first protrusion PR1 may be an outer surface arranged adjacent to the first insulating layer 192, and another surface of the first protrusion PR1 may be an outer surface arranged in a direction opposite to the one surface PR11. However, the present embodiment is not limited thereto. That is, according to another embodiment, the fifth distance D5 may be measured from the center of the first protrusion PR1 or its outer surface PR12, and the sixth distance D6 may be measured from the center of the first protrusion PR1 or one surface PR11 thereof. In this case, the fifth distance D5 may be in the range of 1 μm to 5 μm, but the embodiment is not limited thereto.

[0137] refer to Figure 5 , the first end portion TE1 of the first electrode ED1 may be defined as a region from an edge ED1-2 among edges of the first electrode ED1 in contact with the first semiconductor layer 130 to another surface PR12 of the first protrusion PR1. Figure 6As shown in , when a plurality of first protrusions PR1 are provided, the first end portion TE1 of the first electrode ED1 may be defined as a region from an edge ED1 - 2 contacting the first semiconductor layer 130 among edges of the first electrode ED1 to an outer side PR12 of an outermost first protrusion PRX3 .

[0138] In addition, the seventh distance D7 from the at least one second protrusion PR2 protruding toward the second semiconductor layer 140 or 220 to the edge ED2-2 of the second end of the second electrode ED2 may be shorter than the eighth distance D8 from the at least one second protrusion PR2 to the center C2 of the second electrode ED2. The fact that the seventh distance D7 is shorter than the eighth distance D8 means that the at least one second protrusion PR2 is arranged at the second end of the second electrode ED2. Here, the eighth distance D8 may be measured from one surface PR21 of the second protrusion PR2, and the seventh distance D7 may be measured from another surface PR22 of the second protrusion PR2. Here, one surface PR21 of the second protrusion PR2 may be an outer surface arranged adjacent to the center C2 of the second electrode ED2, and the other surface of the first protrusion PR1 may be an outer surface arranged in the opposite direction to the one surface PR21 of the second protrusion PR2. However, the present embodiment is not limited thereto. That is, according to another embodiment, the seventh distance D7 may be measured from the center of the second protrusion PR2 or its inner side PR21, and the eighth distance D8 may be measured from the center of the second protrusion PR2 or its outer side PR22.

[0139] In this case, the seventh distance D7 may be in the range of 1 μm to 5 μm, but the embodiment is not limited thereto.

[0140] refer to Figure 5 , the second end portion TE2 of the second electrode ED2 may be defined as a region from an edge ED2-2 among the edges of the second electrode ED2 in contact with the second semiconductor layer 140 to an inner side PR21 of the second protrusion PR2. Figure 6 The cross section shown in corresponds to a Figure 5 In another embodiment of the second protrusion PR2 at the left side of the two second protrusions PR2 shown in , the second end portion TE2 of the second electrode ED2 can be defined as the area from the edge ED2-2 of the second electrode ED2 in contact with the second semiconductor layer 140 to the inner side PR12 of the outermost second protrusion PRX3.

[0141] exist Figure 4 and Figure 5In the semiconductor device 100B shown in FIG. 1 , the electric field dispersion portion has been illustrated as being formed at both the first end portion TE1 of the first electrode ED1 and the second end portion TE2 of the second electrode ED2, but the present embodiment is not limited thereto. Alternatively, according to another embodiment, the electric field dispersion portion may be formed only at the first end portion TE1 or only at the second end portion TE2.

[0142] like Figure 6 As shown in FIG. 1 , when each of the first and second protrusions PR1 and PR2 is configured with a plurality of protrusions PRX1 , PRX2 , and PRX3 , separation distances SD3 and SD4 by which the plurality of protrusions PRX1 , PRX2 , and PRX3 are separated may be equal to or different from each other.

[0143] Furthermore, the widths WJ1 , WJ2 , and WJ3 of the plurality of protrusions PRX1 , PRX2 , and PRX3 may be the same as or different from each other.

[0144] In addition, heights h1 , h2 , and h3 of the plurality of protrusions PRX1 , PRX2 , and PRX3 may be the same as or different from each other.

[0145] Furthermore, depths DE21 , DE22 , and DE23 of the plurality of trenches TX1 , TX2 , and TX3 may be the same as or different from one another.

[0146] As described below, the number of multiple protrusions PRX1, PRX2 and PRX3; separation distances SD3 and SD4; widths WJ1, WJ2 and WJ3; heights h1, h2 and h3; and at least one of depths DE21, DE22 and DE23 can be used to disperse the local large electric field to the desired location by the desired amount.

[0147] In addition, the first trench T1 and the second trench T2 may be formed by dry etching or wet etching. However, due to the properties of the materials forming the first and second semiconductor layers 130 and 140, wet etching is difficult to apply to the first and second semiconductor layers 130 and 140, and thus the first and second semiconductor layers 130 and 140 may be dry etched. However, dry etching may cause material damage to the first and second trenches T1 and T2. Therefore, in view of the above description, the semiconductor device 100B may be manufactured.

[0148] Figure 7 is a plan view of a semiconductor device 100C according to still another embodiment, and Figure 8 It is along Figure 7 A cross-sectional view taken along line III-III'.

[0149] Figure 7 The semiconductor device 100C shown in FIG. 1 may have Figure 8 The different cross-sectional shapes shown in Figure 8 The semiconductor device 100C shown in FIG. Figure 7 Different plane shapes are shown in .

[0150] To help understand, it is arranged in Figure 7 Invisible layers below the first electrode ED1 and the second electrode ED2 in FIG. 5 are indicated by dotted lines.

[0151] refer to Figure 7 and Figure 8 According to still another embodiment, a semiconductor device 100C may include a substrate 110 , a buffer layer 120 , a first semiconductor layer 130 , a second semiconductor layer 140 , a third semiconductor layer 150 , first and second electrodes ED1 and ED2 , and a first insulating layer 192 .

[0152] In addition to the first and second electrodes ED1 and ED2 having different shapes, Figure 7 and Figure 8 The semiconductor device 100C shown in FIG. Figure 4 and 5 The semiconductor device 100B shown in FIG. 1 is identical to that in FIG. 1 , so that the same reference numerals are used, redundant descriptions are omitted, and only differences are described.

[0153] Different from Figure 1 and Figure 2 The first and second electrodes ED1 and ED2 shown in FIG. 1 have first and second cavities H1 and H2, respectively, and Figure 4 and 5 The first and second electrodes ED1 and ED2 shown in FIG. 1 have first and second protrusions PR1 and PR2, respectively. Figure 7 and 8 The first and second electrodes ED1 and ED2 shown in FIG. 4 do not have the cavities H1 and H2 or the protrusions PR1 and PR2 .

[0154] On the contrary, Figure 7 and Figure 8 In the semiconductor device 100C shown in FIG. 1 , the second end portion TE2 of the second electrode ED2 includes an edge ED2-3, which is separated from the first interface ED1-3 between the first electrode ED1 and the first insulating layer 192 by a ninth distance D9, as an electric field dispersion portion. Therefore, the electric field dispersion portion of the second end portion TE2 of the second electrode ED2 may overlap the first insulating layer 192 and the first semiconductor layer 130 in a vertical direction (e.g., in the z-axis direction). In this case, the ninth distance D9 may be in the range of 1 μm to 5 μm, but the present embodiment is not limited thereto.

[0155] In addition, a first end portion of the first electrode ED1 and a second end portion of the second electrode ED2 may be arranged to face each other on the first semiconductor layer 130. A space between the first end portion of the first electrode ED1 and the second end portion of the second electrode ED2 is defined as a first opening OP1. To this end, the second electrode ED2 may be arranged to extend from an upper portion of the second semiconductor layer 140 to an upper portion of the first semiconductor layer 130 via a first insulating layer 192 formed in a side portion of the light receiving structure.

[0156] Because a high electric field at the first interface ED1 - 3 exposed to the first opening OP1 is dispersed to the edge ED2 - 3 of the second end portion TE2 , a portion of the second electrode ED2 overlapping the first insulating layer 192 and the first semiconductor layer 130 in a vertical direction may correspond to an electric field dispersion portion.

[0157] Fig. 9 is a plan view of a semiconductor device 100D according to still another embodiment, and Fig.10 It is along Fig. 9 A cross-sectional view taken along line IV-IV' shown in FIG.

[0158] Fig. 9 The semiconductor device 100D shown in FIG. 1 may have Fig.10 The different cross-sectional shapes shown in Fig.10 The semiconductor device 100D shown in FIG. Fig. 9 Different plane shapes are shown in .

[0159] To help understand, Fig. 9 Invisible layers arranged below the first electrode ED1 and the second electrode ED2 in FIG. 8 are indicated by dotted lines.

[0160] refer to Fig. 9 and Fig.10 According to still another embodiment, a semiconductor device 100D may include a substrate 110 , a buffer layer 120 , a first semiconductor layer 130 , a second semiconductor layer 140 , a third semiconductor layer 150 , first and second electrodes ED1 and ED2 , and a first insulating layer 192 .

[0161] In addition to the first and second electrodes ED1 and ED2 having different shapes, Fig. 9 and Fig.10 The semiconductor device 100D shown in FIG. Figure 7 and 8 The semiconductor device 100C shown in FIG. 1 is identical to that of FIG. 1 , so that the same reference numerals are used, redundant descriptions are omitted, and only differences are described.

[0162] That is to say, Fig. 9 and Fig.10The substrate 110, the buffer layer 120, the first semiconductor layer 130, the second semiconductor layer 140, the third semiconductor layer 150 and the first insulating layer 192 shown in FIG. 1 correspond to Figure 7 and 8 1 , a substrate 110 , a buffer layer 120 , a first semiconductor layer 130 , a second semiconductor layer 140 , a third semiconductor layer 150 , and a first insulating layer 192 are shown in the drawings so that a redundant description will be omitted.

[0163] exist Fig. 9 and Fig.10 In the semiconductor device 100D shown in FIG. 1 , the first end portion TE1 of the first electrode ED1 may include an edge ED1 - 4 spaced apart from a second interface ED2 - 4 between the second electrode ED2 and the first insulating layer 192 by a tenth distance D10 as an electric field dispersion portion.

[0164] Therefore, the electric field dispersion portion of the first end portion TE1 of the first electrode ED1 may overlap the first insulating layer 192 and the first to third semiconductor layers 130, 140 and 150 in a vertical direction (eg, z-axis direction). For example, the tenth distance D10 may be in the range of 1 μm to 5 μm, but the embodiment is not limited thereto.

[0165] In addition, the first end TE1 of the first electrode ED1 and the second end TE1 of the second electrode ED2 may be arranged to face each other on the second semiconductor layer 140. A space between the first end TE1 of the first electrode ED1 and the second end ED2 is defined as a second opening OP2. To this end, the first electrode ED1 may be arranged to extend from an upper portion of the first semiconductor layer 130 to an upper portion of the second semiconductor layer 140 via a first insulating layer 192 formed in a side portion of the light receiving structure.

[0166] Because a high electric field at the second interface ED2 - 4 exposed to the second opening OP2 is dispersed to the edge ED1 - 4 of the first end portion TE1, a portion of the first electrode ED1 overlapping the first insulating layer 192 and the first to third semiconductor layers 130 , 140 and 150 in a vertical direction may correspond to an electric field dispersion portion.

[0167] Can see, in Figures 1 to 6 In the semiconductor devices 100A and 100B shown in FIG. 1 , when each of the first electrode ED1 and the second electrode ED2 includes an ohmic layer and a metal layer, at least one of the first ohmic layers 160A and 160B or the second ohmic layers 170A and 170B may include an electric field dispersion portion. Figures 7 to 10 In the semiconductor devices 100C and 100D shown in FIG. 1 , the metal layers 180C and 180D may have an electric field dispersion portion.

[0168] The semiconductor devices 100A, 100B, 100C, and 100D according to the above-described embodiments may be formed in a back-side type device in which light is incident toward the substrate 110 or in a front-side type device in which light is incident toward the first and second electrodes ED1 and ED2, but the embodiments are not limited to the direction in which light is incident.

[0169] In addition, unlike the light emitting device operated with a forward bias voltage, when the semiconductor devices 100A, 100B, 100C, and 100D according to the above-described embodiments are light receiving devices, the semiconductor devices 100A, 100B, 100C, and 100D can be operated with a reverse bias voltage or a zero bias state. That is, when a reverse bias voltage is applied (or in a zero bias state), light absorbed in the depletion region of each semiconductor device 100A, 100B, 100C, and 100D is converted into electrical energy, so that the light can be detected.

[0170] Hereinafter, semiconductor devices 100A, 100B, 100C, and 100D having the above-described configuration according to the embodiment and a semiconductor device according to a comparative example will be described below with reference to the accompanying drawings.

[0171] Fig.11 is a plan view of a semiconductor device according to a comparative example, and Fig.12 It is along Fig.11 0 is a cross-sectional view of the semiconductor device taken along line VV′ shown in FIG.

[0172] according to Fig.11 and Fig.12 The semiconductor device of the comparative example shown in may include a substrate 10 , a buffer layer 20 , a first semiconductor layer 30 , a second semiconductor layer 40 , a third semiconductor layer 50 , first and second electrodes ED1 and ED2 , and a first insulating layer 92 .

[0173] Different from Fig. 9 and Fig.10 The first and second electrodes ED1 and ED2 of the semiconductor device 100D according to the embodiment shown in FIG. 1 include a first metal layer 182D and a second metal layer 184D, Fig.11 and 12 The first and second electrodes ED1 and ED2 of the semiconductor device according to the comparative example shown in FIG. 1 do not include any metal layer. Fig.11 and Fig.12 In the semiconductor device of the comparative example shown in , each of the first and second electrodes ED1 and ED2 includes only an ohmic layer. In addition to the above description, Fig.11 and Fig.12The semiconductor device according to the comparative example shown in Fig. 9 and 10 The semiconductor device 100D of the embodiment shown in FIG. 1 is the same as that of FIG. 1 , so that redundant description will be omitted. That is, Fig.11 and Fig.12 The substrate 10, the buffer layer 20, the first semiconductor layer 30, the second semiconductor layer 40, the third semiconductor layer 50, the first electrode ED1 and the second electrode ED2, and the first insulating layer 92 shown in FIG. Fig. 9 and Fig.10 1 , a substrate 110, a buffer layer 120, a first semiconductor layer 130, a second semiconductor layer 140, a third semiconductor layer 150, first and second ohmic layers 160D and 170D, and a first insulating layer 192 are shown. In addition, the second-first-second-second semiconductor layers 42 and 44 may correspond to the second-first-second-second semiconductor layers 142 and 144, respectively.

[0174] Fig.13a and 13b yes Fig.11 A photograph of an actual light emitting device according to a comparative example is shown in FIG.

[0175] refer to Fig.12 , it can be seen that the electric fields E1 and E2 are very high at positions y1 and y4 where the portion P1 of the edge of the first ohmic layer ED1 is located and at positions y2 and y3 where the portion P2 of the edge of the second ohmic layer ED2 is located. As described above, since it is difficult to form the first insulating layer 92 having a sufficient thickness due to the deterioration of the film quality of the first insulating layer 92 in the case of a high electric field, as Fig.13a or Fig.13b As shown in FIG. 1 , the first insulating layer 92 such as SiO2 may be damaged at the edges A and B of the second ohmic layer ED2. As described above, even when the level of the applied voltage is low, such a phenomenon that the device is damaged at the edges A and B may be caused.

[0176] On the other hand, Figure 1 and Figure 2 In the semiconductor device 100A shown in FIG. 1 , at least one first or second cavity H1 or H2 and at least one second-first or second-second insulating layer 194 and 196 are formed on at least one of the first end and the second end as an electric field dispersion portion, so that Figure 2 As shown in Fig.12The electric fields E1 and E2 at the positions y1, y2, y3, and y4 shown in FIG. 1 can be dispersed to one surface H11 and H21 and the other surface H12 and H22 of the first and second cavities H1 and H2. As described above, when the electric fields E1 and E2 are dispersed, the electric fields at the corresponding positions y1, y2, y3, and y4 can be reduced to a lower electric field E3. In this case, according to Figure 1 and Figure 2 In the semiconductor device 100A of the embodiment shown in FIG. Figure 3 When more cavities HX1, HX2 and HX3 are formed on at least one of the first or second ends of the first or second electrode ED1 or ED2 as shown in Figure 3 As shown, the electric field dispersion effect can be further enhanced.

[0177] In addition, Figure 4 and Figure 5 In the semiconductor device 100B shown in FIG. 1 , at least one protrusion PR1 or PR2 is formed on at least one of the first end and the second end as an electric field dispersion portion, so that Figure 5 As shown in Fig.12 The electric fields E1 and E2 at the positions y1, y2, y3, and y4 shown in FIG. 1 can be dispersed to one surface PR11 and PR21 and the other surface PR12 and PR22 of the first and second protrusions PR1 and PR2. As described above, when the electric fields E1 and E2 are dispersed, the electric fields at the corresponding positions y1, y2, y3, and y4 can be reduced to a lower electric field E4. In this case, according to Figure 4 and Figure 5 In the semiconductor device 100B of the embodiment shown in FIG. Figure 6 When more protrusions PRX1 , PRX2 , and PRX3 are formed on at least one of the first or second end portions of the first or second electrode ED1 or ED2 shown in FIG. 5 , the electric field dispersion effect may be further enhanced.

[0178] In addition, Figure 7 and Figure 8 In the semiconductor device 100C shown in FIG. 1 , the edge ED2 - 3 of the second end portion TE2 of the second electrode ED2 serves as an electric field dispersion portion on the first semiconductor layer 130 and the first insulating layer 192, so that Figure 8 As shown in Fig.12 The electric fields E1 and E2 at the positions y1, y2, y3 and y4 shown in FIG. 3 can be dispersed to the edge ED2-3 of the second electrode ED2. As described above, when the electric fields E1 and E2 are dispersed, the electric fields at the corresponding positions y1, y2, y3 and y4 can be reduced to a lower electric field E5.

[0179] In addition, Fig. 9 and Fig.10In the semiconductor device 100D shown in FIG. 1 , the edge ED1 - 4 of the first end portion TE1 of the first electrode ED1 serves as an electric field dispersion portion on the first to third semiconductor layers 130 , 140 and 150 and the first insulating layer 192 , so that Fig.10 As shown in Fig.12 The electric fields E1 and E2 at the positions y1, y2, y3 and y4 shown in FIG. 1 can be dispersed to the edges ED1-4 of the first electrode ED1. As described above, when the electric fields E1 and E2 are dispersed, the electric fields at the corresponding positions y1, y2, y3 and y4 can be reduced to a lower electric field E6.

[0180] In addition, Figures 7 to 10 In the semiconductor devices 100C and 100D shown in FIG. 1 , because the electric fields at the positions y1 , y2 , y3 , and y4 are relatively large, the first insulating layer 192 may have a breakdown voltage capable of withstanding such large electric fields.

[0181] Therefore, the electric fields E3, E4, E5, and E6 at the positions y1, y2, y3, and y4 of each of the semiconductor devices 100A, 100B, 100C, and 100D according to the embodiment are significantly lower than Fig.12 The electric fields E1 and E2 in the Fig.13a or Fig.13b The damage to the equipment shown in can be prevented in advance.

[0182] As described above, the semiconductor devices 100A to 100D according to the embodiments can disperse and reduce a high electric field by providing the electric field dispersion portion on at least one of the first end portion of the first electrode ED1 or the second end portion of the second electrode ED2 .

[0183] Although the present invention has been mainly described with reference to exemplary embodiments, it should be understood that the present invention is not limited to the disclosed exemplary embodiments, and that various modifications and applications can be devised by those skilled in the art to which the present invention belongs without departing from the gist of the present invention. For example, each component specifically shown in the exemplary embodiments can be modified and implemented. It should be understood that the differences associated with these modifications and applications will fall within the scope of the present invention as defined by the appended claims.

Claims

1. A semiconductor device, comprising: substrate; a first semiconductor layer and a second semiconductor layer, the first semiconductor layer and the second semiconductor layer being arranged on the substrate and having different conductivity types; a third semiconductor layer, the third semiconductor layer being arranged between the first semiconductor layer and the second semiconductor layer; a first electrode disposed on the first semiconductor layer and electrically connected to the first semiconductor layer; a second electrode disposed on the second semiconductor layer and electrically connected to the second semiconductor layer; as well as a first insulating layer disposed on the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer exposed between the first electrode and the second electrode, wherein at least one of a first end portion close to the second electrode among the two ends of the first electrode and a second end portion close to the first electrode of the second electrode has an electric field dispersion portion, and Wherein, the first end portion and the second end portion are arranged opposite to each other.

2. The semiconductor device according to claim 1, wherein: The electric field dispersion portion includes at least one protrusion protruding toward the first semiconductor layer or the second semiconductor layer.

3. The semiconductor device according to claim 2, wherein: A fifth distance from the at least one protrusion protruding toward the first semiconductor layer to an edge of the first end portion is shorter than a sixth distance from the at least one protrusion protruding toward the first semiconductor layer to a center of the first electrode; as well as A seventh distance from the at least one protrusion protruding toward the second semiconductor layer to an edge of the second end portion is shorter than an eighth distance from the at least one protrusion protruding toward the second semiconductor layer to a center of the second electrode.

4. The semiconductor device according to claim 2, wherein: The at least one protrusion comprises a plurality of protrusions; and One or more of widths or depths and separation distances of the plurality of protrusions are different from each other, and the plurality of protrusions are separated from each other by the separation distances.

5. The semiconductor device according to claim 1, wherein: The electric field dispersion portion included in the second end portion has an edge spaced apart from a first interface between the first electrode and the first insulating layer by a ninth distance and overlaps the first insulating layer and the first semiconductor layer in a vertical direction.

6. The semiconductor device according to claim 5, wherein: The first end portion and the second end portion are arranged to face each other on the first semiconductor layer.

7. The semiconductor device according to claim 1, wherein: The electric field dispersion portion included in the first end portion has an edge spaced apart from a second interface between the first insulating layer and the second electrode by a tenth distance and overlaps the first insulating layer and the first to third semiconductor layers in a vertical direction.

8. The semiconductor device according to claim 7, wherein: The first end portion and the second end portion are arranged to face each other on the second semiconductor layer. 9 . The semiconductor device according to claim 1 , the electric field dispersion portion comprises the at least one cavity in contact with the first semiconductor layer or the second semiconductor layer.

10. The semiconductor device according to claim 1, wherein The first insulating layer includes a first insulating portion disposed on the first semiconductor layer, a second insulating portion disposed on the second semiconductor layer, and a third insulating portion at sides of the first to third semiconductor layers disposed between the first insulating portion and the second insulating portion.

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