Semiconductor processes and semiconductor structures

Abstract

The application provides a semiconductor process and a semiconductor structure. The semiconductor process comprises: providing a substrate, the substrate comprising a substrate and a stack structure which are stacked in sequence, wherein the stack structure comprises a body structure and a recess in the body structure, the body structure comprising alternatingly arranged insulating medium layers and sacrificial layers, and the recess is formed by a step region; forming a medium material on an exposed surface of the substrate, and the remaining recess forms a sub-recess; removing at least part of the medium material on both sides of the sub-recess; filling the sub-recess with the medium material until the sub-recess is filled; and removing part of the medium material to expose a surface of the body structure. The semiconductor process fills the recess through two deposition steps, ensures good filling effect of the recess, and avoids the problems of holes and gaps in the prior art due to the large step height of the recess when filling the recess.

Description

Technical Field

[0001] This application relates to the field of semiconductors, and more specifically, to a semiconductor process and semiconductor structure. Background Technology

[0002] In existing technologies, the main function of flash memory is to retain stored information for a long time without power. It has advantages such as high integration, fast access speed, and ease of erasure and rewriting, and is therefore widely used in electronic products. In order to further improve the bit density of flash memory and reduce bit cost, 3D NAND memory has been proposed.

[0003] In current 3D NAND memories, a stacked 3D NAND memory structure is typically achieved by vertically stacking multiple layers of data storage cells. To obtain this stacked 3D NAND memory structure, a stacked structure needs to be formed on a substrate 100, and a stepped region needs to be etched into the stacked structure, forming a groove. Then, a silicon dioxide layer is deposited on the etched surface of the stacked structure, such as... Figure 1 As shown; next, photolithography is performed to reduce the width W of the silicon dioxide, facilitating subsequent polishing; finally, polishing is required to remove the silicon dioxide from the surface of the stacked structure, leaving only the silicon dioxide in the grooves. Due to the high step height of the grooves, it is easy to generate pores and gaps when filling the grooves with silicon dioxide.

[0004] Furthermore, after photolithography, as... Figure 2 As shown, the widths of the multiple silica layers on the surface of the stacked structure, such as W1, W2, W3, and W4, are inconsistent. During chemical mechanical polishing, some areas of the stacked structure surface may be exposed, while other areas may still have silica residue. This can lead to over-polishing of some areas of the stacked structure.

[0005] The information disclosed above in the background section is only intended to enhance the understanding of the background art of the art described herein. Therefore, the background art may contain certain information that does not constitute prior art known to those skilled in the art in this country. Summary of the Invention

[0006] The main objective of this application is to provide a semiconductor process and semiconductor structure to solve the problem of poor groove formation effect in filling stepped regions in the prior art.

[0007] To achieve the above objectives, according to one aspect of this application, a semiconductor process is provided, comprising: providing a substrate, the substrate including sequentially stacked substrates and a stacked structure, wherein the stacked structure includes a body structure and a recess located in the body structure, the body structure including alternately disposed insulating dielectric layers and sacrificial layers, the recess being formed by stepped regions; forming a dielectric material on an exposed surface of the substrate, the remaining recess forming a sub-recess; removing at least a portion of the dielectric material on both sides of the sub-recess; filling the sub-recess with the dielectric material until the sub-recess is filled; and removing a portion of the dielectric material to expose the surface of the body structure.

[0008] Further, removing at least a portion of the dielectric material on both sides of the sub-groove includes: forming a sacrificial material on the exposed surface of the dielectric material, the sacrificial material filling the sub-groove; removing the sacrificial material and at least a portion of the dielectric material on a predetermined plane, the predetermined plane being the plane containing the surface of the body structure away from the substrate; and removing the sacrificial material located in the sub-groove.

[0009] Further, removing the sacrificial material and at least a portion of the dielectric material on the predetermined plane includes: removing a portion of the sacrificial material on the predetermined plane, thereby exposing the dielectric material on the predetermined plane; and removing the remaining sacrificial material and dielectric material on the predetermined plane.

[0010] Further, removing a portion of the sacrificial material on the predetermined plane to expose the dielectric material on the predetermined plane includes: chemically and mechanically polishing the substrate on which the sacrificial material is formed to expose the dielectric material on the predetermined plane.

[0011] Further, removing the remaining sacrificial material and dielectric material on the predetermined plane includes: etching the predetermined plane using anisotropic etching to remove the dielectric material and the remaining sacrificial material.

[0012] Further, providing a substrate includes: providing the substrate; forming a pre-stacked structure on the substrate, the pre-stacked structure including alternating insulating dielectric layers and sacrificial layers; and forming the groove extending through the substrate in the pre-stacked structure.

[0013] Further, removing a portion of the dielectric material to expose the surface of the body structure includes: chemically and mechanically polishing the substrate on which the dielectric material is formed to expose the surface of the body structure.

[0014] Furthermore, the dielectric material includes silicon dioxide, and the sacrificial material is photoresist.

[0015] To achieve the above objectives, according to another aspect of this application, a semiconductor structure is provided, which is fabricated using any of the semiconductor processes described herein.

[0016] Applying the technical solution of this application, the method first forms a dielectric material on the exposed surface of the substrate, filling part of the groove, and the remaining groove forms a sub-groove. Then, at least a portion of the dielectric material on both sides of the sub-groove is removed; that is, the dielectric material on both sides of the sub-groove can be completely removed, exposing the surface of the main structure, or a portion of the dielectric material on both sides of the sub-groove can be removed. Next, the dielectric material is continued to be filled into the sub-groove to fill it completely. Finally, a portion of the dielectric material is removed, exposing the surface of the main structure, meaning only the dielectric material in the groove is retained. The semiconductor process of this application fills the groove through two deposition steps, ensuring a good filling effect and avoiding the problems of holes and gaps easily generated during groove filling due to the large step height of the groove in the prior art. Furthermore, the semiconductor process of this application removes at least a portion of the dielectric material after the first deposition, and then deposits the dielectric material a second time to fill the groove. This results in a smaller thickness of the dielectric material on the surface of the main structure, thus ensuring a good effect in the final removal of the dielectric material on the surface of the main structure and avoiding the problem of over-polishing and damage to the main structure in the prior art. Attached Figure Description

[0017] The accompanying drawings, which form part of this application, are used to provide a further understanding of this application. The illustrative embodiments and descriptions of this application are used to explain this application and do not constitute an undue limitation of this application. In the drawings:

[0018] Figure 1 This diagram illustrates a prior art structure for filling grooves formed in stepped areas.

[0019] Figure 2 This illustrates the prior art regarding Figure 1 A schematic diagram of the structure obtained by photolithography of the shown structure;

[0020] Figure 3 A schematic diagram of the process generated according to the semiconductor process of this application is shown;

[0021] Figures 4 to 12 A schematic diagram of the structure formed after different process steps according to the semiconductor process of this application is shown.

[0022] The accompanying drawings include the following reference numerals:

[0023] 100. Substrate; 101. Groove; 102. Insulating dielectric layer; 103. Sacrificial layer; 104. Dielectric material; 105. Sub-groove; 106. Sacrificial material; 107. Predetermined plane. Detailed Implementation

[0024] It should be noted that the following detailed descriptions are illustrative and intended to provide further explanation of this application. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains.

[0025] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0026] It should be understood that when an element (such as a layer, film, region, or substrate) is described as being "on" another element, the element may be directly on the other element, or there may be an intermediate element present. Furthermore, in the specification and claims, when an element is described as being "connected" to another element, the element may be "directly connected" to the other element, or "connected" to the other element via a third element.

[0027] As described in the background section, the grooves formed by filling the stepped areas in the prior art have poor effects. In order to solve the above-mentioned technical problems, this application proposes a semiconductor process and semiconductor structure.

[0028] In one typical embodiment of this application, a semiconductor process is provided, such as... Figure 3 As shown, the semiconductor process includes:

[0029] Step S101, provide a substrate, such as Figure 4 As shown, the substrate includes a substrate 100 and a stacked structure stacked sequentially, wherein the stacked structure includes a body structure and a groove 101 located in the body structure, the body structure includes an insulating dielectric layer 102 and a sacrificial layer 103 alternately arranged, and the groove 101 is formed by a stepped region.

[0030] In step S102, a dielectric material 104 is formed on the exposed surface of the substrate, and the remaining grooves are formed into sub-grooves 105, resulting in... Figure 5 The structure shown;

[0031] Step S103: At least a portion of the aforementioned medium material 104 on both sides of the aforementioned sub-groove 105 is removed to obtain the following... Figure 10 The structure shown;

[0032] Step S104, as follows Figure 11 As shown, the above-mentioned medium material 104 is filled into the above-mentioned sub-groove 105 until the above-mentioned sub-groove 105 is filled;

[0033] Step S105, as follows Figure 12 As shown, a portion of the aforementioned medium material 104 is removed, exposing the surface of the aforementioned body structure.

[0034] In the aforementioned semiconductor process, a dielectric material is first formed on the exposed surface of the substrate to fill part of the aforementioned grooves. The remaining grooves form sub-grooves. Then, at least a portion of the dielectric material on both sides of the sub-grooves is removed. This can be done by completely removing the dielectric material on both sides of the sub-grooves, exposing the surface of the main structure, or by removing a portion of the dielectric material on both sides of the sub-grooves. Next, the dielectric material is continued to be filled into the sub-grooves to fill them completely. Finally, a portion of the dielectric material is removed, exposing the surface of the main structure, meaning only the dielectric material in the grooves is retained. The semiconductor process of this application fills the grooves through two deposition steps, ensuring a better filling effect and avoiding the problems of voids and gaps easily generated during groove filling due to the large step height of the grooves in the prior art. Furthermore, in the semiconductor process of this application, after the first deposition of the dielectric material, at least a portion of the dielectric material is removed, and then a second deposition of the dielectric material fills the grooves. This results in a smaller thickness of the dielectric material on the surface of the main structure, ensuring a better effect in the final removal of the dielectric material from the surface of the main structure and avoiding the problem of over-polishing and damage to the main structure in the prior art.

[0035] According to a specific embodiment of this application, at least a portion of the aforementioned medium material on both sides of the sub-groove is removed, including: such as Figure 6 As shown, a sacrificial material 106 is formed on the exposed surface of the dielectric material 104, and the sacrificial material 106 fills the sub-groove; the sacrificial material 106 and at least a portion of the dielectric material 104 are removed from a predetermined plane 107, where the predetermined plane 107 is the plane containing the surface of the body structure away from the substrate 100, resulting in the following... Figure 9 The structure shown; as Figure 10As shown, the sacrificial material 106 located in the aforementioned sub-groove is removed. This ensures that the thickness of the remaining medium material on the surface of the main body structure is small, thereby further ensuring that the degree of medium material removal on the main body structure is easier to control in the subsequent process, further ensuring a better removal effect of the subsequent medium material, and further avoiding the problem of excessive polishing damaging the main body structure.

[0036] In another specific embodiment of this application, removing the sacrificial material and at least a portion of the dielectric material on the predetermined plane includes: as follows Figure 6 , Figure 7 as well as Figure 8 As shown, a portion of the sacrificial material 106 on the predetermined plane 107 is removed, exposing the dielectric material 104 on the predetermined plane 107, resulting in the following: Figure 8 The structure shown; remove the remaining sacrificial material 106 and the medium material 104 on the predetermined plane 107, so that the surface of the main body structure is exposed.

[0037] Of course, after removing a portion of the sacrificial material on the predetermined plane to expose the dielectric material on the predetermined plane, it is also possible to remove only a portion of the remaining sacrificial material and a portion of the dielectric material on the predetermined plane, so that the surface of the main structure is not exposed, resulting in... Figure 9 The structure shown.

[0038] To further ensure a better removal effect of the sacrificial material on the predetermined plane, according to another specific embodiment of this application, removing a portion of the sacrificial material on the predetermined plane to expose the dielectric material on the predetermined plane includes: performing chemical mechanical polishing on the substrate on which the sacrificial material is formed to expose the dielectric material on the predetermined plane.

[0039] To further ensure a good removal effect of the dielectric material on the predetermined plane, the remaining sacrificial material and dielectric material on the predetermined plane are removed, including: etching the predetermined plane using anisotropic etching to remove the dielectric material and the remaining sacrificial material. Specifically, anisotropic etching can be used to remove all the dielectric material on the predetermined plane, or anisotropic etching can be used to remove a portion of the dielectric material. To further ensure that the thickness of the dielectric material on the body structure is small after filling the groove, thereby further ensuring that the degree of dielectric material removal on the body structure can be more easily controlled, those skilled in the art can remove all the dielectric material on the predetermined plane in this step.

[0040] During the process of chemically and mechanically polishing the substrate on which the sacrificial material is formed, removing a portion of the sacrificial material to expose the dielectric material on the predetermined plane, a portion of the sacrificial material 106 in the sub-groove is also removed. The surface of the remaining sacrificial material 106 is lower than the surface of the dielectric material 104 on the predetermined plane 107. Figure 8 As shown.

[0041] According to another specific embodiment of this application, removing a portion of the aforementioned dielectric material to expose the surface of the aforementioned body structure includes: performing chemical mechanical polishing on the substrate on which the dielectric material is formed, thereby exposing the surface of the aforementioned body structure. This allows for a relatively simple and quick removal of the dielectric material from the surface of the aforementioned body structure. Furthermore, since the thickness of the dielectric material on the surface of the aforementioned body structure is small after the second deposition, it is not necessary to perform photolithography followed by chemical mechanical polishing on the dielectric material; only a single chemical mechanical polishing step is required to remove the dielectric material, thus further ensuring a simpler semiconductor manufacturing process.

[0042] In practical applications, providing a substrate includes: providing the aforementioned substrate 100; forming a preliminary stacked structure on the substrate, the preliminary stacked structure including alternately arranged insulating dielectric layers 102 and sacrificial layers 103; and forming the aforementioned groove 101 penetrating into the substrate in the preliminary stacked structure, such as... Figure 4 As shown.

[0043] The substrates described above in this application can be selected according to the actual needs of the device, and may include silicon substrates, germanium substrates, silicon-germanium composites, SOI substrates, or GOI substrates, etc.

[0044] The stacked structure described in this application can be formed by a single stacking and etching, or by multiple stackings and etchings. In a specific embodiment of this application, the stacked structure is formed by multiple stackings and etchings. Specifically, forming a pre-stacked structure on a substrate includes: sequentially forming multiple sub-stacked structures on the substrate, each sub-stacked structure including an alternately arranged insulating dielectric layer and a sacrificial layer; the multiple sub-stacked structures form the pre-stacked structure; and forming a groove penetrating to the substrate in the pre-stacked structure includes: forming a sub-step region in the sub-stacked structure, the sub-step regions in two adjacent sub-stacked structures being connected, the multiple sub-step regions forming the step region, and the step region forming the groove.

[0045] These structural layers can be formed by one or more of molecular beam epitaxy (MBE), metal-organic chemical vapor deposition (MOCVD), metal-organic vapor phase epitaxy (MOVPE), hydride vapor phase epitaxy (HVPE) and / or other known crystal growth processes.

[0046] According to one specific embodiment of this application, the dielectric material comprises silicon dioxide, and the sacrificial material is photoresist. In a more specific embodiment, the dielectric material is silicon dioxide.

[0047] In another typical embodiment of this application, a semiconductor structure is provided, which is fabricated using any of the above-described semiconductor processes.

[0048] The aforementioned semiconductor structure is fabricated using any of the aforementioned semiconductor processes. These processes involve two deposition steps to fill the grooves, ensuring a good filling effect and avoiding the problems of voids and gaps that easily occur during groove filling due to the large step height in existing technologies. This ensures better performance of the semiconductor structure. Furthermore, in the semiconductor process of this application, after the first deposition of the dielectric material, at least a portion of the dielectric material is removed before the second deposition fills the grooves. This results in a smaller thickness of the dielectric material on the surface of the main structure, ensuring a better final removal effect of the dielectric material from the main structure surface. This avoids the problem of over-polishing and damage to the main structure in existing technologies, ensuring a high production yield for the aforementioned semiconductor structure.

[0049] It should be noted that the semiconductor structure in this application can be a memory or a storage cell of a memory.

[0050] As can be seen from the above description, the embodiments of this application achieve the following technical effects:

[0051] 1) In the semiconductor process described above in this application, a dielectric material is first formed on the exposed surface of the substrate to fill part of the aforementioned grooves. The remaining grooves form sub-grooves. Then, at least a portion of the dielectric material on both sides of the sub-grooves is removed. This means either completely removing the dielectric material on both sides of the sub-grooves to expose the surface of the main structure, or partially removing the dielectric material on both sides of the sub-grooves. Next, the dielectric material is continued to be filled into the sub-grooves to completely fill them. Finally, a portion of the dielectric material is removed to expose the surface of the main structure, meaning only the dielectric material in the grooves is retained. The semiconductor process described in this application fills the grooves through two deposition steps, ensuring a better filling effect and avoiding the problems of voids and gaps that easily occur when filling grooves due to the large step height of the grooves in the prior art. Furthermore, in the semiconductor process described in this application, after the first deposition of the dielectric material, at least a portion of the dielectric material is removed, and the dielectric material is subsequently deposited a second time to fill the groove. This results in a smaller thickness of the dielectric material on the surface of the main body structure, thereby ensuring a better effect in the final removal of the dielectric material from the surface of the main body structure and avoiding the problem of excessive polishing and damage to the main body structure in the prior art.

[0052] 2) The semiconductor structure described in this application is fabricated using any of the aforementioned semiconductor processes. These processes involve two deposition steps to fill the grooves, ensuring a good filling effect and avoiding the problems of voids and gaps that easily occur when filling grooves due to the large step height in the prior art. This ensures better performance of the semiconductor structure. Furthermore, in this application's semiconductor process, after the first deposition of the dielectric material, at least a portion of the dielectric material is removed before the second deposition fills the grooves. This results in a smaller thickness of the dielectric material on the surface of the main structure, ensuring a better final removal effect and avoiding the problem of over-polishing and damage to the main structure in the prior art. This ensures a high production yield for the semiconductor structure.

[0053] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A semiconductor process, characterized in that, include: A substrate is provided, the substrate comprising sequentially stacked substrates and a stacked structure, wherein the stacked structure includes a body structure and a groove located in the body structure, the body structure including alternating insulating dielectric layers and sacrificial layers, and the groove being formed by stepped regions; A dielectric material is formed on the exposed surface of the substrate, and the remaining grooves form sub-grooves; At least a portion of the medium material on both sides of the sub-groove is removed; The medium material is filled into the sub-groove until the sub-groove is completely filled; Remove a portion of the medium material to expose the surface of the body structure; At least a portion of the medium material on both sides of the sub-groove is removed, including: A sacrificial material is formed on the exposed surface of the medium material, and the sacrificial material fills the sub-groove. Remove the sacrificial material and at least a portion of the dielectric material from a predetermined plane, wherein the predetermined plane is the plane containing the surface of the body structure that is away from the substrate; Remove the sacrificial material located in the sub-groove; Removing the sacrificial material and at least a portion of the dielectric material from the predetermined plane includes: Remove a portion of the sacrificial material from the predetermined plane, exposing the dielectric material on the predetermined plane; Remove the remaining sacrificial material and the medium material on the predetermined plane.

2. The semiconductor process according to claim 1, characterized in that, Removing a portion of the sacrificial material from the predetermined plane to expose the dielectric material on the predetermined plane includes: The substrate on which the sacrificial material is formed is subjected to chemical mechanical polishing to expose the dielectric material on the predetermined plane.

3. The semiconductor process according to claim 1, characterized in that, Removing the remaining sacrificial material and the dielectric material on the predetermined plane includes: The predetermined plane is etched using anisotropic etching to remove the dielectric material and the remaining sacrificial material.

4. The semiconductor process according to claim 1, characterized in that, Provide a substrate, including: Provide the substrate; A pre-stacked structure is formed on the substrate, the pre-stacked structure comprising alternating insulating dielectric layers and sacrificial layers; The groove is formed in the pre-stacked structure, extending through the substrate.

5. The semiconductor process according to claim 1, characterized in that, Removing a portion of the dielectric material to expose the surface of the body structure includes: The substrate on which the medium material is formed is subjected to chemical mechanical polishing to expose the surface of the bulk structure.

6. The semiconductor process according to any one of claims 1 to 3, characterized in that, The dielectric material includes silicon dioxide, and the sacrificial material is photoresist.

7. A semiconductor structure, characterized in that, The semiconductor structure is fabricated using the semiconductor process described in any one of claims 1 to 6.

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