Effective digital gain implementation in digital microphones

Abstract

Embodiments of the present disclosure relate to effective digital gain implementation in a digital microphone. A system includes an analog-to-digital converter (ADC) and a digital modulator coupled with the ADC, where the digital modulator includes an output for providing a digital signal, where the digital modulator includes a main signal path and a feedback path, and where the feedback path includes a first digital gain stage having a first adjustable gain range.

Description

Technical Field

[0001] This invention generally relates to effective digital gain implementation in digital microphones, and in specific embodiments, to corresponding systems, circuits, and methods. Background Technology

[0002] Microphones are used to convert ambient noise or sound into electrical signals. Telecommunications applications typically use small microphones. An example of a small microphone is a silicon microphone or a microphone implemented as a microelectromechanical system (MEMS) device. If the MEMS device is a microphone used in conjunction with other digital components, the entire system or assembly of components can be referred to as a "digital microphone." To provide good recorded sound quality or meet customer requirements, high linearity, high signal-to-noise ratio (SNR), or a predetermined spectral mask that matches the microphone's response may be required. Other requirements may also exist, such as providing multiple gain operating modes. While existing solutions can adequately meet customer requirements and provide good performance, some applications may be sensitive to the power consumption and integrated circuit area of ​​a digital microphone. For example, some consumer device applications may be cost-sensitive, and therefore these applications will be sensitive to the power consumption and integrated circuit area of ​​the digital microphone. Therefore, the ability to provide digital microphones with reduced power consumption and integrated circuit area while maintaining high levels of performance and meeting all customer requirements is desirable. Summary of the Invention

[0003] According to one embodiment of the present invention, the system includes an analog-to-digital converter (ADC); and a digital modulator coupled to the ADC, wherein the digital modulator includes an output for providing a digital signal, wherein the digital modulator includes a main signal path and a feedback path, and wherein the feedback path includes a first digital gain stage having a first adjustable gain range.

[0004] In another embodiment, the circuit includes an analog-to-digital converter (ADC); and a digital modulator coupled to the ADC, wherein the digital modulator includes a main signal path and a feedback path, wherein the feedback path includes a first digital gain stage, and wherein the ADC and the digital modulator are disposed in a common substrate of a single integrated circuit.

[0005] In another embodiment, the method includes converting an analog signal into a digital signal; and using a digital modulator to modulate the digital signal, wherein the digital modulator includes a main signal path and a feedback path, and wherein the feedback path includes a digital gain stage having a first adjustable gain range. Attached Figure Description

[0006] To gain a more complete understanding of the invention and its advantages, reference is now made to the following description in conjunction with the accompanying drawings, wherein:

[0007] Figure 1This is a block diagram of an exemplary digital microphone, which includes a detailed block diagram of the digital modulator used in the digital microphone;

[0008] Figure 2 According to one embodiment, a digital microphone performs digital gain adjustment by changing the feedback level in a digital modulator;

[0009] Figure 3 It is a digital microphone that performs digital gain adjustment (including changing the combination of feedback levels in a digital modulator and including a digital gain block) for an extended gain range according to one embodiment;

[0010] Figure 4 It is a digital microphone that performs digital gain adjustment (including changing the combination of changing the feedback level in the feedback path and changing the gain level of the main path of the digital modulator) for an extended gain range.

[0011] Figure 5 It shows Figure 3 A block diagram of a digital microphone, where the feedback gain block has been implemented using a lookup table;

[0012] Figure 6 A block diagram of one embodiment of a method is shown, including multiple optional method steps;

[0013] Figure 7 A digital microphone system according to one embodiment is shown, the digital microphone system including a processor and a clock generator; and

[0014] Figure 8 A block diagram of a processing system according to an embodiment of the present invention is shown. Detailed Implementation

[0015] exist Figure 1The diagram illustrates a block diagram of an exemplary digital microphone 100A. The digital microphone 100A includes a MEMS device 102 and an application-specific integrated circuit (ASIC) 104. In one embodiment, the MEMS device 102 may include a microphone that converts an external audio signal into an analog output signal and is received by the ASIC 104. The ASIC 104 includes an analog-to-digital converter (ADC) 106 coupled to the MEMS device 106, a digital filter 108 coupled to the ADC 106, a digital gain block 110 coupled to the digital filter 108, and a digital modulator 112 coupled to the digital gain block 110. In one example, the digital modulator 112A provides a one-bit digital output at output 114. The digital microphone 100A also includes a clock input for receiving a clock (clk) signal, which may be assigned to one or more components, including the ADC 106, the digital filter 108, the digital gain block 110, and / or the digital modulator 112A.

[0016] In operation, ASIC 104 reads the analog signal output of MEMS device 102, provides analog-to-digital conversion via ADC 106, and further processes the digital signal from ADC 106 using additional processing modules including digital filter 108, digital gain block 110, and digital modulator 112A. Digital modulator 112A provides a single-bit data stream output based on the amplitude of the input signal, which may be requested by the customer. Digital filter 108 includes, for example, DC voltage removal and low-pass filtering. Digital gain block 110 may include multiple digital gain settings to meet different customer needs. Examples include a gain mode for calibration of digital microphone 100A and other gain modes for specific operating modes or for reasons of flexibility in the operation of digital microphone 100A.

[0017] The digital gain in digital gain block 110 is typically implemented using shift and adder structures to avoid the use of fully digital multipliers (which are inefficient in terms of area and power consumption, thus increasing the cost of the digital microphone 100A). However, fully digital multipliers can be used in certain situations. Many digital microphones require several different digital gains (gains for sensitivity calibration, gains for adjusting the acoustic overload point (AOL) level in different modes, etc.). However, the complexity of a particular digital gain depends on the specific gain value used. For example, a -1dB digital gain (0.8906 as a linear value) is implemented by adding fractions 1 / 2 + 1 / 4 + 1 / 8 + 1 / 64 when calculating the gain coefficient. So in this example, only one coefficient requires three adders. More complex gain coefficients may require combinations of more fractions. The calculation of multiple gain coefficients leads to a significant contribution to power consumption and area, thus increasing the corresponding cost of the digital microphone 100A.

[0018] Figure 1 A more detailed block diagram representation of digital modulator 112A is also included. Digital modulator 112A includes an adder 122 for receiving an "m"-bit input signal from digital gain block 120, a main signal path 116, and a feedback path 118 coupled between a one-bit output 114 and the negative input of adder 122. Main signal path 116 includes a loop filter 124 and a one-bit quantizer 126. In one example, loop filter 124 may include a digital low-pass filter. One-bit quantizer 126 provides a single-bit output based on the input level of the digital output signal of loop filter 124. For example, the positive half-cycle of a sine wave input to quantizer 126 will be encoded at output 114 using more instances of positive logic 1, while the negative half-cycle of a sine wave input to quantizer 126 will be encoded at output 114 using fewer instances of positive logic 1 and more instances of negative logic 1.

[0019] The digital microphone 100A provides all gain adjustment in a digital gain block 110, which may include shift and adder circuitry, or multiplication circuitry, for reasons described above that may increase the cost of the digital microphone 100A. Alternative methods for providing gain adjustment without using shift and adder circuitry, or for reducing the size of shift and adder circuitry, while reusing existing components of the digital microphone and reducing unit cost, are described in detail below.

[0020] According to one embodiment, such as Figure 2 As shown, the digital gain can be achieved by changing the feedback level of the single-bit digital modulator 112B. Figure 2 A digital microphone 100B is shown, which includes a MEMS device 102 and an ASIC 104. The ASIC 104 includes an ADC 106, a digital filter 108, a digital modulator 112B, and a clk input for receiving an external clock signal. Figure 3 A detailed block diagram of digital modulator 112B is also shown. Digital modulator 112B includes an adder 122, a main signal path 116, and a feedback path 118. The main signal path 116 includes a loop filter 124 and a quantizer 126. The feedback path 118 includes a digital gain stage 128. As previously described, digital modulator 112B includes an "m"-bit input 120 and a one-bit output 114.

[0021] Feedback path 118 includes a constant gain coefficient "k", which results in a very cost-effective implementation, and feedback path 118 can be characterized as providing a total gain 114 for digital microphone 100B between the analog input and one-bit output of ADC 106. The specific digital gain is implemented in this embodiment by storing a corresponding digital constant, which is used as a feedback signal in feedback path 118 of digital modulator 112B. As described above, the output 114 of quantizer 112B can be switched between positive logic 1 and negative logic 1. (As will be used below...) Figure 6 The lookup table implementation shown is explained in further detail as follows: In the case of a single-bit output, a constant gain coefficient "k" is applied to both the positive and negative logic 1 states. The output 114 of quantizer 112B is configured to switch between one bit in the positive direction and one bit in the negative direction. In the case of positive and negative bits at the output of quantizer 126, the constant gain coefficient "k" is applied to both the positive and negative logic states.

[0022] In one embodiment, the constant gain coefficient "k" can be implemented as a separate digital component including digital gain stage 128, or it can be implemented as will be utilized in the following Figure 5 The illustrated embodiment further details the lookup table. In other embodiments, the digital modulator 112B can be integrated into a microprocessor (in... Figure 7 and Figure 8 (Most clearly seen), and even implemented in software. Figure 2 In this embodiment, the digital gain of the digital microphone 100B is therefore provided solely by the digital gain stage 128.

[0023] exist Figure 2 In the illustrated digital microphone embodiment, the power and silicon area of ​​the integrated circuit microphone are relative to... Figure 1 The digital microphone implementation was significantly reduced.

[0024] If a wider range of digital gain adjustments is required, compared to the digital gain provided by digital gain stage 128, you can use, for example... Figure 3 The digital microphone 100C is shown. (As shown...) Figure 3As depicted, a digital gain block 110 is added to the ASIC 104. The digital microphone 100C is therefore a combination of a standard digital gain implementation (“coarse digital gains”) provided by the digital gain block 110 and a constant gain coefficient “k” (“fine digital gains” or “fine tuning”) provided by the digital gain stage 128. The coarse digital gain provided by the digital gain block 110 covers the desired large gain range (which can be implemented more efficiently), and the fine tuning is provided within a smaller gain range using the constant gain coefficient “k” provided by the digital gain stage 128. The large gain range is implemented more efficiently because fewer shift and addition structures are needed to achieve fewer individual gain levels. The fine gain is implemented using the digital gain stage 128. In one embodiment, the range of the coarse digital gain provided by the digital gain block 110 can be from 0 dB to 12 dB in 3 dB steps. In one embodiment, the fine digital gain provided by the digital gain stage 128 can range from 0 dB to 3 dB in steps of 0.2 dB. However, different ranges and steps of coarse digital gain and different ranges and steps of fine digital gain can be used in different applications.

[0025] Figure 3 Therefore, a digital microphone 100C is shown, including a MEMS device 102, an ASIC 104, and a clk input. The ASIC 104 has an ADC 106, a digital filter 108, a digital gain stage 110, and a digital modulator 112B. As previously described, the digital modulator 112B includes a loop filter 124 and a quantizer 126 in the main signal path 116, a digital gain stage 128 in the feedback path 118, an adder 122, an "m"-bit input 120, and a single-bit output 114.

[0026] Figure 4 A block diagram is shown illustrating an implementation of a digital microphone 100D that includes an additional gain stage 130 in the main signal path of a digital modulator 112C according to one embodiment. Therefore, the block diagram of the digital microphone 100D is similar to... Figure 3The block diagram of the digital microphone 100D shown is illustrated. The digital microphone 100D includes a MEMS device 102 and an ASIC 104, wherein the ASIC 104 includes an ADC 106, a digital filter 108, a modified digital modulator 112C, and a clk input. The digital modulator 112C includes a main signal path coupled between the output of an adder 122 and a one-bit output 114. The digital modulator 112C includes a feedback path coupled between the one-bit output 114 and the negative input of the adder 122. The main signal path of the digital modulator includes an additional digital gain block 130, a loop filter 124, and a quantizer 126. The additional digital gain block 130 may include a coarse gain block. The digital gain block 130 provides digital gain, which is defined as providing an output digital output word, which is a representation of the input digital word multiplied by a gain factor, rather than a constant value. The feedback path of the digital modulator 112C includes a digital gain stage 128, which also includes a digital gain coefficient "K*". The digital gain coefficient "K*" can have the same characteristics as... Figure 3 The digital gain coefficient "k" shown has different values. This is because the total gain of the digital microphone 110D is controlled by both the digital gain block 130 and the digital gain stage 128. The digital gain block 130 can include coarse gain over a wide gain range, while the digital gain stage 128 can include fine gain over a narrower gain range.

[0027] like Figure 4 The illustrated digital microphone embodiment can be saved. Figure 1 The power and silicon area of ​​the digital microphone embodiment shown are at least half that of the standard.

[0028] Figure 5A block diagram of a digital microphone 100B according to one embodiment is shown, which uses a lookup table 132 to implement a digital gain stage 128. Thus, the digital microphone includes the MEMS device 102 and ASIC 104 as previously described. However, the digital modulator 112 is implemented using the lookup table 132 set in the feedback path 118 of the digital modulator 112B. The main signal path 116 of the digital modulator 112B is the same as previously described, including a loop filter 124 and a quantizer 126. However, the feedback path 118 now includes a lookup table 132 replacing the digital gain stage 128. The lookup table includes sufficient memory to convert a one-bit output 114 into a digital gain coefficient “k”, where the one-bit output 114 is a digital “1” input word of the lookup table 132, and the digital gain coefficient “k” is an “m”-bit output word provided to the negative input of the adder 122. Lookup table 132 includes a gain selection input 134, which can be used to select between several gain modes of the digital microphone 100B. In one embodiment, the gain selection input 134 can be formed as part of a control (ctrl) input signal to the digital microphone 100B. The control input signal can also be used to control the operating modes of the ADC 106, digital filter 108, digital gain block 110, and digital modulator 112B. In an embodiment, the control input signal can be used, for example, to control the accuracy of the ADC 106, change the filter coefficients of the digital filter 108, or change the gain mode of the coarse digital gain block 110. The control input signal can be in Figure 5 A digital bus comprising one or more digital bits is controlled by a microprocessor (not shown). In an embodiment, the microprocessor may be integrated with the digital microphone 100B and / or other components, or it may be external to the digital microphone 100B.

[0029] Figure 6This is a block diagram of an embodiment method 600 for operating a digital microphone or digital microphone system, including method steps 602, 604, and 606. Method 600 includes method step 602 for converting an analog signal into a digital signal; method step 604 for modulating the digital signal using a digital modulator, wherein the digital modulator includes a main signal path and a feedback path, and wherein the feedback path includes a digital gain stage having a first adjustable gain range; and method step 606 for adjusting the gain of the digital microphone or digital microphone system. In method 600, the digital modulator may include a single-bit digital modulator. In method step 606, the gain of the digital microphone or digital microphone system may include digitally scaling the output of the digital gain stage to provide a scaled output signal, and subtracting the scaled output signal from the digital signal. In method step 606, the gain of the digital microphone or digital microphone system may include using a second adjustable gain range greater than the first adjustable gain range to increase the amplitude of the digital signal. In method step 606, the gain of the digital microphone or digital microphone may include using a second adjustable gain range greater than the first adjustable gain range to increase the amplitude of the signal in the main signal path of the digital modulator. The above-described gain adjustment variations in method step 606 may be combined in embodiments. In embodiments, the digital signal of method 600 may include a filtered digital signal. Method 600 is not limited to... Figure 6 The method steps 602, 604, and 606 are shown, and may include additional steps performed in various sequences.

[0030] Figure 7 This is a block diagram of a digital microphone system integrated on one or more integrated circuits 710. A digital microphone 702 may be integrated on a common substrate along with one or more digital components 704 or other MEMS devices, along with a clock generator 706 and a processor 708. The clock generator 706 generates one or more clock signals 712 for the digital microphone 702 and other digital components 704. The processor 708 generates one or more control signals for the digital microphone 702 and digital components 704. In one embodiment, the clock generator 706 is coupled to the digital microphone 702 and digital components 704 via one or more bidirectional digital buses. In another embodiment, the processor 708 is coupled to the digital microphone 702 and digital components 704 via one or more bidirectional digital buses. In other embodiments, the clock generator 706 and / or the processor 708 may be external to the integrated circuit 710. The integrated circuit 710 may include hybrid circuitry, which includes a common substrate interconnecting other components and the integrated circuit.

[0031] Now for reference Figure 8 According to embodiments of the present invention, it can be used for Figure 7The block diagram of the processing system 800, with processor 708 shown, illustrates a general platform, common components, and functions that can be used to implement various parts of a digital microphone or digital microphone system and / or an external computer or processing device that interfaces with a digital microphone system. For example, the processing system 800 can be used to implement... Figure 7 The processor 708 and / or clock generator 706 are shown. In some embodiments, the processing system 800 may be used to provide control signals for changing the gain mode of one or more gain stages in the digital microphone system and for changing the filter coefficients in the digital filters of the digital microphone system. Furthermore, the processing system 800 may be used to provide control signals for changing the operating mode of the ADC of the microphone system.

[0032] The processing system 800 may include, for example, a central processing unit (CPU) 802 and a memory 804 connected to a bus 808, and may be configured to perform the above-described processes. In some embodiments, the memory 804 may be used to implement... Figure 5 The memory for lookup table 132 shown. Alternatively, the memory for lookup table 132 may be separate from memory 804. In some embodiments, memory 804 may be used to store, for example, Figure 2 , Figure 3 and Figure 4 The filter coefficients of the digital filter 108 shown are illustrated. Alternatively, the filter coefficients may be stored locally, separate from the memory 804. If needed or required, the processing system 800 may also include a display adapter 810 to provide connectivity to a local display 812, and an input / output (I / O) adapter 814 to provide input / output interfaces for one or more input / output devices 816, such as a mouse, keyboard, flash drive, etc.

[0033] The processing system 800 may also include a network interface 818, which may be implemented using a network adapter configured to couple to a wired link (such as a network cable, USB interface, etc.) and / or a wireless / cellular link for communicating with the network 820. The network interface 818 may also include suitable receivers and transmitters for wireless communication. It should be noted that the processing system 800 may include other components. For example, if implemented externally, the processing system 800 may include hardware components such as power supplies, cables, motherboards, removable storage media, housings, etc. Although not shown, these other components are considered part of the processing system 800. In some embodiments, the processing system 800 may be implemented on a single monolithic semiconductor integrated circuit and / or on the same monolithic semiconductor integrated circuit as other disclosed system components.

[0034] According to one embodiment, the digital gain of the digital microphone is achieved by changing the feedback level of an existing digital modulator. In one embodiment, the feedback level is achieved by selecting a constant value from a lookup table, and therefore no adders or shifters are involved. This, in turn, significantly saves silicon area and power, thereby reducing product costs.

[0035] According to the embodiments, consuming minimal additional power is an advantage in existing digital modulators for digital microphones.

[0036] Another advantage is that arbitrary precision can be achieved with almost no additional effort (due to the use of lookup table 132). This fine-tuning can be used for sensitivity calibration of digital microphones (due to variations in manufacturing and analog circuit implementation).

[0037] In embodiments, digital gain can be provided, as needed, via digital gain blocks 110 and 128, 130 and 128, or even combinations of 110, 130 and 128. In embodiments, ADC 106 may include a Sigma-Delta analog-to-digital converter. In embodiments, sampling rates up to 3 MHz can be used, with corresponding clock signals at frequencies up to 3 MHz. In embodiments, digital filter 108 may include a programmable digital filter with a variety of different filter configurations (e.g., decimation filter configuration or offset compensation filter configuration). While examples of other components of the digital microphone of the embodiments have been shown and described, it will be apparent to those skilled in the art that other examples of these components may also be used. While examples of specific gain ranges have been previously described, other gain ranges may be used in the embodiments.

[0038] Figure 2 , Figure 3 and Figure 4 The ASIC 104 shown and Figure 7 The integrated circuit 710 shown can be implemented on a semiconductor substrate such as a silicon substrate. In some embodiments, the circuit can be implemented on a single monolithic semiconductor substrate using complementary metal-oxide-semiconductor (CMOS) fabrication techniques, for example, using N-channel (NMOS) and P-channel (PMOS) transistor devices. Embodiments of the invention can be implemented using other device types and other techniques. For example, junction field-effect transistors (JFETs) and / or bipolar junction transistors (BJTs) can be used instead of MOS devices. Discrete devices or a combination of discrete devices and integrated circuit devices can also be used in embodiments.

[0039] In an embodiment, for example Figure 4In the embodiment of the digital microphone 100D shown, the digital gain coarse block 130 can be combined with the loop filter 124 such that, corresponding to the uncombined embodiment, the combined loop filter 124 provides gain functionality using only the modified filter coefficients.

[0040] Exemplary embodiments of the invention are summarized herein. Other embodiments may also be understood from the entirety of the description and claims submitted herein.

[0041] Example 1. According to one embodiment, the system includes an analog-to-digital converter (ADC); and a digital modulator coupled to the ADC, wherein the digital modulator includes an output for providing a digital signal, wherein the digital modulator includes a main signal path and a feedback path, and wherein the feedback path includes a first digital gain stage having a first adjustable gain range.

[0042] Example 2. The system according to Example 1 further includes a second digital gain stage inserted between the ADC and the digital modulator, the second digital gain stage having a second adjustable gain range, wherein the second adjustable gain range is greater than the first adjustable gain range.

[0043] Example 3. The system according to any one of the above examples further includes a second digital gain stage having a second adjustable gain range in the main signal path of the digital modulator, wherein the second adjustable gain range is greater than the first adjustable gain range.

[0044] Example 4. The system according to any one of the examples above, wherein the first digital gain stage includes a lookup table with gain selection input.

[0045] Example 5. A system according to any one of the examples above, wherein the main signal path of the digital modulator includes a first digital filter and a quantizer.

[0046] Example 6. A system according to any one of the examples above, wherein the digital modulator includes a single-bit digital output.

[0047] Example 7. A system according to any one of the examples above, wherein a digital modulator is configured to receive an “m” bit input signal, where “m” is an integer greater than 1.

[0048] Example 8. A system according to any one of the examples above, wherein a first digital gain stage is configured to map a single-bit output of the modulator to an “m”-bit feedback signal.

[0049] Example 9. The system according to any one of the examples above further includes an adder having a positive input and a negative input, the positive input being configured to receive an "m"-bit input signal and the negative input being coupled to an "m"-bit feedback signal.

[0050] Example 10. The system according to any one of the above examples further includes a second digital filter inserted between the ADC and the digital modulator.

[0051] Example 11. The system according to any one of the above examples further includes a microelectromechanical system (MEMS) device having an output coupled to an ADC.

[0052] Example 12. According to one embodiment, the circuit includes an analog-to-digital converter (ADC); and a digital modulator coupled to the ADC, wherein the digital modulator includes a main signal path and a feedback path, wherein the feedback path includes a first digital gain stage, and wherein the ADC and the digital modulator are disposed in a common substrate of a single integrated circuit.

[0053] Example 13. The circuit according to Example 12 further includes a second digital gain stage inserted between the ADC and the digital modulator.

[0054] Example 14. The circuit according to any one of the above examples further includes a second digital gain stage in the main signal path of the digital modulator.

[0055] Example 15. The circuit according to any one of the examples above, wherein the first digital gain stage includes a lookup table having a gain selection input.

[0056] Example 16. The circuit according to any one of the above examples further includes a digital filter inserted between the ADC and the digital modulator.

[0057] Example 17. According to one embodiment, the method includes: converting an analog signal into a digital signal; and modulating the digital signal using a digital modulator, wherein the digital modulator includes a main signal path and a feedback path, and wherein the feedback path includes a digital gain stage having a first adjustable gain range.

[0058] Example 18. The method according to Example 17, wherein the digital modulator includes a single-bit digital modulator.

[0059] Example 19. The method according to any one of the examples above further includes digitally scaling the output of the digital gain stage to provide a scaled output signal, and subtracting the scaled output signal from the digital signal.

[0060] Example 20. The method according to any one of the examples above further includes using a second adjustable gain range greater than the first adjustable gain range to increase the amplitude of the digital signal.

[0061] Example 21. The method according to any one of the examples above further includes using a second adjustable gain range greater than the first adjustable gain range to increase the amplitude of the signal in the main signal path of the digital modulator.

[0062] Example 22. The method according to any one of the examples above, wherein the digital signal includes a filtered digital signal.

[0063] Although the invention has been described with reference to exemplary embodiments, this description is not intended to be limiting. Referring to the specification, those skilled in the art will appreciate various modifications and combinations of the exemplary embodiments and other embodiments of the invention. Therefore, the appended claims are intended to cover any such modifications or embodiments.

Claims

1. A digital microphone system, comprising: Analog-to-digital converter (ADC); as well as A digital modulator coupled to the ADC, wherein the digital modulator includes an output for providing a digital signal, wherein the digital modulator includes a main signal path coupled between the input and the output of the digital modulator and a digital feedback path coupled between an input adder of the output and the main signal path, and wherein the digital feedback path includes a first digital gain stage having a first adjustable gain range. The digital modulator is a single-bit output modulator, and the first digital gain stage is configured to: based on the single-bit output of the digital modulator, map a constant gain coefficient to a multi-bit feedback signal using a lookup table, and provide it to the input adder. The first adjustable gain range is a gain range used for sensitivity calibration of the digital microphone system, and the lookup table is configured with a gain selection input to select between different system gain modes.

2. The system of claim 1 further includes a second digital gain stage inserted between the ADC and the digital modulator, the second digital gain stage having a second adjustable gain range, wherein the second adjustable gain range is greater than the first adjustable gain range.

3. The system according to claim 1 further includes a second digital gain stage having a second adjustable gain range in the main signal path of the digital modulator, wherein the second adjustable gain range is greater than the first adjustable gain range.

4. The system of claim 1, wherein the main signal path of the digital modulator includes a first digital filter and a quantizer.

5. The system of claim 1, wherein the digital modulator is configured to receive an "m" bit input signal, where "m" is an integer greater than 1.

6. The system of claim 5, wherein the first digital gain stage is configured to map the single-bit digital output of the digital modulator to an "m"-bit feedback signal.

7. The system of claim 6 further includes an adder having a positive input and a negative input, the positive input being configured to receive the "m"-bit input signal, and the negative input being coupled to the "m"-bit feedback signal.

8. The system of claim 1 further includes a second digital filter inserted between the ADC and the digital modulator.

9. The system of claim 1 further includes a microelectromechanical system (MEMS) device having an output coupled to the ADC.

10. A digital microphone circuit, comprising: Analog-to-digital converter (ADC); as well as A digital modulator, coupled to the ADC, wherein the digital modulator includes a main signal path coupled between the input and the output of the digital modulator and a digital feedback path coupled between an adder to the output of the digital modulator and the input of the main signal path, wherein the digital feedback path includes a first digital gain stage having a first adjustable gain range, and wherein the ADC and the digital modulator are disposed on a common substrate of a single integrated circuit. The digital modulator is a single-bit output modulator, and the first digital gain stage is configured to: based on the single-bit output of the digital modulator, map a constant gain coefficient to a multi-bit feedback signal using a lookup table, and provide it to the input adder. The first adjustable gain range is a gain range used for sensitivity calibration of the digital microphone system, and the lookup table is configured with a gain selection input to select between different system gain modes.

11. The circuit of claim 10, further comprising a second digital gain stage inserted between the ADC and the digital modulator.

12. The circuit of claim 10, further comprising a second digital gain stage in the main signal path of the digital modulator.

13. The circuit of claim 10 further includes a digital filter inserted between the ADC and the digital modulator.

14. A method for using a digital microphone, comprising: Convert analog signals to digital signals; as well as A digital modulator is used to modulate the digital signal, wherein the digital modulator includes an adder for receiving an input signal, a main signal path coupled between the input and output of the digital modulator, and a digital feedback path coupled between the output of the digital modulator and the input of the adder, and wherein the feedback path includes a digital gain stage having a first adjustable gain range. The digital modulator is a single-bit output modulator, and the digital gain stage is configured to: based on the single-bit output of the digital modulator, map a constant gain coefficient to a multi-bit feedback signal using a lookup table, and provide it to the adder. The first adjustable gain range is a gain range used for sensitivity calibration of the digital microphone, and the lookup table is configured with a gain selection input to select between different system gain modes.

15. The method of claim 14, further comprising digitally scaling the output of the digital gain stage to provide a scaled output signal, and subtracting the scaled output signal from the digital signal.

16. The method of claim 14, further comprising using a second adjustable gain range greater than the first adjustable gain range to increase the amplitude of the digital signal.

17. The method of claim 14, further comprising using a second adjustable gain range greater than the first adjustable gain range to increase the amplitude of the signal in the main signal path of the digital modulator.

18. The method of claim 14, wherein the digital signal comprises a filtered digital signal.

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