Display device

Abstract

A display device includes a substrate including a display area, a pad area outside the display area, and a bending area between the display area and the pad area; a connection line extending in a direction from the display area to the pad area and disposed in the bending area; a first organic insulating layer and a second organic insulating layer sequentially disposed to cover the connection line; and a dummy pattern between the first organic insulating layer and the second organic insulating layer, wherein the dummy pattern includes a first extension part and a second extension part each extending from the bending area to the pad area.

Description

[0001] Cross-references to related applications

[0002] This application claims priority and benefits to Korean Patent Application No. 10-2020-0091858, filed on July 23, 2020, which is incorporated herein by reference for all purposes, as fully set forth herein. Technical Field

[0003] An exemplary embodiment of the present invention relates to a display device. Background Technology

[0004] With the development of the information society, the demand for various display devices for displaying images has increased. In the field of display devices, thin, lightweight, and large-area flat panel displays (FPDs) have rapidly increased in popularity, replacing bulky cathode ray tubes (CRTs). FPDs include liquid crystal displays (LCDs), plasma display panels (PDPs), organic light-emitting diode (OLED) displays, and electrophoretic displays (EPDs).

[0005] These display devices may include a display area for displaying images and a peripheral area for not displaying images. In recent years, research has been actively conducted to reduce the size of the peripheral area that is visually identifiable to the user. For example, research has been actively conducted on display devices in which a portion of the peripheral area is bent.

[0006] The information disclosed in this background section is only for understanding the background of the inventive concept, and therefore, the above information may include information that does not constitute prior art. Summary of the Invention

[0007] Exemplary embodiments of the present invention include a display device in which reliability is improved by preventing damage to connecting lines in bending areas.

[0008] Additional features will be set forth in part in the description below, and will be partly obvious from the description, or may be learned by practicing the embodiments set forth in this disclosure.

[0009] An exemplary embodiment of the present invention provides a display device, comprising: a substrate including a display area, a pad area, and a bending area, the pad area being positioned outside the display area and the bending area being positioned between the display area and the pad area; a connecting line extending in a direction from the display area to the pad area and disposed in the bending area; a first organic insulating layer and a second organic insulating layer, the first organic insulating layer and the second organic insulating layer being sequentially disposed to cover the connecting line; and a dummy pattern between the first organic insulating layer and the second organic insulating layer. The dummy pattern includes a first extension portion and a second extension portion, the first extension portion and the second extension portion each extending from the bending area to the pad area.

[0010] The connecting lines may include a first connecting line and a second connecting line; and the dummy pattern may overlap with each of the first connecting line and the second connecting line.

[0011] The first extension and the second extension can be spaced apart from each other in the pad area.

[0012] The second organic insulating layer may include an insulating layer opening that overlaps with the pad region; and at least one of the first extension and the second extension may be exposed by the insulating layer opening.

[0013] Connecting lines and dummy patterns can be electrically insulated from each other.

[0014] The display device may further include: a display element above the display area, the display element including a pixel electrode and a counter electrode, and the dummy pattern may include the same material as the pixel electrode.

[0015] The display device may further include: a thin-film transistor over a substrate, the thin-film transistor being connected to a display element; a first planarization layer and a second planarization layer between the thin-film transistor and a pixel electrode; and a pixel defining layer covering the edge of the pixel electrode, the pixel defining layer including an opening exposing a central portion of the pixel electrode. The first organic insulating layer may include the same material as the second planarization layer; and the second organic insulating layer may include the same material as the pixel defining layer.

[0016] The display device may also include an inorganic insulating layer above the substrate, and the inorganic insulating layer may include a lower opening portion that overlaps with the bending region.

[0017] The display device may further include: a lower organic insulating layer below the first organic insulating layer, and the lower organic insulating layer may overlap with the lower opening portion.

[0018] Virtual patterns can be separated from the display area.

[0019] Another exemplary embodiment of the present invention provides a display device, comprising: a substrate including a display area, a pad area, and a bending area, the pad area being positioned outside the display area and the bending area being positioned between the display area and the pad area; a connecting line extending in a direction from the display area to the pad area and disposed in the bending area; a first organic insulating layer and a second organic insulating layer, the first organic insulating layer and the second organic insulating layer being sequentially disposed to cover the connecting line; and a plurality of dummy patterns between the first organic insulating layer and the second organic insulating layer, the plurality of dummy patterns being disposed in the bending area.

[0020] Multiple dummy patterns may include a first dummy pattern and a second dummy pattern; and the first dummy pattern and the second dummy pattern may be spaced apart from each other in the bending region.

[0021] The connecting lines may include a first connecting line and a second connecting line, which are adjacent to each other; and the first connecting line and the second connecting line may each overlap with a first dummy pattern.

[0022] The connecting lines may include a first connecting line and a second connecting line, which are adjacent to each other; the first connecting line may overlap with a first dummy pattern; and the second connecting line may overlap with a second dummy pattern.

[0023] The first dummy pattern may include a first extension and a second extension, each extending from the bending region to the pad region.

[0024] The second organic insulating layer may include an insulating layer opening that overlaps with the pad region; and at least one of the first extension and the second extension may be exposed by the insulating layer opening.

[0025] The connecting lines and multiple dummy patterns can be electrically insulated from each other.

[0026] The display device may further include a display element positioned above the display area, the display element including a pixel electrode and a counter electrode. Multiple dummy patterns may include the same material as the pixel electrode.

[0027] The display device may further include: a thin-film transistor over a substrate, the thin-film transistor being connected to a display element; a first planarization layer and a second planarization layer between the thin-film transistor and a pixel electrode; and a pixel defining layer covering the edge of the pixel electrode, the pixel defining layer including an opening exposing a central portion of the pixel electrode. The first organic insulating layer may include the same material as the second planarization layer; and the second organic insulating layer may include the same material as the pixel defining layer.

[0028] The display device may also include an inorganic insulating layer above the substrate, and the inorganic insulating layer may include a lower opening portion that overlaps with the bending region.

[0029] It should be understood that both the above general description and the following detailed description are exemplary and explanatory, and are intended to provide further explanation of the invention protected by the claims. Attached Figure Description

[0030] The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the invention and, together with the description, serve to illustrate the inventive concept.

[0031] Figure 1 This is a perspective view schematically showing a display device according to an embodiment.

[0032] Figure 2 This is a schematic cross-sectional view of a display device according to an embodiment.

[0033] Figure 3 This is a schematic diagram illustrating the equivalent circuit of a pixel circuit suitable for a display panel.

[0034] Figure 4 This is a schematic plan view of a display panel according to an embodiment.

[0035] Figure 5 and Figure 6 Each is an enlarged view of a portion of the display panel according to an embodiment.

[0036] Figure 7 They are respectively along Figure 4 The line A-A' in the middle and Figure 5 The schematic cross-sectional view of the display panel is shown by line B-B'.

[0037] Figure 8A These are comparative examples used for comparison with embodiments of the present invention.

[0038] Figure 8B This is a cross-sectional view of the display panel according to an embodiment.

[0039] Figure 9 This is an enlarged view of a portion of a display panel according to another embodiment.

[0040] Figure 10 It is along Figure 9 The respective cuts of lines C-C' and D-D' are schematically shown. Figure 9 A cross-sectional view of the display panel. Detailed Implementation

[0041] In the following description, numerous specific details are set forth for illustrative purposes in order to provide a thorough understanding of various exemplary embodiments of the invention. As used herein, “embodiment” is a non-limiting example of an apparatus or method employing one or more inventive concepts disclosed herein. However, it will be apparent that various exemplary embodiments may be practiced without these specific details or with one or more equivalent arrangements. In other instances, well-known structures and apparatuses are shown in block diagram form to avoid unnecessarily obscuring the various exemplary embodiments. Furthermore, the various exemplary embodiments may be different, but are not necessarily exclusive. For example, the specific shape, configuration, and characteristics of an exemplary embodiment may be used or implemented in another exemplary embodiment without departing from the inventive concept.

[0042] Unless otherwise stated, the exemplary embodiments shown are to be understood as providing exemplary features of variable details that may be implemented in practice to carry out the inventive concept. Therefore, unless otherwise stated, features, components, modules, layers, films, panels, areas and / or aspects of various embodiments (hereinafter individually or collectively referred to as “elements”) may be combined, separated, interchanged and / or rearranged in other ways without departing from the inventive concept.

[0043] Crosshairs and / or shading are typically used in accompanying drawings to clarify boundaries between adjacent elements. Thus, unless otherwise stated, the presence or absence of crosshairs or shading does not convey or indicate any preference or requirement for a particular material, material properties, size, scale, commonalities between illustrated elements, or any other characteristics, properties, etc. Furthermore, the dimensions and relative dimensions of elements may be exaggerated in the drawings for clarity and / or descriptive purposes. A particular process sequence may be performed differently than the described sequence when exemplary embodiments can be implemented differently. For example, two consecutively described processes may be performed substantially simultaneously, or in the reverse order of their description. Moreover, the same reference numerals refer to the same elements.

[0044] When an element or layer is referred to as being "on," "connected to," or "coupled to" another element or layer, the element or layer may be directly on, directly connected to, or directly coupled to the other element or layer, or an intermediary element or layer may be present. However, when an element or layer is referred to as being "directly on," "directly connected to," or "directly coupled to" another element or layer, an intermediary element or layer is not present. Therefore, the term "connection" can refer to a physical connection, electrical connection, and / or fluid connection with or without an intermediary element. Furthermore, the three directions of a Cartesian coordinate system—x, y, and z—can be interpreted in a broader sense. For example, the x, y, and z directions can be perpendicular to each other, or they can represent different directions that are not perpendicular to each other. For the purposes of this disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" can be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z, such as XYZ, XYY, YZ, and ZZ. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0045] Although the terms “first,” “second,” etc., may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another. Thus, without departing from the teachings of this disclosure, the first element discussed below may be referred to as the second element.

[0046] For descriptive purposes, spatial relative terms such as “below,” “under,” “below,” “down,” “above,” “above,” “higher,” and “side” (e.g., as in “sidewall”) may be used herein to describe the relationship of one element to another (or multiple elements) as shown in the accompanying drawings. In addition to the orientations depicted in the drawings, the spatial relative terms are also intended to cover different orientations of the device during use, operation, and / or manufacture. For example, if the device in the drawings is flipped, an element described as “below” or “under” other elements or features would subsequently be oriented “above” other elements or features. Thus, the exemplary term “below” can cover both above and below orientations. Furthermore, the device may be otherwise oriented (e.g., rotated 90 degrees or in other orientations), and thus, the spatial relative descriptive terms used herein shall be interpreted accordingly.

[0047] The terminology used herein is for the purpose of describing particular embodiments and is not intended to be limiting. As used herein, unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well. Furthermore, when used in this specification, the terms “comprising,” “including,” “containing,” and / or “having” indicate the presence of the stated features, integrals, steps, operations, elements, components, and / or groups thereof, but do not preclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof. It should also be noted that, as used herein, the terms “substantially,” “about,” and other similar terms are used as approximate terms rather than terms of degree, and thus to explain the inherent biases in measured, calculated, and / or provided values ​​that would be recognized by those skilled in the art.

[0048] Various exemplary embodiments are described herein with reference to cross-sectional and / or exploded views, which are schematic diagrams of idealized exemplary embodiments and / or intermediate structures. Thus, variations in the shapes shown in the drawings are anticipated due to factors such as manufacturing techniques and / or tolerances. Therefore, the exemplary embodiments disclosed herein should not necessarily be construed as limited to the shapes of the areas specifically shown, but will include, for example, deviations in shape due to manufacturing processes. In this way, the areas shown in the drawings may be schematic in nature, and the shapes of these areas may not reflect the actual shapes of the areas of the device, and are thus not necessarily intended to be limiting.

[0049] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. Unless expressly defined herein, terms such as those defined in a general dictionary shall be interpreted as having a meaning consistent with their meaning in the context of the relevant field, and shall not be interpreted in an idealized or overly formalized sense.

[0050] Figure 1 This is a schematic perspective view of the display device 1 according to an embodiment. Figure 2 This is a schematic cross-sectional view of the display device 1 according to an embodiment.

[0051] refer to Figure 1The display device 1 is a device for displaying moving or still images, and can be used not only in mobile phones, smartphones, tablet PCs, mobile communication terminals, electronic notebooks, e-books, portable multimedia players (PMPs), navigation systems, and ultra-mobile PCs (UMPCs), but also in the display screens of various products such as televisions, laptops, monitors, billboards, and Internet of Things (IoT) devices. Furthermore, the display device 1 according to the embodiment can be used in wearable devices such as smartwatches, watch phones, glasses displays, and head-mounted displays (HMDs). Additionally, the display device 1 according to the embodiment can be used as a dashboard, a central information display (CID) arranged on the center dashboard or instrument panel of a vehicle, an interior mirror display replacing the side mirrors of a vehicle, and a display arranged on the rear surface of the front seats for entertainment of the rear seats of a vehicle.

[0052] like Figure 1 As shown, the display device 1 can have an approximately rectangular shape. For example, the display device 1 can have a rectangular planar shape overall, with its shorter side extending in a first direction (e.g., the x-direction or -x-direction) and its longer side extending in a second direction (e.g., the y-direction or -y-direction). In embodiments, the portion where the shorter side extending in the first direction (e.g., the x-direction or -x-direction) intersects with the longer side extending in the second direction (e.g., the y-direction or -y-direction) can have a right-angled shape or an arc shape with a specific curvature. However, the planar shape of the display device 1 is not limited to a rectangle, and the display device 1 can have other polygonal, circular, or elliptical shapes.

[0053] Display device 1 may include a display area DA and a peripheral area PA. The display area DA may be an area in which an image is displayed. A plurality of pixels PX may be arranged in the display area DA. Display device 1 can provide an image by using light emitted from the pixels PX. Each of the pixels PX can emit light using a display element. In one embodiment, each of the pixels PX may emit red light, green light, or blue light. In another embodiment, each of the pixels PX may emit red light, green light, blue light, or white light.

[0054] The peripheral region PA is the area in which no image is provided and can be a non-display area. The peripheral region PA may at least partially surround the display region DA. For example, the peripheral region PA may completely surround the display region DA. Driving units for providing electrical signals to pixels PX, or power lines for power supply, may be located in the peripheral region PA. For example, a scan driving unit for applying scan signals to pixels PX may be located in the peripheral region PA. For example, a data driving unit for applying data signals to pixels PX may be located in the peripheral region PA.

[0055] refer to Figure 2 The display device 1 may include a display panel 10, a cover window 20, a display driving unit 30, a display circuit board 40, a touch sensor driving unit 50, a pad 60, and a protective film PTF.

[0056] Display panel 10 can display information processed by display device 1. For example, display panel 10 can display execution screen information of an application driven by display device 1, or can display user interface (UI) and graphical user interface (GUI) information based on the execution screen information.

[0057] Display panel 10 may include display elements. For example, display panel 10 may include an organic light-emitting diode (OLED) display panel using organic light-emitting diodes (OLEDs), a micro LED display panel using micro light-emitting diodes (LEDs), a quantum dot light-emitting display panel using quantum dot LEDs including quantum dot emission layers, or an inorganic light-emitting display panel using inorganic light-emitting devices including inorganic semiconductors. Hereinafter, the focus will be on the case where display panel 10 is an organic light-emitting display panel using organic light-emitting diodes as display elements.

[0058] Display panel 10 may include a substrate 100 and a multilayer film over the substrate 100. In an embodiment, display panel 10 may include substrate 100, display layer DSL, thin-film encapsulation layer TFE, touch sensor layer TSL, and optical functional layer OFL. In this case, a display area DA and a peripheral area PA may be defined with respect to substrate 100 and / or the multilayer film. For example, substrate 100 may include display area DA and peripheral area PA. Furthermore, peripheral area PA may include pad area PDA and bending area BA.

[0059] The substrate 100 may include polymeric resins such as polyethersulfone, polyarylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyimide, polycarbonate, cellulose triacetate, or cellulose acetate propionate. In embodiments, the substrate 100 may have a multilayer structure including a matrix layer (not shown) and a barrier layer (not shown), the matrix layer comprising the aforementioned polymeric resin. The substrate 100 comprising the polymeric resin may be flexible, rollable, or bendable.

[0060] The substrate 100 can be bent within the bending region BA. In this case, at least a portion of the lower surfaces 100LS of the substrate 100 can face each other, and the pad region PDA of the substrate 100 can be located below the other portions of the substrate 100. Therefore, the area of ​​the peripheral region PA visible to the user can be reduced. Figure 2In one embodiment, only the substrate 100 is bent. However, in another embodiment, at least a portion of the display layer DSL, at least a portion of the thin-film encapsulation layer TFE, and at least a portion of the touch sensor layer TSL may also be bent in the bending region BA and the pad region PDA. In this case, at least a portion of the display layer DSL, at least a portion of the thin-film encapsulation layer TFE, and at least a portion of the touch sensor layer TSL may also be bent in the bending region BA.

[0061] The display layer DSL can be positioned above the substrate 100. The display layer DSL may include pixel circuitry and display elements. In this case, the pixel circuitry may be connected to the display elements. The pixel circuitry may include thin-film transistors and storage capacitors. Therefore, the display layer DSL may include multiple display elements, multiple thin-film transistors, and multiple storage capacitors. Furthermore, the display layer DSL may also include an insulating layer between the multiple display elements, multiple thin-film transistors, and multiple storage capacitors.

[0062] The thin-film encapsulation layer (TFE) can be located above the display layer (DSL). The TFE can be located above the display element and can cover the display element. In embodiments, the TFE can include at least one inorganic encapsulation layer and at least one organic encapsulation layer. The at least one inorganic encapsulation layer can include alumina (Al₂O₃), titanium dioxide (TiO₂), tantalum oxide (Ta₂O₅), or zinc oxide (ZnO₂). X ZnO X It can be ZnO and / or ZnO2), silicon oxide (SiO2), or silicon nitride (SiN). x The encapsulation layer may contain one or more inorganic materials, including silicon oxynitride (SiON). At least one organic encapsulation layer may comprise a polymer-based material. Examples of polymer-based materials include acrylic resins, epoxy resins, polyimides, and polyethylene. In embodiments, at least one organic encapsulation layer may comprise an acrylate.

[0063] The touch sensor layer (TSL) can be positioned above the thin-film encapsulation layer (TFE). The TSL can sense coordinate information based on external input, such as touch events. The TSL may include sensor electrodes and touch lines, each connected to one of the sensor electrodes. The TSL can sense external input using either self-capacitance or mutual capacitance methods.

[0064] The touch sensor layer (TSL) can be positioned above the thin-film encapsulation layer (TFE). Alternatively, the touch sensor layer (TSL) can be formed separately on the touch substrate and then bonded to the thin-film encapsulation layer (TFE) via an adhesive layer such as an optically transparent adhesive. In an embodiment, the touch sensor layer (TSL) can be formed directly above the thin-film encapsulation layer (TFE), and in this case, the adhesive layer may not be located between the touch sensor layer (TSL) and the thin-film encapsulation layer (TFE).

[0065] An optical functional layer (OFL) may be located above the touch sensor layer (TSL). The OFL can reduce the reflectivity of light incident from the outside toward the display device 1 (external light) and / or improve the color purity of light emitted from the display device 1. In embodiments, the OFL may include a retarder and a polarizer. The retarder may be thin-film or liquid crystal coated, and may include a λ / 2 retarder and / or a λ / 4 retarder. The polarizer may also be thin-film or liquid crystal coated. The thin-film type may include a stretched synthetic resin film, and the liquid crystal coated type may include liquid crystals arranged in a specific configuration. Both the retarder and polarizer may also each include a protective film.

[0066] In an embodiment, the optical functional layer OFL may include a black matrix and a color filter. This can be considered by taking into account the pixels PX of the display device 1 (see...). Figure 1 The emitted light beam is arranged with color filters. Each of the color filters may include a red, green, or blue pigment or dye. In an embodiment, in addition to the aforementioned pigments or dyes, each of the color filters may also include quantum dots. In an embodiment, some of the color filters may not include the aforementioned pigments or dyes and may include scattering particles such as TiO2.

[0067] In an embodiment, the optical functional layer (OFL) may include a destructive interference structure. The destructive interference structure may include a first reflective layer and a second reflective layer, which are disposed on different layers. The first and second reflected light, reflected by the first and second reflective layers respectively, can interfere destructively with each other, and thus, the reflectivity of external light can be reduced.

[0068] A cover window 20 may be located above the display panel 10. The cover window 20 protects the display panel 10. In an embodiment, the cover window 20 may be a flexible window. The cover window 20 protects the display panel 10 by easily bending without breaking under external force. The cover window 20 may include at least one of glass, sapphire, and plastic. The cover window 20 may include, for example, ultra-thin tempered glass (UTG) or colorless polyimide (CPI). In an embodiment, the cover window 20 may have a structure in which a flexible polymer layer is on one surface of a glass substrate, or it may consist only of a polymer layer.

[0069] The display driving unit 30 can be located in the pad area of ​​the PDA. The display driving unit 30 can receive control signals and power supply voltages, and can generate and output signals and voltages for driving the display panel 10. The display driving unit 30 may include an integrated circuit (IC).

[0070] The display circuit board 40 can be electrically connected to the display panel 10. For example, the display circuit board 40 can be electrically connected to the pad area PDA of the substrate 100 using an anisotropic conductive film.

[0071] Display circuit board 40 may include a flexible printed circuit board (FPCB) that is bendable or a rigid printed circuit board (PCB) that is not easily bent. Alternatively, in some cases, display circuit board 40 may include a composite printed circuit board that includes both a PCB and an FPCB.

[0072] The touch sensor driving unit 50 may be located above the display circuit board 40. The touch sensor driving unit 50 may include an IC. The touch sensor driving unit 50 may be attached to the display circuit board 40. The touch sensor driving unit 50 may be electrically connected to the sensor electrodes of the touch sensor layer TSL of the display panel 10 via the display circuit board 40.

[0073] In addition to the above, a power supply unit can be additionally arranged above the display circuit board 40. The power supply unit can apply power to the pixels PX of the display panel 10 (see [link to relevant documentation]). Figure 1 ) and the driving voltage of the display driving unit 30.

[0074] The protective film PTF can be patterned and attached to the lower surface 100LS of the substrate 100. In this case, the protective film PTF can be attached to the substrate 100 except for the bending region BA. A portion of the protective film PTF may be on the side of the substrate 100 opposite to the display layer DSL, with the substrate 100 positioned between the portion of the protective film PTF and the display layer DSL. Another portion of the protective film PTF may be attached to the lower surface 100LS of the substrate 100 to correspond to the pad region PDA.

[0075] In this embodiment, the padding layer 60 may be located between the protective film PTF. The padding layer 60 may absorb external impacts to prevent damage to the display panel 10. The padding layer 60 may include polymer resins such as polyurethane, polycarbonate, polypropylene, and polyethylene, or may include elastic materials such as sponges formed from foamed rubber, urethane-based materials, or acrylic materials.

[0076] Figure 3 This is a schematic diagram illustrating the equivalent circuit of a pixel circuit PC suitable for a display panel.

[0077] refer to Figure 3 The pixel circuit PC can be connected to a display element, such as an organic light-emitting diode (OLED). The pixel circuit PC may include a driving thin-film transistor T1, a switching thin-film transistor T2, and a storage capacitor Cst. Furthermore, the OLED can emit red, green, or blue light, or it can emit red, green, blue, or white light.

[0078] The switching thin-film transistor T2 can be connected to the scan line SL and the data line DL, and can transmit the data signal or data voltage input from the data line DL to the driving thin-film transistor T1 based on the scan signal or switching voltage input through the scan line SL. The storage capacitor Cst is connected to the switching thin-film transistor T2 and the driving voltage line PL, and can store a voltage corresponding to the difference between the voltage transmitted from the switching thin-film transistor T2 and the first power supply voltage ELVDD applied to the driving voltage line PL.

[0079] A driving thin-film transistor T1 is connected to a driving voltage line PL and a storage capacitor Cst, and can control the driving current flowing from the driving voltage line PL through the organic light-emitting diode (OLED) in response to the voltage value stored in the storage capacitor Cst. The OLED can emit light with a specific brightness according to the driving current. The opposite electrode of the OLED can receive a second power supply voltage ELVSS.

[0080] exist Figure 3 In this circuit, the pixel circuit PC includes two thin-film transistors T1 and T2 and a storage capacitor Cst, but the pixel circuit PC may include three or more thin-film transistors.

[0081] Figure 4 This is a schematic plan view of the display panel 10 according to an embodiment. Figure 5 and Figure 6 Each is an enlarged view of a portion of the display panel according to an embodiment. Figure 4 , Figure 5 and Figure 6 Each of the figures shows the shape of the bending region BA of the display panel 10 before bending, and schematically shows the shape of the display panel 10 without bending.

[0082] refer to Figure 4 and Figure 5The display panel 10 may include a substrate 100, connecting lines CL, a first lower line LL1, a second lower line LL2, and a dummy pattern DP. The substrate 100 may include a display area DA and a peripheral area PA. A plurality of pixels PX may be arranged in the display area DA. Pixels PX may be connected to scan lines SL and data lines DL, the scan lines SL extending in a first direction (e.g., the x-direction or the -x-direction) and the data lines DL extending in a second direction (e.g., the y-direction or the -y-direction). Pixels PX may emit light using organic light-emitting diodes based on the scan signal transmitted by the scan lines SL and the data signal transmitted by the data lines DL.

[0083] The peripheral region PA is the area where no image is provided and may be a non-display area. The peripheral region PA may at least partially surround the display area DA. The peripheral region PA may include adjacent regions AA, pad regions PDA, and bend regions BA.

[0084] Adjacent regions AA may at least partially surround display regions DA. In an embodiment, adjacent regions AA may completely surround display regions DA. Adjacent regions AA may be closer to display regions DA than pad regions PDA.

[0085] The pad area PDA can be outside the display area DA. In an embodiment, the pad area PDA can be further away from the display area DA than the bending area BA. The pad area PDA can include a first pad area PADA1 and a second pad area PADA2. In the pad area PDA, the first pad area PADA1 can be closer to the display area DA than the second pad area PADA2. In an embodiment, the first pad area PADA1 can be where the display driving unit 30 is arranged (see...). Figure 2 The second pad area PADA2 in the PDA pad area can be further away from the display area DA than the first pad area PADA1. The second pad area PADA2 can include the edge of the peripheral area PA. In an embodiment, the second pad area PADA2 can be a region in which the display circuit board 40 (see...) is disposed. Figure 2 (area).

[0086] The bend area BA can be located between the display area DA and the pad area PDA. More specifically, the bend area BA can be located between the adjacent area AA and the pad area PDA. The pad area PDA can be connected to the adjacent area AA through the bend area BA.

[0087] Connector lines CL can be within the bending area BA. Connector lines CL can extend in the direction from the display area DA to the pad area PDA. For example, connector lines CL can extend in a second direction (e.g., the y-direction or the -y-direction). There can be multiple connector lines CL. In this case, connector lines CL can be spaced apart from each other. For example, a first connector line CL1 and a second connector line CL2 that are adjacent to each other can be spaced apart from each other.

[0088] A connecting wire CL can be connected to each of the first lower wire LL1 and the second lower wire LL2. That is, the connecting wire CL can extend to intersect the bending region BA, such that the first lower wire LL1 is electrically connected to the second lower wire LL2. In an embodiment, the connecting wire CL can be on a different layer than the layer on which the first lower wire LL1 is disposed, and can be connected to the first lower wire LL1 via a first contact hole CNT1 provided in the insulating layer between the connecting wire CL and the first lower wire LL1. Furthermore, in an embodiment, the connecting wire CL can be on a different layer than the layer on which the second lower wire LL2 is disposed, and can be connected to the second lower wire LL2 via a second contact hole CNT2 provided in the insulating layer between the connecting wire CL and the second lower wire LL2.

[0089] The first lower line LL1 may extend in the direction from the display area DA to the bending area BA. The first lower line LL1 may be above the adjacent area AA. In an embodiment, the first lower line LL1 may extend to the display area DA. The first lower line LL1 may be spaced apart from the bending area BA. Therefore, the first lower line LL1 may not overlap with the bending area BA.

[0090] The second lower line LL2 may extend in the direction from the bending region BA to the pad region PDA. The second lower line LL2 may be above the pad region PDA. In one embodiment, the second lower line LL2 may extend to the second pad region PADA2. In another embodiment, the second lower line LL2 may extend to the first pad region PADA1. The second lower line LL2 may be spaced apart from the bending region BA. Therefore, the second lower line LL2 may not overlap with the bending region BA.

[0091] In an embodiment, the second lower line LL2 may be exposed to the outside in at least one of the first pad region PADA1 and the second pad region PADA2. For example, when the second lower line LL2 is exposed in the first pad region PADA1, the second lower line LL2 may be electrically connected to the display driver unit 30 (see [link to relevant documentation]). Figure 2 As another example, when the second lower line LL2 is exposed in the second pad area PADA2, the second lower line LL2 can be electrically connected to the display board 40 (see [link to relevant documentation]). Figure 2 ).

[0092] The first lower line LL1, the second lower line LL2, and / or the connecting line CL can be signal lines used to transmit signals to the display area DA. For example, the first lower line LL1, the second lower line LL2, and / or the connecting line CL can transmit signals from the display driving unit 30 (see...) Figure 2 ) or display circuit board 40 (see Figure 2 The input scan signal is transmitted to the scan line SL arranged in the display area DA. As another example, the first lower line LL1, the second lower line LL2, and / or the connecting line CL can transmit the scan signal from the display driver unit 30 (see [link to display driver unit 30]). Figure 2 ) or display circuit board 40 (see Figure 2 The applied data signal is transmitted to the data line DL arranged in the display area DA. As another example, the first lower line LL1, the second lower line LL2, and / or the connecting line CL can transmit the touch signal from the touch line arranged in the display area DA to the display board 40 (see...). Figure 2 The touch sensor driver unit 50 on the ) (see Figure 2 As another example, the first lower line LL1, the second lower line LL2, and / or the connecting line CL can transmit the power supply voltage to the display area DA.

[0093] A dummy pattern DP can be located within a bent area BA. The dummy pattern DP can be spaced apart from the display area DA. For example, the dummy pattern DP can be spaced apart from the display area DA in a second direction (e.g., the y-direction or the -y-direction) and can be arranged within a peripheral area PA. The dummy pattern DP can include a main body portion BP, a first extension portion LP1, and a second extension portion LP2. The main body portion BP, the first extension portion LP1, and the second extension portion LP2 can be provided integrally.

[0094] In an embodiment, the main body portion BP may extend in a second direction (e.g., the y-direction or the -y-direction) within the bent region BA. In this case, a portion of the main body portion BP may extend into the unbent peripheral region PA. For example, a portion of the main body portion BP may extend in the second direction (e.g., the y-direction or the -y-direction) and may overlap with the pad region PDA. Furthermore, a portion of the main body portion BP may extend into the adjacent region AA.

[0095] The first extension portion LP1 and the second extension portion LP2 can each extend from the main body portion BP. In this case, the first extension portion LP1 and the second extension portion LP2 can extend in the direction from the bending region BA to the pad region PDA. For example, the first extension portion LP1 and the second extension portion LP2 can each extend in a second direction (e.g., the y direction or the -y direction) in the pad region PDA.

[0096] In one embodiment, at least one of the first extension portion LP1 and the second extension portion LP2 can extend from the body portion BP to the first pad region PADA1. In this case, the first extension portion LP1 and the second extension portion LP2 can be exposed to the outside in the first pad region PADA1. In another embodiment, at least one of the first extension portion LP1 and the second extension portion LP2 can extend from the body portion BP to the second pad region PADA2. In this case, the first extension portion LP1 and the second extension portion LP2 can be exposed to the outside in the second pad region PADA2.

[0097] The first extension portion LP1 and the second extension portion LP2 may be spaced apart from each other. In an embodiment, the first extension portion LP1 and the second extension portion LP2 may be spaced apart from each other in a first direction (e.g., the x-direction or the -x-direction). In an embodiment, the first extension portion LP1 and the second extension portion LP2 may be spaced apart from each other in the pad area PDA.

[0098] The dummy pattern DP can cover the connecting line CL. More specifically, the dummy pattern DP can cover the connecting line CL in the bend region BA. Therefore, the connecting line CL can completely overlap with the dummy pattern DP in the bend region BA. For example, the connecting line CL can completely overlap with the main body portion BP of the dummy pattern DP in the bend region BA.

[0099] In some embodiments, there may be multiple dummy patterns DP within the bending region BA. For example, the dummy pattern DP may include a first dummy pattern DP1 and a second dummy pattern DP2. The first dummy pattern DP1 and the second dummy pattern DP2 may be spaced apart from each other within the bending region BA. For example, the first dummy pattern DP1 and the second dummy pattern DP2 may be spaced apart from each other in a first direction (e.g., the x-direction or the -x-direction). In some embodiments, a single dummy pattern DP may be positioned within the bending region BA.

[0100] In an embodiment, the dummy pattern DP can overlap with each of the multiple connecting lines CL. For example, refer to Figure 5 The first dummy pattern DP1 can overlap with the three connecting lines CL. (See reference) Figure 6 The dummy pattern DP can overlap with the two connecting lines CL.

[0101] The dummy pattern DP may include conductive oxides such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In₂O₃), indium gallium oxide (IGO), or aluminum zinc oxide (AZO). In another embodiment, the dummy pattern DP may include a reflective film comprising silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or compounds thereof. In another embodiment, the dummy pattern DP may also include a film comprising ITO, IZO, ZnO, or In₂O₃ above / below the reflective film. For example, the dummy pattern DP may have a multilayer structure of ITO / Ag / ITO.

[0102] The dummy pattern DP can prevent or reduce damage to the interconnect CL when the bending region BA of the substrate 100 is bent. Furthermore, the dummy pattern DP may include a first extension LP1 and a second extension LP2, each of which extends into the pad region PDA, and both extensions may be exposed to the outside within the pad region PDA. Therefore, the resistance of the dummy pattern DP can be measured by measuring the current flowing from one of the first extensions LP1 and LP2 to the other. Thus, in this embodiment, damage to the dummy pattern DP when the bending region BA of the substrate 100 is bent can be detected.

[0103] Figure 7 They are respectively along Figure 4 The line A-A' in the middle and Figure 5 The schematic cross-sectional view of the display panel is shown by line B-B'.

[0104] refer to Figure 7 The display panel may include a substrate 100, a display layer DSL, a thin-film encapsulation layer TFE, and a touch sensor layer TSL. The substrate 100 may include a display area DA and a peripheral area PA. The peripheral area PA may include an adjacent area AA, a pad area PDA, and a bending area BA.

[0105] The display layer DSL can be located within the display area DA. The display layer DSL may include an inorganic insulating layer IL, a pixel circuit PC, a first planarization layer 115, a second planarization layer 117, and an organic light-emitting diode (OLED). The inorganic insulating layer IL may include a buffer layer 111, a first gate insulating layer 112, a second gate insulating layer 113, and an interlayer insulating layer 114. The pixel circuit PC may include a thin-film transistor (TFT) and a storage capacitor Cst.

[0106] Buffer layer 111 may be located above substrate 100. Buffer layer 111 may include materials such as silicon nitride (SiN). X Inorganic insulating materials consisting of silicon oxynitride (SiON) and silicon oxide (SiO2), and may be a single layer or multiple layers comprising the aforementioned inorganic insulating materials.

[0107] The thin-film transistor (TFT) may include a semiconductor layer Act, which may be disposed above the buffer layer 111. The semiconductor layer Act may include polycrystalline silicon. Alternatively, the semiconductor layer Act may include amorphous silicon, oxide semiconductor, or organic semiconductor. The semiconductor layer Act may include a channel region and drain and source regions on opposite sides of the channel region. The gate electrode GE may overlap with the channel region.

[0108] The gate electrode GE may include a low-resistance metallic material. The gate electrode GE may include a conductive material, such as molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may include multiple layers or a single layer, wherein the multiple layers or the single layer include those materials.

[0109] The first gate insulating layer 112 between the semiconductor layer Act and the gate electrode GE may include materials such as silicon dioxide (SiO2) and silicon nitride (SiN). X ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium dioxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2) or zinc oxide (ZnO) X ZnO X It can be an inorganic insulating material (ZnO and / or ZnO2).

[0110] The second gate insulating layer 113 can be provided to cover the gate electrode GE. Similar to the first gate insulating layer 112, the second gate insulating layer 113 can include materials such as SiO2 and SiN. X , SiON, Al2O3, TiO2, Ta2O5, HfO2 or ZnO X Inorganic insulating materials (which can be ZnO and / or ZnO2).

[0111] The upper electrode CE2 of the storage capacitor Cst can be disposed above the second gate insulating layer 113. The upper electrode CE2 can overlap with the gate electrode GE below it. In this respect, the gate electrode GE and the upper electrode CE2 can form the storage capacitor Cst, with the gate electrode GE and the upper electrode CE2 overlapping each other, and the second gate insulating layer 113 between the gate electrode GE and the upper electrode CE2. That is, the gate electrode GE can be used as the lower electrode CE1 of the storage capacitor Cst.

[0112] Thus, the storage capacitor Cst and the thin-film transistor TFT can be formed to overlap each other. In some embodiments, the storage capacitor Cst can be formed not to overlap with the thin-film transistor TFT.

[0113] The upper electrode CE2 may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W) and / or copper (Cu), and may be a single layer or multiple layers of the above materials.

[0114] The interlayer insulating layer 114 may cover the upper electrode CE2. The interlayer insulating layer 114 may include SiO2, SiN X , SiON, Al2O3, TiO2, Ta2O5, HfO2 or ZnO X (It can be ZnO and / or ZnO2). The interlayer insulation layer 114 can be a single layer or multiple layers including the above-mentioned inorganic insulating materials.

[0115] Each of the drain electrode DE and the source electrode SE can be disposed above the interlayer insulating layer 114. The drain electrode DE and the source electrode SE can comprise materials with good conductivity. The drain electrode DE and the source electrode SE can comprise conductive materials, including Mo, Al, Cu, or Ti, and can be multilayers or single layers comprising the above materials. In an embodiment, the drain electrode DE and the source electrode SE can each have a Ti / Al / Ti multilayer structure.

[0116] The first planarization layer 115 may be arranged to cover the drain electrode DE and the source electrode SE. The first planarization layer 115 may include an organic insulating layer. The first planarization layer 115 may include a general polymer such as polymethyl methacrylate (PMMA) or polystyrene (PS), a polymer derivative having phenolic groups, or an organic insulating material such as an acrylic polymer, an imide polymer, an aryl ether polymer, an amide polymer, a fluoropolymer, a p-xylyl polymer, a vinyl alcohol polymer, or a mixture thereof.

[0117] The connecting electrode CM can be disposed above the first planarization layer 115. In this case, the connecting electrode CM can be connected to the drain electrode DE or the source electrode SE via contact holes in the first planarization layer 115. The connecting electrode CM can include a material with good conductivity. The connecting electrode CM can include a conductive material, such as Mo, Al, Cu, Ti, etc., and can include multiple layers or a single layer, wherein the multiple layers or the single layer include the conductive material. In an embodiment, the connecting electrode CM can have a Ti / Al / Ti multilayer structure.

[0118] The second planarization layer 117 may be positioned to cover the connection electrode CM. The second planarization layer 117 may include an organic insulating layer. The second planarization layer 117 may include a general polymer such as PMMA or PS, a polymer derivative having phenolic groups, or an organic insulating material such as an acrylic polymer, an imide polymer, an aryl ether polymer, an amide polymer, a fluoropolymer, a p-xylyl polymer, a vinyl alcohol polymer, or a mixture thereof.

[0119] An organic light-emitting diode (OLED) can be placed on a second planarization layer 117. An OLED can emit red, green, or blue light, or it can emit red, green, blue, or white light. An OLED may include a pixel electrode 211, an intermediate layer 212, and a counter electrode 213.

[0120] Pixel electrode 211 may be disposed above second planarization layer 117. Pixel electrode 211 may be electrically connected to connection electrode CM via contact holes in second planarization layer 117. Pixel electrode 211 may include conductive oxides such as ITO, IZO, ZnO, In2O3, IGO, and AZO. In one embodiment, pixel electrode 211 may include a reflective film comprising Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, or compounds thereof. In another embodiment, pixel electrode 211 may also include a film comprising ITO, IZO, ZnO, or In2O3 above / below the reflective film. For example, pixel electrode 211 may have an ITO / Ag / ITO multilayer structure.

[0121] A pixel defining layer 118 having an opening 118OP exposing the central portion of the pixel electrode 211 can be placed on the pixel electrode 211. The pixel defining layer 118 may include an organic insulating material and / or an inorganic insulating material. The opening 118OP may define an emission region of an organic light-emitting diode (OLED) from which light is emitted (hereinafter, this emission region will be referred to as the light-emitting region EA). For example, the width of the opening 118OP may correspond to the width of the light-emitting region EA.

[0122] Spacer 119 may be located above pixel defining layer 118. Spacer 119 may comprise an organic insulating material such as polyimide. Alternatively, spacer 119 may comprise a material such as SiN. X Inorganic insulating materials, such as SiO2, or may include both organic and inorganic insulating materials.

[0123] In one embodiment, spacer 119 may comprise a material different from that of pixel defining layer 118. Alternatively, in another embodiment, spacer 119 may comprise the same material as pixel defining layer 118, and in this case, pixel defining layer 118 and spacer 119 may be formed together in a masking process using a halftone mask or the like.

[0124] Intermediate layer 212 may be disposed above pixel defining layer 118. Intermediate layer 212 may include emitting layer 212b at opening 118OP of pixel defining layer 118. Emitting layer 212b may include high molecular weight or low molecular weight organic material that emits light of a specific color.

[0125] The first functional layer 212a and the second functional layer 212c can be positioned below and above the emitter layer 212b, respectively. The first functional layer 212a may include, for example, a hole transport layer (HTL), or may include an HTL and a hole injection layer (HIL). The second functional layer 212c is a component placed on the emitter layer 212b and may be omitted. The second functional layer 212c may include an electron transport layer (ETL) and / or an electron injection layer (EIL). Similar to the opposing electrode 213, which will be described later below, the first functional layer 212a and / or the second functional layer 212c may be a common layer formed to completely cover the substrate 100.

[0126] The counter electrode 213 may comprise a conductive material having a low work function. For example, the counter electrode 213 may comprise a (semi-)transparent layer comprising Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, Ca, or alloys thereof. Alternatively, the counter electrode 213 may also comprise a layer such as ITO, IZO, ZnO, or In2O3 on top of a (semi-)transparent layer comprising the aforementioned materials.

[0127] In some embodiments, a capping layer (not shown) may further be located above the opposing electrode 213. The capping layer (not shown) may include lithium fluoride (LiF), inorganic and / or organic materials.

[0128] The thin-film encapsulation layer TFE can cover the organic light-emitting diode (OLED). That is, the thin-film encapsulation layer TFE can be above the opposing electrode 213. In an embodiment, the thin-film encapsulation layer TFE includes at least one inorganic encapsulation layer and at least one organic encapsulation layer, and... Figure 7 In one embodiment, the thin-film encapsulation layer TFE includes a first inorganic encapsulation layer 310, an organic encapsulation layer 320, and a second inorganic encapsulation layer 330 stacked sequentially.

[0129] The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may include Al2O3, TiO2, Ta2O5, HfO2, and ZnO. X (can be ZnO and / or ZnO2), SiO2, SiN X The organic encapsulation layer 320 may comprise at least one inorganic material, including SiON. Examples of polymer-based materials include acrylic resins, epoxy resins, polyimides, and / or polyethylene. In some embodiments, the organic encapsulation layer 320 may comprise acrylates.

[0130] The touch sensor layer (TSL) may be located above the thin-film encapsulation layer (TFE). In the touch sensor layer (TSL), insulating and conductive layers may be stacked alternately. For example, the touch sensor layer (TSL) may include a first conductive layer 410 and a second conductive layer 430. In this case, a first touch insulating layer 420 may be disposed between the first conductive layer 410 and the second conductive layer 430. A second touch insulating layer 440 may be disposed above the second conductive layer 430. In some embodiments, an inorganic insulating layer may also be included between the second inorganic encapsulation layer 330 and the first conductive layer 410.

[0131] The sensor electrodes of the touch sensor layer TSL and the touch wires connected to the sensor electrodes may be included in at least one of the first conductive layer 410 and the second conductive layer 430. The first conductive layer 410 or the second conductive layer 430 may include a metal layer or a transparent conductive layer. The metal layer may include Mo, Mg, Ag, Ti, Cu, Al, and alloys thereof. The transparent conductive layer may include transparent conductive oxides such as ITO, IZO, ZnO, and / or ITZO. Furthermore, the transparent conductive layer may include conductive polymers such as poly(3,4-ethylenedioxythiophene) (PEDOT), metal nanowires, and / or graphene.

[0132] The first conductive layer 410 or the second conductive layer 430 can be a single layer or multiple layers. If the first conductive layer 410 and the second conductive layer 430 are single layers, they may include a metal layer or a transparent conductive layer, and the materials of the metal layer and the transparent conductive layer are as described above. One of the first conductive layer 410 and the second conductive layer 430 may include a single metal layer. One of the first conductive layer 410 and the second conductive layer 430 may include multiple metal layers. The multiple metal layers may include, for example, a three-layer Ti / Al / Ti or a two-layer Mo / Mg. Alternatively, the multiple metal layers may include a metal layer and a transparent conductive layer. The first conductive layer 410 and the second conductive layer 430 may have different stacking structures or may have the same stacking structure. For example, the first conductive layer 410 may include a metal layer, and the second conductive layer 430 may include a transparent conductive layer. Alternatively, the first conductive layer 410 and the second conductive layer 430 may include the same metal layer.

[0133] Each of the first touch insulating layer 420 and the second touch insulating layer 440 may include an inorganic insulating material and / or an organic insulating material. The inorganic insulating material may include SiO2, SiN... X Or SiON, and organic insulating materials may include polymeric organic materials.

[0134] The inorganic insulating layer IL can be in the peripheral region PA. In an embodiment, the inorganic insulating layer IL can be in the adjacent region AA and the pad region PDA. In this case, the inorganic insulating layer IL can include a lower opening portion IL_OP. The lower opening portion IL_OP can overlap with the bent region BA. For example, the lower opening portion IL_OP can be formed by overlapping the openings in the buffer layer 111, the first gate insulating layer 112, the second gate insulating layer 113, and the interlayer insulating layer 114. Figure 7 In one embodiment, the lower opening portion IL_OP is formed to penetrate the inorganic insulating layer IL. However, in another embodiment, the inorganic insulating layer IL may include a groove overlapping the bending region BA. Here, the groove may refer to the removal of a portion of the inorganic insulating layer IL from the inorganic insulating layer IL in the depth direction, while the remaining portion of the inorganic insulating layer IL is retained. For example, the buffer layer 111 may be continuously arranged to correspond to the bending region BA, and each of the first gate insulating layer 112, the second gate insulating layer 113, and the interlayer insulating layer 114 may have an opening.

[0135] In an embodiment, the width of the lower opening portion IL_OP can be greater than the width of the bent region BA. In this case, the width of the lower opening portion IL_OP can be defined as the shortest distance among the distances between facing buffer layers 111, facing first gate insulating layers 112, facing second gate insulating layers 113, and facing interlayer insulating layers 114. For example, in... Figure 7 In the middle, the width of the lower opening portion IL_OP can be limited to the shortest distance between the buffer layers 111 facing each other in the lower opening portion IL_OP.

[0136] In one embodiment, the inner surfaces of the openings in the buffer layer 111, the first gate insulating layer 112, the second gate insulating layer 113, and the interlayer insulating layer 114 may be consistent or aligned. In another embodiment, any one of the inner surfaces of the openings in the buffer layer 111, the first gate insulating layer 112, the second gate insulating layer 113, and the interlayer insulating layer 114 may be consistent or aligned with another one of the inner surfaces of the openings in the buffer layer 111, the first gate insulating layer 112, the second gate insulating layer 113, and the interlayer insulating layer 114. In this case, the lower opening portion IL_OP may have a step.

[0137] The lower organic insulating layer 115A can be disposed within the lower opening portion IL_OP. The lower organic insulating layer 115A can be disposed below the connecting line CL. In this case, the lower organic insulating layer 115A can fill the lower opening portion IL_OP. Therefore, the lower organic insulating layer 115A can overlap with the lower opening portion IL_OP.

[0138] The lower organic insulating layer 115A can be disposed separately from the first planarization layer 115. The lower organic insulating layer 115A may comprise a general polymer such as PMMA or PS, a polymer derivative having phenolic groups, or an organic insulating material such as an acrylic polymer, imide polymer, aryl ether polymer, amide polymer, fluoropolymer, p-xylylene polymer, vinyl alcohol polymer, or mixtures thereof. In an embodiment, the lower organic insulating layer 115A may comprise the same material as the first planarization layer 115. In this case, the lower organic insulating layer 115A may be formed simultaneously with the formation of the first planarization layer 115.

[0139] The first lower line LL1 may extend in the direction from the display area DA to the bending area BA. The first lower line LL1 may be in an adjacent area AA and may be spaced apart from the bending area BA. Therefore, the first lower line LL1 may not overlap with the bending area BA. In one embodiment, the first lower line LL1 may be between the first gate insulating layer 112 and the second gate insulating layer 113. In this case, the first lower line LL1 may include the same material as the gate electrode GE. The first lower line LL1 may be formed simultaneously when the gate electrode GE is formed. In another embodiment, the first lower line LL1 may be between the second gate insulating layer 113 and the interlayer insulating layer 114. In this case, the first lower line LL1 may include the same material as the upper electrode CE2. The first lower line LL1 may be formed simultaneously when the upper electrode CE2 is formed. Although not shown, similar to the first lower line LL1, the second lower line LL2 may also be between the first gate insulating layer 112 and the second gate insulating layer 113 or between the second gate insulating layer 113 and the interlayer insulating layer 114.

[0140] The connecting line CL can be positioned within the bending region BA. The connecting line CL can extend in a direction from the display region DA to the pad region PDA. The connecting line CL can be located above the lower organic insulating layer 115A. In one embodiment, the connecting line CL can comprise the same material as the connecting electrode CM. In this case, the connecting line CL can be formed simultaneously with the forming of the connecting electrode CM. In another embodiment, the connecting line CL can comprise the same material as the source electrode SE or the drain electrode DE. In this case, the connecting line CL can be formed simultaneously with the forming of the source electrode SE or the drain electrode DE.

[0141] The connecting line CL can be connected to the first lower line LL1 and the second lower line LL2. That is, the connecting line CL can extend to intersect with the bending region BA, such that the first lower line LL1 is connected to the second lower line LL2. For example, the connecting line CL can be connected to the first lower line LL1 via a first contact hole CNT1 provided in the second gate insulating layer 113 and the interlayer insulating layer 114.

[0142] The first organic insulating layer 117A and the second organic insulating layer 118A can be arranged sequentially to cover the connecting line CL. The first organic insulating layer 117A and the second organic insulating layer 118A can be arranged to overlap with the bending region BA.

[0143] The first organic insulating layer 117A may be disposed separately from the second planarization layer 117. The first organic insulating layer 117A may comprise a general polymer such as PMMA or PS, a polymer derivative having phenolic groups, or an organic insulating material such as an acrylic polymer, an imide polymer, an aryl ether polymer, an amide polymer, a fluoropolymer, a p-xylyl polymer, a vinyl alcohol polymer, or mixtures thereof. In an embodiment, the first organic insulating layer 117A may comprise the same material as the second planarization layer 117. In this case, the first organic insulating layer 117A may be formed simultaneously with the formation of the second planarization layer 117.

[0144] The second organic insulating layer 118A may be disposed above the first organic insulating layer 117A. The second organic insulating layer 118A may be disposed separately from the pixel defining layer 118. The second organic insulating layer 118A may comprise a general polymer such as PMMA or PS, a polymer derivative having phenolic groups, or an organic insulating material such as an acrylic polymer, an imide polymer, an aryl ether polymer, an amide polymer, a fluoropolymer, a p-xylylene polymer, a vinyl alcohol polymer, or a mixture thereof. In an embodiment, the second organic insulating layer 118A may comprise the same material as the pixel defining layer 118. In this case, the second organic insulating layer 118A may be formed simultaneously with the formation of the pixel defining layer 118.

[0145] A dummy pattern DP can be disposed between the first organic insulating layer 117A and the second organic insulating layer 118A. In this case, the dummy pattern DP can overlap with the bend region BA and can extend from the bend region BA to the pad region PDA. For example, the dummy pattern DP may include a first extension LP1 extending from the bend region BA to the first pad region PADA1.

[0146] A dummy pattern DP can be separated from the display area DA. Therefore, the dummy pattern DP does not need to transmit signals or voltages to the display area DA.

[0147] The dummy pattern DP can be exposed to the outside from the pad area PDA. In an embodiment, the second organic insulating layer 118A may include an insulating layer opening portion OP that overlaps with the pad area PDA. Therefore, the first extension portion LP1 of the dummy pattern DP can be exposed by the insulating layer opening portion OP.

[0148] The dummy pattern DP can cover the connecting line CL. The dummy pattern DP can overlap with the connecting line CL in the bending region BA. In an embodiment, the dummy pattern DP can be above the connecting line CL, and therefore, the dummy pattern DP can comprise a material having a higher elongation than the connecting line CL. In an embodiment, the dummy pattern DP can comprise the same material as the pixel electrode 211. In this case, the dummy pattern DP can be formed simultaneously with the formation of the pixel electrode 211.

[0149] The dummy pattern DP can be electrically insulated from the connecting line CL. In an embodiment, the dummy pattern DP can be spaced apart from the connecting line CL. Furthermore, an insulating layer (e.g., a first organic insulating layer 117A) can be present between the dummy pattern DP and the connecting line CL, making them electrically insulated from each other. The dummy pattern DP can be electrically insulated from the first lower line LL1 and the second lower line LL2. In an embodiment, the dummy pattern DP can be spaced apart from the first lower line LL1 and the second lower line LL2. Furthermore, an insulating layer is present between the dummy pattern DP and the first lower line LL1 and between the dummy pattern DP and the second lower line LL2, and the dummy pattern DP can be electrically insulated from each of the first lower line LL1 and the second lower line LL2.

[0150] The upper insulating layer 119A may be disposed above the second organic insulating layer 118A. The upper insulating layer 119A may be disposed separately from the spacer 119. The upper insulating layer 119A may comprise the same material as the spacer 119. In this case, the upper insulating layer 119A may be formed simultaneously with the spacer 119.

[0151] The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 can be in contact with each other in the peripheral region PA. Furthermore, in this embodiment, the first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 can be in contact with the inorganic insulating layer IL. Therefore, external moisture and foreign matter can be prevented from penetrating into the display area DA.

[0152] A bending protection layer 500 can be disposed above the upper insulating layer 119A. The bending protection layer 500 can overlap with the bending region BA and can be disposed above the connecting line CL. When the laminate is bent, the stress neutral surface can be positioned within the laminate. When the bending protection layer 500 is not disposed, excessive tensile stress may be applied to the connecting line CL in the bending region BA as the substrate 100, etc., bends. This is because the position of the connecting line CL in the bending region BA may not correspond to the stress neutral surface. However, the position of the stress neutral surface in the bending region BA of the laminate, including all substrates 100, connecting lines CL, and the bending protection layer 500, can be adjusted by providing the bending protection layer 500 and adjusting its thickness and modulus. Therefore, by placing the stress neutral surface near the connecting line CL in the bending region BA via the bending protection layer 500, the stress applied to the connecting line CL in the bending region BA can be significantly reduced. The bending protective layer 500 can be formed by applying a liquid or paste-type material and then curing the liquid or paste-type material.

[0153] Figure 8A These are comparative examples used for comparison with embodiments of the present invention. Figure 8B This is a cross-sectional view of the display panel according to an embodiment. (Reference) Figure 8A and Figure 8B ,and Figure 7 The same reference numerals in the accompanying drawings indicate the same components, and redundant descriptions will be omitted.

[0154] refer to Figure 8A and Figure 8B The display panel may include a substrate 100, a display layer DSL, a thin-film encapsulation layer TFE, and a touch sensor layer TSL. In this case, the touch sensor layer TSL may include a first conductive layer 410, a first touch insulating layer 420, a second conductive layer 430, and a second touch insulating layer 440.

[0155] The second conductive layer 430 can be formed by performing an etching process after the metal material has been completely formed. In this case, the process of forming the second conductive layer 430 can be performed at a low temperature. For example, the second conductive layer 430 can be formed at a temperature of about 0°C to about 150°C.

[0156] In the process of forming the second conductive layer 430, an upper metal layer 430A may be formed in the peripheral region PA. The upper metal layer 430A may be a metal layer that was not etched in the process of forming the second conductive layer 430. In an embodiment, the upper metal layer 430A may include TiO2. Because the process of forming the second conductive layer 430 is performed at a low temperature, it may be difficult to control the formation of the upper metal layer 430A.

[0157] The upper metal layer 430A, as described above, can also be formed in the bending region BA. For example, the upper metal layer 430A can be above the second organic insulating layer 118A or the upper insulating layer 119A. When the substrate 100 is bent in the bending region BA, the upper metal layer 430A can increase the tensile stress in the bending region BA. Therefore, referring to... Figure 8A The upper insulation layer 119A, the second organic insulation layer 118A, and the first organic insulation layer 117A may crack. The crack may propagate to the connecting wire CL and damage the connecting wire CL.

[0158] refer to Figure 8B A dummy pattern DP can be disposed between the first organic insulating layer 117A and the second organic insulating layer 118A. Therefore, even if a crack generated by the upper metal layer 430A propagates to the second organic insulating layer 118A, the dummy pattern DP can prevent or reduce the propagation of the crack to the connecting line CL. Therefore, according to the embodiment, damage to the connecting line CL can be prevented or reduced, and thus the reliability of the display panel and / or display device can be improved.

[0159] Furthermore, the dummy pattern DP can be spaced apart from the display area DA, and the dummy pattern DP does not necessarily have to be a line that transmits signals and voltages to the display area DA. For example... Figure 7 As described, the dummy pattern DP extends from the bend region BA to the pad region PDA and is exposed to the outside, thus allowing for easy measurement of the resistance of the dummy pattern DP. When the dummy pattern DP is a line transmitting signals and voltage to the display area DA, measuring its resistance can be difficult. Because the dummy pattern DP in this embodiment is not a line transmitting signals and voltage to the display area DA, its resistance can be easily measured. Therefore, changes in the resistance of the dummy pattern DP can be used to check whether it has broken.

[0160] Figure 9 This is an enlarged view of a portion of a display panel according to another embodiment. Figure 10 It is along Figure 9 The respective cuts of lines C-C' and D-D' are schematically shown. Figure 9 A cross-sectional view of the display panel. Figure 9 It shows the relationship with Figure 5 The components are the same as the components, and therefore repeated descriptions will be omitted. Figure 10 In, with Figure 7 The same reference numerals in the accompanying drawings denote the same components, and therefore redundant descriptions will be omitted.

[0161] refer to Figure 9 and Figure 10The display panel may include a substrate 100, connecting lines CL, a first lower line LL1, a second lower line LL2, and a dummy pattern DP. The substrate 100 may include a display area DA and a peripheral area PA. The peripheral area PA may include an adjacent area AA, a pad area PDA, and a bending area BA.

[0162] The pad area PDA can be outside the display area DA, and the bending area BA can be between the display area DA and the pad area PDA.

[0163] Connecting lines CL can exist within the bending area BA. Connecting lines CL can extend in the direction from the display area DA to the pad area PDA. There can be multiple connecting lines CL within the bending area BA. For example, connecting lines CL can include multiple connecting lines CL spaced apart from each other.

[0164] The connecting line CL can be connected to each of the first lower line LL1 and the second lower line LL2. That is, the connecting line CL can be extended to intersect with the bending area BA, so that the first lower line LL1 is connected to the second lower line LL2.

[0165] A dummy pattern DP can be arranged within the bend region BA. The dummy pattern DP can be spaced apart from the display region DA. For example, the dummy pattern DP can be spaced apart from the display region DA in a second direction (e.g., the y-direction or the -y-direction) and can be arranged within the peripheral region PA. In an embodiment, the dummy pattern DP can be spaced apart from the first pad region PADA1 and the second pad region PADA2. For example, the dummy pattern DP can be spaced apart from the first pad region PADA1 and the second pad region PADA2 in a second direction (e.g., the y-direction or the -y-direction). In this case, the dummy pattern DP may not be exposed to the outside.

[0166] There can be multiple dummy patterns DP in the bending region BA. For example, the dummy patterns DP can include multiple dummy patterns DP spaced apart from each other in the bending region BA. The multiple dummy patterns DP can be spaced apart from each other along a first direction (e.g., the x-direction or the -x-direction). In this case, the line can also be extended to the display region DA by utilizing the area arrangement between adjacent dummy patterns DP.

[0167] Multiple dummy patterns DP can overlap with multiple connecting lines CL, respectively. For example, the multiple dummy patterns DP may include a first dummy pattern DP1 and a second dummy pattern DP2 that are adjacent to each other. The multiple connecting lines CL may include a first connecting line CL1 and a second connecting line CL2 that are adjacent to each other. The first dummy pattern DP1 may overlap with the first connecting line CL1. The second dummy pattern DP2 may overlap with the second connecting line CL2. Therefore, the multiple dummy patterns DP can prevent multiple connecting lines CL from being damaged, and thus can improve the reliability of the display panel and / or display device.

[0168] The second lower line LL2 may extend from the bending region BA in a direction away from the display region DA. The second lower line LL2 may be spaced apart from the bending region BA. Therefore, the second lower line LL2 may not overlap with the bending region BA. In one embodiment, the second lower line LL2 may be disposed between the first gate insulating layer 112 and the second gate insulating layer 113. In this case, the second lower line LL2 may comprise the same material as the gate electrode GE. The second lower line LL2 may be formed simultaneously with the formation of the gate electrode GE. In another embodiment, the second lower line LL2 may be located between the second gate insulating layer 113 and the interlayer insulating layer 114. In this case, the second lower line LL2 may comprise the same material as the upper electrode CE2. The second lower line LL2 may be formed simultaneously with the formation of the upper electrode CE2.

[0169] The second lower line LL2 can be connected to the connection line CL via the second contact hole CNT2 provided in the second gate insulating layer 113 and the interlayer insulating layer 114.

[0170] In one embodiment, the dummy pattern DP can be completely covered by the second organic insulating layer 118A. In this case, the dummy pattern DP is not exposed to the outside within the pad area PDA. Furthermore, in one embodiment, the dummy pattern DP can be electrically insulated from the connection line CL. For example, the first organic insulating layer 117A is disposed between the dummy pattern DP and the connection line CL, and therefore, the dummy pattern DP and the connection line CL can be electrically insulated from each other.

[0171] As described above, one or more embodiments may include a dummy pattern disposed between the first organic insulating layer and the second organic insulating layer. Therefore, damage to the connecting wires in the bending area can be prevented.

[0172] Furthermore, the dummy pattern may include a first extension and a second extension, each extending from the bending region to the pad region. Therefore, the resistance of the dummy pattern can be measured, and damage to the dummy pattern can be detected. This improves the reliability of the display device.

[0173] Although specific exemplary embodiments have been described herein, other embodiments and modifications will be apparent from that description. Therefore, the inventive concept is not limited to such embodiments, but rather to the broader scope as will be apparent to those skilled in the art to the appended claims and various obvious modifications and equivalent arrangements.

Claims

1. A display device, wherein, The display device includes: The substrate includes a display area, a pad area, and a bending area, wherein the pad area is located outside the display area and the bending area is located between the display area and the pad area; The connecting line extends in the direction from the display area to the pad area and is arranged in the bending area; A first organic insulating layer and a second organic insulating layer, the first organic insulating layer and the second organic insulating layer being arranged sequentially to cover the connecting wire; and A dummy pattern is positioned between the first organic insulating layer and the second organic insulating layer, and the dummy pattern includes a conductive material. The dummy pattern includes a main body portion, a first extension portion, and a second extension portion. The main body portion is arranged in the bending region. The first extension portion and the second extension portion each extend from the bending region to the pad region, and the first extension portion and the second extension portion are spaced apart from each other in the pad region. In the plan view, the connecting line overlaps with the main body in the bending area.

2. The display device according to claim 1, wherein: The connecting line includes a first connecting line and a second connecting line; and The dummy pattern overlaps with each of the first and second connecting lines.

3. The display device according to claim 1, wherein: The second organic insulating layer includes an opening portion of the insulating layer that overlaps with the pad region; and At least one of the first extension portion and the second extension portion is exposed by the opening portion of the insulating layer.

4. The display device according to claim 1, wherein, The connecting line and the dummy pattern are electrically insulated from each other.

5. The display device according to claim 1, wherein, The display device further includes: a display element disposed above the display area, the display element including pixel electrodes and opposing electrodes. The dummy pattern includes the same material as the pixel electrode.

6. The display device according to claim 5, wherein, The display device further includes: A thin-film transistor is positioned above the substrate and is connected to the display element; A first planarization layer and a second planarization layer are disposed between the thin-film transistor and the pixel electrode; and A pixel defining layer covers the edge of the pixel electrode, the pixel defining layer including an opening exposing a central portion of the pixel electrode. in: The first organic insulating layer comprises the same material as the second planarization layer; and The second organic insulating layer comprises the same material as the pixel defining layer.

7. The display device according to claim 1, wherein, The display device further includes an inorganic insulating layer disposed above the substrate. The inorganic insulating layer includes a lower opening portion that overlaps with the bent region.

8. The display device according to claim 7, wherein, The display device further includes: a lower organic insulating layer disposed below the first organic insulating layer. The lower organic insulating layer overlaps with the lower opening portion.

9. The display device according to claim 1, wherein, The dummy pattern is spaced apart from the display area.

10. A display device, wherein, The display device includes: The substrate includes a display area, a pad area, and a bending area, wherein the pad area is located outside the display area and the bending area is located between the display area and the pad area; Multiple connecting lines extend in the direction from the display area to the pad area and are arranged in the bending area; A first organic insulating layer and a second organic insulating layer, the first organic insulating layer and the second organic insulating layer being arranged sequentially to cover the plurality of connecting lines; and Multiple dummy patterns are arranged between the first organic insulating layer and the second organic insulating layer. These dummy patterns are positioned in the bending region and extend in the direction from the display area to the pad area. The plurality of dummy patterns include conductive materials. The plurality of dummy patterns are spaced apart from the display area. In the plan view, each of the multiple connecting lines overlaps with a corresponding one of the multiple dummy patterns.

11. The display device according to claim 10, wherein: The plurality of dummy patterns includes a first dummy pattern and a second dummy pattern; and The first dummy pattern and the second dummy pattern are spaced apart from each other in the bending region.

12. The display device according to claim 11, wherein: The plurality of connecting lines includes a first connecting line and a second connecting line, wherein the first connecting line and the second connecting line are adjacent to each other; and The first connecting line and the second connecting line each overlap with the first dummy pattern.

13. The display device according to claim 11, wherein: The plurality of connecting lines includes a first connecting line and a second connecting line, wherein the first connecting line and the second connecting line are adjacent to each other; The first connecting line overlaps with the first dummy pattern; and The second connecting line overlaps with the second dummy pattern.

14. The display device according to claim 11, wherein, The first dummy pattern includes a first extension portion and a second extension portion, which extend from the bending region to the pad region, respectively.

15. The display device according to claim 14, wherein: The second organic insulating layer includes an opening portion of the insulating layer that overlaps with the pad region; and At least one of the first extension portion and the second extension portion is exposed by the opening portion of the insulating layer.

16. The display device according to claim 10, wherein, The multiple connecting lines and the multiple dummy patterns are electrically insulated from each other.

17. The display device according to claim 10, wherein, The display device further includes: a display element positioned above the display area, the display element including pixel electrodes and a counter electrode. The plurality of dummy patterns include materials that are the same as those used for the pixel electrodes.

18. The display device according to claim 17, wherein, The display device further includes: A thin-film transistor is disposed above the substrate and connected to the display element; A first planarization layer and a second planarization layer are disposed between the thin-film transistor and the pixel electrode; and A pixel defining layer covers the edge of the pixel electrode, the pixel defining layer including an opening exposing a central portion of the pixel electrode. in: The first organic insulating layer comprises the same material as the second planarization layer; and The second organic insulating layer comprises the same material as the pixel defining layer.

19. The display device according to claim 10, wherein, The display device further includes: an inorganic insulating layer above the substrate. The inorganic insulating layer includes a lower opening portion that overlaps with the bent region.

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