Dosage optimization techniques for mask synthesis tools

Abstract

Embodiments of this disclosure relate to dose optimization techniques for mask synthesis tools. One method includes: receiving an integrated circuit (IC) chip design; and generating dose information, a wafer image, and a wafer target based on the IC chip design using one or more processors. The method further includes: modifying the dose information based on a comparison of the wafer image and the wafer target using the one or more processors. The method also includes: outputting the modified dose information to a mask writing device.

Description

Technical Field

[0001] This disclosure relates to generating dose information for photolithography manufacturing processes, and more specifically to generating dose information based on wafer simulation. Background Technology

[0002] Photolithography manufacturing systems manufacture integrated circuit (IC) chips based on relevant IC chip designs. During the manufacturing process, photolithography systems use masks (photomasks) to control the location where light is applied to a layer of photoresist material on a wafer (e.g., a substrate). The mask is positioned above the wafer, and light is applied to the wafer through the mask. As the light passes through holes within the mask, it interacts with the photoresist material. The wafer is then developed and processed via etching or deposition processes for IC chip manufacturing.

[0003] Mask writing processes are used to form a mask from a mask preform. For example, a mask writer device applies one or more energy beams to the mask preform to develop the mask. In many cases, the mask writer device determines dosage information to control the exposure energy used during IC chip manufacturing. Summary of the Invention

[0004] In one example, a method includes: receiving an integrated circuit (IC) chip design; and generating dose information, a wafer image, and a wafer target based on the IC chip design using one or more processors. The method further includes: modifying the dose information based on a comparison of the wafer image and the wafer target using one or more processors. The method also includes: outputting the modified dose information to a mask writing device.

[0005] In one example, a lithography system includes a memory and a processor coupled to the memory. The processor is configured to receive an IC chip design and generate dose information, a wafer image, and a wafer target based on the IC chip design. The processor is also configured to modify the dose information based on a comparison of the wafer image and the wafer target, and output the modified dose information to a mask writing device.

[0006] In one example, a non-transitory computer-readable medium includes stored instructions that, when executed by a processor, cause the processor to receive an IC chip design and, based on the IC chip design, generate dosage information, a wafer image, and a wafer target. The processor also causes to modify the dosage information based on a comparison of the wafer image and the wafer target and output the modified dosage information to a mask writing device. Attached Figure Description

[0007] This disclosure will be more fully understood with reference to the accompanying drawings of the specific embodiments given below and the examples of the present disclosure. The drawings are provided to give knowledge and understanding of embodiments of the present disclosure and are not intended to limit the scope of the disclosure to these particular embodiments. Furthermore, the drawings are not necessarily drawn to scale.

[0008] Figure 1 A block diagram of a lithography system according to some embodiments of the present disclosure is illustrated.

[0009] Figure 2 The illustration shows a flowchart of a method for modifying dosage information according to some embodiments of the present disclosure.

[0010] Figure 3 The illustration shows a flowchart of a method for modifying dosage information according to some embodiments of the present disclosure.

[0011] Figure 4 The illustration shows portions of dosage information according to some embodiments of the present disclosure.

[0012] Figure 5 The illustration shows a flowchart of a method for outputting a vector-based file of dose information according to some embodiments of the present disclosure.

[0013] Figure 6 A flowchart illustrating a method for vectorizing dose information according to some embodiments of the present disclosure is shown.

[0014] Figure 7 A portion of an example dose distribution according to some embodiments of this disclosure is shown.

[0015] Figure 8 A flowchart illustrating a method for vectorizing dose information according to some embodiments of the present disclosure is shown.

[0016] Figure 9 A portion of an example dose distribution according to some embodiments of this disclosure is shown.

[0017] Figure 10 The illustration shows a flowchart of a method for outputting a vector-based file of dose information according to some embodiments of the present disclosure.

[0018] Figure 11 Flowcharts depict various processes used during the design and manufacture of integrated circuits according to some embodiments of this disclosure.

[0019] Figure 12 An abstract diagram of an example computer system in which embodiments of the present disclosure may operate is depicted. Detailed Implementation

[0020] Various aspects of this disclosure relate to the generation and communication of dose information for photolithography manufacturing systems.

[0021] Integrated circuit (IC) chips are manufactured using a photolithography system employing a photolithography process. The photolithography system exposes a photoresist layer on a wafer (e.g., a substrate) to light using a mask (e.g., a photomask). The mask is generated (e.g., written or printed) using a mask writing device based on a digital mask design file received from a mask synthesis engine.

[0022] The mask compositing engine implements processes such as Optical Proximity Correction (OPC) and Inverse Lithography (ILT) to generate mask design files. These design files can include polygons generated from an IC chip design. The mask compositing engine generates one or more mask design files based on the IC chip's circuit design. For example, the engine determines the polygons (e.g., geometry) of the mask based on the IC chip's circuit design; these polygons define the pattern of holes (or openings or apertures) within the mask.

[0023] During the manufacturing process, a mask is placed on a wafer (or substrate). Ultraviolet light, or other types of light suitable for reacting with photoresist, is applied to the wafer. The mask blocks light in areas that do not correspond to apertures, but allows light to pass through areas that do. As light passes through the apertures, it interacts with photosensitive material on the wafer in the corresponding areas, thereby creating a pattern on the wafer. The patterned wafer is then exposed to etching and / or deposition processes to fabricate an IC chip.

[0024] During the mask writing process, the mask is generated based on the mask design. The mask writing device includes a multi-beam mask writer (MBMW) device. The mask writing device applies an energy beam to the mask blank based on dose information and the mask design file to generate the printed mask.

[0025] In many photolithography manufacturing systems, the mask composition engine and mask writing device are separated, making them independently implemented and difficult to tightly couple. In such systems, the mask composition engine and mask writing device rely on digital mask design files in vector file formats (e.g., Graphical Design System (GDS) stream format or Open Artwork Systems Exchange Standard (OASIS) format) to switch between the mask composition and writing tools. In this system, dosing information is generated by the mask writing device. Because the mask writing tool cannot access the IC chip design, generating dosing information within the mask writing device does not account for errors that may be introduced during wafer fabrication. Therefore, errors based on the dosing information may be introduced during IC chip manufacturing. However, by generating dosing information within the mask composition engine, while simultaneously generating the mask vector format, compared to systems that generate dosing information outside the mask composition tool and within the mask writing device, errors generated during mask writing are reduced, thereby improving IC chip manufacturing yield.

[0026] Figure 1 The illustration depicts a lithography system 100 according to one or more examples. The lithography system 100 includes a mask synthesis engine 110 and a mask writing device 120. Further, the lithography system 100 may additionally include a lithography scanning device 130. The lithography scanning device 130 is optional, and in some examples, the lithography scanning device 130 is omitted. The lithography system 100 includes one or more processing devices (e.g., Figure 12 The processing device 1202) and one or more memory devices (e.g., Figure 12 The main memory 1204 and / or machine-readable medium 1224). One or more processing devices execute instructions stored in one or more storage devices (e.g., main memory 1204 and / or machine-readable medium 1224). Figure 12 Instruction 1226) is used to receive IC chip design, process IC chip design to determine dosage information, and generate physical mask.

[0027] The lithography system 100 receives an IC chip design and generates a digital mask design file and dosage information based on the IC chip design. Further, the lithography system 100 generates a physical mask based on the mask design file and dosage information, and uses the physical mask to manufacture a printed wafer (substrate).

[0028] The mask compositing engine 110 receives an IC chip design (e.g., an IC chip design file). The IC chip design is received from a system connected to the lithography system 100 or from an input device connected to the lithography system 100. In another example, the mask compositing engine 110 receives the IC chip design from the memory of the lithography system 100. For example, the mask compositing engine 110 accesses the memory to obtain the IC chip design. The mask compositing engine 110 processes the IC chip design to generate dosage information and a mask design. The mask compositing engine 110 also generates a vector file format based on the dosage information. Figure 2 , Figure 3 , Figure 5 and Figure 10 Methods 200, 300, 500, and 1000 further describe the process used to generate dose information.

[0029] Dosage information can be represented as a dose map. In one example, the dose information is a multidimensional dose map. For example, the dose information is a three-dimensional dose map. The dose information defines the amount of energy (e.g., exposure energy) applied to the mask blank through the mask writing device. In one example, the dose information defines the exposure applied across the surface of the mask blank to generate the printed mask. Variations in the dose map (gradient levels) define the amount of energy applied to different locations along the surface of the mask blank. In one example, the dose information is a dose map representing exposure energy in three dimensions. In this example, the X and Y axes of the dose map correspond to the surface of the mask blank. The location along the surface of the mask blank includes the corresponding X and Y coordinates. The Z axis of the dose map corresponds to the exposure energy. The larger the value on the Z axis, the greater the exposure energy at the corresponding location. Each coordinate in the X and Y axes of the dose map, and each corresponding location along the surface of the mask blank, is associated with the exposure energy. Figure 4 The illustration shows the various parts of an example dose graph.

[0030] In one example, the dose information includes a dose distribution. The dose distribution corresponds to a polygon in the IC chip design or mask design document. For example, the dose distribution follows the edge of the polygon. The dose distribution indicates the amount (e.g., level or value) of dose that can vary along the edge of the corresponding polygon. Figure 7 and Figure 9 Example dose distributions 710 and 900 are illustrated respectively.

[0031] The mask synthesis engine 110 performs wafer monitoring while generating dose information. Therefore, the wafer error is less than in a system where dose generation is performed outside the mask synthesis engine 110 (e.g., within the mask writing device 120). Performing dose information generation within the mask synthesis engine 110 allows for better control during dose information generation and enables monitoring of changes made to the manufactured IC chip (e.g., the final wafer). In such a system, the impact of errors within the manufactured IC chip (e.g., the final wafer) is known and taken into account during dose information generation. In one example, the total wafer error is determined by:

[0032] E total =E synthesis +E writer *M EEF Equation 1

[0033] In equation 1, E total E represents the total wafer error. synthesis For the error associated with the mask compositing engine, and E writer The error associated with the mask writer device. MEEF is the mask error enhancement factor, which indicates how errors in the mask are amplified within the wafer. The MEEF factor is known to the mask synthesis engine 110 and can be taken into account when generating dose information. Thus, the mask synthesis engine 110 is able to generate dose information while introducing fewer errors compared to the mask writer device 120.

[0034] The mask synthesis engine 110 transmits dose information and mask design to the mask writing device 120. The mask synthesis engine 110 converts the dose information into a vector file format, which is then transmitted to the mask writing device 120. The mask synthesis engine 110 may additionally or alternatively transmit the mask design file and / or dose information to the memory of the lithography system 100.

[0035] In one or more examples, the mask compositing engine 110 is transmitted via a network (e.g., Figure 11 Network 1220 transmits dosage information and mask design to mask writing device 120. In one example, mask synthesis engine 110 includes one or more processors (e.g., processing device 1202) of a computer system (e.g., computer system 1200) and is coupled to mask writing device 120 via a network (e.g., network 1220). In such an example, the computer system of mask synthesis engine 110 is physically separate from mask writing device 120 and connected to mask writing device 120 via a network. Furthermore, the computer system of mask synthesis engine 110 and mask writing device 120 are located in different physical locations from each other.

[0036] Mask compositing engine 110 includes one or more processing devices (e.g., Figure 12 Processing device 1202), the one or more processing devices performing memory device (e.g., Figure 12 Instructions (e.g., instructions stored in main memory 12004 and / or machine-readable medium 1224) Figure 12 The instruction 1226 is used to receive IC chip design files and generate mask design files and dosage information.

[0037] Mask writing device 120 receives dose information and a mask design file. In one example, mask writing device 120 receives the mask design file and dose information from mask synthesis engine 110. Mask writing device 120 may receive dose information in vector file format. In other examples, mask writing device 120 accesses the memory device of lithography system 100 to obtain the mask design file and dose information.

[0038] A printing mask can be generated from a mask preform (or substrate). The mask preform can be a silicon dioxide preform, etc. During the printing process, holes (e.g., apertures or openings) are formed in the mask preform based on polygon and dose information from the mask design document. The mask preform is coated with a photoresist material. The photoresist material is exposed to an energy beam that interacts with the photoresist material. The amount and location of energy applied by the energy beam are based on dose information.

[0039] The energy beam applied to the photoresist can be an electron beam or a photon beam. An electron beam is applied by an electron beam writer, which focuses and directs the electron beam onto the substrate. A photon beam is applied by a laser writer. The photoresist is then developed to create openings through it that expose portions of the underlying mask substrate.

[0040] Etching the mask preform through openings in the photoresist removes portions of the mask preform based on a mask design file. The etching process can include liquid (e.g., wet) etching or plasma (e.g., dry) etching. The etching process removes portions of the preform where the photoresist coating has been removed, thereby forming holes (e.g., apertures or openings) within the mask preform. Alternatively or additionally, a deposition process can be used to deposit material onto the mask preform where the photoresist layer has been removed.

[0041] Mask writing device 120 includes one or more processing devices (e.g., Figure 12 Processing device 1202), the one or more processor devices execute memory devices (e.g., Figure 12 Instructions (e.g., instructions stored in main memory 1204 and / or machine-readable medium 1224) Figure 12 The instruction 1226 is used to receive the mask design file and dosage information and generate the printed mask.

[0042] The photolithography scanning apparatus 130 receives a printed mask from the mask writing apparatus 120 for IC chip fabrication. The photolithography scanning apparatus 130 positions the printed mask above a substrate and applies light to the substrate through the printed mask. The light passes through the apertures of the printed mask and interacts with the photoresist material on the substrate. The light can be ultraviolet (UV) light or light of another wavelength. The photoresist material is removed from the substrate during a subsequent development process. The developed substrate is then exposed to etching and / or deposition processes for IC chip fabrication. In one example, multiple different patterned masks are applied to the substrate at different times during the IC chip fabrication process.

[0043] Figure 2 This is a flowchart of a method 200 for generating dose information based on one or more examples. Method 200 is executed by a mask synthesis engine 110. Further, method 200 serves as... Figure 11 The mask data preparation 1132 is performed as part of this process. At block 210, the IC chip design is received. For example, the mask synthesis engine 110 receives the IC chip design from another processing system, input device, or memory device. The chip design may be in a vector format (e.g., OASIS or GDS file format) or other file formats.

[0044] At box 220, dose information and a wafer target are generated. Mask synthesis engine 110 generates dose information, a wafer image, and a wafer target based on the IC chip design. The wafer image is a function of light intensity on the physical wafer. The wafer image can be a pixel-wise sample of light intensity or a function of light intensity (or other types of user-defined sampling). In one example, the wafer image is a step-like function of light intensity based on the corresponding development (etching) behavior of the physical wafer. In such an example, the wafer image is a binary image. In another example, the wafer image is a contour of the light intensity function converted into a polygon.

[0045] A wafer target is an ideal representation of a wafer image. Wafer targets are defined at one or more locations within the defined wafer image. Wafer targets can be generated using pixel sampling (or other sampling techniques) or contour drawing, etc. In one example, the wafer target is derived using functions that take the polygons of the IC chip design. For example, the polygons are rasterized to generate a pixel representation, rounded to generate a printed polygon, or converted to a pixel representation by applying other functions. In other examples, other polygon processing techniques can be applied to the polygons to generate the wafer target.

[0046] In one example, generating dose information includes converting the IC chip design into a re-rasterized image file representation (e.g., a bitmap or other raster image file). The dose map representation can be constructed using rasterization methods or other geometry-based methods that convert polygons within the IC chip design into image fields. For example, polygons can be converted into bitmap fields. In another example, the polygons are converted based on a level set representation of the polygons. In yet another example, a rule-based assignment is applied to determine the local dose of pixels near the edges of the polygons in the IC chip design. The rule-based assignment can include geometry-based metrics. In yet another example, applying the rule-based assignment can include determining a Gaussian dose distribution centered on the edges of the polygons in the IC chip design. Other methods can include using polygon density or curvature methods to generate dose information.

[0047] At box 230, the dose information is modified. The mask synthesis engine 110 modifies the dose information. In one example, the dose information is modified based on the determination that the wafer image and the wafer target will not converge. The mask synthesis engine 110 compares the wafer image with the wafer target to determine whether the wafer image converges with the wafer target. Comparing the wafer image with the wafer target includes: generating a pixelated representation of the wafer image, and comparing the pixelated representation of the wafer image with the wafer target. Based on the difference between the pixelated representation of the wafer image and the wafer target being less than a threshold, the wafer image and the wafer target are determined to converge. In another example, comparing the wafer image with the wafer target includes: sampling the wafer image. The sample is compared with a corresponding point within the wafer target, thereby comparing the intensity of the sample with the corresponding point within the wafer target. The convergence of the wafer image and the wafer target is determined based on the difference between intensities less than a threshold. In one example, comparing the wafer image with the wafer target includes: comparing the width and / or spacing information of the wafer image within a corresponding threshold. Based on the width and / or spacing of the wafer image that meets the corresponding threshold, the convergence of the wafer image and the wafer target is determined.

[0048] The mask synthesis engine 110 generates modified dose information based on a determined wafer image and wafer target convergence. The dose information can be represented by a dose map, which indicates the relative dose amount at different locations on the surface of the mask design. The dose map can include a gradient of the dose change relative to each pixel of the wafer image, measured by lithography. In one example, the dose information comprises multiple pixels, and modifying the dose information involves perturbing the dose information of one or more pixels.

[0049] At frame 232, the dose information is perturbed at one or more pixel locations to generate a perturbed wafer image. The mask synthesis engine 110 perturbs the dose information and generates the perturbed wafer image based on it. The perturbed wafer image is generated by simulating an IC chip manufacturing process based on the perturbed dose information. For example, a mask design is generated based on an IC chip design. The mask design and the perturbed dose information are used to generate the perturbed wafer image. The perturbed wafer image is a simulation result determined based on the perturbed dose information.

[0050] At box 234, a perturbed wafer image is compared with an undisturbed wafer image. The undisturbed wafer image is the wafer image generated before the dose information is perturbed at box 310. The mask synthesis engine 110 detects differences between the perturbed wafer image and the undisturbed wafer image based on the comparison. These differences are used to determine the local effects caused by perturbed pixels in the perturbed dose information. In one example, the perturbed wafer image is determined as an enhancement to the undisturbed dose information image by computing a separate perturbation model or lookup table. Utilizing perturbation models and / or lookup tables allows the determination of the perturbed dose information, which can be combined with the undisturbed image. Determining the perturbed wafer image is faster than computing the wafer image based on a full simulation of the dose map. In various embodiments, the mask synthesis engine 110 includes a simulation block configured to generate a wafer image based on a mask design and dose information. The simulation block can be modeled by a linear operating system.

[0051] The difference between the undisturbed and perturbed wafer images is used as input for dose information modification. The difference is used to determine the local impact of perturbed pixels in the perturbed dose information. Further, the difference can be used to construct a numerical gradient as input for dose information modification. The dose information modification process includes gradient-based modifications. The dose information modification process modifies the dose information to correct any mismatch between the undisturbed wafer image and the wafer target. For example, the dose value in the dose information is modified (e.g., increased or decreased) to correct any mismatch between the undisturbed wafer image and the wafer target.

[0052] In another example, at box 230, the dose information is modified based on a cost function. The cost function is based on the difference between the wafer image and the wafer target. In one or more examples, the cost function may additionally or alternatively include other constraints in the lithography process, such as mask writing rules. At box 236, the gradient is determined based on the cost function of the simulated wafer image. The mask synthesis engine 110 determines the gradient based on the cost function of the wafer image. The cost function can be defined as dCost / dDose. One or more dCost / dDose functions are used to modify the dose information. The cost function is used to compare the wafer image with the wafer target.

[0053] In one example, the cost function C(M) can be expressed as C(M)=∫∫(V M (x, y) - T(x, y)) 2 dxdy, and the disturbance cost function can be expressed as C(M, m, ε)=∫∫(V M (m, ε)(x, y) - T(x, y)) 2 dxdy. V M (m, ε)(x, y) is an intensity signal realized along a wafer image generated using dose information during photolithography, which has a set of M pixels m i The amplitude of the intensity signal is modified by the number of perturbations ε, and (x, y) lies on the image surface. V M (x, y) is the intensity signal from the unperturbed dose information. T(x, y) is the target intensity signal that forms a feature on the wafer image. The gradient of the cost function is generated as N of the dose information. m 1 pixel m i vector Generate vector terms for a given pixel with dose information, such as

[0054] At box 238, the dose information is modified based on a comparison between the wafer image and the wafer target. In one example, the mask synthesis engine 110 compares the wafer image with the wafer target and uses a gradient determined according to the cost function to correct any mismatch between the wafer image and the wafer target. For example, the mask synthesis engine 110 changes (e.g., increases or decreases) the dose values ​​in the dose information to correct any mismatch between the wafer image and the wafer target. In one example, to modify the dose information, one or more gradient-based optimization techniques are applied to the gradient information to modify the dose allocation within the dose information to minimize or maximize the cost function. For example, the gradient-based optimization technique could be steepest descent optimization or other gradient-based optimizations.

[0055] At box 240, the modified dose information is output. The mask synthesis engine 110 outputs the modified dose information to the mask writing device 120. The modified dose information is output based on determining that the wafer image associated with the dose information converges with the wafer target. In one example, the dose information is modified based on determining that the wafer image and the wafer target do not converge, as described in box 230.

[0056] Figure 3 This is a flowchart of a method 300 for generating dose information based on one or more examples. Method 300 is executed by a mask synthesis engine 110. Further, method 300 serves as... Figure 11 The mask data preparation 1132 is performed as part of this process. At block 310, the IC chip design is received. For example, the mask synthesis engine 110 receives the IC chip design from another processing system, input device, or memory device. The chip design may be in a vector format (e.g., OASIS or GDS file format) or other file formats.

[0057] At box 312, dose information is generated. Mask compositing engine 110 generates dose information based on the IC chip design. Generating dose information includes converting the IC chip design into a rasterized (e.g., bitmap or other raster image file) representation. The representation of the dose information is constructed using a rasterization method or other geometry-based method that converts polygons into bitmap fields. In another example, the polygons of the IC chip design are converted into a level set representation. In another example, rule-based assignment is applied to determine the local dose of pixels near the edges of the polygons in the IC chip design. Rule-based assignment may include geometry-based metrics. In another example, applying rule-based assignment may include determining a Gaussian dose distribution centered on the edges of the polygons in the IC chip design. Other methods for generating dose information may include using polygon density or curvature methods to indicate dose amplitude modifications.

[0058] At box 314, a wafer image is generated. The mask synthesis engine 110 generates the wafer image based on the mask design and dosage information. The mask synthesis engine 110 simulates the mask writing process and IC manufacturing process based on the mask design and mask information to generate the wafer image. The wafer image is a simulated version of the manufactured IC chip.

[0059] At box 316, the IC chip design is converted into a wafer target. The wafer target can be a bitmap file or a polygon file, etc. The mask compositing engine 110 converts the IC chip design into a wafer target. In one example, converting the IC chip design into a wafer target includes: identifying design polygons within the IC chip design and processing the design polygons to generate the wafer target. Processing the design polygons includes one or more of the following: rounding the polygons to create a printable representation, rasterizing the polygons, creating a horizontal set interface representation of the polygons, and selecting points or gauges within the IC chip design to monitor the wafer image.

[0060] Box 316 is completed during a period that at least partially overlaps with one or more time periods during which boxes 312 and / or 314 are completed. In one example, box 316 is completed during a time period that does not overlap with one or more time periods during which boxes 312 and 314 are completed.

[0061] At box 318, a wafer image is compared with a wafer target. For example, mask compositing engine 110 compares a wafer image and a wafer target. Comparing the wafer image with the wafer target includes generating a pixelated representation of the wafer image and comparing the pixelated representation of the wafer image with the wafer target. In another example, comparing the wafer image with the wafer target includes sampling the wafer image. The sample is compared with corresponding points within the wafer target, thereby comparing the intensity of the sample with the intensity of the corresponding points within the wafer target. In one example, comparing the wafer image with the wafer target includes comparing the width and / or spacing of the wafer image with a corresponding threshold determined based on the wafer target.

[0062] At box 320, the convergence of the wafer image and the target wafer is determined. Mask compositing engine 110 determines whether the wafer image and the target wafer converge. In one example, convergence is determined based on the difference between the pixelated representation of the wafer image and the target wafer being less than a threshold. In another example, convergence is determined based on the difference between the intensity of the wafer image and the target wafer being less than a threshold. In yet another example, convergence is determined based on the width and / or spacing of the wafer image satisfying one or more thresholds.

[0063] At box 322, the dose information is modified. The mask synthesis engine 110 modifies the dose information based on determining that the wafer target and wafer image will not converge. Figure 2 Method 200, as described in boxes 230 to 238, modifies dosage information.

[0064] At box 314, mask synthesis engine 110 generates an updated wafer image based on modified dose information. At box 318, the updated wafer image is compared with the wafer target, and at box 320, it is determined whether the updated wafer image converges with the wafer target. The loop including boxes 322, 314, 318, and 320 continues until it is determined that the wafer image converges with the wafer target.

[0065] At box 324, dose information is output based on the convergence of the wafer image and target image determined at box 320. Mask synthesis engine 110 outputs the dose information to mask writing device 120. Mask synthesis engine 110 can store the dose information in the memory of lithography system 100. Mask writing device 120 accesses this memory to retrieve the dose information.

[0066] Figure 4 Example dose information 410 and 420 of the mask design polygons are illustrated. Dose information 410 is a two-dimensional representation of the dose information. The gradient illustration shows the corresponding dose quantity (e.g., energy quantity) of the mask design polygon. Dose information 420 is a three-dimensional representation of the dose information. The different heights of the three-dimensional representation correspond to the position of the mask design polygon and the dose quantity (e.g., energy quantity).

[0067] In one example and as about Figure 5 As described, a vector-based file format is used to transmit dose information from the mask synthesis engine 110 to the mask writing device 120. The dose information can be used to enhance the mask writing process via a mask writer tool. Vector-based file formats include OASIS or Graphical Design System (GDS) file formats, etc. Vector-based file formats are binary file formats that represent planar geometry, text labels, and other information about the layout in a hierarchical manner. Data from vector-based file formats can be used to create photomasks. Furthermore, alternative file formats (e.g., pixelated dose maps) can be used to transmit dose information from the mask synthesis engine 110 to the mask writing device 120.

[0068] The mask vector file includes planar geometry, text labels, and other information about the layout of the layers. A mask writing tool (e.g., mask writing device 120) uses this information to generate a mask. The mask writing device 120 receives dosage information and the mask vector file and generates a mask for manufacturing an IC chip.

[0069] Figure 5 The diagram illustrates a flowchart of a method 500 for transmitting dose information from a mask synthesis engine to a mask writer device. Method 500 is executed by the mask synthesis engine 110. Method 500 serves as... Figure 11 The mask data preparation is part of 1132 to be performed.

[0070] At box 510, an IC chip design is received. For example, mask synthesis engine 110 receives the IC chip design from another processing system, input device, or memory device. The chip design may be in a vector format (e.g., OASIS or GDS file format) or other file formats.

[0071] At box 520, dose information is generated. Mask compositing engine 110 generates dose information based on the IC chip design. Generating dose information includes converting the IC chip design into a rasterized (e.g., bitmap or other raster image file) representation. The representation of the dose information can be constructed using rasterization methods or other geometry-based methods that convert polygons into bitmap (or another image type) fields. In one example, the polygons of the IC chip design are converted into a level set representation. In another example, a rule-based assignment is applied to determine the local dose of pixels near the edges of the IC chip design polygons. Rule-based assignment can include geometry-based metrics. In another example, applying rule-based assignment can include determining a Gaussian dose distribution centered on the edges of the IC chip design polygons. Other methods can include using polygon density or curvature methods to determine the dose quantity of the IC chip design polygons.

[0072] At box 530, a mask vector file is generated. The mask vector file is generated by mask compositing engine 110. The mask vector file includes planar geometry, text labels, and other information regarding the layout of the layered IC chip for generating the printed mask. Mask compositing engine 110 generates the mask vector file based on the IC chip design. The mask vector file includes a mask design generated from the IC chip design. Mask writing device 120 uses the mask design from the mask vector file to generate a printed mask. The mask design in the mask vector file includes polygons defining the different elements of the IC chip design.

[0073] In one example, boxes 520 and 530 occur at least during the overlapping time period. In another example, boxes 520 and 530 occur during the non-overlapping time period.

[0074] At box 540, the dose information is converted to a vector file format. The mask compositing engine 110 converts the dose information to a vector file format. In one example, the dose information is represented as an image file. For example, the dose information is represented as a bitmap file or other raster image file. The image file used to represent the dose information includes a series of integer-to-bit mappings. Converting the image file to a vector format file includes: vectorizing the image file. Vectorizing the image file may include: reconstructing the image file to represent it using one or more mathematical formulas. For example, vectorizing the image file includes: generating one or more lines, polygons, Bezier curves, etc., from the image file. In one or more examples, the above mathematical constructions may be further applied to enhance the representation of two-dimensional curves or polygons with three-dimensional information. Example three-dimensional information in... Figure 7 and Figure 9 This will be further described below. In such an example, the data corresponding to the three-dimensional information can be in the form of auxiliary tables or lists corresponding to the mathematical construction described above.

[0075] At box 550, dose information and a mask vector file in vector file format are output. Mask synthesis engine 110 outputs the dose information and mask vector file in vector file format to mask writing device 120. The dose information and mask vector files in vector file format can be transmitted from mask synthesis engine 110 to mask writing device 120 in parallel or in series with each other. In another example, the dose information and mask vector file in vector file format are output to the memory of lithography system 100, and mask writing device 120 retrieves the dose information and mask vector file in vector file format from the memory.

[0076] Figure 6 The diagram illustrates a flowchart of a method 600 for converting dose information into a vector file format, according to one or more examples. Method 600 is executed by a mask synthesis engine 110. Method 600 and... Figure 5Corresponding to box 540. At box 610, polygon extraction is performed on the dose information. Mask compositing engine 110 performs polygon extraction on the dose information. In one example, the dose information is represented by an image file. Performing polygon extraction involves drawing the contour of the image file across multiple dose levels. In one example, 32 levels are used. In other examples, more or fewer than 32 levels may be used. Drawing the contour of the image file involves detecting the maximum and minimum dose values ​​from the image file. The contour height is selected such that the three-dimensional behavior of the dose surface approximates a finite set of contour heights. In one example, a set of values ​​is selected from the maximum and minimum dose values ​​to be used as the contour height. This set of values ​​may be equidistant between the maximum and minimum dose values. In other examples, the set of values ​​is not equidistant between the maximum and minimum dose values. In one example, the values ​​in the set are selected such that these values ​​cluster near the values ​​in the image file where the pixels have the steepest slope (e.g., the largest change).

[0077] At box 620, a terrain-based vector representation of the dose information is generated from the contour image file. The terrain-based vector representation includes the contour (or other values) generated at box 610. Further, the terrain-based vector representation is output as a vector file (e.g., OASIS, GDS, or other vector file formats). In one example, additional information is associated with each contour and can be used to interpret the meaning of each contour. For example, the additional information can be used to determine the relevant dose level associated with each contour.

[0078] Figure 7 An example polygon 700 illustrating dose information is shown. Polygon 700 includes a dose distribution 710. The dose distribution 710 is located near the edges of polygon 700. The background includes binary dose values. Graph 720 illustrates the cut lines of dose distribution 710. In the cut lines, different bar heights correspond to different concentric polygon layers in dose distribution 710. Each polygon layer in the polygon layers of dose distribution 710 is associated with a different dose value (or dose level). In one example, the range of dose values ​​corresponds to the minimum to maximum value that the corresponding mask writer can produce.

[0079] Figure 8 The diagram illustrates a flowchart of a method 800 for converting dose information into a vector file format, according to one or more examples. Method 800 is executed by a mask synthesis engine 110. Method 800 and... Figure 5This corresponds to box 540 of method 500. At box 810, one or more points along the edge of the dose distribution of dose information are selected. For example, mask synthesis engine 110 processes an image file of dose information to select one or more points along one or more edges of the dose distribution. In one example, one or more points are selected along the edge of the dose distribution by selecting the location with the largest local pixel change or slope. One or more points are selected before or after the dose distribution is generated. In one example, the locations of dose contours with the largest local pixel change along the contour edge are identified, and these locations are used as selected points. The largest local change can be determined by searching in the region near a given point and finding the range of dose values ​​in the search area. The size of the search area can be user-defined and / or determined by heuristics. In one example, the local maximum and minimum values ​​are determined from a given point along a ray perpendicular to the edge of the polygon. Pixel changes at multiple dose distribution locations are compared with a threshold, and the dose distribution associated with pixel changes exceeding the threshold is selected. In one example, the pixel change of the dose distribution selection is determined by calculating the dose map spatial gradient or slope and finding the local maximum or minimum value. The local maximum and minimum values ​​are determined based on a direction perpendicular to the contour edge. Alternatively or additionally, the binary mask polygon edges serve as a guide for determining the contour location along the edges. In one example, binary mask polygon edges are generated based on simulation predictions of the written mask edge locations, and dose information is used to select one or more points along the polygon edges. Local MEEF of the polygon edges can be used to determine which polygon edges are most critical when selecting one or more points.

[0080] At box 820, a one-dimensional dose distribution is determined for each selected point. Mask compositing engine 110 generates the one-dimensional dose distribution for each selected point. In one example, for each selected point along the dose distribution, a search is performed to determine the one-dimensional dose distribution. This search captures local dose variations in a direction perpendicular to the polygon edges, as well as values ​​that can be quantized as dose levels different from binary foreground and background amplitudes. Binary foreground and background amplitudes are selected as the doses applied to the innermost contour and the outermost contour, respectively.

[0081] At box 830, a representation based on the cut-line vector is generated. Mask synthesis engine 110 generates this representation. The cut-line representation at a given point includes a signed distance in the vertical direction away from the edge of the corresponding mask and the corresponding dose value at that distance. In one example, the gradient of the image file is used to determine the normal direction of the image file surface. The local variation of the gauge length along the normal direction away from the selected point is determined. The gradient and gauge length represent the direction and length of the cut-line vector. In one example, sampling is performed along the gauge length (e.g., a line segment) at equidistant intervals. In another example, the image file is approximated using a Gaussian function to construct a table of values ​​to be stored for the selected point. In one example, the dose values ​​(or levels) are parameterized using basis functions and stored in tabular format. For example, gauge endpoint coordinates (e.g., the ends of a line segment of the gauge) are used to parameterize the dose levels using basis functions. In another example, histogram intervals are associated with dose levels. Items for each dose level are performed within a histogram interval. In one example, a Gaussian function representation or a function representation of another shape is generated for local dose changes along a gauge of finite length. This Gaussian function representation or other function representation is generated by sampling the dose distribution along the gauge and fitting a Gaussian function or other mathematical function to the distribution using a mathematical model fitting regression technique. In another example, a two-dimensional representation can be stored locally at selected points as a local pixelated representation or parameterized function representation of the dose. For example, a superposition of two-dimensional Gaussian functions or other basis functions can be utilized.

[0082] Figure 9 The diagram illustrates dose distribution 900, with point 902 around the edge of dose distribution 900. Point 902 corresponds to a vertical gauge around the mask polygon. The gauge for each point 902 can be used for portions of the polygon near each point 902. Point 902a corresponds to curve 910, while point 902b corresponds to curve 920. Curves 910 and 920 illustrate the cutting lines of dose distribution 900 located at points 902a and 902b, respectively. In curves 910 and 920, different bar heights correspond to different dose values ​​(e.g., horizontal).

[0083] and Figure 6 Compared with method 600, Figure 8 Method 800 can generate dose maps with smaller data sizes. For example, dose distribution 900 includes more than... Figure 7 The dose distribution of 710 polygons has fewer polygon vertices. Furthermore, when the distance between polygons remains constant along the length of the polygon's edge, Figure 7 The concentric polygons shown contain redundant information. In one example, if... Figure 7 The concentric polygons in the diagram are equidistant, as shown in the diagram regarding... Figure 9The described dose distribution can represent the same information using a polygon and a single gauge length. Therefore, the total data size of dose distribution 900 is less than [a certain value]. Figure 7 The data size is the same, and it can convey the same information.

[0084] Figure 10 The diagram illustrates a flowchart of a method 1000 for outputting dose information in a vector file format, according to one or more examples. Method 1000 is... Figure 1 The mask compositing engine 110 executes. Further, method 1000 as... Figure 11 The mask data preparation is part of the execution of 1132.

[0085] At box 1010, the IC chip design is received. At boxes 1012 and 1014, a dose map and wafer image are generated, and at box 1016, a wafer target is generated. At box 1018, the wafer image and wafer target are compared, and at box 1020, it is determined whether the wafer image and wafer target will converge. Based on the determination that the wafer image and wafer target will not converge, the dose map is modified at box 1022, and an updated wafer image is generated at box 1014 based on the modified dose map. Boxes 1010, 1012, 1014, 1016, 1018, 1020, and 1022 are related to... Figure 3 Method 300 corresponds to boxes 310, 312, 314, 316, 318, 320 and 322.

[0086] At box 1024, the dose information is converted to a vector-based format. Box 1024 and... Figure 5 This corresponds to box 540 in method 500. At box 1026, the dose information and mask vector file are output in vector file format. Box 1026 corresponds to... Figure 5 The method is similar to the box with 500.

[0087] Figure 11 The illustration depicts an example set of processes 1100 used to transform and verify design data and instructions representing integrated circuits during the design, verification, and fabrication of artifacts such as integrated circuits. Each of these processes can be constructed and implemented as multiple modules or operations. The term 'EDA' stands for "Electronic Design Automation." These processes begin with creating a product idea using information provided by the designer (1110), transforming that information to create an integrated circuit using the set of EDA processes (1112). When the design is complete, it can be taken offline (1134), which involves sending the artwork (e.g., geometric pattern) of the integrated circuit to a manufacturing plant to create a mask set, which is then used to manufacture the integrated circuit. After offline, a semiconductor die is fabricated (1136). Packaging and assembly processes are performed (1138) to produce the finished integrated circuit (1140).

[0088] The specification of a circuit or electronic structure can range from low-level transistor material placement to high-level description languages. High-level representations can be used to design circuits and systems using hardware description languages ​​('HDL') such as VHDL, Verilog, SystemVerilog, SystemC, MyHDL, or OpenVera. HDL descriptions can be transformed into logic-level register-transfer-level ('RTL') descriptions, gate-level descriptions, placement-level descriptions, or mask-level descriptions. Each lower level of abstraction, which is a less abstract description, adds more useful details (e.g., more details about the modules described) to the design description. Lower levels of abstraction can be computer-generated, derived from design libraries, or created by another design automation process. An example of a specification language used to specify a more detailed description at a lower level of abstraction is SPICE, which is used to describe a circuit in detail using many similar components. The description at each level of abstraction is implemented for use by the corresponding tool at that layer (e.g., a formal verification tool). The design process can use... Figure 11 The sequence described herein. The described process can be implemented using EDA products (or tools).

[0089] During system design (1114), the functionality of the integrated circuit to be manufactured is specified. The design can be optimized for desired characteristics such as power consumption, performance, area (physical and / or lines of code), and loss reduction. At this stage, the design can be divided into different types of modules or components.

[0090] During logic design and functional verification (1116), modules or components in the circuit are specified in one or more description languages, and the functional accuracy of that specification is checked. For example, components of the circuit can be verified to generate outputs that match the specification requirements of the designed circuit or system. Functional verification can be performed using simulators and other programs, such as test bench generators, static HDL checkers, and formal verifiers. In some examples, special component systems, referred to as 'simulators' or 'prototyping systems', are used to accelerate functional verification.

[0091] During the synthesis and testing of the design (1118), the HDL code is transformed into a netlist. In some examples, the netlist can be a graphical structure, where the edges of the graphical structure represent components of the circuit, and the nodes of the graphical structure represent the interconnections between components. Both the HDL code and the netlist are layered artifacts that EDA products can use to verify that the integrated circuit performs according to the specified design at manufacturing time. The netlist can be optimized for the target semiconductor manufacturing technology. Additionally, the finished integrated circuit can be tested to verify that the integrated circuit meets specification requirements.

[0092] During netlist verification (1120), the netlist is checked to ensure compliance with timing constraints and correspondence with HDL code. During design planning (1122), the overall planar diagram of the integrated circuit is constructed and analyzed for timing and top-level routing.

[0093] During layout or physical implementation (1124), physical placement (location of circuit components such as transistors or capacitors) and wiring (connection of circuit components through multiple conductors) occur, and the selection of cells from a library to implement a specific logic function can be performed. As used herein, the term 'cell' can specify a set of transistors, other components, and interconnections that provide Boolean logic functions (e.g., AND, OR, NOT, XOR) or storage functions (e.g., flip-flops or latches). As used herein, a circuit 'block' can refer to two or more cells. Both cells and circuit blocks can be referred to as modules or components and can be used as physical structures and to simulate both. Parameters such as size are specified for the cells selected (based on 'standard cells'), and these parameters are accessible in a database for use in EDA products.

[0094] During analysis and extraction (1126), circuit functionality is verified at the layout level, allowing for refinement of the layout design. During physical verification (1128), the layout design is checked to ensure correct manufacturing constraints, such as Design Rule Check (DRC) constraints, electrical constraints, lithographic constraints, and that the circuit system functionality matches the HDL design specification. During resolution enhancement (1130), the geometry of the layout is transformed to improve the fabrication of the circuit design.

[0095] During the offline phase, data is created for the production of lithographic masks (if appropriate, after the application of lithographic enhancement). During mask data preparation (1132), the 'offline' data is used to produce lithographic masks, which are then used to produce finished integrated circuits.

[0096] Computer systems (such as) Figure 12 The storage subsystem of the computer system 1200 can be used to store some or all of the EDA products described herein, as well as units for developing libraries and products for programs and data structures for physical and logical design using the libraries.

[0097] Figure 12An example of a computer system 1200 is illustrated, within which a set of instructions can be executed to cause the computer system to perform one or more of the methods discussed herein. In alternative implementations, the machine can be connected (e.g., networked) to other machines in a local area network (LAN), intranet, extranet, and / or the Internet. The machine can operate as a server or client machine in a client-server network environment, as a peer machine in a peer-to-peer (or distributed) network environment, or as a server or client machine in a cloud computing infrastructure or environment.

[0098] A machine can be a personal computer (PC), tablet computer, set-top box (STB), personal digital assistant (PDA), cellular phone, web device, server, network router, switch, or bridge, or any machine capable of executing (sequentially or otherwise) a set of instructions that specifies the actions the machine should perform. Furthermore, while a single machine is illustrated, the term "machine" should also be considered to include any set of machines that, individually or collectively, execute one or more sets of instructions to perform any one or more of the methods discussed herein.

[0099] Example computer system 1200 includes processing device 1202, main memory 1204 (e.g., read-only memory (ROM), flash memory, dynamic random access memory (DRAM) such as synchronous DRAM (SDRAM), static memory 1206 (e.g., flash memory, static random access memory (SRAM) etc.), and data storage device 1218, which communicate with each other via bus 1230.

[0100] Processing device 1202 represents one or more processors, such as microprocessors, central processing units, etc. More specifically, processing device may be or include complex instruction set computing (CISC) microprocessors, reduced instruction set computing (RISC) microprocessors, very long instruction word (VLIW) microprocessors, processors implementing other instruction sets, or processors implementing combinations of instruction sets. Processing device 1202 may also be one or more special-purpose processing devices, such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), digital signal processors (DSPs), network processors, etc. Processing device 1202 may be configured to execute instructions 1226 for performing the operations and steps described herein.

[0101] The computer system 1200 may also include a network interface device 1208 for communication via a network 1220. The computer system 1200 may also include a video display unit 1210 (e.g., a liquid crystal display (LCD) or a cathode ray tube (CRT)), an alphanumeric input device 1212 (e.g., a keyboard), a cursor control device 1214 (e.g., a mouse), a graphics processing unit 1222, a signal generation device 1216 (e.g., a speaker), a video processing unit 1228, and an audio processing unit 1232.

[0102] Data storage device 1218 may include machine-readable storage medium 1224 (also referred to as non-transitory computer-readable medium) storing one or more instruction sets 1226 or software embodying any one or more methods or functions described herein. During execution of instruction 1226 by computer system 1200, instruction 1226 may also reside wholly or at least partially in main memory 1204 and / or processing device 1202, both of which also include machine-readable storage media.

[0103] In some implementations, instruction 1226 includes instructions for implementing the present disclosure. Although in the example implementation, machine-readable storage medium 1224 is shown as a single medium, the term "machine-readable storage medium" should be considered to include a single medium or multiple media (e.g., a centralized or distributed database, and / or associated caches and servers) storing one or more sets of instructions. The term "machine-readable storage medium" should also be considered to include any medium capable of storing or encoding sets of instructions for execution by a computer system and causing the machine and processing device 1202 to perform any one or more methods of the present disclosure. Therefore, the term "machine-readable storage medium" should be considered to include, but is not limited to, solid-state memory, optical media, and magnetic media.

[0104] Some parts of the foregoing detailed description have been presented based on the algorithms and symbolic representations of operations on data bits within computer memory. These algorithmic descriptions and representations are the methods used by those skilled in the art of data processing to most effectively communicate the essence of their work to others skilled in the art. An algorithm can be a sequence of operations that leads to a desired result. These operations are those that require physical manipulation of physical quantities. Such quantities can take the form of electrical or magnetic signals that can be stored, combined, compared, and otherwise manipulated. Such signals can be referred to as bits, values, elements, symbols, characters, items, numbers, etc.

[0105] However, it should be remembered that all these and similar terms are to be associated with appropriate physical quantities and are merely convenient labels applied to those quantities. It will be apparent from this disclosure that, unless otherwise explicitly stated, certain terms throughout the specification refer to the actions and processes of a computer system or similar electronic computing device that manipulate data represented as physical (electronic) quantities within the registers and memories of the computer system and transform them into other data represented as physical quantities within the computer system's memory or registers or other such information storage devices.

[0106] This disclosure also relates to an apparatus for performing the operations described herein. The apparatus may be specifically constructed for its intended purpose, or it may comprise a computer selectively activated or reconfigured by a computer program stored in the computer. Such a computer program may be stored in a computer-readable storage medium, such as, but not limited to, any type of magnetic disk including floppy disks, optical disks, CD-ROMs, and magneto-optical disks, read-only memory (ROM), random access memory (RAM), EPROM, EEPROM, magnetic cards or optical cards, or any type of medium suitable for storing electronic instructions, each type of medium being coupled to a computer system bus.

[0107] The algorithms and displays presented herein are not inherently linked to any particular computer or other device. Various other systems may be used in conjunction with the programs taught herein, or it may be convenient to construct more specialized devices to perform the methods. Furthermore, this disclosure is described without reference to any particular programming language. It should be understood that a variety of programming languages ​​can be used to implement the teachings of this disclosure as described herein.

[0108] This disclosure may be provided as a computer program product or software, which may include a machine-readable medium having instructions stored thereon that can be used to program a computer system (or other electronic device) to perform processes according to this disclosure. Machine-readable media include any mechanism for storing information in a machine-readable (e.g., computer-readable) form. For example, machine-readable (e.g., computer-readable) media include machine-readable (e.g., computer-readable) storage media, such as read-only memory (“ROM”), random access memory (“RAM”), disk storage media, optical storage media, flash memory devices, etc.

[0109] In the foregoing disclosure, implementations of this disclosure have been described with reference to specific examples. It will be apparent that various modifications can be made to these implementations without departing from the broader spirit and scope of this disclosure as set forth in the appended claims. Where this disclosure refers to a singular number of elements, more than one element may be depicted in the drawings, and similar elements may be designated using similar numerical designations. Therefore, this disclosure and the drawings should be considered illustrative rather than restrictive.

Claims

1. A method comprising: Receiver integrated circuit (IC) chip design; Dosage information, wafer images, and wafer targets are generated by one or more processors during mask synthesis and based on the IC chip design. The dosage information is modified by one or more processors based on a comparison between the wafer image and the wafer target; The modified dose information is converted into a vector file format; as well as The modified dose information is output to the mask writing device in the vector file format.

2. The method according to claim 1, wherein generating the dose information comprises: The polygons of the IC chip design are converted into an image representation.

3. The method of claim 1, wherein the dose information is modified based on determining that the wafer image and the wafer target will not converge.

4. The method according to claim 1, wherein modifying the dosage information includes: Disturb the dose information; A perturbed wafer image is generated based on the perturbed dose information; Compare the disturbed wafer image with the wafer image; as well as The dosage information is modified based on the comparison between the perturbed wafer image and the wafer image.

5. The method of claim 1, wherein modifying the dosage information comprises: Determine the gradient of the cost function of the wafer image; as well as The dosage information is modified by correcting the mismatch between the wafer image and the wafer target based on the gradient.

6. The method according to claim 1, further comprising: An updated wafer image is generated based on the modified dose information, wherein the modified dose information is output based on determining that the updated wafer image and the wafer target converge.

7. The method according to claim 1, further comprising: Generate a mask design file based on the IC chip design; as well as The mask design file is output to the mask writing device, wherein the mask writing device is configured to generate a printing mask based on the mask design file.

8. A photolithography system, comprising: Memory; as well as A processor, coupled to the memory, is configured to: Receiver integrated circuit (IC) chip design; During mask synthesis, dose information, wafer images, and wafer targets are generated based on the IC chip design; The dosage information is modified based on a comparison between the wafer image and the wafer target; The modified dose information is converted into a vector file format; as well as The modified dose information is output to the mask writing device in the vector file format.

9. The lithography system of claim 8, wherein generating the dose information comprises: The polygons of the IC chip design are converted into an image representation.

10. The lithography system of claim 8, wherein the dose information is modified based on determining that the wafer image and the wafer target will not converge.

11. The lithography system of claim 8, wherein modifying the dose information includes: Disturb the dose information; A perturbed wafer image is generated based on the perturbed dose information; Compare the disturbed wafer image with the wafer image; as well as The dosage information is modified based on the comparison between the perturbed wafer image and the wafer image.

12. The lithography system of claim 8, wherein modifying the dose information includes: Determine the gradient of the cost function of the wafer image; as well as The dosage information is modified by correcting the mismatch between the wafer image and the wafer target based on the gradient.

13. The lithography system according to claim 8, wherein the processor is further configured to: An updated wafer image is generated based on the modified dose information, wherein the modified dose information is output based on determining that the updated wafer image and the wafer target converge.

14. The lithography system of claim 8, further comprising the mask writing device, wherein the processor is further configured to: Generate a mask design file based on the IC chip design; and The mask design file is output to the mask writing device, wherein the mask writing device is configured to generate a printing mask based on the mask design file.

15. A non-transitory computer-readable medium comprising storing instructions, said instructions, when executed by a processor, causing the processor to: Receiver integrated circuit (IC) chip design; During mask synthesis, dose information, wafer images, and wafer targets are generated based on the IC chip design; The dosage information is modified based on a comparison between the wafer image and the wafer target; The modified dose information is converted into a vector file format; as well as The modified dose information is output to the mask writing device in the vector file format.

16. The non-transitory computer-readable medium of claim 15, wherein generating the dose information includes converting a polygon of the IC chip design into an image representation.

17. The non-transitory computer-readable medium of claim 15, wherein the dose information is modified based on determining that the wafer image and the wafer target will not converge.

18. The non-transitory computer-readable medium of claim 15, wherein modifying the dose information comprises: Disturb the dose information; A perturbed wafer image is generated based on the perturbed dose information; Compare the disturbed wafer image with the wafer image; as well as The dosage information is modified based on the comparison between the perturbed wafer image and the wafer image.

19. The non-transitory computer-readable medium of claim 15, wherein modifying the dose information comprises: Determine the gradient of the cost function of the wafer image; as well as The dosage information is modified by correcting the mismatch between the wafer image and the wafer target based on the gradient.

20. The non-transitory computer-readable medium of claim 15, wherein the processor further comprises: An updated wafer image is generated based on the modified dose information, wherein the modified dose information is output based on determining that the updated wafer image and the wafer target converge.

Images