Etching method of square arrayed holes

CN114068310BActive Publication Date: 2026-09-08INST OF MICROELECTRONICS CHINESE ACAD OF SCI LTD +1
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Patent Information

Application Number
CN202010754924.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-07-30
Publication Date
2026-09-08
Estimated Expiration
2040-07-30

AI Technical Summary

Technical Problem

[0003]本发明的目的在于提供一种方形排列的孔的刻蚀方法,以获得尺寸和间距均符合半导体器件要求的孔结构,从而解决接触不良和漏电的问题

Benefits of technology

[0011]Compared with existing technologies, the present invention provides an etching method for square-arranged holes, which utilizes two photolithography processes to form an interleaved first pattern structure and a second pattern structure. Because the first and second pattern structures are interleaved, a portion of the second pattern structure formed in the second photolithography is formed within the gaps of the first pattern structure formed in the first photolithography. Based on this, sidewalls are formed on the sidewalls of the first and second pattern structures. After removing the first and second pattern structures from the first substrate, the layer to be etched is etched using the sidewalls as masks to form square-arranged holes. Since the final square-arranged holes are obtained using the sidewalls formed on the sidewalls of the interleaved first and second pattern structures formed by the two photolithography processes as masks, the square-arranged holes produced by the present invention, compared to holes produced using only a single photolithography process, reduce the spacing between adjacent holes in the square-arranged holes, solving the problem that the hole size and the distance between adjacent holes cannot meet the required values ​​due to limitations in the photolithography process. This further solves the problems of poor contact and leakage current in semiconductor devices caused by the inability to meet the required hole size and distance.

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Abstract

The application discloses an etching method of square-arranged holes and relates to the technical field of semiconductors, so as to obtain a hole structure with a size and a pitch meeting the requirements of a semiconductor device, thereby solving the problems of poor contact and electric leakage. The etching method of square-arranged holes comprises the following steps: providing a semiconductor substrate, wherein the semiconductor substrate is provided with a to-be-etched layer; forming a double-layer mask material layer on the to-be-etched layer; processing the double-layer mask material layer by adopting a twice photolithography process to obtain a first pattern structure and a second pattern structure which are staggered; forming a side wall on the side wall of the first pattern structure and the second pattern structure; removing the first pattern and the second pattern and reserving the side wall; and etching the to-be-etched layer by taking the side wall as a mask to form square-arranged holes.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor device fabrication, and more particularly to an etching method for square-arranged holes. Background Technology

[0002] As the integration density of semiconductor devices increases, their size gradually decreases. In the current fabrication process of small-sized semiconductor devices, limitations in photolithography mean that the size of contact holes and the distance between them cannot meet requirements. This results in the contact resistance and leakage current between wirings of semiconductor devices not meeting specifications, easily leading to poor contact and leakage problems. Summary of the Invention

[0003] The purpose of this invention is to provide an etching method for square-arranged holes to obtain a hole structure whose size and spacing meet the requirements of semiconductor devices, thereby solving the problems of poor contact and leakage.

[0004] In a first aspect, the present invention provides an etching method for square-arranged holes, the etching method comprising:

[0005] A semiconductor substrate is provided, wherein the semiconductor substrate has a layer to be etched;

[0006] A double-layer mask material layer is formed on the layer to be etched;

[0007] The double-layer mask material layer is processed by two photolithography processes to obtain an interleaved first pattern structure and a second pattern structure;

[0008] Sidewalls are formed on the sidewalls of the first pattern structure and the second pattern structure;

[0009] Remove the first pattern and the second pattern;

[0010] Using the sidewall as a mask, the layer to be etched is etched to form square-arranged holes.

[0011] Compared with existing technologies, the present invention provides an etching method for square-arranged holes, which utilizes two photolithography processes to form an interleaved first pattern structure and a second pattern structure. Because the first and second pattern structures are interleaved, a portion of the second pattern structure formed in the second photolithography is formed within the gaps of the first pattern structure formed in the first photolithography. Based on this, sidewalls are formed on the sidewalls of the first and second pattern structures. After removing the first and second pattern structures from the first substrate, the layer to be etched is etched using the sidewalls as masks to form square-arranged holes. Since the final square-arranged holes are obtained using the sidewalls formed on the sidewalls of the interleaved first and second pattern structures formed by the two photolithography processes as masks, the square-arranged holes produced by the present invention, compared to holes produced using only a single photolithography process, reduce the spacing between adjacent holes in the square-arranged holes, solving the problem that the hole size and the distance between adjacent holes cannot meet the required values ​​due to limitations in the photolithography process. This further solves the problems of poor contact and leakage current in semiconductor devices caused by the inability to meet the required hole size and distance. Attached Figure Description

[0012] The accompanying drawings, which are provided to further illustrate the invention and constitute a part of this invention, are illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an undue limitation of the invention.

[0013] Figure 1 A top view of the structure after the layer to be etched is shown;

[0014] Figure 2 A top view of the structure after the formation of the double mask layer is shown;

[0015] Figure 3A A top view of the structure after the deposition of the first photolithographic pattern material layer is shown;

[0016] Figure 3B It shows along Figure 3A The sectional view obtained by sectioning along the A-A' direction;

[0017] Figure 4A A top view of the structure after the first photolithographic pattern material has been etched to expose the oxide material layer in the top mask material layer;

[0018] Figure 4B It shows along Figure 4A The sectional view obtained by sectioning along the A-A' direction;

[0019] Figure 5A A top view of the structure after etching to obtain the top mask pattern is shown;

[0020] Figure 5BIt shows along Figure 5A The sectional view obtained by sectioning along the A-A' direction;

[0021] Figure 6A A top view of the structure is shown after the top of the second photolithographic pattern material layer is aligned with the top of the top mask pattern;

[0022] Figure 6B It shows along Figure 6A The sectional view obtained by sectioning along the A-A' direction;

[0023] Figure 7A A top view of the structure after the second photoresist pattern has been formed is shown;

[0024] Figure 7B It shows along Figure 7A The sectional view obtained by sectioning along the B-B' direction;

[0025] Figure 8A A top view of the structure after the formation of the first and second patterned structures with an alternating distribution is shown.

[0026] Figure 8B It shows along Figure 8A The sectional view obtained by sectioning along the B-B' direction;

[0027] Figure 9 A cross-sectional view of a structure after depositing sidewall material layers on a first patterned structure and a second patterned structure is shown.

[0028] Figure 10 A cross-sectional view of another structure after depositing sidewall material layers on the first and second patterned structures is shown;

[0029] Figure 11 A method is shown. Figure 9 Cross-sectional view of the structure after the side walls are formed;

[0030] Figure 12 A method is shown. Figure 10 Cross-sectional view of the structure after the side walls are formed;

[0031] Figure 13A A top view of the structure obtained by forming a square arrangement of holes is shown in an embodiment of the etching method for forming a square arrangement of holes;

[0032] Figure 13B It shows along Figure 13A The sectional view obtained after sectioning along the C-C' direction. Detailed Implementation

[0033] Embodiments of the present disclosure will now be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the disclosure. Furthermore, descriptions of well-known structures and technologies are omitted in the following description to avoid unnecessarily obscuring the concepts of the present disclosure.

[0034] The accompanying drawings illustrate various structural schematics according to embodiments of the present disclosure. These drawings are not to scale, and some details have been enlarged for clarity, and some details may have been omitted. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate from reality due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed.

[0035] In the context of this disclosure, when a layer / element is referred to as being "on top of" another layer / element, the layer / element may be directly on top of the other layer / element, or there may be an intermediate layer / element between them. Additionally, if a layer / element is "on top of" another layer / element in one orientation, then when the orientation is reversed, the layer / element may be "below" the other layer / element. To make the technical problems, technical solutions, and beneficial effects of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

[0036] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified. "Several" means one or more, unless otherwise explicitly specified.

[0037] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0038] In semiconductor devices, contact holes are widely used for electrical connections between conductive structures. As the integration density of semiconductor devices increases, their size gradually decreases. In the current fabrication process of small-sized semiconductor devices, limitations in photolithography mean that the size of the contact holes and the distance between them cannot meet requirements. This results in the wiring contact resistance and leakage current of the semiconductor device not meeting the specifications, easily leading to poor contact and leakage problems.

[0039] Based on this, embodiments of the present invention provide an etching method for holes arranged in a square pattern.

[0040] Reference Figure 1 The etching layer 20 can be formed on the semiconductor substrate 10. The semiconductor substrate 10 can be any one of a silicon substrate, a silicon oxide substrate, a silicon nitride substrate, a carbon substrate, a tungsten nitride substrate, or a titanium nitride substrate.

[0041] Reference Figure 2 A double mask layer is formed on the layer to be etched 20. Specifically, the double mask material layer includes a bottom mask material layer 30 and a top mask material layer 40. As one possible implementation, the bottom mask material layer 30 and the top mask material layer 40 have the same stacked structure. This stacked structure can be a carbon material layer, a silicon oxynitride material layer, and an oxide mask material layer stacked together from bottom to top.

[0042] After forming the double-layer mask material layer, the etching method for the square-arranged holes in the embodiments of the present invention further includes: forming a first photolithographic pattern on the top mask material layer using a photolithography process.

[0043] For example, refer to Figure 3A , Figure 3B , Figure 4A and Figure 4B Forming a first photolithographic pattern on a top mask material layer using photolithography includes: depositing a first photolithographic pattern material layer 501 on a top mask material layer 40. The first photolithographic pattern material layer 501 can be a stacked structure of a carbon material layer and a silicon oxynitride material layer. A first photoresist pattern 502 with the first photolithographic pattern is formed on the first photolithographic pattern material layer 501 using photolithography. Using the first photoresist pattern 502 as a mask, the first photolithographic pattern material layer 501 is etched until the oxide material layer 403 in the top mask material layer is exposed. The first photoresist pattern 502 is then removed to obtain the first photolithographic pattern 503.

[0044] Specifically, forming a first photoresist pattern 502 on the first photolithographic pattern material layer 501 using photolithography includes: coating photoresist on the first photolithographic pattern material layer 501, and then processing the photoresist using processes such as exposure and development, thereby forming the first photoresist pattern 502 on the first photolithographic pattern material layer 501.

[0045] The etching process described above utilizes an etchant with high etch selectivity to etch the first photolithographic pattern material layer. This etchant has a significantly higher etching rate on the first photolithographic pattern material layer than on the first photoresist pattern material. By controlling the etching time, the etching is stopped when the top mask material layer is exposed. When the first photolithographic pattern material layer is etched down to the top mask material layer, the etchant has virtually no effect on the first photoresist pattern. At this point, a pattern identical to the first photoresist pattern is formed on the top mask material layer. Removing the first photoresist pattern at the top of this pattern yields the first photolithographic pattern 503.

[0046] Reference Figure 5A and Figure 5B Using the first photolithography pattern as a mask, the oxide material layer in the top mask material layer is etched to obtain the top mask pattern 504.

[0047] In order to form a second photolithographic pattern using a second photolithography process, the second photolithographic pattern can be formed on the silicon oxynitride material layer in the top mask material layer using a photolithography process.

[0048] For example, forming a second photolithographic pattern on a silicon oxynitride material layer in a top mask material layer using a photolithography process includes: forming a second photolithographic pattern material layer on a silicon oxynitride material layer in a top mask material layer around the top mask pattern.

[0049] Reference Figure 6A and Figure 6B To simplify the planarization process, the top of the second photolithographic pattern material layer 601 can be flush with the top of the top mask pattern 504. Specifically, the second photolithographic pattern material layer 601 can be a stacked structure of a carbon material layer and a silicon oxynitride material layer.

[0050] Then, refer to Figure 7A As shown in Figure 7B, a second photoresist pattern 602 with a second photolithographic pattern is formed on the second photolithographic pattern material layer using a photolithography process. It can be understood that the formation method of the second photoresist pattern 602 is the same as the formation method of the first photoresist pattern. Finally, the above-described second photoresist pattern 602 can be used as the second photolithographic pattern.

[0051] Reference Figure 8A and Figure 8BUsing the aforementioned top mask pattern and second photolithography pattern as masks, the top mask material and the bottom mask layer are etched to obtain an interleaved first pattern structure 701 and a second pattern structure 702.

[0052] As a specific example, the process of forming the first pattern structure 701 and the second pattern structure 702 described above can be as follows: using the second photolithographic pattern as a mask, etching is performed on the material layer of the second photolithographic pattern and the oxide material layer in the top mask layer; then, using the top mask pattern and the second photolithographic pattern as masks, etching continues until the layer to be etched 20 is exposed, resulting in the bottom mask pattern. The carbon material layer and silicon oxynitride material layer in the bottom mask pattern are retained, resulting in the first pattern structure 701 and the second pattern structure 702. (Refer to...) Figure 8A The first pattern structure 701 and the second pattern structure 702 are alternately distributed on the layer to be etched 20.

[0053] Reference Figure 8B The first pattern structure 701 includes multiple first pillars; every four first pillars form a first square pattern 703. The second pattern structure 702 includes multiple second pillars, every four second pillars form a second square pattern 704; each first square pattern 703 has a second pillar at its center, and each second square pattern 704 has a first pillar at its center. This structure utilizes two photolithography processes to form the first pattern structure 701 and the second pattern structure 702, improving upon the limitations of photolithography and reducing the spacing between the first pillars and adjacent second pillars. Similarly, it also reduces the spacing between the second pillars and adjacent first pillars, which can improve the size of the subsequently formed holes.

[0054] For example, in order to reduce the difficulty of manufacturing, the cross-sectional shape of the first and second pillars may be circular, square, elongated, or rhomboid.

[0055] For example, each first pillar in the first patterned structure includes a carbon layer and a silicon oxynitride layer stacked together from bottom to top. Each second pillar in the second patterned structure includes a carbon layer and a silicon oxynitride layer stacked together from bottom to top. The aforementioned carbon material layer is an amorphous carbon layer or a carbonaceous organic film formed by spin coating.

[0056] Figure 9 A cross-sectional view of a structure after depositing sidewall material layers on a first patterned structure and a second patterned structure is shown. Figure 10 A cross-sectional view of another structure after depositing sidewall material layers on the first and second patterned structures is shown. (Refer to...) Figure 9 and Figure 10Sidewall material layers 801 are deposited on the first pattern structure 701 and the second pattern structure 702. The thickness of the sidewall material layer can be determined based on the distance between the first column and the adjacent first column, the distance between the second column and the adjacent second column, and the parameters of the required honeycomb-like holes. For example, when the distance between the first column and the adjacent first column is large, while the diameter of the required honeycomb-like holes is small and the distance between the holes is relatively large, the thickness of the sidewall material layer can be set to be greater than half the distance between the first column and the adjacent second column.

[0057] Reference Figure 9 and Figure 10 In this embodiment of the invention, the process of forming a sidewall material layer 801 on the first pattern structure 701, the second pattern structure 702 and the etchable layer 20 can be as follows: depositing sidewall material on the upper surface and sidewall of the first pattern structure 701, the upper surface and sidewall of the second pattern structure 702 and the etchable layer 20 to form a sidewall material layer 801.

[0058] For example, the method for depositing sidewall materials can be CVD (Chemical Vapor Deposition) or ALD (Atomic Layer Deposition).

[0059] For example, the sidewall material includes one or more of silicon, silicon oxide, silicon nitride, titanium nitride, and tungsten nitride.

[0060] Figure 11 A method is shown. Figure 9 A cross-sectional view of the structure after the side walls are formed. Figure 12 A method is shown. Figure 10 A cross-sectional view of the structure after the side walls are formed.

[0061] The process of forming the sidewall may include: etching the sidewall material layer using an anisotropic etching method to form a sidewall 802 on the sidewalls of the first patterned structure and the second patterned structure.

[0062] As an example, in an anisotropic etching method, plasma can be used to process a first patterned structure, a second patterned structure, and sidewall material to retain the sidewall material layers of the first and second patterned structures, thus obtaining sidewalls. In this plasma, the selectivity of the etching gas for both the first and second patterned structures is higher than the selectivity of the material layers to be etched. Exemplarily, the plasma includes one or more of oxygen, nitrogen, and hydrogen.

[0063] As another example, wet etching can be used to process the first patterned structure, the second patterned structure, and the sidewall material to retain the sidewall material layers of the first and second patterned structures, thus obtaining the sidewall. Specifically, during wet etching, an etching solution with a high etching ratio can be used to remove the first and second patterned structures, retaining the sidewall material layers of the first and second patterned structures, resulting in sidewall 802.

[0064] Reference Figure 13A and Figure 13B After obtaining the sidewalls 802, the layer to be etched 20 is etched until the substrate is exposed using the sidewalls 802 as a mask. After removing the sidewalls, square-arranged holes 803 are formed in the layer to be etched 20. For example, the layer to be etched 20 can be a stacked structure formed by overlapping multiple support layers and oxide layers.

[0065] The etching method for honeycomb-shaped holes provided by this invention utilizes two photolithography processes to form an alternating first and second pattern structure. Because the first and second pattern structures are alternating, a portion of the second pattern structure formed in the second photolithography is located within the gaps of the first pattern structure formed in the first photolithography. Based on this, sidewalls are formed on the sidewalls of the first and second pattern structures. After removing the first and second pattern structures from the first substrate, the layer to be etched is etched using the sidewalls as a mask to form square-arranged holes. Since the final square-arranged holes are obtained using the sidewalls formed on the sidewalls of the alternating first and second pattern structures formed by the two photolithography processes as a mask, the square-arranged holes produced by this invention, compared to holes produced using only a single photolithography process, reduce the spacing between adjacent holes in the contact structure. This solves the problem that the size of the contact holes and the distance between them cannot meet the required values ​​due to limitations in the photolithography process. Furthermore, it solves the problems of poor contact and leakage in semiconductor devices caused by the inability to meet the required values ​​for the size of the contact holes and the distance between them.

[0066] The above description does not provide detailed explanations of the technical aspects of each layer's patterning, etching, etc. However, those skilled in the art should understand that various technical means can be used to form layers and regions of the desired shape. Furthermore, to form the same structure, those skilled in the art can also design methods that are not entirely identical to those described above. Additionally, although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination.

[0067] The embodiments of this disclosure have been described above. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of this disclosure. The scope of this disclosure is defined by the appended claims and their equivalents. Various substitutions and modifications can be made by those skilled in the art without departing from the scope of this disclosure, and all such substitutions and modifications should fall within the scope of this disclosure.

Claims

1. A method for etching square-arranged holes, characterized in that, include: A semiconductor substrate is provided, wherein the semiconductor substrate has a layer to be etched; A double-layer mask material layer is formed on the layer to be etched; The double-layer mask material layer is processed by two photolithography processes to obtain an interleaved first pattern structure and a second pattern structure; Sidewalls are formed on the sidewalls of the first pattern structure and the second pattern structure; Remove the first pattern and the second pattern, and retain the sidewall; Using the sidewall as a mask, the layer to be etched is etched to form square-arranged holes; The first pattern structure includes a plurality of first pillars, and every four first pillars form a first square structure; The second pattern structure includes a plurality of second pillars, and every four second pillars form a second square structure; A second pillar is formed at the center of each of the first square structures, and a first pillar is formed at the center of each of the second square structures; The dual-layer mask material layer includes a bottom mask material layer and a top mask material layer stacked together from bottom to top; Both the top mask material layer and the bottom mask material layer include a carbon material layer, a silicon oxynitride material layer and an oxide material layer stacked together from bottom to top; The process of using two photolithography steps to process the double-layer mask material to obtain an alternating first and second pattern includes: A first photolithographic pattern is formed on the top mask material layer using a photolithography process; Using the first photolithographic pattern as a mask, the oxide material layer in the top mask material layer is etched to obtain the top mask pattern; A second photolithographic pattern is formed on the silicon oxynitride material layer in the top mask material layer using a photolithography process; Using the top mask pattern and the second photolithography pattern as masks, the carbon material layer, silicon oxynitride material layer and the bottom mask layer in the top mask material are etched to obtain an interleaved first pattern structure and a second pattern structure.

2. The etching method for square-arranged holes according to claim 1, characterized in that, The step of forming sidewalls on the sidewalls of the first pattern structure and the second pattern structure includes: A sidewall material layer is deposited on the first pattern structure and the second pattern structure; the thickness of the sidewall material layer is greater than half the distance between the first column and the adjacent second column; The sidewall material layer is etched using an anisotropic etching method to form sidewalls on the sidewalls of the first patterned structure and the second patterned structure.

3. The etching method for square-arranged holes according to claim 1, characterized in that, The cross-sectional shape of the first and second pillars includes a circle, a square, a rectangle, or a rhombus.

4. The etching method for square-arranged holes according to claim 1, characterized in that, Both the first column and the second column include a carbon layer.

5. The etching method for square-arranged holes according to claim 1, characterized in that, The process of forming the first photolithographic pattern on the top mask material layer using photolithography includes: A first photolithographic pattern material layer is formed on the top mask material layer; A first photoresist pattern with the first photolithographic pattern is formed on the first photolithographic pattern material layer using a photolithography process; Using the first photoresist pattern as a mask, the first photoresist pattern material layer is etched until the top mask material layer is exposed, and the first photoresist pattern is removed to obtain the first photoresist pattern.

6. The etching method for square-arranged holes according to claim 5, characterized in that, Forming a second photolithographic pattern on the silicon oxynitride material layer in the top mask material layer using a photolithography process includes: A second photolithographic pattern material layer is formed on a silicon oxynitride material layer in the top mask material layer, surrounding the top mask pattern, wherein the top of the second photolithographic pattern material layer is flush with the top of the top mask pattern; A second photoresist pattern with a second photolithographic pattern is formed on the second photolithographic pattern material layer using a photolithography process, and the second photoresist pattern is used as the second photolithographic pattern.

7. The etching method for square-arranged holes according to claim 1, characterized in that, The step of etching the carbon material layer, silicon oxynitride material layer, and bottom mask layer in the top mask material using the top mask pattern and the second photolithography pattern as masks to obtain an interleaved first pattern structure and second pattern structure includes: Using the top mask pattern and the second photolithography pattern as masks, the carbon material layer, silicon oxynitride material layer and the bottom mask layer in the top mask material are etched until the layer to be etched is exposed, thus obtaining the bottom mask pattern; By retaining the carbon material layer and silicon oxynitride material layer in the bottom mask pattern, an alternating first pattern structure and a second pattern structure are obtained.

8. The etching method for square-arranged holes according to any one of claims 3-7, characterized in that, The carbon material layer is an amorphous carbon layer or a carbonaceous organic film formed by spin coating.

9. The etching method for square-arranged holes according to any one of claims 1-7, characterized in that, The sidewall material includes one or more of silicon, silicon oxide, silicon nitride, titanium nitride, and tungsten nitride.

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