Input sensing method and input sensing apparatus

Abstract

An input sensing method and an input sensing device are provided. The input sensing device includes sensor pixels, a horizontal driver, a selection circuit, and a vertical driver. Each of the sensor pixels is connected to a corresponding one of a plurality of drive lines and a corresponding one of a plurality of signal input lines. The horizontal driver sequentially applies a horizontal drive signal to the sensor pixels through the plurality of drive lines. The selection circuit is connected to n (n is a natural number of 2 or more) of the plurality of signal input lines and to one output line. The selection circuit sequentially outputs n sensing signals received through the n signal input lines to the one output line. The vertical driver receives the n sensing signals through the one output line. The horizontal driver applies the horizontal drive signal n times to a given one of the plurality of drive lines to correspond to the n sensing signals.

Description

[0001] Cross-references to related applications

[0002] This patent application claims priority to Korean Patent Application No. 10-2020-0102734, filed on August 14, 2020, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] This disclosure relates to an input sensing method and a display device using the input sensing method. Background Technology

[0004] Display devices such as smartphones and tablet PCs can be accessed after authenticating a user's biometric information, such as a fingerprint. The fingerprint sensor used to sense the biometric information can be embedded within the display device or attached to a part of the display device. Display devices that include such fingerprint sensors can be referred to as fingerprint sensor integrated display devices or in-screen fingerprint (FOD) devices.

[0005] A Photodetector (FOD) can include a large number of light sensors. Accordingly, the FOD includes numerous output lines to transmit sensing signals from the light sensors to the input detector. Furthermore, the FOD's reset driver includes numerous stage circuits to initialize the large number of light sensors. However, the large number of output lines and stage circuits can generate excessive noise and increase the size of the FOD. Noise can reduce the FOD's sensing sensitivity. The increased size may be undesirable for users and may increase the manufacturing cost of the FOD. Summary of the Invention

[0006] At least one embodiment of the present invention has been dedicated to providing an input sensing device that minimizes the increase in size of the reset driver and input detector and reduces the manufacturing cost of having a large area of ​​FOD.

[0007] At least one embodiment of the present invention has been dedicated to providing an input sensing method with improved sensing sensitivity by reducing the influence of external noise, and an input sensing device using the input sensing method.

[0008] According to an exemplary embodiment of the present invention, an input sensing device includes: a plurality of sensor pixels, a horizontal driver, a selection circuit, and a vertical driver. Each sensor pixel is connected to a corresponding drive line among a plurality of drive lines and a corresponding signal input line among a plurality of signal input lines. The horizontal driver is configured to sequentially apply a horizontal drive signal to the plurality of sensor pixels through the plurality of drive lines. The selection circuit is connected to n signal input lines (n is a natural number of 2 or greater) and to an output line. The selection circuit is configured to sequentially output n sensing signals received through the n signal input lines to the output line. The vertical driver is configured to receive n sensing signals through the output line. The horizontal driver applies the horizontal drive signal n times to a given drive line among the plurality of drive lines to correspond to the n sensing signals.

[0009] In one embodiment, the vertical driver includes an integrating circuit for integrating the sensed signal to generate a first output signal, and the integrating circuit includes an amplifier, a capacitor, and an initialization switch. The amplifier includes a first input terminal connected to an output line, a second input terminal connected to a reference voltage line, and an output terminal. The capacitor includes a first electrode connected to the first input terminal and a second electrode connected to the output terminal. The initialization switch is disposed between the first input terminal and the output terminal.

[0010] The vertical driver may include an analog-to-digital converter that converts a first output signal of analog type into a sense data signal of digital type.

[0011] The vertical driver may further include associated double sampling circuitry disposed between the amplifier's output terminal and the analog-to-digital converter.

[0012] In an exemplary embodiment, the associated dual-sampling circuit includes a first sampling switch, a second sampling switch, a first sampling capacitor, a second sampling capacitor, and a differential amplifier. The first sampling switch is disposed between an output terminal and an analog-to-digital converter (ADC). The second sampling switch is disposed between an output terminal and the ADC. The first sampling capacitor includes a terminal connected between the first sampling switch and the ADC. The second sampling capacitor includes a terminal connected between the second sampling switch and the ADC. The differential amplifier includes a first input terminal connected to the terminal of the first sampling capacitor, a second input terminal connected to the terminal of the second sampling capacitor, and an output terminal.

[0013] In an exemplary embodiment, the associated dual sampling circuit turns on the first sampling switch before the horizontal drive signal is applied to store the 1_1 output signal in the first sampling capacitor and turns on the second sampling switch after the horizontal drive signal is applied to store the 1_2 output signal in the second sampling capacitor, and the differential amplifier outputs the 1_3 output signal by differentially dividing the 1_1 output signal and the 1_2 output signal.

[0014] The initialization switch can be turned on before the first sampling switch is turned on.

[0015] The selection circuit may include n transistors connected between n signal input lines and one output line.

[0016] The horizontal drive signal can be applied to each drive line n times.

[0017] Each of the n transistors can be turned on before the first sampling switch is turned on and can be turned off after the second sampling switch is turned off.

[0018] Each of the n transistors can be turned on before the initialization switch is turned on.

[0019] The sensor pixels can be further connected to the reset voltage power supply line, the bias voltage power supply line, and the common voltage power supply line.

[0020] The input sensing device may further include a reset unit that is connected to multiple sensor pixels and a reset control line and simultaneously applies a reset voltage to the multiple sensor pixels.

[0021] In an exemplary embodiment, the sensor pixel includes a first transistor, a photodiode, a second transistor, and a third transistor. The first transistor includes a first electrode connected to a reset voltage power supply line, a second electrode connected to a first node, and a gate electrode connected to a reset control line. The photodiode includes an anode electrode connected to a bias voltage power supply line and a cathode electrode connected to the first node. The second transistor includes a first electrode connected to a common voltage power supply line, a second electrode connected to a second node, and a gate electrode connected to the first node. The third transistor includes a first electrode connected to the second node, a second electrode connected to a corresponding signal input line among a plurality of signal input lines, and a gate electrode connected to a corresponding drive line among a plurality of drive lines.

[0022] The sensor pixel may further include a first electrode connected to a bias voltage power supply line and a second electrode connected to a first node.

[0023] An exemplary embodiment of the present invention provides an input sensing device, including: a plurality of sensor pixels, a reset circuit, and a horizontal driver. The plurality of sensor pixels are connected to a reset control line and a drive line. The reset circuit applies a reset signal via a reset control line connected to each of the plurality of sensor pixels. The horizontal driver sequentially provides a horizontal drive signal to the plurality of sensor pixels via the drive line. The reset circuit applies the reset signal to the plurality of sensor pixels simultaneously.

[0024] Before applying the horizontal drive signal to the sensor pixel, the reset unit can apply the reset signal to the sensor pixel multiple times.

[0025] The sensor pixel can be further connected to a signal input line, a reset voltage power supply line, a bias voltage power supply line, and a common voltage power supply line. In an exemplary embodiment, the sensor pixel includes a first transistor, a photodiode, a second transistor, and a third transistor. The first transistor includes a first electrode connected to the reset voltage power supply line, a second electrode connected to a first node, and a gate electrode connected to a reset control line. The photodiode includes an anode electrode connected to the bias voltage power supply line and a cathode electrode connected to the first node. The second transistor includes a first electrode connected to the common voltage power supply line, a second electrode connected to a second node, and a gate electrode connected to the first node. The third transistor includes a first electrode connected to the second node, a second electrode connected to the signal input line, and a gate electrode connected to a drive line.

[0026] An exemplary embodiment of the present invention provides an input sensing method, comprising: simultaneously applying a reset signal to a plurality of sensor pixels; generating a sensing signal in response to the reset signal; sequentially applying a horizontal drive signal to the plurality of sensor pixels; receiving sensing signals sequentially output in response to the horizontal drive signal; generating a sensing data signal corresponding to the received sensing signal; and correcting the sensing data signal.

[0027] Correction of the sensed data signal may include dividing the sensed data signal by a value proportional to the amount of time that one of the sensor pixels is exposed to light.

[0028] The magnitude or amplitude of the sensed signal can be increased proportionally to the time interval between the time point when the reset signal is applied and the time point when the horizontal drive signal is applied.

[0029] Simultaneous application of the reset signal to multiple sensor pixels can further include providing the reset signal to multiple sensor pixels multiple times before applying the horizontal drive signal to the multiple sensor pixels.

[0030] The input sensing device according to an embodiment of the present invention includes a reset driver that simultaneously applies a reset voltage to all optical sensors of the FOD and a multiplexer located between the optical sensors and the input detector, thereby minimizing the increase in size of the reset driver and the input detector and reducing their manufacturing cost.

[0031] According to an exemplary embodiment of the present invention, an input sensing device includes: a plurality of sensor pixels, a horizontal driver, a selection circuit, and a vertical driver. Each sensor pixel is connected to a corresponding drive line of a plurality of drive lines and a corresponding signal input line of a plurality of signal input lines. The horizontal driver is configured to sequentially apply a horizontal drive signal to the plurality of sensor pixels through the plurality of drive lines. The selection circuit is connected to n signal input lines (n is a natural number of 2 or greater) and to an output line. The selection circuit is configured to sequentially output n sensing signals received through the n signal input lines to the output line. The vertical driver is configured to receive n sensing signals through the output line. The horizontal driver generates a horizontal drive signal to include n jumps during a single frame period to correspond to the n sensing signals.

[0032] In an exemplary embodiment, the reset voltage applied to the plurality of sensor pixels includes multiple jumps prior to the n jumps of the horizontal drive signal. Attached Figure Description

[0033] Figure 1A A block diagram of a display device according to an exemplary embodiment of the present invention is shown.

[0034] Figure 1B A block diagram of a display device according to an exemplary embodiment of the present invention is shown.

[0035] Figure 2A It shows Figure 1A A cross-sectional view of an example display device.

[0036] Figure 2B It shows Figure 1A A cross-sectional view of an example display device.

[0037] Figure 3 It shows in Figure 1A or Figure 1B A block diagram of an example of an input sensing device included in a display device.

[0038] Figure 4 An exemplary embodiment of the present invention is shown. Figure 3 The horizontal drive shown.

[0039] Figure 5 An exemplary embodiment of the present invention is shown. Figure 4The circuit diagram of the stage is shown.

[0040] Figure 6A and Figure 6B It shows Figure 3 A circuit diagram of an example input sensing device.

[0041] Figure 7 It shows in Figure 6A An example of sensor pixels included in an input sensing device.

[0042] Figure 8A and Figure 8B The following is an explanation Figure 6A A waveform diagram illustrating an exemplary operation of the sensor array.

[0043] Figure 9 It shows in Figure 1A or Figure 1B A block diagram of an example of an input sensing device included in a display device.

[0044] Figure 10 It shows Figure 9 A circuit diagram of an example input sensing device.

[0045] Figure 11 An exemplary embodiment of the present invention is shown. Figure 10 The waveform diagram of the operation of the sensor array.

[0046] Figure 12 A graph showing the relationship between the time a photodiode is exposed to light and the amount of charge accumulated in the capacitor is presented.

[0047] Figure 13 An exemplary embodiment of the present invention is shown. Figure 10 The waveform diagram of the operation of the sensor array.

[0048] Figure 14 A flowchart of a sensing method of an input sensing device according to an exemplary embodiment of the present invention is shown. Detailed Implementation

[0049] The invention will be described more fully below with reference to the accompanying drawings, in which exemplary embodiments of the invention are illustrated. Those skilled in the art will recognize that the described embodiments can be modified in various ways without departing from the spirit or scope of the invention.

[0050] Throughout this specification, identical or similar constituent elements are indicated by the same reference numerals to clearly describe embodiments of the invention. Therefore, the aforementioned reference numerals may be used in other figures.

[0051] Furthermore, in the accompanying drawings, for ease of description, the dimensions and thickness of each element are shown, and this disclosure is not necessarily limited to those shown in the drawings. In the drawings, the thickness of layers, films, panels, areas, etc., may be exaggerated for clarity.

[0052] Figure 1A A block diagram of a display device according to an exemplary embodiment of the present invention is shown. Figure 1B A block diagram of a display device according to an exemplary embodiment of the present invention is shown. Figure 1A and Figure 1B The display device is shown schematically.

[0053] Reference Figure 1A and Figure 1B The display device 1000 includes a display panel 100 and a driver 200 (e.g., a driving circuit). For convenience, Figure 1A and Figure 1B The display panel 100 and the driver 200 are shown to be separate from each other, but the invention is not limited thereto. For example, all or part of the driver 200 may be integrally implemented on the display panel 100.

[0054] All or at least part of the display panel 100 may be flexible.

[0055] The display panel 100 includes a display area AA and a non-display area NA. Pixels PXL (or multiple pixels PXL) are provided in the display area AA, and the display area AA may be referred to as the effective area. Pixels PXL may include at least one light-emitting element. The display device 1000 displays an image in the display area AA by driving the pixels PXL in response to image data input from an external source.

[0056] In an exemplary embodiment, the display area AA includes an input sensing area FSA. At least some of the pixels PXL provided in the display area AA may be located in the input sensing area FSA.

[0057] In an embodiment, such as Figure 1A As shown, at least a portion of the display area AA corresponds to the input sensing area FSA.

[0058] at the same time, Figure 1A An example is shown in which only one input sensing area FSA is set in the display area AA, but the invention is not limited thereto. For example, multiple input sensing areas FSAs arranged or shaped regularly or irregularly may be located in the display area AA.

[0059] also, Figure 1AAn example is shown in which the input sensing region FSA is located in at least a portion of the display region AA, but the invention is not limited thereto. For example, the display region AA and the input sensing region FSA may overlap only in at least some areas.

[0060] In an exemplary embodiment, such as Figure 1B As shown, the entire display area AA corresponds to the input sensing area FSA. In this case, when input sensing is performed, the input sensing operation can be performed only on the portion that is essentially touched by the user. Hereinafter, input refers to patterns or biometric information formed by the ridges of the user's skin, and may include, for example, the user's fingerprint or palm print.

[0061] The non-display area NA is set around the display area AA and can be referred to as an inactive area. For example, the non-display area NA can include wiring areas, pad areas, or various dummy areas.

[0062] In an exemplary embodiment, the display device 1000 further includes a sensor pixel SPXL located in the input sensing region FSA. The sensor pixel SPXL can be configured as a sensor for sensing light. In an exemplary embodiment, when light emitted from a light source (or pixel PXL) located in the display device 1000 is reflected by the user's body (e.g., finger or palm), the sensor pixel SPXL senses the reflected light to output a corresponding electrical signal (e.g., voltage signal). The electrical signal can be transmitted to a driver 200 (e.g., input detector 220) and can be used for input sensing. Although an embodiment of the invention in which the sensor pixel SPXL is used for input sensing (e.g., fingerprint sensing) is described below as an example, the sensor pixel SPXL can be used to perform functions other than fingerprint sensing, such as in a touch sensor or scanner.

[0063] When sensor pixel SPXL is located within the input sensing area FSA (or on the input sensing area FSA), sensor pixel SPXL may overlap with pixel PXL, or may be positioned around pixel PXL. For example, part or all of sensor pixel SPXL may overlap with pixel PXL, or sensor pixel SPXL may be positioned between pixel PXL and adjacent pixels PXL. Sensor pixel SPXL and pixel PXL may have the same size or different sizes. The relative size and arrangement between sensor pixel SPXL and pixel PXL are not limited to any particular configuration.

[0064] In embodiments where the sensor pixel SPXL is positioned adjacent to or at least partially overlaps with pixel PXL, the sensor pixel SPXL can use a light-emitting element provided in pixel PXL as a light source. In this embodiment, the sensor pixel SPXL, together with the light-emitting element provided in pixel PXL, can constitute a light-sensing type input sensor. Thus, when an input sensor embedded display device (e.g., a fingerprint sensor embedded display device) is configured using pixel PXL as a light source without a separate external light source, the thickness of the light-sensing type input sensor and the thickness of the display device having the light-sensing type input sensor can be reduced, and manufacturing costs can be lowered.

[0065] In some embodiments, the sensor pixel SPXL may be disposed on a first surface (e.g., a rear surface) of the display panel 100 opposite to a second surface (e.g., a front surface) on which the image is displayed. However, the invention is not limited thereto.

[0066] Driver 200 can drive display panel 100. For example, driver 200 can output a data signal DS corresponding to image data to display panel 100. In addition, driver 200 can output a drive signal for sensor pixel SPXL and receive electrical signals (e.g., sensing signal SS) from sensor pixel SPXL. Driver 200 can detect user input (e.g., fingerprint or palm print) using electrical signals.

[0067] In an exemplary embodiment, the driver 200 includes a panel driver 210 and an input detector 220 (e.g., detector circuitry). For convenience, Figure 1A and Figure 1B The panel driver 210 and the input detector 220 are shown to be separate from each other, but the invention is not limited thereto. For example, at least a portion of the input detector 220 may be integrated with the panel driver 210, or may operate remotely from the panel driver 210.

[0068] In this embodiment, the panel driver 210 supplies a data signal DS corresponding to the image data to the pixels PXL while sequentially scanning the pixels PXL of the display area AA. In this embodiment, the display panel 100 can display an image corresponding to the image data.

[0069] In one embodiment, the panel driver 210 can supply a driving signal for fingerprint sensing to one or more of the pixels PXL. Here, the driving signal can be provided to the pixels PXL, causing them to emit light to function as a light source for the sensor pixels SPXL. In this embodiment, the driving signal for fingerprint sensing can be provided to pixels PXL located in a specific area within the display panel DP (e.g., pixels PXL located in the input sensing area FSA).

[0070] In this embodiment, the image data corresponding to the input sensing area FSA can be provided or controlled by the input detector 220. For example, during input sensing operation, the input detector 220 can provide a control signal IPD or image data corresponding to the image to be displayed in the input sensing area FSA to the panel driver 210.

[0071] In addition, the driving signal for fingerprint sensing can be provided to the sensor pixel SPXL by the input detector 220.

[0072] Input detector 220 can transmit a driving signal (e.g., driving voltage) to sensor pixel SPXL and can detect user input based on electrical signals received from sensor pixel SPXL. For example, input detector 220 can detect a user's fingerprint or palm print based on sensing signals SS supplied from sensor pixel SPXL (or a sensor array including sensor pixel SPXL).

[0073] The input detector 220 and the sensor pixel SPXL can be referred to as an input sensing device.

[0074] Figure 2A It shows Figure 1A A cross-sectional view of an example display device. Figure 2A It shows Figure 1A and Figure 1B A cross-sectional view of the input sensing area FSA of the display device 1000.

[0075] Reference Figures 1A to 2A The display device 1000 includes a display panel 100 in an input sensing area FSA and a sensor array PS (or input sensing panel) disposed on one surface of the display panel 100. Furthermore, the display device 1000 may include a substrate SUB and a circuit element layer BPL, a light-emitting element layer LDL, a first passivation layer PTL1, a first adhesive layer ADL1, and a window WIN sequentially disposed on a first surface (e.g., the upper surface) of the substrate SUB. Additionally, the display device 1000 may include a second adhesive layer ADL2 and a second passivation layer PTL2 sequentially disposed on a second and another surface (e.g., the lower surface) of the substrate SUB.

[0076] The substrate SUB is a base substrate used for the display panel 100, and can be a substantially transparent light-transmitting substrate. The substrate SUB can be a rigid substrate including glass or tempered glass or a flexible substrate made of plastic material. However, the material of the substrate SUB is not limited to these, and the substrate SUB can be made of various materials.

[0077] The circuit element layer BPL may be disposed on one surface of the substrate SUB and may include at least one conductive layer. For example, the circuit element layer BPL may include multiple circuit elements representing pixel circuitry for pixel PXL, as well as wiring for supplying various power sources and for signals driving pixel PXL. In embodiments, the circuit element layer BPL may include various circuit elements (such as at least one transistor and a capacitor) and multiple conductive layers for forming wiring connected to the various circuit elements. Furthermore, the circuit element layer BPL may include at least one insulating layer provided between the multiple conductive layers.

[0078] A light-emitting element layer (LDL) can be disposed on one surface of a circuit element layer (BPL). The LDL may include light-emitting elements (LDs) (or multiple LDs) connected to the circuit element layer (BPL) via contact holes. In an embodiment, at least one LD may be provided for a pixel PXL (or pixel region PXA). For example, the LD may be configured as an organic light-emitting element or an inorganic light-emitting element such as a micro light-emitting diode (LED) or a quantum dot LED. Furthermore, the LD may be a light-emitting element configured from a combination of organic and inorganic materials.

[0079] The pixel PXL may include circuit elements disposed in the circuit element layer BPL and at least one light-emitting element LD disposed in the light-emitting element layer LDL on the circuit element layer BPL.

[0080] The first passivation layer PTL1 can be disposed on the light-emitting element layer LDL to cover the display area AA. The first passivation layer PTL1 may include a sealing member such as a thin-film encapsulation (TFE) or an encapsulation substrate, and may additionally include a protective film in addition to the sealing member.

[0081] The first adhesive layer ADL1 is disposed between the first passivation layer PTL1 and the window WIN to bond the first passivation layer PTL1 and the window WIN. The first adhesive layer ADL1 may include transparent adhesives such as optically clear adhesive (OCA) and optically clear resin (OCR), and may include various adhesive materials.

[0082] The window WIN may be a protective member disposed at the uppermost part of a module of a display device 1000 including a display panel 100, and may be a substantially transparent light-transmitting substrate. The window WIN may have a multilayer structure including at least one of a glass substrate, a plastic film, and a plastic substrate. The window WIN may include a rigid or flexible substrate, but the materials included in the window WIN are not limited to these.

[0083] The display device 1000 may further include a polarizing plate, an anti-reflective layer, and / or a touch sensor layer (touch electrode layer). For example, the display device 1000 may further include a polarizing plate and / or a touch sensor layer disposed between the first passivation layer PTL1 and the window WIN.

[0084] The second passivation layer PTL2 can be disposed on the other surface of the substrate SUB. The second passivation layer PTL2 can be bonded to the substrate SUB by the second adhesive layer ADL2.

[0085] The second adhesive layer ADL2 can firmly bond (or attach) the substrate SUB and the second passivation layer PTL2. The second adhesive layer ADL2 may include a transparent adhesive such as OCA. The second adhesive layer ADL2 may include a pressure-sensitive adhesive (PSA) that serves as an adhesive material when pressure is applied thereto to bond to the bonding surface.

[0086] The second passivation layer PTL2 blocks the introduction of oxygen and / or moisture from the outside and can be formed as a single layer or multiple layers. The second passivation layer PTL2 can be formed in the form of a film to further ensure the flexibility of the display panel 100. The second passivation layer PTL2 can be bonded to the sensor array PS by another adhesive layer (not shown) including a transparent adhesive such as OCA.

[0087] A selective light-blocking film (not shown) may be further located beneath the second passivation layer PTL2. In an exemplary embodiment, the selective light-blocking film blocks light of a specific frequency band (e.g., infrared) from external light introduced into the display device 1000 to prevent light from incident on the sensor pixels SPXL of the sensor array PS. In an exemplary embodiment, the selective light-blocking film blocks light of a wavelength greater than a certain wavelength and allows light of that wavelength or a wavelength less than that wavelength to pass through it. In an embodiment, the certain wavelength is 500 nm, 600 nm, or the wavelength of infrared light. While it has been described that the selective light-blocking film is further located beneath the second passivation layer PTL2, the invention is not limited thereto.

[0088] The sensor array PS can be attached to another surface (e.g., the rear surface) of the display panel 100 via adhesive to overlap with at least one area of ​​the display panel 100. For example, the sensor array PS can be configured to overlap with the display panel 100 in the input sensing area FSA. The sensor array PS may include sensor pixels SPXL (or multiple sensor pixels SPXL) distributed at a predetermined resolution and / or interval.

[0089] In an exemplary embodiment, although not shown, an optical system may be provided on the sensor array PS to provide a light path by converging and guiding light to the sensor array PS. The width of the transparent portion guiding the light in the optical system may be determined by considering sensing accuracy and light conversion efficiency. The convergence rate of light incident on the sensor array PS may be improved by the optical system. The optical system may be formed of optical fibers or silicon.

[0090] The sensor pixels SPXL can have a suitable number, size, and arrangement so that an identifiable fingerprint image can be generated from the electrical signals output by the sensor pixels SPXL. The spacing between the sensor pixels SPXL and other sensor pixels SPXL can be densely arranged so that light reflected from the sensed target object (e.g., fingerprint) can be incident on at least two adjacent sensor pixels SPXL.

[0091] The sensor pixel SPXL can sense external light to output a corresponding electrical signal (e.g., a voltage signal). The reflected light incident on the sensor pixel SPXL can have optical properties (e.g., frequency, wavelength, size, etc.) due to the valleys and ridges formed in the user's body (e.g., a finger). Therefore, the sensor pixel SPXL can output a sensing signal SS corresponding to the optical properties of the reflected light.

[0092] The sensing signal SS output from the sensor pixel SPXL can be converted into image data by the input detector 220 and can be used for user identification (e.g., fingerprint authentication).

[0093] Figure 2B It shows Figure 1A A cross-sectional view of an example display device.

[0094] Reference Figure 1A , Figure 2A and Figure 2BThe display device 1000 further includes a light-blocking layer PHL comprising a pinhole PIH. In other words, the display device 1000 has a structure in which the pinhole type is used as an optical system, and the optical system is located inside the display panel 100. The light-blocking layer PHL may be located inside the display panel 100 or between the display panel 100 and the sensor pixel SPXL, and blocks a portion of the light incident on the sensor pixel SPXL. For example, a portion of the light incident on the light-blocking layer PHL may be blocked, and the remaining portion of the light may pass through the pinhole PIH to reach the sensor pixel SPXL below the light-blocking layer PHL.

[0095] A pinhole PIH can refer to an optical aperture and can be a light-transmitting aperture. For example, a pinhole PIH can be a light-transmitting aperture with the smallest size (or area) in the path of reflected light passing through the display panel 1000 in an oblique or vertical direction to incident on the sensor pixel SPXL, where the layers of the display device 100 are formed by overlapping each other. In an exemplary embodiment, a pinhole PIH is a through-hole.

[0096] The pinhole PIH can have a predetermined width (e.g., a width in the range of 5 μm to 20 μm). Therefore, as the light-blocking layer PHL is moved away from the light-blocking layer PHL (i.e., as it moves in the upward or downward direction of the light-blocking layer PHL), the width of the optical opening area to be ensured in each layer of the display device 1000 can gradually increase.

[0097] The width (or diameter) of the pinhole PIH can be set to approximately 10 times or more the wavelength of the reflected light. For example, the width or diameter of the pinhole PIH can be set to approximately 4 μm or 5 μm or more to prevent light diffraction. Furthermore, the width of the pinhole PIH can be set to a size sufficient to prevent image blurring and to more clearly sense the shape of the fingerprint. For example, the width of the pinhole PIH can be set to approximately 15 μm or less. However, the invention is not limited thereto, and the width of the pinhole PIH can vary depending on the wavelength of the reflected light and / or the thickness of the layers of the module.

[0098] In an exemplary embodiment, only the reflected light passing through the pinhole PIH reaches the sensor pixel SPXL of the sensor array PS. The phase of the light reflected from the fingerprint through the pinhole PIH, which has a very narrow width, can differ by 180 degrees from the phase of the image formed on the sensor array PS.

[0099] The sensor pixel SPXL can output a sensing signal SS (e.g., a voltage signal) corresponding to the reflected light passing through the pinhole PIH.

[0100] However, this is exemplary, and the configuration, arrangement, and driving method of the sensor array PS used to detect reflected light from fingerprints are not limited to this. Figure 2A or Figure 2B The sensor array PS shown in the figure.

[0101] Figure 3 It shows in Figure 1A or Figure 1B A block diagram of an example of an input sensing device that may be included in a display device. In an exemplary embodiment, the input sensing device ISD includes a sensor array PS, an input detector 220, and a multiplexer 222 (including a first multiplexer MUX1, a second multiplexer MUX2, ..., an m-th multiplexer MUXm, where m is an integer greater than or equal to 2).

[0102] Reference Figure 1A , Figure 1B and Figure 3 The sensor array PS (or input sensing panel) may include a plurality of sensor pixels SPXL. In an embodiment, the sensor pixels SPXL may be arranged in a two-dimensional array, but the invention is not limited thereto. The sensor pixels SPXL may include a photoelectric element that photoelectrically converts incident light into electrical charge based on the amount of incident light. In an embodiment, the photoelectric element is a photodiode. In an embodiment, the sensor array PS may receive externally a reset voltage VRST, a bias voltage VBIAS, and a common voltage VCOM for driving the sensor pixels SPXL.

[0103] The input detector 220 includes a horizontal driver 221 (e.g., driver circuit), a multiplexer controller 223 (e.g., control circuit), a vertical driver 224 (e.g., driver circuit), a reset unit 225 (e.g., reset circuit), and a controller 226 (e.g., control circuit).

[0104] Horizontal driver 221 can be connected to sensor pixel SPXL via drive lines H1 to Hn (where n is an integer greater than or equal to 2). Horizontal driver 221 may include a shift register or an address decoder. In an exemplary embodiment, horizontal driver 221 sequentially applies drive signals (or multiple drive signals) to drive lines H1 to Hn. Here, the drive signals may be signals used to selectively drive sensor pixel SPXL. For example, horizontal driver 221 may apply drive signals on a per-row basis. For example, horizontal driver 221 may apply a first drive signal to sensor pixel SPXL in a first time, apply a second drive signal to sensor pixel SPXL in a second time, and so on, until each row has received a drive signal.

[0105] The sensor pixel SPXL, selected and driven by the horizontal driver 221, senses light using internal photoelectric elements and outputs an electrical signal (i.e., a sensing signal SS) corresponding to the sensed light (e.g., a voltage signal). The electrical signal may be an analog signal.

[0106] The sensor array PS can provide the sensing signal SS to the multiplexer 222 via signal input lines O1 to Ok.

[0107] Multiplexer 222 can receive sensing signal SS from sensor array PS and provide sensing signal SS to vertical driver 224. For example, multiplexer 222 can receive sensing signal SS through signal input lines O1 to Ok and can output sensing signal SS to output lines V1 to Vm in a time-division multiplexing manner, where the number m is less than the number k of signal input lines O1 to Ok.

[0108] Figure 3 The example shown is where the number of signal input lines O1 to Ok, k, is four times the number of output lines V1 to Vm, m (where m is an integer greater than or equal to 2). However, the ratio of the number of signal input lines O1 to Ok, k, to the number of output lines V1 to Vm, m, can vary depending on the structure of the multiplexer 222.

[0109] The multiplexer controller 223 can control the operation of the multiplexer 222 via a sensing signal control signal CSS. For example, the sensing signal control signal CSS can be used to control the operation of the transistors included in each of the multiplexers 222. The sensing signal control signal CSS can include multiple sub-control signals, wherein each of the multiplexers 222 receives different sub-control signals.

[0110] The vertical driver 224 can receive the sensing signal SS via output lines V1 to Vm. The vertical driver 224 can process the signal output from the sensor pixel SPXL.

[0111] For example, the vertical driver 224 can perform correlated double sampling (CDS) processing to remove noise from the electrical signal provided by the self-signal sensor pixel SPXL. Furthermore, the vertical driver 224 can convert analog-type electrical signals into digital-type signals. In this embodiment, an analog-to-digital converter is provided for each of the output lines V1 to Vm, and the analog-to-digital converters can process the electrical signals (or analog signals) provided from the output lines V1 to Vm in parallel.

[0112] The reset unit 225 can be connected to all of the sensor pixels SPXL provided in the sensor array PS via a single reset control line RSTL. The reset unit 225 can simultaneously apply a reset signal RST to all of the sensor pixels SPXL. Here, the reset signal RST can be a signal used to apply a reset voltage VRST to the sensor pixels SPXL.

[0113] The controller 226 can control the horizontal driver 221, the multiplexer controller 223, the vertical driver 224, and the reset unit 225.

[0114] In one embodiment, controller 226 provides clock signals and control signals (e.g., a start pulse) to level driver 221. In this embodiment, level driver 221 generates a level drive signal HDS for selecting and driving sensor pixel SPXL based on signals provided from controller 226.

[0115] Controller 226 can provide the multiplexer control signal MCS to multiplexer controller 223. Multiplexer controller 223 can receive the multiplexer control signal MCS and generate a sensing signal control signal CSS based on the received multiplexer control signal MCS.

[0116] In one embodiment, controller 226 provides clock and control signals to vertical driver 224. In this embodiment, vertical driver 224 periodically samples the sensing signal SS provided from sensor pixel SPXL based on the clock and control signals, and converts the sampled signal into a digital sensing data signal.

[0117] In an exemplary embodiment, controller 226 generates image data corresponding to the sensing signal SS received by vertical driver 224 and processes the generated image data. Furthermore, controller 226 can detect input (e.g., fingerprint or palm print) from the processed image data and can authenticate the detected input or transmit it externally.

[0118] However, this is an example, and the image data generation and input detection do not need to be performed by the controller 226, but can be performed by an external host processor.

[0119] In this embodiment, the controller 226 provides a reset unit control signal RCS to the reset unit 225. The reset unit 225 can receive the reset unit control signal RCS and generate a reset signal RST based on the received reset unit control signal RCS.

[0120] although Figure 3An embodiment in which the horizontal driver 221, multiplexer controller 223, vertical driver 224, reset unit 225, and controller 226 are configured independently is shown, but the invention is not limited thereto. For example, the multiplexer controller 223, vertical driver 224, reset unit 225, and controller 226 can be implemented as a single integrated circuit, and the horizontal driver 221 can be formed in the sensor array PS using the same process as that used for the sensor pixel SPXL.

[0121] Figure 4 It shows Figure 3 The example of a horizontal drive is shown. For better understanding and ease of description, Figure 4 Four levels are shown.

[0122] Reference Figure 4 The horizontal driver 221 according to an embodiment of the present invention may include multiple stages ST1 to ST4. Each of stages ST1 to ST4 is connected to one of the drive lines H1 to H4 and is driven corresponding to clock signals CLK1 and CLK2. In an exemplary embodiment, each of stages ST1 to ST4 is implemented by the same circuitry.

[0123] In an exemplary embodiment, each of stages ST1 to ST4 includes a first input terminal 2211, a second input terminal 2212, a third input terminal 2213, and an output terminal 2214.

[0124] The first input terminal 2211 of each of stages ST1 to ST4 can receive a start signal SSP or an output signal (i.e., a drive signal) from the previous stage. For example, the first input terminal 2211 of the first stage ST1 receives the start signal SSP, and the first input terminals 2211 of the remaining stages ST2 to ST4 receive the output signal from the previous stage.

[0125] The second input terminal 2212 of the i-th stage STi (where i is an odd or even number) receives the first clock signal CLK1, and the third input terminal 2213 of the i-th stage STi receives the second clock signal CLK2. The second input terminal 2212 of the (i+1)-th stage STi receives the second clock signal CLK2, and the third input terminal 2213 of the (i+1)-th stage receives the first clock signal CLK1.

[0126] In an exemplary embodiment, the first clock signal CLK1 and the second clock signal CLK2 have the same period, and their phases do not overlap. For example, when the period in which a drive signal is supplied to a drive line is referred to as a horizontal period 1H, then each of the clock signals CLK1 and CLK2 has a period of 2H and can be supplied to different horizontal periods.

[0127] Figure 5 An exemplary embodiment of the present invention is shown. Figure 4 The circuit diagram of the stage is shown below. For better understanding and ease of description, Figure 5 The first level ST1 and the second level ST2 are shown. Furthermore, although... Figure 5 The transistor shown is a P-channel metal-oxide-semiconductor (PMOS) transistor, but the invention is not limited thereto. For example, the transistor may alternatively be an N-channel metal-oxide-semiconductor (NMOS) transistor.

[0128] Reference Figure 5 Each of stages ST1 and ST2 according to an exemplary embodiment of the present invention includes a first driver 221a, a second driver 221b, an output unit 221c (e.g., an output circuit) and a first transistor M1.

[0129] The output unit 221c can control the voltage supplied to the output terminal 2214 in response to the voltage applied to the first node N1 and the second node N2. In an exemplary embodiment, the output unit 221c includes a fifth transistor M5, a sixth transistor M6, a first capacitor C1, and a second capacitor C2 to control the voltage supplied to the output terminal 2214.

[0130] A fifth transistor M5 is located between the first power supply VDD and the output terminal 2214, and the gate electrode of the fifth transistor M5 is connected to the first node N1. The fifth transistor M5 can control the connection between the first power supply VDD and the output terminal 2214 in response to the voltage applied to the first node N1. Here, the first power supply VDD is set to the gate cutoff voltage (e.g., a high-level voltage).

[0131] The sixth transistor M6 is located between the output terminal 2214 and the third input terminal 2213, and the gate electrode of the sixth transistor M6 is connected to the second node N2. The sixth transistor M6 can control the connection between the output terminal 2214 and the third input terminal 2213 in response to the voltage applied to the second node N2.

[0132] The first capacitor C1 is connected between the second node N2 and the output terminal 2214. The first capacitor C1 can be charged using the voltage based on the on and off states of the sixth transistor M6.

[0133] The second capacitor C2 is connected between the first node N1 and the first power supply VDD. The second capacitor C2 can be charged using the voltage applied to the first node N1.

[0134] The first driver 221a can control the voltage of the third node N3 in response to signals supplied to the first input terminal 2211 to the third input terminal 2213. In an exemplary embodiment, the first driver 221a includes a second transistor, a third transistor M3, and a fourth transistor M4 to control the voltage of the third node N3.

[0135] Figure 5 The diagram illustrates second transistors M2_1 and M2_2 located between the first input terminal 2211 and the third node N3, with their gate electrodes connected to the second input terminal 2212. These second transistors M2_1 and M2_2 can control the connection between the first input terminal 2211 and the third node N3 in response to a signal supplied to the second input terminal 2212. The gate electrodes of the second transistors M2_1 and M2_2 in the first stage ST1 receive a first clock signal CLK1, and the gate electrodes of the second transistors M2_1 and M2_2 in the second stage ST2 receive a second clock signal CLK2. In an exemplary embodiment, the second transistors M2_1 and M2_2 are replaced with a single transistor, or one of the second transistors M2_1 and M2_2 is omitted.

[0136] The third transistor M3 and the fourth transistor M4 are connected in series between the third node N3 and the first power supply VDD. The third transistor M3 is located between the fourth transistor M4 and the third node N3, and the gate electrode of the third transistor M3 is connected to the third input terminal 2213. The third transistor M3 can control the connection between the fourth transistor M4 and the third node N3 in response to a signal supplied to the third input terminal 2213. The gate electrode of the third transistor M3 in the first stage ST1 receives the second clock signal CLK2, and the gate electrode of the third transistor M3 in the second stage ST2 receives the first clock signal CLK1.

[0137] The fourth transistor M4 is located between the third transistor M3 and the first power supply VDD, and the gate electrode of the fourth transistor M4 is connected to the first node N1. The fourth transistor M4 can control the connection between the third transistor M3 and the first power supply VDD in response to the voltage of the first node N1.

[0138] The second driver 221b can control the voltage of the first node N1 in response to the voltage of the second input terminal 2212 and the third node N3. In an exemplary embodiment, the second driver 221b includes a seventh transistor M7 and an eighth transistor M8 to control the voltage of the first node N1.

[0139] The seventh transistor M7 is located between the first node N1 and the second input terminal 2212, and the gate electrode of the seventh transistor M7 is connected to the third node N3. The seventh transistor M7 can control the connection between the first node N1 and the second input terminal 2212 in response to the voltage of the third node N3.

[0140] An eighth transistor M8 is located between the first node N1 and the second power supply VSS, and the gate electrode of the eighth transistor M8 is connected to the second input terminal 2212. The eighth transistor M8 can control the connection between the first node N1 and the second power supply VSS in response to a signal at the second input terminal 2212. Here, the second power supply VSS is set to the gate on-state voltage (e.g., a low-level voltage).

[0141] A first transistor M1 is located between the third node N3 and the second node N2, and the gate electrode of the first transistor M1 is connected to the second power supply VSS. The first transistor M1 can maintain the electrical connection between the third node N3 and the second node N2 while maintaining a conducting state. Additionally, the first transistor M1 can limit the voltage drop of the third node N3 in response to the voltage of the second node N2. In other words, even when the voltage of the second node N2 drops below the voltage of the second power supply VSS, the voltage of the third node N3 will not drop below a voltage obtained by subtracting the threshold voltage of the first transistor M1 from the voltage of the second power supply VSS.

[0142] Figure 6A and Figure 6B It shows Figure 3 A circuit diagram of an example input sensing device. Figure 6A The diagram schematically illustrates an input sensing device ISD, a multiplexer 222 connected to the sensor pixel SPXL, a reset unit 225, and a vertical driver 224 connected to the multiplexer 222, based on sensor pixels SPXL included in the (i-1)th sensor pixel row to the (i+1)th sensor pixel row (where i is a positive integer greater than 1 and less than n) and the (j-1)th sensor pixel column to the (j+6)th sensor pixel column (where j+5 is a positive integer greater than 6 and less than k). Figure 7 It shows in Figure 6A An example of sensor pixels included in an input sensing device. Figure 7 The sensor pixels SPXL included in the i-th sensor pixel row and j-th sensor pixel column are shown.

[0143] Reference Figures 3 to 7The input sensing device ISD (or sensor array PS) includes drive lines Hi-1, Hi and Hi+1, signal input lines Oj-1, Oj, Oj+1, Oj+2, Oj+3, Oj+4, Oj+5 and Oj+6, reset control line RSTL, reset voltage power supply line PL1, bias voltage power supply line PL2, common voltage power supply line PL3, and sensor pixels SPXL connected to each of them.

[0144] The drive lines Hi-1, Hi and Hi+1 can extend in the second direction DR2 and can be arranged along the first direction DR1 that intersects the second direction DR2.

[0145] Signal input lines Oj-1, Oj, Oj+1, Oj+2, Oj+3, Oj+4, Oj+5 and Oj+6 can extend along the first direction DR1 and can be arranged along the second direction DR2.

[0146] The reset voltage VRST can be applied to the reset voltage power line PL1.

[0147] The bias voltage VBIAS can be applied to the bias voltage power supply line PL2.

[0148] The common voltage VCOM can be applied to the common voltage power line PL3.

[0149] The sensor pixel SPXL can be electrically connected to drive lines Hi-1, Hi and Hi+1, signal input lines Oj-1, Oj, Oj+1, Oj+2, Oj+3, Oj+4, Oj+5 and Oj+6, reset voltage power supply line PL1, bias voltage power supply line PL2 and common voltage power supply line PL3.

[0150] Since sensor pixels SPXL are essentially equivalent to each other, sensor pixels SPXL will be described using the sensor pixels SPXL included in the i-th sensor pixel row and the j-th sensor pixel column.

[0151] Reference Figure 7 In an exemplary embodiment, the sensor pixel SPXL includes a photodiode PD, a capacitor C_PD, a first transistor T1, a second transistor T2, and a third transistor T3.

[0152] Sensor pixel SPXL is connected to reset voltage power supply line PL1, bias voltage power supply line PL2, common voltage power supply line PL3, i-th drive line Hi, and j-th signal input line Oj, and can respond to the horizontal drive signal HDS (or sensing signal SS (see below) provided through the i-th drive line Hi). Figure 1A The photoelectric charge is transferred to the j-th signal input line Oj.

[0153] The first transistor T1 includes a first electrode connected to the reset voltage power supply line PL1, a second electrode connected to the fourth node N4, and a gate electrode connected to the reset control line RSTL.

[0154] According to one embodiment, a first transistor T1 is connected between the reset voltage power supply line PL1 and the fourth node N4, and is turned on in response to a reset signal RST (e.g., a signal indicating the gate on-voltage level of the transistor) provided via the reset control line RSTL. In this embodiment, the potential of the fourth node N4 becomes the reset voltage VRST. That is, the first transistor T1 can initialize the photodiode PD to the reset voltage VRST.

[0155] A photodiode PD is electrically connected between the bias voltage power supply line PL2 and the fourth node N4, and can generate charge (or current) based on light incident on it. That is, the photodiode PD can perform photoelectric conversion. For example, the anode electrode of the photodiode PD is connected to the bias voltage power supply line PL2, the cathode electrode of the photodiode PD is electrically connected to the fourth node N4, and the photodiode PD can perform photoelectric conversion after a reset voltage VRST is applied to the fourth node N4.

[0156] The capacitor C_PD is electrically connected between the bias voltage power supply line PL2 and the fourth node N4, and can temporarily store the charge (or current) generated by the photodiode PD. For example, one electrode of the capacitor C_PD can be connected to the bias voltage power supply line PL2, and the other electrode of the capacitor C_PD can be electrically connected to the fourth node N4.

[0157] In one embodiment, the second transistor T2 includes a first electrode connected to a common voltage power line PL3, a second electrode connected to a fifth node N5, and a gate electrode connected to a fourth node N4. According to the embodiment, when the photodiode PD performs its photoelectric conversion function, the potential of the fourth node N4 can be changed proportionally to the amount of charge (or current) generated based on the incident light. That is, the gate electrode bias of the second transistor T2 is changed. This ultimately causes a change in the potential of the fifth node N5 (or the second electrode of the second transistor T2).

[0158] In an embodiment, the third transistor T3 includes a first electrode connected to the fifth node N5, a second electrode electrically connected to the j-th signal input line Oj, and a gate electrode connected to the i-th drive line Hi.

[0159] That is, the third transistor T3 is electrically connected between the fifth node N5 and the j-th signal input line Oj, and can be turned on in response to the horizontal drive signal HDS (e.g., a drive signal of the gate on-voltage level of the conducting transistor) provided by the i-th drive line Hi to transfer the charge of the fifth node N5 to the j-th signal input line Oj.

[0160] Figure 7 An example is shown in which transistors T1, T2, and T3 are P-type transistors, but at least some of transistors T1, T2, and T3 can be N-type transistors, and accordingly, the circuit structure of the sensor pixel SPXL can be modified differently.

[0161] Return to reference Figure 6A Multiplexer 222 can be positioned between sensor array PS and vertical driver 224. Since multiplexer 222 operates essentially the same, for better understanding and ease of description, the first multiplexer MUX1 connected to the first output line V1 will be primarily described. Multiplexer 222 can be referred to as a selection circuit.

[0162] According to an exemplary embodiment, the first multiplexer MUX1 includes a 4_1 transistor T4_1, a 4_2 transistor T4_2, a 4_3 transistor T4_3, and a 4_4 transistor T4_4.

[0163] The fourth transistor T4_1 can be connected between the j-1 signal input line Oj-1 and the first output line V1. For example, the fourth transistor T4_1 may include a first electrode connected to the j-1 signal input line Oj-1, a second electrode connected to the first output line V1, and a gate electrode connected to the first sensing signal control line CSSL1.

[0164] Transistor T4_1 can be turned on in response to the first sensing signal control signal CSS1. For example, transistor T4_1 can receive the first sensing signal control signal CSS1 from the multiplexer controller 223 via the first sensing signal control line CSSL1.

[0165] The fourth transistor T4_2 can be connected between the j-th signal input line Oj and the first output line V1. For example, the fourth transistor T4_2 may include a first electrode connected to the j-th signal input line Oj, a second electrode connected to the first output line V1, and a gate electrode connected to the second sensing signal control line CSSL2.

[0166] Transistor T4_2 can be turned on in response to the second sensing signal control signal CSS2. For example, transistor T4_2 can receive the second sensing signal control signal CSS2 from multiplexer controller 223 via the second sensing signal control line CSSL2.

[0167] The fourth transistor T4_3 can be connected between the j+1 signal input line Oj+1 and the first output line V1. For example, the fourth transistor T4_3 may include a first electrode connected to the j+1 signal input line Oj+1, a second electrode connected to the first output line V1, and a gate electrode connected to the third sensing signal control line CSSL3.

[0168] Transistor T4_3 can be turned on in response to the third sensing signal control signal CSS3. For example, transistor T4_3 can receive the third sensing signal control signal CSS3 from multiplexer controller 223 via the third sensing signal control line CSSL3.

[0169] The 4_4 transistor T4_4 can be connected between the j+2 signal input line Oj+2 and the first output line V1. For example, the 4_4 transistor T4_4 may include a first electrode connected to the j+2 signal input line Oj+2, a second electrode connected to the first output line V1, and a gate electrode connected to the fourth sensing signal control line CSSL4.

[0170] Transistor T4_4 can be turned on in response to the fourth sensing signal control signal CSS4. For example, transistor T4_4 can receive the fourth sensing signal control signal CSS4 from multiplexer controller 223 via the fourth sensing signal control line CSSL4.

[0171] The vertical driver 224 may include an integrator circuit, a correlated dual sampling circuit (CDS), or an analog-to-digital converter (ADC).

[0172] Each of the integrating circuits can be positioned between the output lines V1 and V2 and the associated double sampling circuit CDS. Since the integrating circuits are essentially equivalent to each other, the integrating circuit connected to the first output line V1 will be described.

[0173] In an exemplary embodiment, the integrating circuit includes an amplifier AMP, a capacitor CF, and an initialization switch SW_INT. The second input terminal of the amplifier AMP (e.g., the negative (-) input terminal) is connected to the first output line V1, and a reference voltage Vref is applied to the first input terminal of the amplifier AMP (e.g., the positive (+) input terminal).

[0174] The capacitor CF can be connected between the first input terminal and the output terminal of the amplifier AMP, and the initialization switch SW_INT can be connected in parallel to the capacitor CF.

[0175] When the initialization switch SW_INT is turned off, the charge (i.e., the sensing signal) supplied to the first input terminal is integrated in the capacitor CF, and the amplifier AMP can output the integrated sensing signal SS (i.e., the first output signal VOUT1) through the output terminal.

[0176] When the initialization switch SW_INT is turned on, the capacitor CF can be initialized.

[0177] Each of the correlated dual sampling circuits (CDS) can be positioned between the integrator circuit and the analog-to-digital converter (ADC).

[0178] The Correlated Dual Sampling Circuit (CDS) can output a first third output signal VOUT1_3 by differentially dividing the first_1 output signal VOUT1_1 when the reset voltage VRST (or reference voltage) is applied to the sensor pixel SPXL and the first_2 output signal VOUT1_2 when the actual sensing signal SS is applied to the CDS. As a result, the noise included in the first output signal VOUT1 can be reduced.

[0179] According to an embodiment, the associated dual sampling circuit CDS includes a first sampling switch SW_R, a second sampling switch SW_S, a first sampling capacitor C_R, a second sampling capacitor C_S, and a differential amplifier AMP_DFF.

[0180] In this embodiment, the first sampling switch SW_R responds to the first sampling signal SHR (see...). Figure 8A The sensor is turned on, and in this embodiment, when the reset voltage VRST is applied to the sensor pixel SPXL, the first sampling capacitor C_R can be temporarily stored in the first sampling capacitor VOUT1_1. In this embodiment, the first sampling signal SHR is applied to the gate electrode of the first sampling switch SW_R. Furthermore, the second sampling switch SW_S responds to the second sampling signal SHS (see...). Figure 8A The first sampling signal SS is turned on, and in this embodiment, when the actual sensing signal SS is applied, the first 1_2 output signal VOUT1_2 can be temporarily stored in the second sampling capacitor C_S. In this embodiment, the second sampling signal SS is applied to the gate electrode of the second sampling switch SW_S. The differential amplifier AMP_DFF can differentially divide the first 1_1 output signal VOUT1_1 stored in the first sampling capacitor C_R and the first 1_2 output signal VOUT1_2 stored in the second sampling capacitor C_S to supply the first 1_3 output signal VOUT1_3 to the analog-to-digital converter ADC.

[0181] However, the Correlated Double Sampling Circuit (CDS) is not limited to the above configuration, and various circuits can be applied to the Correlated Double Sampling Circuit (CDS).

[0182] An analog-to-digital converter (ADC) can convert the analog output signal VOUT1_3 provided by the correlated dual sampling circuit CDS into a digital sensed data signal VOUTD for output.

[0183] However, embodiments of the vertical driver 224 are not limited to this. Figure 6B As shown, the vertical driver 224' according to an embodiment of the present invention omits the integrator circuit and includes a fifth transistor T5. In other words, the vertical driver 224' can be applied using a voltage sensing method instead of a current integration sensing method. According to an embodiment, the fifth transistor T5 includes a first electrode connected to a region of the output lines V1 and V2, a second electrode connected to ground, and a gate electrode connected to a bias voltage power supply line PL2 to which a bias voltage VBIAS is applied. In this embodiment, the first electrode can be connected to the output lines V1 and V2 corresponding to the front end of the associated dual sampling circuit CDS.

[0184] exist Figure 7 In the sensor pixel SPXL, the voltage of the photodiode PD generated by photoelectric conversion can be applied to the gate electrode of the second transistor T2 (or the fourth node N4), and the resistance component of the second transistor T2 caused by this voltage can be determined. When the current flowing through each of the output lines V1 and V2 is constant, the voltage of the photodiode PD is proportional to the output voltage (or the first output signal VOUT1) according to Ohm's law (V = IR). That is, when a constant bias voltage VBIAS is applied to the gate electrode of the fifth transistor T5, a constant current flows from each of the output lines V1 and V2 to ground, so the fifth transistor T5 can be used as a current source.

[0185] The output voltages (i.e., output signals VOUT1_1 and VOUT1_2) before and after the application of the horizontal drive signal HDS are calculated using the relevant dual sampling circuit CDS. The output signal VOUT1_3, which is the difference between the two output signals, can then be calculated and supplied to the analog-to-digital converter (ADC). (See also...) Figure 6A The relevant dual sampling circuit CDS and analog-to-digital converter ADC are described, and redundant descriptions will be omitted below.

[0186] Figure 8A and Figure 8B The illustration shows an example of an embodiment of the invention. Figure 6A The waveform diagram of the operation of the sensor array.

[0187] Reference Figures 6A to 8B An initialization signal INT is provided to the initialization switch SW_INT (e.g., the gate electrode of SW_INT), a first sampling signal SHR is provided to the first sampling switch SW_R (e.g., the gate electrode of SW_R), and a second sampling signal SHS is provided to the second sampling switch SW_S (e.g., the gate electrode of SW_S). A first sensing signal control signal CSS1 is provided to the first sensing signal control line CSSL1, a second sensing signal control signal CSS2 is provided to the second sensing signal control line CSSL2, a third sensing signal control signal CSS3 is provided to the third sensing signal control line CSSL3, and a fourth sensing signal control signal CSS4 is provided to the fourth sensing signal control line CSSL4. Furthermore, a reset signal RST is provided to the reset control line RSTL, and first level drive signals HDS1 to the nth level drive signal HDSn are provided to first drive lines H1 to the nth drive lines Hn.

[0188] In an embodiment, a frame period includes a reset period RP and a sensing period SP.

[0189] According to an embodiment of the invention, a reset period RP is included during a frame period. In other words, the reset signal RST is not applied per sensor pixel row, but can be applied publicly to all sensor pixels SPXL provided in the sensor array PS. Accordingly, when the reset signal RST is applied to the sensor pixels SPXL, the probability of noise that may be introduced can be reduced.

[0190] In comparison, the stage circuit used to apply the reset signal RST (such as...) Figure 4 and Figure 5 The stage circuit described herein can be used to apply a reset signal RST to each sensor pixel row. In this embodiment, due to the integrated circuit (IC) connected to the stage circuit (e.g., input detector 220 (see [link]), Figure 1A and Figure 1B The increased number of pins limits the implementation of large-area input sensing devices (ISDs or in-display fingerprint sensors). Furthermore, when a stage circuit for applying the reset signal RST is included, the probability of noise being introduced when the reset signal RST is applied to sensor pixels SPXL may increase because the reset signal RST is applied sequentially to each sensor pixel row.

[0191] According to an exemplary embodiment, the sensing period SP includes a first period P1 to a fourth period P4. During the sensing period SP, the first period P1 to the fourth period P4 can be repeated sequentially. For example, the first period P1 to the fourth period P4 can be repeated with a period of one horizontal period 1H. For example, the sum of the first period P1 to the fourth period P4 can correspond to one horizontal period.

[0192] During the reset period RP, when the reset signal RST is supplied at the first time point t1, the first transistor T1 of all sensor pixel rows can be turned on simultaneously. Therefore, the reset voltage VRST can be commonly supplied to the fourth node N4 of the sensor pixel SPXL. That is, when the first transistor T1 is turned on by the reset signal RST, the photodiode PD can be initialized by the reset voltage VRST. In this embodiment, the photodiode PD can perform photoelectric conversion after the reset voltage VRST is applied to the fourth node N4.

[0193] However, the number of reset signals RST applied during the reset period RP is not limited to this, and the reset signals RST can be applied multiple times to all rows of sensor pixels SPXL within a single reset period RP. For example, as Figure 8B As shown, during a reset period RP, a reset signal RST with a logic low level (or gate on voltage level) can be applied at least three times. For example, the reset signal RST can include multiple transitions before the transition of the level drive signal HDS.

[0194] Therefore, input sensing devices (ISDs) can have improved sensing sensitivity without being affected by transistor hysteresis characteristics.

[0195] During the first time period P1, the first sensing signal control signal CSS1 is maintained at a logic low level (or gate on voltage level). When the logic low-level first sensing signal control signal CSS1 is provided to the first sensing signal control line CSSL1, the 4_1 transistor T4_1 remains in the on state, and the j-1 signal output line Oj-1 and the first output line V1 become electrically connected to each other.

[0196] Meanwhile, according to an exemplary embodiment of the present invention, the time point at which the first sensing signal control signal CSS1 is turned on occurs at a second time point t2, and the second time point t2 is before the third time point t3. Furthermore, the time point at which the first sensing signal control signal CSS1 is turned off is later than the fifth time point t5. Accordingly, noise that can be introduced into the correlated double sampling circuit CDS when the first multiplexer MUX1 is turned on and off can be reduced. However, the second time point t2 can be later than the time point at which the first sensing signal control signal CSS1 is turned on.

[0197] When the initialization signal INT is supplied at the second time point t2, the initialization switch SW_INT of the integrator circuit (or vertical driver 224) is turned on. Then, the capacitor CF can be initialized. In this embodiment, the second time point t2 is the same as the start time of the first time period P1. However, the invention is not limited thereto, and the second time point t2 can be later than the start time of the first time period P1.

[0198] When the first sampling signal SHR is supplied at the third time point t3, the first sampling switch SW_R is turned on. Then, the signal including noise from the signal input lines Oj-1 to Oj+6 (or the first output signal VOUT1_1) can be temporarily stored in the first sampling capacitor C_R.

[0199] Simultaneously, according to an embodiment of the present invention, the vertical driver 224 applies the first sampling signal SHR n times to correspond to n sensing signal control signals CSS. For example, the first sampling signal SHR can be applied four times to correspond to each of the first sensing signal control signals CSS1 to the fourth sensing signal control signal CSS4. For example, the first sampling signal SHR can transition to a logic high state four times and be applied to the gate electrode of the first sampling switch SW_R.

[0200] In other words, since the first sampling switch SW_R is turned on four times corresponding to the turn-on period of each of the 4_1 transistor T4_1, 4_2 transistor T4_2, 4_3 transistor T4_3 and 4_4 transistor T4_4 included in the first multiplexer MUX1, the noise component of each of the signal input lines Oj-1 to Oj+6 can be calculated more accurately.

[0201] Conversely, when the first sampling switch SW-R is turned on only during the period when transistor 4_1 T4_1 is turned on, and when the first sampling switch SW_R remains off during the periods when transistors 4_2 T4_2, 4_3 T4_3, and 4_4 T4_4 are turned on, as a result, since the noise of signal input line j-1 Oj-1 is equally applied to signal input lines j, j+1, and j+2 Oj+2, it may not accurately reflect the actual noise of each of the signal input lines Oj-1 to Oj+6. Accordingly, the accuracy of the first output signal VOUT1_3 obtained by differentially dividing the first output signal VOUT1_1 stored in the first sampling capacitor C_R and the first output signal VOUT1_2 stored in the second sampling capacitor C_S by the differential amplifier AMP_DFF and then outputting it to the analog-to-digital converter ADC can be reduced.

[0202] At the fourth time point t4, when the first level drive signal HDS1 is supplied, the third transistor T3 is turned on. The third transistor T3 can then transfer the charge (or the measured sensing signal SS) of the fifth node N5 to the j-th signal input line Oj. In this embodiment, the charge of the fifth node N5 can be changed based on the light incident on the photodiode PD. Specifically, when the photodiode PD performs its photoelectric conversion function, the potential of the fourth node N4 is changed proportionally to the amount of charge (or current) generated based on the incident light, causing a change in the gate electrode bias of the second transistor T2. This ultimately causes a change in the potential of the fifth node N5 (or the second electrode of the second transistor T2).

[0203] On the other hand, according to an embodiment of the present invention, the horizontal driver 221 applies a horizontal drive signal HDS n times to each drive line Hi-1, Hi, or Hi+1 to correspond to n sensing signal control signals CSS. For example, the first horizontal drive signal HDS1 can be applied four times to the i-th drive line Hi to correspond to each of the first sensing signal control signals CSS1 to the fourth sensing signal control signals CSS4.

[0204] In other words, since the third transistor T3 of the sensor pixel SPXL is turned on four times corresponding to each of the four transistors T4_1, T4_2, T4_3, and T4_4 included in the first multiplexer MUX1, the probability of noise in the charge (or the measured sensing signal SS) of the fifth node N5 can be reduced.

[0205] Conversely, when the third transistor T3 of the sensor pixel SPXL is turned on only during the period when the fourth transistor T4_1 is turned on, and when the third transistor T3 remains off during the periods when the fourth transistor T4_2, the fourth transistor T4_3, and the fourth transistor T4_4 are turned on, the sensitivity of the charge (sensing signal SS) of the fifth node N5 measured when the fourth transistor T4_1 is turned on is sequentially reduced because the charge (or the measured sensing signal SS) of the fifth node N5 output when each of the fourth transistor T4_1, the fourth transistor T4_2, the fourth transistor T4_3, and the fourth transistor T4_4 is turned on is output as is when the fourth transistor T4_2, the fourth transistor T4_3, and the fourth transistor T4_4 is turned on.

[0206] When the second sampling signal SHS is supplied at the fifth time point t5, the second sampling switch SW_S is turned on. Then, when the charge (or the measured sensing signal SS) of the fifth node N5 is applied, the first_2 output signal VOUT1_2 can be temporarily stored in the second sampling capacitor C_S. In this embodiment, the differential amplifier AMP_DFF can differentially divide the first_1 output signal VOUT1_1 stored in the first sampling capacitor C_R and the first_2 output signal VOUT1_2 stored in the second sampling capacitor C_S to supply the first_3 output signal VOUT1_3 to the analog-to-digital converter ADC.

[0207] In an exemplary embodiment of the present invention, all of the horizontal driver 221, multiplexer 222, vertical driver 224, and sensor pixel SPXL are shown as having a PMOS structure and described as operating at logic low; however, the invention is not limited thereto. For example, the driver may have an NMOS structure or a hybrid structure in which both PMOS and NMOS structures are applied. Accordingly, the turn-on time of the horizontal driver 221, multiplexer 222, vertical driver 224, and sensor pixel SPXL may be logic high.

[0208] Similar to the first time period P1, in each of the second time period P2, the third time period P3, and the fourth time period P4, each of the second sensing signal control signals CSS2 to the fourth sensing signal control signal CSS4 is maintained at a logic low level (or gate on-voltage level). In each of the second time period P2, the third time period P3, and the fourth time period P4, when the initialization signal INT is supplied at the second time point t2, the initialization switch SW_INT of the integrator circuit (or vertical driver 224) is turned on. When the first sampling signal SHR is supplied at the third time point t3, the first sampling switch SW_R is turned on. When the first horizontal drive signal HDS1 is supplied at the fourth time point t4, the third transistor T3 is turned on. When the second sampling signal SHS is supplied at the fifth time point t5, the second sampling switch SW_S is turned on.

[0209] Figure 9 An exemplary embodiment of the invention is shown in Figure 1A or Figure 1B A block diagram of an input sensing device included in a display device. The input sensing device ISD' includes a sensor array PS and an input detector 220'. Figure 10 An exemplary embodiment of the present invention is shown. Figure 9 Circuit diagram of the input sensing device.

[0210] Reference Figure 1A , Figure 1B , Figure 3 , Figure 6A , Figure 9 and Figure 10 , Figure 9 The embodiments shown are similar to Figure 3 The difference in the illustrated embodiment is that multiplexer 222 and multiplexer controller 223 are not included, and vertical driver 224' does not include the associated double sampling circuit CDS. However, for better understanding and ease of description, in Figure 9 In the embodiments, only the following is omitted Figure 3 Some of the components, but the method for compensating the sensing data signal VOUTD of the input sensing device IDS' described below can also be applied. Figure 3 Examples of implementations.

[0211] Reference Figure 1A , Figure 1B and Figure 9 The sensor array PS may include a plurality of sensor pixels SPXL. In an embodiment, the sensor pixels SPXL are arranged in a two-dimensional array, but the invention is not limited thereto. The sensor pixels SPXL may include photoelectric elements that photoelectrically convert incident light into electrical charge according to the amount of incident light.

[0212] In an exemplary embodiment, the input detector 220' includes a horizontal driver 221, a vertical driver 224', a reset unit 225, and a controller 226.

[0213] Horizontal driver 221 can be connected to sensor pixel SPXL via drive lines H1 to Hn (where n is an integer greater than or equal to 2). Horizontal driver 221 may include a shift register or address decoder and may sequentially apply horizontal drive signals HDS to drive lines H1 to Hn. Here, horizontal drive signals HDS may be signals used to selectively drive sensor pixel SPXL. For example, horizontal driver 221 may apply horizontal drive signals HDS on a per-sensor pixel-row basis. In an exemplary embodiment, horizontal driver 221 applies horizontal drive signals HDS to a first drive line H1 during a first horizontal scan period, to a second drive line H2 during a second horizontal scan period, ..., and to the nth drive line Hn during the nth horizontal scan period.

[0214] The sensor pixel SPXL, selected and driven by the horizontal driver 221, senses light using internal photoelectric elements and outputs an electrical signal (i.e., a sensing signal SS) corresponding to the sensed light (e.g., a voltage signal). The electrical signal can be an analog signal.

[0215] The sensor array PS can provide the sensing signal SS to the vertical driver 224' via signal input lines O1 to Ok.

[0216] The vertical driver 224' can be connected to signal input lines O1 to Ok, and can also be connected to sensor pixel SPXL via signal input lines O1 to Ok. The vertical driver 224' can process the signal output from sensor pixel SPXL.

[0217] For example, the vertical driver 224' can convert analog electrical signals into digital signals. In an embodiment, an analog-to-digital converter can be provided for each of the signal input lines O1 to Ok, and the analog-to-digital converters can process the electrical signals (or analog signals) provided from the signal input lines O1 to Ok in parallel.

[0218] The reset unit 225 can be connected to a reset control line RSTL, and can also be connected to all the sensor pixels SPXL of the sensor array PS via the reset control line RSTL. The reset unit 225 can simultaneously apply a reset signal RST to all the sensor pixels SPXL. Here, the reset signal RST can be a signal used to apply a reset voltage VRST to the sensor pixels SPXL.

[0219] The controller 226 can control the horizontal driver 221, the vertical driver 224' and the reset unit 225.

[0220] The controller 226 can provide clock signals and control signals (e.g., a start pulse) to the level driver 221. In this embodiment, the level driver 221 can generate a level drive signal HDS for selecting and driving the sensor pixel SPXL based on the signals provided from the controller 226.

[0221] The controller 226 can provide clock signals and control signals to the vertical driver 224'. In this embodiment, the vertical driver 224' can periodically sample the sensing signal SS provided from the sensor pixel SPXL based on the clock signal and control signals, and convert the sampled signal into a digital signal.

[0222] In an exemplary embodiment, the controller 226 generates image data corresponding to the sensing signal SS received by the vertical driver 224', and processes the generated image data. Furthermore, the controller 226 can detect input (e.g., fingerprint or palm print) from the processed image data, and can authenticate the detected input or transmit it externally.

[0223] However, this is just an example, and image data generation and input detection do not need to be performed by controller 226, but can be performed by an external host processor.

[0224] The controller 226 can provide the reset unit control signal RCS to the reset unit 225. The reset unit 225 can receive the reset unit control signal RCS and generate a reset signal RST based on the received reset unit control signal RCS.

[0225] on the other hand, Figure 9 An embodiment in which the horizontal driver 211, vertical driver 224', reset unit 225, and controller 226 are configured independently is shown, but the invention is not limited thereto. For example, the vertical driver 224', reset unit 225, and controller 226 can be implemented as a single integrated circuit, and the horizontal driver 221 can be formed in the sensor array PS using the same process as that used for the sensor pixel SPXL.

[0226] Figure 10 It shows Figure 9 A circuit diagram of an example input sensing device. Figure 10 An input sensing device ISD' is schematically shown, based on sensor pixels SPXL included in the (i-1)th sensor pixel row to the (i+1)th sensor pixel row (where i is a positive integer greater than 1 and less than n) and the (j-1)th sensor pixel column to the (j+1)th sensor pixel column (where j is a positive integer greater than 1 and less than k), and an input sensing device ISD' connected to the reset unit 225 and the vertical driver 224' of the sensor pixels SPXL.

[0227] Reference Figure 7 , Figure 9 and Figure 10 The input sensing device ISD' (or sensor array PS) may include drive lines Hi-1, Hi and Hi+1, signal input lines Oj-1, Oj and Oj+1, reset control line RSTL, reset voltage power supply line PL1, bias voltage power supply line PL2, common voltage power supply line PL3, and sensor pixels SPXL connected to each of them.

[0228] The drive lines Hi-1, Hi and Hi+1 can extend in the second direction DR2 and can be arranged along the first direction DR1 that intersects the second direction DR2.

[0229] Signal input lines Oj-1, Oj, and Oj+1 can extend along the first direction DR1 and can be arranged along the second direction DR2.

[0230] The reset voltage VRST can be applied to the reset voltage power line PL1.

[0231] The bias voltage VBIAS can be applied to the bias voltage power supply line PL2.

[0232] The common voltage VCOM can be applied to the common voltage power line PL3.

[0233] The sensor pixel SPXL can be electrically connected to drive lines Hi-1, Hi, Hi+1, signal input lines Oj-1, Oj and Oj+1, reset voltage power supply line PL1, bias voltage power supply line PL2 and common voltage power supply line PL3.

[0234] In an exemplary embodiment, the sensor pixel SPXL includes a photodiode PD, a capacitor CPD, a first transistor T1, a second transistor T2, and a third transistor T3. Because the driving of the sensor pixel SPXL is similar to that described above... Figure 7 The sensor pixels SPXL described are driven by the same driver, so their repeated description will be omitted here.

[0235] In an exemplary embodiment, the vertical driver 224' includes an integrator circuit and an analog-to-digital converter (ADC).

[0236] Each of the integrator circuits can be positioned between the signal input lines Oj-1, Oj, and Oj+1 and the analog-to-digital converter (ADC). In an embodiment, the integrator circuit includes an amplifier AMP, a capacitor CF, and an initialization switch SW_INT. The driving mechanism of the integrator circuit is similar to that described above. Figure 6A The integrator circuits described are driven by the same circuit, so their redundant descriptions will be omitted here.

[0237] The corresponding one in the integrator circuit can supply the (j-1)th output signal VOUTj-1, the jth output signal VOUTj, or the (j+1)th output signal VOUTj+1 to the analog-to-digital converter (ADC).

[0238] An analog-to-digital converter (ADC) can convert each of the analog (j-1)th output signal VOUTj-1, the jth output signal VOUTj, and the (j+1)th output signal VOUTj+1 provided from an integrator into digital sense data signals VOUTDj-1, VOUTDj, and VOUTDj+1 for output.

[0239] Figure 11 Exemplary embodiments according to this disclosure are shown. Figure 10 The waveform diagram of the operation of the sensor array. Figure 12 A graph showing the relationship between the time a photodiode is exposed to light and the amount of charge that accumulates in the capacitor is illustrated.

[0240] Reference Figures 9 to 11The reset signal RST is provided to the reset control line RSTL, and the first level drive signal HDS1 to the (n-3)th level drive signal HDSn-3 can be provided to the fourth drive line H4 to the nth drive line Hn. In this embodiment, the first drive line H1 to the third drive line H3 are dummy drive lines, and the level drive signal HDS is not applied to the dummy drive lines.

[0241] In an embodiment, a frame period includes a reset period RP and a sensing period SP.

[0242] According to an exemplary embodiment of the present invention, a reset period RP is included during a frame period. In other words, the reset signal RST is not applied per sensor pixel row, but can be applied publicly to all sensor pixels SPXL provided in the sensor array PS. Accordingly, when the reset signal RST is applied to the sensor pixels SPXL, the probability of noise that may be introduced can be reduced.

[0243] In comparison, a stage circuit (such as) for applying the reset signal RST can be used. Figure 4 and Figure 5 The stage circuit described in [the document] applies a reset signal RST to each sensor pixel row. In this embodiment, because when there are a large number of stage circuits, the IC (e.g., input detector 220 (see [the document]) will apply a reset signal RST to each sensor pixel row. Figure 1A and Figure 1B The large number of pins connected to the sensor limits the implementation of input sensing devices (ISDs or in-screen fingerprint sensors (FODs)) with large areas. Furthermore, when a stage circuit for applying the reset signal RST is included, the probability of noise being introduced when the reset signal RST is applied to sensor pixels SPXL may increase because the reset signal RST is applied sequentially to each sensor pixel row.

[0244] According to an exemplary embodiment of the present disclosure, the first horizontal drive signal HDS1 to the (n-3)th horizontal drive signal HDSn-3 are sequentially applied to the sensor pixel SPXL via the fourth drive line H4 to the nth drive line Hn during the sensing period SP.

[0245] During the reset period RP, when the reset signal RST is supplied at time point t0, the first transistor T1 of all sensor pixel rows can be turned on simultaneously. Then, the reset voltage VRST can be supplied commonly to the fourth node N4 of the sensor pixel SPXL. That is, when the first transistor T1 is turned on by the reset signal RST, the photodiode PD is initialized by the reset voltage VRST. In this embodiment, the photodiode PD can perform photoelectric conversion after the reset voltage VRST is applied to the fourth node N4.

[0246] Subsequently, when the first horizontal drive signal HDS1 is supplied at the first time point t1, the third transistor T3 of the fourth sensor pixel row is turned on. Then, the third transistor T3 can transfer the charge of the fifth node N5 (or the measured sensing signal SS) to the signal input lines Oj-1, Oj, and Oj+1.

[0247] Similar to the first time point t1, from the second time point t2 to the (n-3)th time point tn-3, when the second level drive signal HDS2 to the (n-3)th level drive signal HDSn-3 are supplied sequentially, the third transistor T3 of the corresponding sensor pixel row can be turned on sequentially on a sensor pixel row basis.

[0248] In this embodiment, the charge of the fifth node N5 of the sensor pixel SPXL can be changed based on the light incident on the photodiode PD. Specifically, when the photodiode PD performs its photoelectric conversion function, the potential of the fourth node N4 is changed proportionally to the amount of charge (or current) generated based on the incident light, thereby changing the gate electrode bias voltage of the second transistor T2. This ultimately causes a change in the potential of the fifth node N5 (or the second electrode of the second transistor T2).

[0249] Figure 12 The diagram illustrates that after the reset signal RST is applied to the first transistor T1, the amounts of charge C1, C2, C3, C4, ..., Cn-4, Cn-3 stored in the capacitor CPD increase at a constant rate as time t elapses. That is, when the horizontal drive signal HDS is applied later, the amount of charge stored in the capacitor CPD can increase because the exposure time of the photodiode PD increases. For example, the amount of charge Cn-3 stored in the capacitor CPD of the sensor pixel SPXL located in the nth sensor pixel row can be greater than the amount of charge C1 stored in the capacitor CPD of the sensor pixel SPXL located in the fourth sensor pixel row.

[0250] When a reset signal RST is applied to each sensor pixel row, since the time period from the application of the reset signal RST to the application of the horizontal drive signal HDS for each sensor pixel row is the same, and therefore the exposure time of the photodiode PD is the same for each sensor pixel row, a sensing signal SS that is actually being measured can be obtained (see [reference]). Figure 1A and Figure 1B The corresponding sensing data signals VOUTDj-1, VOUTDj, and VOUTDj+1 are obtained. However, as in the embodiments of the present invention, when the exposure time of the photodiode PD is different for each sensor pixel row, as a result, sensing data signals VOUTDj-1, VOUTDj, and VOUTDj+1 corresponding to the actual sensing signal SS to be measured are not obtained.

[0251] In this embodiment, the exposure time t_EX1 of the photodiode PD in the fourth sensor pixel row is the time period between time point 0 t0 and time point t1; the exposure time t_EX2 of the photodiode PD in the fifth sensor pixel row is the time period between time point 0 t0 and time point t2; the exposure time t_EX3 of the photodiode PD in the sixth sensor pixel row is the time period between time point 0 t0 and time point t3; the exposure time t_EX4 of the photodiode PD in the seventh sensor pixel row is the time period between time point 0 t0 and time point t4; the exposure time t_EXn-4 of the photodiode PD in the (n-1)th sensor pixel row is the time period between time point 0 t0 and time point tn-4; and the exposure time t_EXn-3 of the photodiode PD in the nth sensor pixel row is the time period between time point 0 t0 and time point tn-3 (where t_EX1 <t_EX2<t_EX3<t_EX4<t_EXn-4<t_EXn-3)。

[0252] Therefore, correction is applied to the input sensing device ISD' according to an exemplary embodiment of the present invention to obtain sensing data signals VOUTDj-1, VOUTDj, and VOUTDj+1 that can be obtained when the exposure time of the photodiode PD is the same for each sensor pixel row. According to an exemplary embodiment, the sensing data signals VOUTDj-1, VOUTDj, and VOUTDj+1 are proportionally corrected to be inversely proportional to the order in which they are generated.

[0253] For example, the amount of charge C1 stored in the capacitor CPD of the sensor pixel SPXL located in the fourth sensor pixel row is divided by the exposure time t_EX1 of the photodiode PD of the sensor pixel SPXL located in the fourth sensor pixel row exposed to light, and the amount of charge Cn-3 stored in the capacitor CPD of the sensor pixel SPXL located in the nth sensor pixel row is divided by the exposure time t_EXn-3 of the photodiode PD of the sensor pixel SPXL located in the nth sensor pixel row exposed to light, and thus proportional correction can be performed. For example, a first sensing data signal sensed earlier than a second sensing data signal within a frame period can be divided by a first value proportional to the exposure time of the first photodiode of the first sensor pixel to generate a corrected first sensing data signal, and a second sensing data signal can be divided by a second value greater than the first value proportional to the exposure time of the second photodiode of the second sensor pixel to generate a corrected second sensing data signal.

[0254] In this embodiment, such as Figure 12As described above, since the relationship between the exposure time of the photodiode PD and the capacitor CPD can be measured experimentally, a lookup table can be pre-generated based on the measured data to correct the sensing data signal VOUTD.

[0255] However, the correction method is not limited to this, and after outputting the sensing data signals VOUTDj-1, VOUTDj and VOUTDj+1 without correction, the output sensing data signals VOUTDj-1, VOUTDj and VOUTDj+1 can be directly divided by the time the photodiode PD is exposed to light for each row, and therefore, proportional correction can also be performed.

[0256] According to an exemplary embodiment of the present invention, when the reset signal RST is simultaneously applied to all of the sensor pixels SPXL and the sensing data signal VOUTD is later corrected, a large-area input sensing device ISD (or screen fingerprint (FOD)) can be implemented because it is not necessary to provide stage circuitry for each sensor pixel row to apply the reset signal RST. Furthermore, since the number of times the reset signal RST is applied is reduced, the probability of noise that may be introduced when the signal is applied to the sensor pixels SPXL can be decreased.

[0257] Figure 13 An exemplary embodiment of the present invention is shown. Figure 10 The waveform diagram of the operation of the sensor array.

[0258] Reference Figure 13 ,and Figure 11 The difference in the embodiment shown is that the reset signal RST' is provided to the reset control line RSTL multiple times during the reset period RP'. For example, the reset signal RST' may transition multiple times during the reset period RP'.

[0259] According to an exemplary embodiment of the present invention, a frame time period includes a reset time period RP' and a sensing time period SP.

[0260] According to an embodiment of the invention, a frame time period includes a reset time period RP', and a reset signal RST' is applied multiple times commonly to all rows of sensor pixels SPXL during a reset time period RP'. For example, as Figure 13 As shown, during a reset period RP', a reset signal RST' with a logic low level (or gate on voltage level) can be applied at least three times.

[0261] Therefore, the input sensing device ISD' can have improved sensing sensitivity without being affected by transistor hysteresis characteristics.

[0262] Figure 14A flowchart of a sensing method of an input sensing device according to an exemplary embodiment of the present invention is shown.

[0263] Reference Figures 3 to 14 Input sensing devices ISD and ISD' (see Figure 3 and Figure 9 The sensing method includes applying a reset signal RST to all of the sensor pixels SPXL simultaneously via the reset unit 225 (S10).

[0264] The reset unit 225 can apply the reset signal RST to all of the sensor pixels SPXL at once via the reset control line RSTL. Accordingly, when the reset signal RST is applied to the sensor pixels SPXL, the probability of noise that may be introduced can be reduced.

[0265] Subsequently, the sensing method of the input sensing devices ISD and ISD' further includes generating a sensing signal SS by the sensor pixel SPXL in response to the reset signal RST (S20).

[0266] A photodiode (PD) can perform photoelectric conversion after a reset voltage VRST is applied. Capacitors C_PD and CPD can temporarily store the charge (or current) generated by the photodiode (PD). When the photodiode (PD) performs its photoelectric conversion function, the potential of the fourth node N4 connected to the cathode electrode of the photodiode (PD) can be changed proportionally to the amount of charge (or current) generated based on the incident light.

[0267] Then, the sensing method of the input sensing devices ISD and ISD' further includes sequentially applying the horizontal driving signal HDS to the sensor pixel SPXL by the horizontal driver 221 (S30).

[0268] According to an embodiment of the present invention, when the input sensing device ISD includes a multiplexer 222, since the third transistor T3 of the sensor pixel SPXL is turned on four times corresponding to each of the four transistors T4_1, T4_2, T4_3 and T4_4 included in the multiplexer 222, the probability of noise in the measured sensing signal SS can be reduced.

[0269] Subsequently, the sensing method of the input sensing devices ISD and ISD' further includes receiving sensing signals SS sequentially output in response to the horizontal drive signal HDS (S40).

[0270] When the horizontal drive signal HDS is supplied, the third transistor T3 can be turned on for each sensor pixel row. The third transistor T3 can then transmit the measured sensing signal SS to the signal input lines O1 to Ok. The vertical driver 224 can receive the sensing signal SS through the output lines V1 to Vm.

[0271] Subsequently, the sensing method of the input sensing devices ISD and ISD' further includes generating a sensing data signal VOUTD (S50) corresponding to the received sensing signal SS.

[0272] The amplifier AMP of the integrator circuit can output the integrated sensing signal SS (i.e., the first output signal VOUT1) through the corresponding output terminal.

[0273] When the vertical driver 224 includes a correlated dual sampling circuit (CDS), the CDS can output a first third output signal VOUT1_3 obtained by differentially dividing the first_1 output signal VOUT1_1 when the reset voltage VRST (or reference voltage) is applied to the sensor pixel SPXL and the first_2 output signal VOUT1_2 when the actual sensing signal SS is applied to the CDS. Therefore, noise in the first output signal VOUT1 can be reduced.

[0274] An analog-to-digital converter (ADC) can convert the analog output signal VOUT1_3 provided by the correlated dual sampling circuit CDS into a digital sensed data signal VOUTD for output.

[0275] Subsequently, the sensing method of the input sensing devices ISD and ISD' further includes a correction ratio that is inversely proportional to the order in which the sensing data signals are generated (S60).

[0276] In the input sensing device ISD' according to an exemplary embodiment of the present invention, correction is performed to obtain sensing data signals VOUTDj-1, VOUTDj, and VOUTDj+1 that are obtainable when the exposure time of the photodiode PD is the same for each sensor pixel row. According to an exemplary embodiment, the sensing data signals VOUTDj-1, VOUTDj, and VOUTDj+1 are proportionally corrected to be inversely proportional to the order in which they are generated.

[0277] According to an exemplary embodiment of the present invention, when the reset signal RST is simultaneously applied to all of the sensor pixels SPXL and the sensing data signal VOUTD is later corrected, a large-area input sensing device ISD (or screen fingerprint (FOD)) can be implemented because it is not necessary to provide stage circuitry for each sensor pixel row to apply the reset signal RST. Furthermore, since the number of times the reset signal RST is applied is reduced, the probability of noise that may be introduced when the signal is applied to the sensor pixels SPXL can be decreased.

[0278] Although the invention has been described in conjunction with exemplary embodiments, it should be understood that the invention is not limited to the disclosed embodiments, but rather is intended to cover various modifications and equivalent arrangements included within the spirit and scope of this disclosure.

Claims

1. An input sensing device, comprising: Multiple sensor pixels, wherein each sensor pixel is connected to a corresponding drive line among multiple drive lines and a corresponding signal input line among multiple signal input lines; A horizontal driver is configured to sequentially apply horizontal drive signals to the plurality of sensor pixels via the plurality of drive lines; A selection circuit is connected to n signal input lines out of the plurality of signal input lines and to one output line. The selection circuit is configured to sequentially output n sensing signals received through the n signal input lines to the one output line, where n is a natural number of 2 or greater. as well as A vertical driver is configured to receive the n sensing signals via the one output line. The horizontal driver applies the horizontal drive signal n times to a given drive line among the plurality of drive lines to correspond to the n sensing signals. The vertical driver includes an amplifier, an analog-to-digital converter, and a related double-sampling circuit disposed between the output terminal of the amplifier and the analog-to-digital converter. The related dual-sampling circuit includes: A first sampling switch is disposed between the output terminal and the analog-to-digital converter; A second sampling switch is disposed between the output terminal and the analog-to-digital converter, and The selection circuit includes n transistors connected between the n signal input lines and the one output line, wherein each of the n transistors is turned on before the first sampling switch is turned on and turned off after the second sampling switch is turned off.

2. The input sensing device according to claim 1, wherein The vertical driver includes an integration circuit for integrating a corresponding one of the n sensing signals to generate a first output signal, and The integrating circuit includes: The amplifier includes a first input terminal connected to the output line, a second input terminal connected to a reference voltage line, and the output terminal; A capacitor includes a first electrode connected to the first input terminal and a second electrode connected to the output terminal; as well as An initialization switch is set between the first input terminal and the output terminal.

3. The input sensing device according to claim 2, wherein The analog-to-digital converter converts the first output signal, which is analog in type, into a digital sensing data signal.

4. The input sensing device according to claim 3, wherein The related dual-sampling circuit further includes: The first sampling capacitor includes a terminal connected between the first sampling switch and the analog-to-digital converter; The second sampling capacitor includes a terminal connected between the second sampling switch and the analog-to-digital converter; as well as The differential amplifier includes a first input terminal connected to one terminal of the first sampling capacitor, a second input terminal connected to one terminal of the second sampling capacitor, and an output terminal.

5. The input sensing device according to claim 4, wherein The associated dual-sampling circuit turns on the first sampling switch before the horizontal drive signal is applied to store the first_1 output signal in the first sampling capacitor, and turns on the second sampling switch after the horizontal drive signal is applied to store the first_2 output signal in the second sampling capacitor; and The differential amplifier outputs the first output signal by differentially dividing the first output signal and the first output signal.

6. The input sensing device according to claim 4, wherein, The initialization switch is turned on before the first sampling switch is turned on.

7. The input sensing device according to claim 1, wherein, The horizontal drive signal is applied to each drive line n times.

8. The input sensing device according to claim 4, wherein, Each of the n transistors is turned on before the initialization switch is turned on.

9. The input sensing device according to any one of claims 1 to 6, wherein, At least one of the plurality of sensor pixels is further connected to a reset voltage power supply line, a bias voltage power supply line, and a common voltage power supply line.

10. The input sensing device according to claim 9, further comprising: A reset circuit is connected to the plurality of sensor pixels and the reset control line and applies a reset voltage to the plurality of sensor pixels simultaneously.

11. The input sensing device according to claim 10, wherein, At least one of the plurality of sensor pixels includes: The first transistor includes a first electrode connected to the reset voltage power supply line, a second electrode connected to the first node, and a gate electrode connected to the reset control line; A photodiode includes an anode electrode connected to the bias voltage power supply line and a cathode electrode connected to the first node; The second transistor includes a first electrode connected to the common voltage power line, a second electrode connected to the second node, and a gate electrode connected to the first node; and The third transistor includes a first electrode connected to the second node, a second electrode connected to a corresponding signal input line among the plurality of signal input lines, and a gate electrode connected to a corresponding drive line among the plurality of drive lines.

12. The input sensing device according to claim 11, wherein, The sensor pixel further includes a first electrode connected to the bias voltage power supply line and a second electrode connected to the first node.

13. An input sensing device, comprising: Multiple sensor pixels are connected to a reset control line, wherein each of the multiple sensor pixels is connected to one of the multiple drive lines. The reset circuit is configured to apply a reset signal via the reset control line connected to each of the plurality of sensor pixels; as well as A horizontal driver is configured to sequentially apply horizontal drive signals to the plurality of sensor pixels via the plurality of drive lines. The reset circuit applies the reset signal to the multiple sensor pixels simultaneously.

14. The input sensing device according to claim 13, wherein, Before applying the horizontal drive signal to the plurality of sensor pixels, the reset circuit applies the reset signal to the plurality of sensor pixels multiple times.

15. The input sensing device according to claim 13 or 14, wherein, At least one of the plurality of sensor pixels is further connected to a signal input line, a reset voltage power supply line, a bias voltage power supply line, and a common voltage power supply line, and includes: The first transistor includes a first electrode connected to the reset voltage power supply line, a second electrode connected to the first node, and a gate electrode connected to the reset control line; A photodiode includes an anode electrode connected to the bias voltage power supply line and a cathode electrode connected to the first node; The second transistor includes a first electrode connected to the common voltage power line, a second electrode connected to the second node, and a gate electrode connected to the first node; and The third transistor includes a first electrode connected to the second node, a second electrode connected to the signal input line, and a gate electrode connected to a corresponding drive line among the plurality of drive lines.

16. An input sensing method, comprising: The reset signal is applied to multiple sensor pixels simultaneously; A sensing signal is generated in response to the reset signal; The horizontal drive signal is sequentially applied to the plurality of sensor pixels; Receive the sensing signals that are sequentially output in response to the horizontal drive signal; Generate a sensing data signal corresponding to the received sensing signal; as well as Correct the sensing data signal of one of the plurality of sensor pixels. The correction of the sensing data signal includes dividing the sensing data signal by a value proportional to the amount of time that a sensor pixel is exposed to light.

17. The input sensing method according to claim 16, wherein, The amplitude of the sensing signal increases proportionally to the time interval between the time point when the reset signal is applied and the time point when the horizontal drive signal is applied.

18. The input sensing method according to claim 16 or 17, wherein, The simultaneous application of the reset signal to the plurality of sensor pixels further includes providing the reset signal to the plurality of sensor pixels multiple times before applying the horizontal drive signal to the plurality of sensor pixels.

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