Signal heat separation TMV package structure and manufacturing method thereof

Abstract

The application discloses a signal-heat separation TMV packaging structure and a manufacturing method thereof. The TMV packaging structure comprises an insulating medium material body, an inner layer signal circuit layer, an outer layer signal circuit layer, a heat dissipation metal surface and a chip. The insulating medium material body has opposite first and second sides. The first side of the insulating medium material body is provided with an isolation layer. The inner layer signal circuit layer is arranged in the insulating medium material body. The outer layer signal circuit is arranged on the surface of the second side of the insulating medium material body and is connected with the inner layer signal circuit layer through a TMV structure. The heat dissipation metal surface is arranged on the surface of the first side of the insulating medium material body. The heat dissipation metal surface is separated from the inner layer signal circuit layer through the isolation layer. The chip is embedded in the insulating medium material body. The active surface of the chip is electrically connected with the inner layer signal circuit layer. The passive surface of the chip is heat-conducting connected with the heat dissipation metal surface. The application can realize higher density integrated packaging, signal-heat separation and greatly improved heat dissipation effect.

Description

Technical Field

[0001] This invention relates to the field of semiconductor packaging technology, and in particular to a thermal separation TMV packaging structure and its fabrication method. Background Technology

[0002] With the development and advancement of electronic technology, electronic products are evolving towards smaller, thinner, and lighter designs, driving the development of highly integrated and miniaturized packaging structures. Simultaneously, the functional requirements of electronic products are becoming increasingly powerful, and the computational demands of the chips encapsulated in packages are increasing. This leads to a rapid increase in the heat flux density per unit area of ​​the package. If the generated heat cannot be dissipated quickly, the continuous heating of electronic components will cause a decline in device operating speed and performance, and will also significantly impact the reliability of electronic products. Therefore, how to achieve higher-density integrated packaging and how to solve the heat dissipation problem of the package are currently very important issues in the packaging field.

[0003] In existing packaging technologies, the traditional wire bonding packaging method involves pre-fixing components such as chips onto the substrate surface, then achieving electrical connections between the components and the substrate through wire bonding, and finally encapsulating with packaging material (molding). However, this method has the following drawbacks:

[0004] (1) Attaching the chip to the substrate surface and then wire bonding will increase the package size, which cannot meet the development needs of high-density integration and miniaturization.

[0005] (2) After the chip is packaged, one side is the packaging material and the other side is soldered to the PCB through the pad. The heat dissipation effect of the chip is poor. Even if a heat dissipation copper surface is set on the back of the chip, the space of the heat dissipation copper surface is limited due to the limitation of the packaging structure, and it cannot truly improve the heat dissipation problem during chip operation. Summary of the Invention

[0006] This invention aims to at least solve one of the technical problems existing in the prior art. To this end, this invention proposes a through-molding via (TMV) packaging structure and its fabrication method, which can achieve high-density integration and thermal separation, significantly improving heat dissipation.

[0007] In a first aspect, according to an embodiment of the present invention, a signal-thermal separation TMV packaging structure includes an insulating dielectric material body having a first side and a second side opposite to each other, wherein an isolation layer is disposed on the first side of the insulating dielectric material body; an inner signal line layer disposed within the insulating dielectric material body; an outer signal line layer disposed on the surface of the second side of the insulating dielectric material body and connected to the inner signal line layer through a TMV structure; a heat dissipation metal surface disposed on the surface of the first side of the insulating dielectric material body, wherein the heat dissipation metal surface is separated from the inner signal line layer by the isolation layer; and a chip having an active surface and a passive surface opposite to each other, wherein the chip is embedded within the insulating dielectric material body, wherein the active surface of the chip is electrically connected to the inner signal line layer, and the passive surface of the chip is thermally connected to the heat dissipation metal surface.

[0008] The heat-separated TMV packaging structure according to embodiments of the present invention has at least the following beneficial effects:

[0009] The chip is embedded in the insulating dielectric material, which is conducive to achieving higher density integrated packaging. The heat dissipation metal surface and the inner signal line layer are separated by an isolation layer, which can achieve signal and heat separation and greatly improve the heat dissipation effect.

[0010] According to some embodiments of the present invention, the passive surface of the chip is directly connected to the heat dissipation metal surface, or a thermally conductive metal is connected between the passive surface of the chip and the heat dissipation metal surface.

[0011] According to some embodiments of the present invention, the thermally conductive metal includes a thermally conductive metal surface and a thermally conductive metal pillar, a first side of the thermally conductive metal surface is connected to the passive surface of the chip, and a second side of the thermally conductive metal surface is connected to the heat dissipation metal surface through the thermally conductive metal pillar.

[0012] According to some embodiments of the present invention, the number of inner signal line layers is multiple, and adjacent inner signal line layers are connected by a second conductive metal post.

[0013] According to some embodiments of the present invention, the TMV structure is a first conductive metal pillar, which is directly connected to the inner signal line layer, or the first conductive metal pillar is connected to the inner signal line layer by solder.

[0014] According to some embodiments of the present invention, the insulating dielectric material body comprises multiple layers of insulating layers stacked sequentially, wherein the insulating layer located on the first side of the insulating dielectric material body serves as the isolation layer.

[0015] According to some embodiments of the present invention, the insulating dielectric material body further includes an encapsulation layer, wherein multiple insulating layers are provided with an encapsulation cavity for accommodating the chip, the encapsulation layer covers adjacent insulating layers, fills the encapsulation cavity, and surrounds the outside of the chip.

[0016] Secondly, according to an embodiment of the present invention, a method for fabricating a heat-separated TMV packaging structure includes the following steps:

[0017] A substrate having opposing first and second sides is provided, and a temporary bearing surface is processed on the second side surface of the substrate. The substrate is provided with an encapsulation cavity, a first inner signal line layer, and a first metal pillar. The encapsulation cavity extends through the opposing first and second sides of the substrate. The first inner signal line layer is partially or entirely disposed on the surface of the first side of the substrate. A first end of the first metal pillar is electrically connected to the first inner signal line layer, and a second end of the first metal pillar is exposed on the surface of the second side of the substrate. The temporary bearing surface covers the encapsulation cavity.

[0018] The chip to be packaged is mounted in the packaging cavity and bonded to the lead of the first inner signal line layer. The active side of the chip faces the first side of the substrate, and the passive side of the chip is connected to the temporary carrier surface.

[0019] A first conductive metal pillar is processed on a first side of the substrate and encapsulated with a second insulating dielectric material to form an encapsulation layer. The first conductive metal pillar is connected to the first inner signal line layer.

[0020] Remove the temporary bearing surface and process a second inner layer signal line layer on the surface of the second side of the substrate. The second inner layer signal line layer includes a second inner layer signal line and a thermally conductive metal surface. The second inner layer signal line is connected to the first metal pillar, and the thermally conductive metal surface is connected to the passive surface of the chip.

[0021] Thermally conductive metal pillars are processed on the thermally conductive metal surface and then laminated to form an isolation layer;

[0022] An outer signal line layer is processed on the surface of the encapsulation layer, and a heat dissipation metal surface is processed on the surface of the isolation layer. The outer signal line layer is connected to the first conductive metal pillar, and the heat dissipation metal surface is connected to the heat-conducting metal pillar.

[0023] The method for fabricating a heat-separated TMV packaging structure according to an embodiment of the present invention has at least the following beneficial effects:

[0024] Mounting the chip inside the packaging cavity of the substrate facilitates higher density integrated packaging. The heat dissipation metal surface and the second inner signal line layer are separated by an isolation layer, which can achieve signal-heat separation and greatly improve the heat dissipation effect.

[0025] According to some embodiments of the present invention, the first inner signal line layer includes multiple line layers, wherein one line layer is disposed on the surface of the first side of the substrate, the remaining line layers are embedded in the substrate, and the multiple line layers are connected by metal pillars.

[0026] Alternatively, the first inner signal line layer may include a single line layer disposed on the surface of the first side of the substrate.

[0027] According to some embodiments of the present invention, the step of processing a first conductive metal pillar on a first side of the substrate includes the following steps:

[0028] The first conductive metal post is attached to the first side of the substrate and located at the position corresponding to the first inner signal line layer.

[0029] The first conductive metal pillar and the first inner signal line layer are soldered together using solder.

[0030] According to some embodiments of the present invention, the step of processing a first conductive metal pillar on a first side of the substrate includes the following steps:

[0031] A photosensitive masking film is processed on the first side of the substrate, and the photosensitive masking film is provided with an opening adapted to the first conductive metal post;

[0032] The substrate is electroplated to form the first conductive metal pillar within the window;

[0033] Remove the photosensitive masking film.

[0034] Thirdly, a method for fabricating a heat-separated TMV packaging structure according to an embodiment of the present invention includes the following steps:

[0035] A substrate having opposing first and second sides is provided, and a temporary bearing surface is processed on the second side surface of the substrate. The substrate is provided with an encapsulation cavity and a first inner signal line layer. The encapsulation cavity extends through the opposing first and second sides of the substrate. The first inner signal line layer is partially or entirely disposed on the surface of the first side of the substrate. An isolation layer is disposed between the first inner signal line layer and the second side surface of the substrate. The temporary bearing surface covers the encapsulation cavity.

[0036] The chip to be packaged is mounted in the packaging cavity and bonded to the lead of the first inner signal line layer. The active side of the chip faces the first side of the substrate, and the passive side of the chip is connected to the temporary carrier surface.

[0037] A first conductive metal pillar is processed on a first side of the substrate and encapsulated with a second insulating dielectric material to form an encapsulation layer. The first conductive metal pillar is connected to the first inner signal line layer.

[0038] Remove the temporary bearing surface;

[0039] An outer signal line layer is processed on the surface of the encapsulation layer, and a heat dissipation metal surface is processed on the surface of the isolation layer. The outer signal line layer is connected to the first conductive metal pillar, and the heat dissipation metal surface is connected to the passive surface of the chip.

[0040] The method for fabricating a heat-separated TMV packaging structure according to an embodiment of the present invention has at least the following beneficial effects:

[0041] Mounting the chip inside the packaging cavity of the substrate facilitates higher density integrated packaging. The heat dissipation metal surface and the second inner signal line layer are separated by an isolation layer, which can achieve signal-heat separation and greatly improve the heat dissipation effect.

[0042] According to some embodiments of the present invention, the first inner signal line layer includes multiple line layers, wherein one line layer is disposed on the surface of the first side of the substrate, the remaining line layers are embedded in the substrate, and the multiple line layers are connected by metal pillars.

[0043] Alternatively, the first inner signal line layer may include a single line layer disposed on the surface of the first side of the substrate.

[0044] According to some embodiments of the present invention, the step of processing a first conductive metal pillar on a first side of the substrate includes the following steps:

[0045] The first conductive metal post is attached to the first side of the substrate and located at the position corresponding to the first inner signal line layer.

[0046] The first conductive metal pillar and the first inner signal line layer are soldered together using solder.

[0047] According to some embodiments of the present invention, the step of processing a first conductive metal pillar on a first side of the substrate includes the following steps:

[0048] A photosensitive masking film is processed on the first side of the substrate, and the photosensitive masking film is provided with an opening adapted to the first conductive metal post;

[0049] The substrate is electroplated to form the first conductive metal pillar within the window;

[0050] Remove the photosensitive masking film.

[0051] Fourthly, the signal-thermal separation TMV packaging structure according to an embodiment of the present invention is prepared by the above-described method for fabricating the signal-thermal separation TMV packaging structure.

[0052] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0053] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:

[0054] Figure 1 This is one of the cross-sectional schematic diagrams of the heat-separated TMV packaging structure of Embodiment 1 of the present invention;

[0055] Figure 2 This is a second cross-sectional schematic diagram of the heat-separated TMV packaging structure of Embodiment 1 of the present invention;

[0056] Figure 3 This is one of the cross-sectional schematic diagrams of the heat-separated TMV packaging structure in Embodiment 2 of the present invention;

[0057] Figure 4 This is a second cross-sectional schematic diagram of the heat-separated TMV packaging structure of Embodiment 2 of the present invention;

[0058] Figures 5 to 19 This is a schematic diagram of the intermediate process of the substrate fabrication method in Embodiment 4 of the present invention;

[0059] Figures 20-26 This is a schematic diagram of the intermediate process of the fabrication method of the heat-separated TMV packaging structure according to Embodiment 5 of the present invention;

[0060] Figures 27-32 This is a schematic diagram of the intermediate process of the fabrication method of the heat-separated TMV packaging structure according to Embodiment 6 of the present invention. Detailed Implementation

[0061] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0062] In the description of this invention, "several" means one or more, "multiple" means two or more, "greater than," "less than," "exceeding," etc. are understood to exclude the stated number, and "above," "below," "within," etc. are understood to include the stated number. If "first," "second," etc. are used in the description, they are only for the purpose of distinguishing technical features and should not be construed as indicating or implying relative importance or implicitly indicating the number of indicated technical features or the order of the indicated technical features.

[0063] In the description of this invention, unless otherwise explicitly defined, terms such as "setting", "connection", "conductive connection", and "thermal connection" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this invention in conjunction with the specific content of the technical solution.

[0064] Example 1

[0065] Please refer to Figure 1 This embodiment discloses a signal-thermal separation TMV packaging structure, including an insulating dielectric material body 100, an inner signal line layer 150, an outer signal line layer 160, a heat dissipation metal surface 170, and a chip 180.

[0066] Figure 1 A schematic cross-sectional structure of the insulating dielectric material body 100 in its thickness direction is shown. The insulating dielectric material body 100 of this embodiment has opposing first and second sides. The insulating dielectric material body 100 includes multiple layers of insulating layers stacked sequentially, which are formed by coating or laminating a first insulating dielectric material. The multiple insulating layers include a first insulating layer, a second insulating layer, ..., an Nth insulating layer, where N is an integer greater than 1. The Nth insulating layer, the first insulating layer, the second insulating layer, ..., the (N-1)th insulating layer are stacked sequentially from the first side of the insulating dielectric material body 100 towards the second side. In this embodiment, the first insulating dielectric material body 100 has three layers, i.e., the multiple insulating layers include a first insulating layer 111, a second insulating layer 112, and a third insulating layer 113. The third insulating layer 113 is located on the first side of the insulating dielectric material body 100 and serves as an insulating layer. The multilayer first insulating dielectric material is provided with a packaging cavity 101 for accommodating the chip 180. The insulating dielectric material body 100 also includes a packaging layer 120, which covers the adjacent insulating layer, that is, covers the (N-1)th insulating layer, fills the packaging cavity 101, and wraps around the outside of the chip 180. The packaging layer 120 is obtained by packaging with a second insulating dielectric material. The packaging layer 120 is used to encapsulate the chip 180 in the packaging cavity 101. In this way, the chip 180 can be embedded in the insulating dielectric material body 100, which is conducive to achieving higher density integrated packaging.

[0067] An inner signal line layer 150 is disposed within an insulating dielectric material body 100, and an outer signal line layer 160 is disposed on the surface of the second side of the insulating dielectric material body 100 and connected to the inner signal line layer 150 via a TMV structure. The inner signal line layer 150 includes a first inner signal line layer and a second inner signal line layer 153. The number of first inner signal line layers is multiple, including a first line layer, a second line layer, ..., an Mth line layer, where M is an integer greater than 1. The second inner signal line layer, the first line layer, the second line layer, ..., the Mth line layer are arranged sequentially from the first side of the insulating dielectric material body 100 towards the second side. In this embodiment, the number of first inner signal line layers is two, i.e., multiple first inner signal line layers include a first line layer 151 and a second line layer 152. In this embodiment, the second inner signal line layer 153 is connected to the first line layer 151 via a first metal pillar 131, and the first line layer 151 is connected to the second line layer 152 via a second metal pillar 133, and so on. The first metal pillar 131, the second metal pillar 133, and other conductive structures can be used as second conductive metal pillars to connect different line layers, i.e., adjacent inner signal line layers 150 are connected via second conductive metal pillars. In this embodiment, the TMV structure can use a traditional Via via or a first conductive metal pillar 140. In a traditional TMV structure, the Via via is formed by laser engraving and electroplating, enabling signal transmission within the encapsulation layer 120, thereby achieving signal transmission between the outer signal line layer 160 and the inner signal line layer 150. However, the upper and lower apertures of the Via via have a large difference, making it difficult to form a solid conductive structure, and the aperture walls are rough. To improve the conductivity of the TMV structure, a metal pillar structure, namely the first conductive metal pillar 140, is used. In this embodiment, both the first conductive metal post 140 and the second conductive metal post are solid copper posts, which allows for nearly identical upper and lower apertures and a smooth surface. Compared with traditional Via holes, solid copper posts have lower signal loss, shorter signal transmission delay, and better conductivity. The first conductive metal post 140 in this embodiment can be fabricated using a copper post method or by mounting metal posts. Please refer to [reference needed]. Figure 1 When the first conductive metal post 140 is fabricated using the copper post method, the first conductive metal post 140 is directly connected to the inner signal line layer 150; please refer to... Figure 2 When the first conductive metal post 140 is fabricated by mounting metal posts, solder 141 connects the first conductive metal post 140 to the inner signal line layer 150. For the sake of brevity, please refer to Example 5 for the specific fabrication method of the first conductive metal post 140.

[0068] A heat-dissipating metal surface 170 is disposed on the surface of the first side of the insulating dielectric material body 100, and the heat-dissipating metal surface 170 is separated from the inner signal line layer 150 by an isolation layer. The chip 180 has opposing active and passive surfaces, and is embedded within the insulating dielectric material body 100. The active surface of the chip 180 is electrically connected to the inner signal line layer 150, and the passive surface of the chip 180 is thermally connected to the heat-dissipating metal surface 170. In use, the outer signal line layer 160 is used for soldering to the PCB. This fully utilizes the wiring area of ​​the first and second surfaces of the insulating dielectric material body 100, which is beneficial for increasing the area of ​​the heat-dissipating metal surface 170. It should be noted that the active surface of the chip 180 has signal pins, and these signal pins are electrically connected to the inner signal line layer 150 via wire bonding. A thermally conductive metal is connected between the passive surface of chip 180 and the heat dissipation metal surface 170. The heat generated by chip 180 during operation is transferred to the heat dissipation metal surface 170 through this metal. The heat dissipation metal surface 170 is a copper sheet covering the first side surface of the insulating dielectric material body 100, providing a larger heat dissipation area and improving the heat dissipation efficiency of chip 180. Furthermore, the heat dissipation metal surface 170 is isolated from the inner signal line layer 150 by an isolation layer, separating the signal layer from the heat dissipation layer. This achieves signal-heat separation, avoiding the limited heat dissipation area caused by the co-existence of the signal layer and heat dissipation layer, and significantly improving the heat dissipation effect. In this embodiment, the thermally conductive metal includes a thermally conductive metal surface 532 and thermally conductive metal pillars 533. The first side of the thermally conductive metal surface 532 is connected to the passive surface of chip 180, and the second side of the thermally conductive metal surface 532 is connected to the heat dissipation metal surface 170 through the thermally conductive metal pillars 533. The thermally conductive metal surface 532 can accommodate chips 180 of different areas and transfer the heat generated by the chip 180. The thermally conductive metal pillar 533 can transfer the heat from the thermally conductive metal surface 532 to the heat dissipation metal surface 170. Moreover, the thickness of the thermally conductive metal pillar 533 can be adjusted according to the thickness of different isolation layers, which can solve the thickness limitation of the thermally conductive metal surface 532.

[0069] Example 2

[0070] Please refer to Figure 3 This embodiment discloses a signal-thermal separation TMV packaging structure, including an insulating dielectric material body 100, an inner signal line layer 150, an outer signal line layer 160, a heat dissipation metal surface 170, and a chip 180.

[0071] Figure 3A schematic cross-sectional view of the insulating dielectric material body 100 in its thickness direction is shown. The insulating dielectric material body 100 has opposing first and second sides and includes multiple insulating layers formed by coating or laminating a first insulating dielectric material. The multiple insulating layers include a first insulating layer, a second insulating layer, ..., an Lth insulating layer, where L is an integer greater than or equal to 1. The first insulating layer, the second insulating layer, ..., the Lth insulating layer are stacked sequentially from the first side of the insulating dielectric material body 100 towards the second side. In this embodiment, the number of insulating layers is two, i.e., the multiple insulating layers include a first insulating layer 111 and a second insulating layer 112, wherein the first insulating layer 111 is located on the first side of the insulating dielectric material body 100 and serves as an insulating layer. The multilayer insulating layer is provided with a packaging cavity 101 for accommodating the chip 180. The insulating dielectric material body 100 also includes a packaging layer 120, which covers the adjacent insulating layer, i.e., covers the Lth insulating layer, fills the packaging cavity 101, and wraps around the outside of the chip 180. The packaging layer 120 is obtained by packaging with a second insulating dielectric material. The packaging layer 120 is used to encapsulate the chip 180 in the packaging cavity 101. In this way, the chip 180 can be embedded in the insulating dielectric material body 100, which is conducive to achieving higher density integrated packaging.

[0072] An inner signal line layer 150 is disposed within an insulating dielectric material body 100, and an outer signal line layer 160 is disposed on the surface of the second side of the insulating dielectric material body 100 and connected to the inner signal line layer 150 via a TMV structure. In this embodiment, the inner signal line layer 150 includes a first inner signal line layer, and the number of first inner signal line layers is multiple. The multiple first inner signal line layers include a first line layer, a second line layer, ..., an Mth line layer, where M is an integer greater than or equal to 1. The first line layer, the second line layer, ..., the Mth line layer are arranged sequentially from the first side of the insulating dielectric material body 100 towards the second side. In this embodiment, the number of first inner signal line layers is two, that is, the multiple first inner signal line layers include a first line layer 151 and a second line layer 152. In this embodiment, the first circuit layer 151 and the second circuit layer 152 are connected by a second metal pillar 133, and the second circuit layer 152 and the third circuit layer (not shown) are connected by a third metal pillar (not shown), and so on. The conductive structures such as the second metal pillar 133 and the third metal pillar can be used as second conductive metal pillars to make conductive connections between different circuit layers, that is, adjacent inner signal circuit layers 150 are connected by second conductive metal pillars. It should be noted that the TMV structure in this embodiment is the same as in Embodiment 1, and will not be described again here. In this embodiment, both the first conductive metal pillar 140 and the second conductive metal pillar are solid copper pillars, which can achieve almost identical upper and lower apertures and a smooth surface. Compared with traditional Via holes, solid copper pillars have lower signal loss, shorter signal transmission delay, and better conductivity. The first conductive metal pillar 140 in this embodiment can be processed by copper pillar method or by mounting metal pillars; please refer to [reference needed]. Figure 3 When the first conductive metal post 140 is fabricated using the copper post method, the first conductive metal post 140 is directly connected to the inner signal line layer 150; please refer to... Figure 4 When the first conductive metal post 140 is fabricated by mounting metal posts, solder 141 connects the first conductive metal post 140 to the inner signal line layer 150. For the sake of brevity, please refer to Example 5 for the specific fabrication method of the first conductive metal post 140.

[0073] A heat-dissipating metal surface 170 is disposed on the surface of the first side of the insulating dielectric material body 100, and the heat-dissipating metal surface 170 is separated from the inner signal line layer 150 by an isolation layer. The chip 180 has opposing active and passive surfaces, and is embedded within the insulating dielectric material body 100. The active surface of the chip 180 is electrically connected to the inner signal line layer 150, and the passive surface of the chip 180 is thermally connected to the heat-dissipating metal surface 170. In use, the outer signal line layer 160 is used for soldering to the PCB. This fully utilizes the wiring area of ​​the first and second surfaces of the insulating dielectric material body 100, which is beneficial for increasing the area of ​​the heat-dissipating metal surface 170. It should be noted that the active surface of the chip 180 has signal pins, and these signal pins are electrically connected to the inner signal line layer 150 via wire bonding. The passive surface of chip 180 is in direct contact with the heat dissipation metal surface 170. The heat generated by chip 180 during operation is transferred to the heat dissipation metal surface 170 through the thermally conductive metal. The heat dissipation metal surface 170 is a copper sheet covering the first side surface of the insulating dielectric material body 100, providing a larger heat dissipation area and improving the heat dissipation efficiency of chip 180. Furthermore, the heat dissipation metal surface 170 is isolated from the inner signal line layer 150 by an isolation layer, separating the signal layer from the heat dissipation layer. This achieves signal-heat separation, avoiding the limited heat dissipation area caused by the co-existence of the signal layer and heat dissipation layer, and significantly improving the heat dissipation effect. It should be noted that any content not covered in this embodiment can be referred to in Embodiment 1.

[0074] Example 3

[0075] This embodiment discloses a signal-thermal separation TMV packaging structure (not shown), including an insulating dielectric material body 100, an inner signal line layer 150, an outer signal line layer 160, a heat dissipation metal surface 170, and a chip 180. Unlike Embodiment 2, the insulating dielectric material body 100 in this embodiment includes an insulating layer and a packaging layer 120. The insulating layer is a single-layer or multi-layer structure, and the inner signal line layer 150 is a single-layer structure (not shown). The inner signal line layer 150 is disposed on the insulating layer and located at the boundary with the packaging layer.

[0076] Example 4

[0077] This embodiment provides a method for manufacturing a substrate, including steps S010 to S090, which are described in detail below:

[0078] S010, please refer to Figure 5A carrier plate 010 is provided, comprising a core layer 011, a first metal layer 012, a second metal layer 013, an etch barrier layer 014, and a first metal seed layer 015. The first metal layer 012 and the second metal layer 013 can be copper layers, and they are physically bonded together and can be separated. After the first metal layer 012 and the second metal layer 013 are separated, etching is required. The etch barrier layer 014 protects the circuitry and metal pillars of the substrate from over-etching. The etch barrier layer 014 can be a nickel layer, and the first metal seed layer 015 is a copper layer, serving as the conductive foundation for subsequent electroplating.

[0079] S020, please refer to Figure 6 A first photoresist material 021 is applied to the carrier plate 010. Windows are then created and electroplated on the first photoresist material 021 to obtain a first metal pillar layer. In this embodiment, the first metal pillar layer is obtained using the copper pillar method. The first photoresist material 021 can be obtained by lamination or coating. The windowing method for the first photoresist material 021 can be exposure + development. Depending on the specific application, the first metal pillar layer may include a first metal pillar 131 and a first sacrificial metal pillar 132, or the first metal pillar layer may include the first sacrificial metal pillar 132 while omitting the first metal pillar 131. Figure 7 The diagram shows a top view of the windowed structure of the first photoresist material 021. It is worth noting that the first metal pillar layer in this embodiment is a copper pillar layer, and the shape of the window position 211 on the first photoresist material 021 is adapted to the first metal pillar 131 and the first sacrificial metal pillar 132.

[0080] S030, please refer to Figure 7 , Figure 8 and Figure 9 Remove the first photoresist material 021 and apply the first insulating medium material to form the first insulating layer 111; wherein, the first insulating medium material can be pure resin or an organic insulating material containing resin and glass fiber, and the first insulating medium material can be applied to the first metal pillar layer by means of coating or pressing to form the first insulating layer 111.

[0081] S040, please refer to Figure 9 , Figure 10 and Figure 11After thinning the first insulating layer 111, a second photoresist material 022 is applied to the first insulating layer 111, and windows are opened and electroplated on the second photoresist material 022 to obtain the first circuit layer 151. Corresponding to step S020, the first circuit layer 151 may include a first conductive line 511 and a first sacrificial line 512, with the first sacrificial line 512 connected to the first sacrificial metal post 132. Alternatively, the first circuit layer 151 may include the first sacrificial line 512 while omitting the first conductive line 511. It should be noted that when the first metal post 131 is provided, the first conductive line 511 may be connected to the first metal post 131.

[0082] S050, please refer to Figure 12 and Figure 13 A third photoresist material 023 is applied to the first circuit layer 151, and windows are opened and electroplated on the third photoresist material 023 to obtain a second metal pillar layer. Corresponding to the first metal pillar layer, the second metal pillar layer includes a second metal pillar 133 and a second sacrificial metal pillar 134, or the second metal pillar layer includes a second sacrificial metal pillar 134, while omitting the second metal pillar 133.

[0083] S060, please refer to Figure 13 and Figure 14 Remove the third photoresist material 023 and apply the first insulating dielectric material to form the second insulating layer 112;

[0084] S070. Repeat steps S030 to S060 until the number of substrate layers meets the production requirements. It should be noted that the purpose of the sacrificial traces is to facilitate the alignment of the sacrificial metal pillars in the next layer. Therefore, the sacrificial traces on the last circuit layer can be omitted. For example, please refer to... Figure 15 When the second line layer 152 is the last line layer, the second line layer 152 includes the second conducting line and omits the second sacrificial line.

[0085] S080, please refer to Figure 15 , Figure 16 and Figure 17 After separating the carrier plate 010, the sacrificial lines and sacrificial metal pillars are etched to form the encapsulation cavity 101. It should be noted that a fourth photoresist material 024 can be applied during the etching process to protect the parts that do not need to be etched.

[0086] S090. After removing the fourth photoresist material 024, the substrate is obtained. It should be noted that, depending on the specific application requirements, the substrate may have a first metal pillar 131 (e.g., ...). Figure 18 (as shown), or, omit the first metal column 131 (as shown). Figure 19 (As shown).

[0087] Example 5

[0088] This embodiment discloses a method for fabricating a heat-separated TMV packaging structure, including steps S110 to S160, which are described in detail below:

[0089] S110, please refer to Figure 20 A substrate is provided, the substrate having a first side and a second side opposite to each other, and a temporary bearing surface 030 is formed on the second side surface of the substrate.

[0090] The substrate is fabricated using the method described in Example 4. As shown in Example 4, the substrate includes a first insulating layer, a second insulating layer, ..., an (N-1)th insulating layer, where N is an integer greater than 1. In this embodiment, the substrate has a packaging cavity 101, a first inner signal line layer, and a first metal pillar 131. The packaging cavity 101 extends through the first and second opposing sides of the substrate. The first inner signal line layer is partially or entirely disposed on the surface of the first side of the substrate. The first end of the first metal pillar 131 is electrically connected to the first inner signal line layer, and the second end of the first metal pillar 131 is exposed on the surface of the second side of the substrate. A temporary bearing surface 030 covers the packaging cavity 101. It should be noted that the first inner signal line layer includes a first line layer, a second line layer, ..., an Mth line layer, where M is an integer greater than or equal to 1. The first line layer is connected to the first metal pillar 131, the second line layer is connected to the first line layer through the second metal pillar 133, and so on. The Mth line layer is connected to the (M-1)th line layer through the Mth metal pillar. The conductive structures such as the first metal pillar 131, the second metal pillar 133, ..., the Mth metal pillar can be used as second conductive metal pillars to make conductive connections between different line layers. That is, the first inner signal line layer includes multiple line layers, one of which is disposed on the surface of the first side of the substrate, and the remaining line layers are embedded in the substrate. The multiple line layers are connected by metal pillars; or, the first inner signal line layer includes a single line layer disposed on the surface of the first side of the substrate. For ease of description, the first inner signal line layer in this embodiment includes a first line layer 151 and a second line layer 152.

[0091] In this embodiment, the temporary bearing surface 030 can be processed by applying adhesive tape or adhesive cloth. The temporary bearing surface 030 can provide support for the chip 180 mounting and allow the passive surface of the chip 180 to be exposed after subsequent packaging.

[0092] S120. The chip 180 to be packaged is mounted in the packaging cavity 101 and wire-bonded to the first inner layer signal line layer. The active side of the chip 180 faces the first side of the substrate, and the passive side of the chip 180 is connected to the temporary carrier surface 030. It should be noted that the first inner layer signal line layer wire-bonded to the chip 180 is the outermost line layer of the substrate, i.e., the Mth line layer.

[0093] S130, please refer to Figure 20 , Figure 21 and Figure 22 A first conductive metal pillar 140 is processed on the first side of the substrate and encapsulated with a second insulating dielectric material to form an encapsulation layer 120. The first conductive metal pillar 140 is connected to the first inner signal line layer.

[0094] The first conductive metal pillar 140 serves as a signal transmission structure between the first inner signal line layer and the outer signal line layer 160. The first conductive metal pillar 140 can be fabricated using a surface mount metal pillar or copper pillar method, ensuring that the apertures at both ends of the first conductive metal pillar 140 are almost identical and have a smooth surface. Compared to traditional Via holes, solid copper pillars exhibit lower signal loss, shorter signal transmission delay, and better conductivity. The second insulating dielectric material encapsulates the chip 180, protecting it and providing a fabrication carrier for the subsequent outer signal line layer 160.

[0095] S140, please refer to Figure 22 and Figure 23 Remove the temporary bearing surface 030 and process a second inner layer signal line layer 153 on the surface of the second side of the substrate. The second inner layer signal line layer 153 includes a second inner layer signal line 531 and a thermally conductive metal surface 532. The second inner layer signal line 531 is connected to the first metal pillar 131, and the thermally conductive metal surface 532 is connected to the passive surface of the chip 180.

[0096] Processing a second inner signal line layer 153 on the surface of the second side of the substrate can meet the line layer requirements of different packaging designs, and can make full use of the vertical space of the package to achieve high-density integration. Among them, the thermally conductive metal surface 532 is used to transfer the heat generated by the chip 180.

[0097] S150, please refer to Figure 23 and Figure 24 Thermally conductive metal pillars 533 are processed on the thermally conductive metal surface 532 and laminated to form an isolation layer.

[0098] The thermally conductive metal pillar 533 can be processed using the copper pillar method, which involves applying photoresist material, opening windows in the photoresist material, and electroplating. After the thermally conductive metal pillar 533 is processed, a first insulating dielectric material is laminated and pressed onto it. The formed first insulating dielectric material becomes the Nth insulating layer, which can serve as an isolation layer separating the signal layer and the heat dissipation layer.

[0099] S160, please refer to Figure 24 and Figure 25 An outer signal line layer 160 is processed on the surface of the encapsulation layer 120, and a heat dissipation metal surface 170 is processed on the surface of the isolation layer. The outer signal line layer 160 is connected to the first conductive metal pillar 140, and the heat dissipation metal surface 170 is connected to the heat-conducting metal pillar 533.

[0100] It should be noted that in step S130, the encapsulation height of the second insulating dielectric material is greater than that of the first conductive metal pillar 140. Therefore, the encapsulation layer 120 needs to be thinned before processing the outer signal line layer 160. In use, the outer signal line 160 can be soldered to the PCB. The heat dissipation metal surface 170 covers the surface of the isolation layer, providing a large heat dissipation area, which is beneficial to improving heat dissipation efficiency. Moreover, the heat dissipation metal surface 170 is separated from the inner signal line and the outer signal line 160, thereby achieving signal and heat separation and avoiding the limited heat dissipation area caused by the co-existence of the signal layer and the heat dissipation layer, which greatly improves the heat dissipation effect.

[0101] Therefore, in this embodiment, the chip 180 is mounted in the packaging cavity 101 of the substrate, which is conducive to achieving higher density integrated packaging. The heat dissipation metal surface 170 and the second inner signal line layer are separated by an isolation layer, which can achieve signal and heat separation and greatly improve the heat dissipation effect.

[0102] This embodiment provides two processing methods for the first conductive metal post 140, wherein the first processing method is as follows:

[0103] Please refer to Figure 25 In step S130, a first conductive metal pillar 140 is processed on the first side of the substrate, including the following steps:

[0104] S131a. The first conductive metal post 140 is mounted on the first side of the substrate and located at the position corresponding to the first inner signal line layer.

[0105] S131b, The first conductive metal pillar 140 and the first inner signal line layer are soldered together using solder 141.

[0106] By processing the first conductive metal post 140 through mounting, the first metal post 131 can have a regular shape and a smooth surface, which is beneficial to improving conductivity.

[0107] The second processing method:

[0108] Please refer to Figure 26 In step S130, a first conductive metal pillar 140 is processed on the first side of the substrate, including the following steps:

[0109] S132a. A photosensitive masking film is processed on the first side of the substrate. The photosensitive masking film has an opening adapted to the first conductive metal post 140. It should be noted that the function of the photosensitive masking film is the same as that of the photoresist material, which is to protect the metal positions that do not need to be electroplated or etched.

[0110] S132b, Electroplating the substrate to form a first conductive metal pillar 140 within the window;

[0111] S132c, Remove the photosensitive masking film.

[0112] Compared to traditional Via holes, the copper pillar method can produce solid copper pillars, which have lower signal loss, shorter signal transmission delay, and better conductivity.

[0113] In addition, this embodiment also discloses a signal-thermal separation TMV packaging structure, which is prepared by the above-described method for fabricating a signal-thermal separation TMV packaging structure. The chip 180 is embedded in the substrate, which is beneficial for achieving higher density integrated packaging. The heat dissipation metal surface 170 and the inner signal line layer 150 are separated by an isolation layer, which can achieve signal-thermal separation and greatly improve the heat dissipation effect. The two ends of the first conductive metal pillar 140 are almost the same size and have a smooth surface, resulting in less signal loss, shorter transmission delay, and better conductivity.

[0114] Example 6

[0115] This embodiment discloses a method for fabricating a signal-thermal separation TMV packaging structure, including the following steps:

[0116] S210, please refer to Figure 27 A substrate is provided, the substrate having a first side and a second side opposite to each other, a temporary bearing surface 030 is processed on the second side surface of the substrate, the substrate is provided with a packaging cavity 101 and a first inner signal line layer, the packaging cavity 101 extends through the first side and the second side of the substrate opposite to each other, the first inner signal line layer is partially or entirely disposed on the surface of the first side of the substrate, an isolation layer is disposed between the first inner signal line layer and the second side surface of the substrate, and the temporary bearing surface 030 covers the packaging cavity 101.

[0117] Please refer to Figure 20 and Figure 27Similar to Embodiment 5, the first inner signal line layer in this embodiment can be a single-layer or multi-layer structure. That is, the first inner signal line layer includes multiple line layers, wherein one line layer is disposed on the surface of the first side of the substrate, and the remaining line layers are embedded in the substrate, and the multiple line layers are connected by metal pillars; or, the first inner signal line layer includes a single line layer, which is disposed on the surface of the first side of the substrate.

[0118] Unlike Embodiment 5, the substrate in this embodiment omits the first metal pillar 131. The substrate fabrication method can refer to Embodiment 4. The substrate includes a first insulating layer, a second insulating layer, ..., an Lth insulating layer, where L is an integer greater than or equal to 1. In this embodiment, the number of insulating layers is 2, that is, the substrate includes a first insulating layer 111 and a second insulating layer 112. The first insulating layer 111 serves as an isolation layer separating the signal layer and the heat dissipation layer.

[0119] S220. The chip 180 to be packaged is mounted in the packaging cavity 101 and bonded to the lead of the first inner signal line layer. The active side of the chip 180 faces the first side of the substrate, and the passive side of the chip 180 is connected to the temporary carrier surface 030.

[0120] S230, please refer to Figure 28 and Figure 29 A first conductive metal pillar 140 is processed on the first side of the substrate and encapsulated by a second insulating dielectric material to form an encapsulation layer 120. The first conductive metal pillar 140 is connected to the first inner signal line layer.

[0121] S240, please refer to Figure 29 and Figure 20 Remove temporary bearing surface 030;

[0122] S250, please refer to Figure 20 and Figure 31 An outer signal line layer 160 is fabricated on the surface of the packaging layer 120, and a heat dissipation metal surface 170 is fabricated on the surface of the isolation layer. The outer signal line layer 160 is connected to the first conductive metal pillar 140, and the heat dissipation metal surface 170 is connected to the passive surface of the chip 180. Please refer to... Figure 25 and Figure 31 Unlike Example 5, this example omits the thermally conductive metal structure, namely the thermally conductive metal surface 532 and the thermally conductive metal pillar 533.

[0123] Mounting the chip 180 within the packaging cavity 101 of the substrate facilitates higher-density integrated packaging. The heat dissipation metal surface 170 is separated from the first inner signal line layer by an isolation layer, achieving signal-heat separation and significantly improving heat dissipation. It should be noted that any aspects not covered in this embodiment can be referred to in Embodiment 5.

[0124] Please refer to Figure 31 and Figure 32 Similar to Example 5, the first conductive metal post 140 in this embodiment can also be obtained by two methods, which will not be described again in this embodiment.

[0125] In addition, this embodiment also discloses a signal-thermal separation TMV packaging structure, which is prepared by the above-described method for fabricating a signal-thermal separation TMV packaging structure. The chip 180 is embedded in the substrate, which is beneficial for achieving higher density integrated packaging. The heat dissipation metal surface 170 and the inner signal line layer 150 are separated by an isolation layer, which can achieve signal-thermal separation and greatly improve the heat dissipation effect. The two ends of the first conductive metal pillar 140 are almost the same size and have a smooth surface, resulting in less signal loss, shorter transmission delay, and better conductivity.

[0126] The embodiments of the present invention have been described in detail above with reference to the accompanying drawings. However, the present invention is not limited to the above embodiments. Within the scope of knowledge possessed by those skilled in the art, various changes can be made without departing from the spirit of the present invention.

Claims

1. A method for fabricating a signal-thermal separation TMV packaging structure, characterized in that, Including the following steps: A substrate having opposing first and second sides is provided, and a temporary bearing surface (030) is processed on the second side surface of the substrate. The substrate is provided with a package cavity (101), a second inner signal line layer and a first metal pillar (131). The package cavity (101) extends through the opposing first and second sides of the substrate. The second inner signal line layer is partially or entirely disposed on the surface of the first side of the substrate. The first end of the first metal pillar (131) is electrically connected to the second inner signal line layer. The second end of the first metal pillar (131) is exposed on the surface of the second side of the substrate. The temporary bearing surface (030) covers the package cavity (101). The chip (180) to be packaged is mounted in the packaging cavity (101) and bonded to the second inner layer signal line layer. The active side of the chip (180) faces the first side of the substrate, and the passive side of the chip (180) is connected to the temporary carrier surface (030). A first conductive metal pillar (140) is processed on the first side of the substrate and encapsulated with a second insulating dielectric material to form an encapsulation layer (120). The first conductive metal pillar (140) is connected to the second inner signal line layer. Remove the temporary bearing surface (030) and process a second inner layer signal line layer on the surface of the second side of the substrate. The second inner layer signal line layer includes a second inner layer signal line (531) and a thermally conductive metal surface (532). The second inner layer signal line (531) is connected to the first metal pillar (131), and the thermally conductive metal surface (532) is connected to the passive surface of the chip (180). Thermally conductive metal pillars (533) are processed on the thermally conductive metal surface (532) and laminated to form an isolation layer; An outer signal line layer (160) is processed on the surface of the encapsulation layer (120), and a heat dissipation metal surface (170) is processed on the surface of the isolation layer. The outer signal line layer (160) is connected to the first conductive metal pillar (140), and the heat dissipation metal surface (170) is connected to the heat-conducting metal pillar (533).

2. The method for fabricating the heat-separated TMV packaging structure according to claim 1, characterized in that, The second inner signal line layer includes multiple line layers, wherein one line layer is disposed on the surface of the first side of the substrate, and the remaining line layers are embedded in the substrate, and the multiple line layers are connected by metal pillars. Alternatively, the second inner signal line layer may include a single-layer line layer disposed on the surface of the first side of the substrate.

3. The method for fabricating the heat-separated TMV packaging structure according to claim 2, characterized in that, The process of machining the first conductive metal post (140) on the first side of the substrate includes the following steps: The first conductive metal post (140) is attached to the first side of the substrate and located at the position corresponding to the second inner signal line layer; The first conductive metal pillar (140) and the second inner signal line layer are soldered together using solder (141).

4. The method for fabricating the heat-separated TMV packaging structure according to claim 2, characterized in that, The process of machining the first conductive metal post (140) on the first side of the substrate includes the following steps: A photosensitive masking film is processed on the first side of the substrate, and the photosensitive masking film is provided with an opening adapted to the first conductive metal post (140); The substrate is electroplated to form the first conductive metal pillar (140) in the window. Remove the photosensitive masking film.

5. A method for fabricating a signal-thermal separation TMV packaging structure, characterized in that, Including the following steps: A substrate having opposing first and second sides is provided, and a temporary bearing surface (030) is processed on the second side surface of the substrate. The substrate is provided with an encapsulation cavity (101) and a second inner signal line layer. The encapsulation cavity (101) extends through the opposing first and second sides of the substrate. The second inner signal line layer is partially or entirely disposed on the surface of the first side of the substrate. An isolation layer is disposed between the second inner signal line layer and the second side surface of the substrate. The temporary bearing surface (030) covers the encapsulation cavity (101). The chip (180) to be packaged is mounted in the packaging cavity (101) and bonded to the second inner layer signal line layer. The active side of the chip (180) faces the first side of the substrate, and the passive side of the chip (180) is connected to the temporary carrier surface (030). A first conductive metal pillar (140) is processed on the first side of the substrate and encapsulated with a second insulating dielectric material to form an encapsulation layer (120). The first conductive metal pillar (140) is connected to the second inner signal line layer. Remove the temporary bearing surface (030); An outer signal line layer (160) is processed on the surface of the encapsulation layer (120), and a heat dissipation metal surface (170) is processed on the surface of the isolation layer. The outer signal line layer (160) is connected to the first conductive metal pillar (140), and the heat dissipation metal surface (170) is connected to the passive surface of the chip (180).

6. The method for fabricating the signal-thermal separation TMV packaging structure according to claim 5, characterized in that, The second inner signal line layer includes multiple line layers, wherein one line layer is disposed on the surface of the first side of the substrate, and the remaining line layers are embedded in the substrate, and the multiple line layers are connected by metal pillars. Alternatively, the second inner signal line layer may include a single-layer line layer disposed on the surface of the first side of the substrate.

7. The method for fabricating the heat-separated TMV packaging structure according to claim 5, characterized in that, The process of machining the first conductive metal post (140) on the first side of the substrate includes the following steps: The first conductive metal post (140) is attached to the first side of the substrate and located at the position corresponding to the second inner signal line layer; The first conductive metal pillar (140) and the second inner signal line layer are soldered together using solder (141).

8. The method for fabricating the heat-separated TMV packaging structure according to claim 5, characterized in that, The process of machining the first conductive metal post (140) on the first side of the substrate includes the following steps: A photosensitive masking film is processed on the first side of the substrate, and the photosensitive masking film is provided with an opening adapted to the first conductive metal post (140); The substrate is electroplated to form the first conductive metal pillar (140) in the window. Remove the photosensitive masking film.

9. A signal-thermal separation TMV packaging structure, characterized in that, It is prepared by the method of fabricating the heat-separated TMV packaging structure according to any one of claims 1 to 4, or by the method of fabricating the heat-separated TMV packaging structure according to any one of claims 5 to 8.

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