An irradiation resistant metal oxide semiconductor device and a method of making the same

Abstract

The present disclosure provides an anti-radiation metal oxide semiconductor device and a preparation method thereof, wherein the anti-radiation metal oxide semiconductor device comprises: an oxide buried layer, a middle portion of a lower surface of the oxide buried layer is etched and thinned to form a groove, a bottom of the groove, i.e. an etched and thinned portion of the oxide buried layer, is a first oxide buried layer, a side of the groove, i.e. an unetched portion of the oxide buried layer, is a second oxide buried layer, a metal oxide semiconductor device formed on an upper surface of the first oxide buried layer, a back plate formed in the groove and protruding from the groove, a substrate formed on a lower surface of the second oxide buried layer, and a redundant layer formed on a lower surface of the substrate. The anti-radiation metal oxide semiconductor device thins the oxide buried layer at a corresponding position of the metal oxide semiconductor device, and then sets a back plate at the thinned portion, so that the number of fixed charges generated by total dose radiation in the oxide buried layer is reduced, and the parameter drift of the metal oxide semiconductor device caused by total dose radiation is alleviated.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor devices, and more particularly to a radiation-resistant metal oxide semiconductor device and a method for its fabrication. Background Technology

[0002] As semiconductor manufacturing processes shrink to deep submicron and even nanoscale, the performance degradation caused by the short-channel effect in bulk silicon MOS (Metal-Oxide-Semiconductor) transistors has become difficult to correct. For semiconductor devices in radiated environments, the impact of radiation on device performance must be considered. Radiation effects include single-event effects (SEE) and total ionizing dose (TID). In radiated environments, the total ionizing dose effect leads to the generation of fixed positive charges in the insulating layer. These fixed positive charges often affect device parameters such as threshold voltage and leakage current. In SOI (Fully-Depleted Silicon On Insulator), insulating layers that may generate fixed positive charges include the gate oxide layer, interlayer dielectric isolation layer, and buried oxide (BOX) layer of MOS devices. Among these, the fixed charge in the BOX layer has the most significant impact on MOS devices. The TID effect causes the potential of the BOX layer to rise after a fixed charge is generated, which in turn lowers the threshold voltage of the MOS device. This lower threshold voltage leads to increased subthreshold leakage current, increased power consumption, and heat dissipation issues. These problems are particularly unacceptable in RF applications. While there are some reports on radiation hardening of partially depleted SOIs, methods such as adding an additional protective isolation layer to the top silicon film and bringing out the bulk region of the top silicon film are not suitable for solving the problems caused by the TID effect in FDSOIs.

[0003] Public content

[0004] In view of the above problems, this disclosure provides a radiation-resistant metal oxide semiconductor device and a method for fabricating the same.

[0005] According to a first aspect of this disclosure, a radiation-resistant metal-oxide-semiconductor device is provided, comprising:

[0006] The buried oxide layer is thinned by etching in the middle of the lower surface of the buried oxide layer to form a groove. The bottom of the groove, that is, the thinned part of the buried oxide layer, is the first buried oxide layer, and the side of the groove, that is, the unetched part of the buried oxide layer, is the second buried oxide layer.

[0007] A metal-oxide-semiconductor device is formed on the upper surface of the first buried oxide layer;

[0008] A back plate is formed within the aforementioned groove and protrudes from the aforementioned groove;

[0009] Substrate, formed on the lower surface of the second buried oxide layer; and

[0010] A redundant layer is formed on the lower surface of the aforementioned substrate.

[0011] Optionally, the thickness of the first buried oxide layer is less than 10 nm.

[0012] Optionally, the thickness and material of the backplate and the redundant layer are the same.

[0013] Optionally, the area of ​​the first buried oxide layer is larger than the contact area between the metal oxide semiconductor device and the first buried oxide layer.

[0014] The second aspect of this disclosure provides a method for fabricating a radiation-resistant metal-oxide-semiconductor device, applicable to the fabrication of the aforementioned radiation-resistant metal-oxide-semiconductor device, wherein a buried oxide layer is fabricated on a substrate of a wafer, and the method includes:

[0015] A metal oxide semiconductor device is fabricated in the middle of the upper surface of the aforementioned buried oxide layer;

[0016] Etching is performed from the middle of the lower surface of the substrate until the middle of the buried oxide layer is etched to meet the preset size conditions, forming a groove;

[0017] The backplate and redundant layer are generated in one step using the same method within the aforementioned groove and on the lower surface of the aforementioned substrate;

[0018] When the backplate protrudes from the groove, the fabrication of the radiation-resistant metal oxide semiconductor device is completed.

[0019] Optionally, after fabricating a metal-oxide-semiconductor device at the center of the upper surface of the buried oxide layer, the method further includes:

[0020] The substrate is thinned to a first preset size by etching the lower surface of the substrate.

[0021] Optionally, the first preset size is 400 micrometers.

[0022] Optionally, the above-mentioned preset size condition is less than 10 nanometers.

[0023] Optionally, the fabrication methods for the backplate and the redundant layer include either deposition doping or epitaxial doping.

[0024] Optionally, the impurities doped in the above-mentioned deposition doping and epitaxial doping are N-type or P-type impurities, with a doping concentration greater than 1 × 10⁻⁶. 18 cm -3 .

[0025] This disclosure provides a radiation-resistant metal-oxide-semiconductor (MOS) device and its fabrication method. The MOS device includes: a buried oxide layer, a groove formed by etching and thinning the lower surface of the buried oxide layer at its center; a first buried oxide layer at the bottom of the groove (the etched portion of the buried oxide layer); a second buried oxide layer at the side of the groove (the unetched portion of the buried oxide layer); a MOS device formed on the upper surface of the first buried oxide layer; a backplate formed within and protruding from the groove; a substrate formed on the lower surface of the second buried oxide layer; and a redundant layer formed on the lower surface of the substrate. By thinning the buried oxide layer at the corresponding location of the MOS device and then placing a backplate at the thinned area, the amount of fixed charge generated by total dose radiation in the buried oxide layer is reduced, i.e., the areal density of fixed charge in the buried oxide layer is reduced. Therefore, the parameter drift of the MOS device caused by total dose radiation is alleviated. Furthermore, placing a backplate at the thinned area can further alleviate the parameter drift caused by total dose radiation, thereby improving the radiation resistance of the MOS device. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of this disclosure or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments in this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 The schematic diagram illustrates a structural schematic of a radiation-resistant metal-oxide-semiconductor device according to an embodiment of the present disclosure;

[0028] Figure 2A and Figure 2B This illustration schematically shows a partial three-dimensional structural diagram of a radiation-resistant metal-oxide-semiconductor device according to an embodiment of the present disclosure;

[0029] Figure 3 The illustration shows a schematic flowchart of a method for fabricating a radiation-resistant metal-oxide-semiconductor device according to an embodiment of the present disclosure;

[0030] Figure 4 This illustration schematically shows a diagram of fabricating a metal oxide semiconductor device on the upper surface of a buried oxide layer according to an embodiment of the present disclosure;

[0031] Figure 5This schematic diagram illustrates an embodiment of the present disclosure of etching an oxide buried layer to meet preset size conditions;

[0032] Figure 6 This illustration schematically shows a diagram of the fabrication of a backplane and a redundant layer according to an embodiment of the present disclosure;

[0033] Figure 7 This schematically illustrates a completed fabrication diagram of a radiation-resistant metal-oxide-semiconductor device according to an embodiment of this disclosure; and

[0034] Figure 8A and Figure 8B The illustration shows a schematic diagram of a method for thinning a substrate of a radiation-resistant metal oxide semiconductor device according to an embodiment of the present disclosure.

[0035] Explanation of reference numerals in the attached figures:

[0036] 1 Metal-oxide-semiconductor device; 2 Buried oxide layer; 3 Substrate; 4 Backplane; 5 Redundancy layer; 21 First buried oxide layer; 22 Second buried oxide layer. Detailed Implementation

[0037] The embodiments of the present disclosure will now be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the disclosure. In the following detailed description, numerous specific details are set forth to provide a thorough understanding of the embodiments of the present disclosure for ease of explanation. However, it will be apparent that one or more embodiments may be practiced without these specific details. Furthermore, descriptions of well-known structures and techniques are omitted in the following description to avoid unnecessarily obscuring the concepts of the present disclosure.

[0038] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. The terms “comprising,” “including,” etc., as used herein indicate the presence of the stated features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0039] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein are to be interpreted in a manner consistent with the context of this specification, and not in an idealized or overly rigid way.

[0040] It should be noted that similar or identical parts are referred to by the same reference numerals in the accompanying drawings or description. Implementations not shown or described in the drawings are forms known to those skilled in the art. Furthermore, while this document provides examples of parameters containing specific values, it should be understood that the parameters need not be exactly equal to the corresponding values, but can approximate the corresponding values ​​within acceptable error tolerances or design constraints. Additionally, directional terms mentioned in the following embodiments, such as "up," "down," "front," "back," "left," "right," "inner," and "outer," are merely for reference to the directions in the accompanying drawings. Therefore, the directional terms used are for illustrative purposes and not for limiting the scope of this disclosure.

[0041] This disclosure provides a radiation-resistant metal-oxide-semiconductor (MOS) device and its fabrication method. The radiation-resistant MOS device includes: a buried oxide layer, the middle portion of which is etched and thinned to form a groove; the bottom of the groove, i.e., the thinned portion of the buried oxide layer, is a first buried oxide layer; the side portion of the groove, i.e., the unetched portion of the buried oxide layer, is a second buried oxide layer; a MOS device is formed on the upper surface of the first buried oxide layer; a backplate is formed within the groove and protrudes from the groove; a substrate is formed on the lower surface of the second buried oxide layer; and a redundant layer is formed on the lower surface of the substrate. By thinning the buried oxide layer at corresponding positions of the MOS device and then placing a backplate at the thinned area, the amount of fixed charge generated by total dose radiation in the buried oxide layer is reduced, i.e., the areal density of fixed charge in the buried oxide layer is reduced. Therefore, the parameter drift of the MOS device caused by total dose radiation is alleviated. Furthermore, placing a backplate at the thinned area can further alleviate the parameter drift caused by total dose radiation, thereby improving the radiation resistance of the radiation-resistant MOS device. Furthermore, the radiation hardening method provided in this disclosure can be applied to various radio frequency circuits using FDSOI (Fully-Depleted Silicon On Insulator) technology, such as low-noise amplifiers, radio frequency switches, phase shifters, etc.

[0042] Figure 1 The schematic diagram illustrates a structural schematic of a radiation-resistant metal oxide semiconductor device provided in an embodiment of the present disclosure. Figure 2A and Figure 2B The illustration shows a partial three-dimensional structural diagram of a radiation-resistant metal-oxide-semiconductor device according to an embodiment of the present disclosure.

[0043] It should be understood that Figure 1 and Figure 2A and Figure 2BThe radiation-resistant metal-oxide-semiconductor devices shown are merely exemplary to help those skilled in the art understand the solutions disclosed herein, and are not intended to limit the scope of protection of this disclosure. In other embodiments, the materials, dimensions, shapes, etc., of each layer in the above-described radiation-resistant metal-oxide-semiconductor devices can be selected according to actual conditions, and are not limited herein.

[0044] Please refer to this as well. Figure 1 , Figure 2A and Figure 2B In one embodiment of this disclosure, the above-mentioned radiation-resistant metal oxide semiconductor device includes: a buried oxide layer 2, a groove is formed by etching and thinning the middle part of the lower surface of the buried oxide layer 2, the bottom of the groove, i.e. the etched and thinned part of the buried oxide layer 2, is a first buried oxide layer 21, the side of the groove, i.e. the unetched part of the buried oxide layer 2, is a second buried oxide layer 22, a metal oxide semiconductor device 1 is formed on the upper surface of the first buried oxide layer 21, a backplate 4 is formed in the groove and protrudes from the groove, a substrate 3 is formed on the lower surface of the second buried oxide layer 22, and a redundant layer 5 is formed on the lower surface of the substrate 3.

[0045] In one embodiment of this disclosure, the thickness of the first buried oxide layer 21 is less than 10 nm.

[0046] refer to Figure 2A and Figure 2B In this embodiment, in order to alleviate the total dose radiation effect in the metal oxide semiconductor device 1, the buried oxide layer 2 on the back of the metal oxide semiconductor device 1 needs to be etched to thin it. The thinner the buried oxide layer 2 on the back of the metal oxide semiconductor device 1, the more obvious the mitigation effect of the total dose radiation effect. In this embodiment, the buried oxide layer 2 on the back of the metal oxide semiconductor device 1 needs to be etched to below 10 nanometers to meet both the thickness requirement and the process requirement.

[0047] refer to Figure 2A and Figure 2B The lower surface of the backplate 4 and the lower surface of the second buried oxide layer 22 are not on the same plane, and the lower surface of the backplate 4 is closer to the lower end of the entire radiation-resistant metal oxide semiconductor device. This arrangement can further alleviate the parameter drift caused by total dose radiation.

[0048] In one embodiment of this disclosure, the back plate 4 and the redundant layer 5 have the same thickness and material.

[0049] In this embodiment, the backplate 4 and the redundant layer 5 are generated at the same time. Therefore, the materials and thicknesses of the backplate 4 and the redundant layer 5 are the same. For example, the backplate 4 and the redundant layer 5 can be fabricated by deposition doping or epitaxial doping.

[0050] In one embodiment of this disclosure, the area of ​​the first buried oxide layer 21 is larger than the contact area between the metal oxide semiconductor device 1 and the first buried oxide layer 21.

[0051] refer to Figure 2A and Figure 2B The metal oxide semiconductor device 1 is located in the middle region of the buried oxide layer 2. The buried oxide layer 2 on the back side of the metal oxide semiconductor device 1 is etched and thinned. The area of ​​the etched and thinned buried oxide layer 2 is larger than the contact area between the metal oxide semiconductor device 1 and the buried oxide layer 2. By thinning the buried oxide layer, the surface density of the fixed charge in the buried oxide layer 2 is reduced. Furthermore, by controlling the area of ​​the first buried oxide layer 21 to be larger than the contact area between the metal oxide semiconductor device 1 and the first buried oxide layer 21, the surface density of the fixed charge in the buried oxide layer 2 can be further reduced, thereby further mitigating the parameter drift.

[0052] It should be noted that the above descriptions of the layer dimensions, etc., in the radiation-resistant metal-oxide-semiconductor device are merely exemplary to help those skilled in the art understand the solutions disclosed herein, and are not intended to limit the scope of protection of this disclosure. In other embodiments, the layer dimensions, etc., in the above-mentioned radiation-resistant metal-oxide-semiconductor device can be selected according to actual conditions, and are not limited here.

[0053] In this embodiment, by thinning the buried oxide layer in the corresponding region of the metal-oxide-semiconductor device (MOSS) and providing a backplate in the thinned region (i.e., the first buried oxide layer), the amount of fixed charge generated by total dose radiation in the thinned region is reduced, which is equivalent to a decrease in the areal density of fixed charge in the first buried oxide layer. Therefore, the parameter drift of the MOSS caused by total dose radiation is alleviated. Furthermore, providing a backplate in the thinned region can further alleviate the parameter drift caused by total dose radiation, achieving a better resistance to total dose radiation.

[0054] In addition, the redundant layer in the radiation-resistant metal-oxide-semiconductor device in this embodiment is located under the substrate, and the redundant layer does not have a significant impact on the electrical characteristics of the entire radiation-resistant metal-oxide-semiconductor device.

[0055] The following will describe, in conjunction with specific embodiments, Figure 1 , Figure 2A and Figure 2B The fabrication process of the radiation-resistant metal oxide semiconductor device is described in detail below. It should be understood that the following description is merely exemplary to help those skilled in the art better understand the solution disclosed herein, and is not intended to limit the scope of protection of this disclosure.

[0056] Figure 3This schematically illustrates a process flow diagram of a radiation-resistant metal-oxide-semiconductor device fabrication method according to an embodiment of the present disclosure. Figures 4-7 The illustration shows a schematic diagram of the fabrication process of a radiation-resistant metal oxide semiconductor device according to an embodiment of the present disclosure.

[0057] like Figure 3 As shown, in one embodiment of this disclosure, a buried oxide layer 2 is fabricated on the substrate 3 of the wafer, and the method for fabricating a radiation-resistant metal oxide semiconductor device provided in this disclosure includes operations S310-S340.

[0058] In operation S310, a metal oxide semiconductor device 1 is fabricated in the middle of the upper surface of the buried oxide layer 2.

[0059] like Figure 4 As shown, a metal oxide semiconductor device 1 is fabricated in the middle of the upper surface of the buried oxide layer 2 of the wafer. Here, the wafer includes the buried oxide layer 2 and the substrate 3, and the buried oxide layer 2 is fabricated on the lower surface of the substrate 3. Therefore, the metal oxide semiconductor device 1 can be fabricated directly on the upper surface of the buried oxide layer 2 of the wafer.

[0060] In operation S320, etching is performed from the middle of the lower surface of the substrate 3 until the middle of the buried oxide layer 2 is etched to meet the preset size conditions, forming a groove.

[0061] like Figure 5 As shown, the middle part of the lower surface of the substrate 3 is etched. After the middle part of the substrate 3 is completely etched away, the etching continues until the size of the remaining buried oxide layer 2 in the etched area meets the preset size condition. For example, the etching stops when the thickness of the remaining buried oxide layer 2 in the etched area is less than 10 nanometers, forming a groove. The bottom of the groove, which is the part that has been etched and thinned, is the first buried oxide layer 21, and the side of the groove, which is the part that has not been etched and thinned, is the second buried oxide layer 22.

[0062] In operation S330, the backplate 4 and the redundant layer 5 are generated once in the same way in the groove and on the lower surface of the substrate 3.

[0063] like Figure 6 As shown, the backplate 4 and the redundant layer 5 are fabricated using the same method. For example, deposition doping or epitaxial doping can be used to fabricate the backplate 4 and the redundant layer 5. During fabrication, the doped impurities can be N-type or P-type impurities, while controlling the doping concentration to be greater than 1 × 10⁻⁶. 18 cm -3 .

[0064] In operation S340, when the backplate 4 protrudes from the groove, the fabrication of the radiation-resistant metal oxide semiconductor device is completed.

[0065] like Figure 7 As shown, the fabrication is complete when the backplate 4 protrudes from the aforementioned groove. Controlling the thickness of the backplate 4 to meet the above conditions can better mitigate parameter drift caused by total dose radiation.

[0066] In one embodiment of this disclosure, the method for fabricating the radiation-resistant metal oxide semiconductor device further includes: etching the lower surface of the substrate 3 to thin the substrate 3 to a first preset size.

[0067] like Figure 8A and Figure 8B As shown, before etching the buried oxide layer 2, in order to better etch the buried oxide layer 2, it is necessary to first thin the substrate 3 on the lower surface of the buried oxide layer 2. This can be achieved by thinning the entire substrate 3, such as... Figure 8A As shown, alternatively, only the substrate 3 corresponding to the region of the buried oxide layer 2 that needs to be etched can be thinned, such as... Figure 8B As shown, regarding the specific dimensions of substrate 3 thinning, in this embodiment, substrate 3 is thinned to 400 micrometers.

[0068] It should be noted that the process methods, process parameters, dimensions and thicknesses of each layer shown in the above steps are merely illustrative examples, and the solutions of this disclosure are not limited thereto.

[0069] In summary, this disclosure provides a radiation-resistant metal-oxide-semiconductor (MOS) device and its fabrication method. This radiation-resistant MOS device achieves this by thinning the buried oxide layer on the back of the MOS device and placing a backplate at the thinned area. The reduced areal density of fixed charges in the thinned buried oxide layer alleviates parameter drift caused by total radiation dose. The backplate further mitigates parameter drift caused by total radiation dose, thus further improving the radiation resistance.

[0070] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of the methods according to various embodiments of this disclosure. It should also be noted that in some alternative implementations, the functions marked in the boxes may occur in a different order than that shown in the drawings. For example, two consecutively indicated boxes may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved.

[0071] Those skilled in the art will understand that the features described in the various embodiments and / or claims of this disclosure can be combined or combined in various ways, even if such combinations or combinations are not explicitly described in this disclosure. In particular, the features described in the various embodiments and / or claims of this disclosure can be combined or combined in various ways without departing from the spirit and teachings of this disclosure. All such combinations and / or combinations fall within the scope of this disclosure.

[0072] The embodiments of this disclosure have been described above. However, these embodiments are for illustrative purposes only and are not intended to limit the scope of this disclosure. Although this disclosure has been shown and described with reference to specific exemplary embodiments, those skilled in the art will understand that various changes in form and detail may be made to this disclosure without departing from the spirit and scope of this disclosure as defined by the appended claims and their equivalents. Therefore, the scope of this disclosure should not be limited to the above embodiments, but should be determined not only by the appended claims but also by their equivalents.

Claims

1. A radiation-resistant metal-oxide-semiconductor device, characterized in that, include: The buried oxide layer (2) is thinned by etching in the middle of the lower surface of the buried oxide layer (2) to form a groove. The bottom of the groove, that is, the thinned part of the buried oxide layer (2), is the first buried oxide layer (21). The side of the groove, that is, the unetched part of the buried oxide layer (2), is the second buried oxide layer (22). The area of ​​the first buried oxide layer (21) is larger than the contact area between the metal oxide semiconductor device (1) and the first buried oxide layer (21). A metal oxide semiconductor device (1) is formed on the upper surface of the first buried oxide layer (21); Back plate (4) is formed in the groove and protrudes from the groove; Substrate (3) is formed on the lower surface of the second buried oxide layer (22); and A redundant layer (5) is formed on the lower surface of the substrate (3).

2. The radiation-resistant metal-oxide-semiconductor device according to claim 1, characterized in that, The thickness of the first buried oxide layer (21) is less than 10 nm.

3. The radiation-resistant metal-oxide-semiconductor device according to claim 1, characterized in that, The backplate (4) and the redundant layer (5) have the same thickness and material.

4. A method for fabricating a radiation-resistant metal-oxide-semiconductor device, characterized in that, Suitable for the fabrication of radiation-resistant metal-oxide semiconductor devices as described in any one of claims 1-3, wherein a buried oxide layer (2) is fabricated on a substrate (3) of a wafer, the method comprising: A metal oxide semiconductor device (1) is fabricated in the middle of the upper surface of the buried oxide layer (2); Etching is performed from the middle of the lower surface of the substrate (3) until the middle of the buried oxide layer (2) is etched to meet the preset size conditions, forming a groove; The backplate (4) and the redundant layer (5) are generated in the same way in the groove and on the lower surface of the substrate (3). When the backplate (4) protrudes from the groove, the fabrication of the radiation-resistant metal oxide semiconductor device is completed.

5. The method for fabricating a radiation-resistant metal-oxide-semiconductor device according to claim 4, characterized in that, After fabricating the metal oxide semiconductor device (1) at the center of the upper surface of the buried oxide layer (2), the method further includes: The substrate (3) is thinned to a first preset size by etching from the lower surface of the substrate (3).

6. The method for fabricating a radiation-resistant metal-oxide-semiconductor device according to claim 5, characterized in that, The first preset size is 400 micrometers.

7. The method for fabricating a radiation-resistant metal-oxide-semiconductor device according to claim 4, characterized in that, The preset size condition is less than 10 nanometers.

8. The method for fabricating a radiation-resistant metal-oxide-semiconductor device according to claim 4, characterized in that, The backplate (4) and the redundant layer (5) are fabricated by either deposition doping or epitaxial doping.

9. The method for fabricating a radiation-resistant metal-oxide-semiconductor device according to claim 8, characterized in that, The impurities doped in the deposition doping and the epitaxial doping are N-type or P-type impurities, with a doping concentration greater than 1 × 10⁻⁶. 18 cm -3 .

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