Display panel and display device

Abstract

The present application provides a display panel and a display device. The display panel comprises: a substrate comprising a main display area, an assembly area and a peripheral area; an auxiliary display element located in the assembly area; an auxiliary pixel circuit located in the peripheral area and comprising an auxiliary thin film transistor and an auxiliary storage capacitor; a transparent connection line connecting the auxiliary display element to the auxiliary pixel circuit; and a first organic insulating layer and a second organic insulating layer stacked between the substrate and the auxiliary display element in the assembly area, wherein the first organic insulating layer is located between the transparent connection line and the auxiliary display element, and the refractive index of the first organic insulating layer is between the refractive index of the transparent connection line and the refractive index of the second organic insulating layer.

Description

[0001] Cross-references to related applications

[0002] This application claims priority and benefit to Korean Patent Application No. 10-2020-0106430, filed on August 24, 2020, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] One or more embodiments relate to a display panel and a display device including the display panel. Background Technology

[0004] The use of display devices has steadily become more diverse and expanded, while technological advancements have allowed display devices to become relatively thinner and lighter over time.

[0005] Because display devices are used in various ways, there are various methods for designing the shape of display devices, and in addition, the functions that can be combined with or linked to display devices have increased.

[0006] The information disclosed in this background section is only intended to enhance the understanding of the technical background, and therefore, the information discussed in this background section may not constitute prior art. Summary of the Invention

[0007] One or more embodiments relate to a display panel and a display device including the display panel, and for example, to a display panel having an extended display area so that images can be displayed even in areas where components as electronic elements are arranged, and to a display device including the display panel.

[0008] One or more embodiments include a display panel with an extended display area, thereby enabling the display of images even in areas where components, as electronic elements, are arranged, and relate to display devices including such a display panel. However, the above features are merely examples and therefore do not limit the scope of the embodiments according to this disclosure.

[0009] Additional aspects will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of embodiments of this disclosure.

[0010] According to some embodiments of this disclosure, a display panel includes: a substrate including a main display area, a component area, and a peripheral area; an auxiliary display element disposed in the component area; an auxiliary pixel circuit disposed in the peripheral area and including an auxiliary thin-film transistor and an auxiliary storage capacitor; a transparent connecting line connecting the auxiliary display element to the auxiliary pixel circuit; and a first organic insulating layer and a second organic insulating layer stacked in the component area between the substrate and the auxiliary display element, wherein the first organic insulating layer is disposed between the transparent connecting line and the auxiliary display element, and the refractive index of the first organic insulating layer has a value between the refractive index of the transparent connecting line and the refractive index of the second organic insulating layer.

[0011] According to some embodiments, the difference between the refractive index of the transparent connecting wire and the refractive index of the first organic insulating layer can be 0.45 or less.

[0012] According to some embodiments, the refractive index of the first organic insulating layer can be greater than the refractive index of the second organic insulating layer.

[0013] According to some embodiments, the first organic insulating layer may include a photosensitive polyimide, and the second organic insulating layer may include a siloxane resin.

[0014] According to some embodiments, the display panel may further include metal connecting lines that connect transparent connecting lines and auxiliary pixel circuits to each other. The metal connecting lines and transparent connecting lines may be arranged on the same layer.

[0015] According to some embodiments, the display panel may further include metal interconnects connecting the transparent interconnects and auxiliary pixel circuitry to each other. The metal interconnects and the upper electrode of the auxiliary storage capacitor may be arranged on the same layer.

[0016] According to some embodiments, the display panel may further include an inorganic insulating layer disposed on a substrate. The inorganic insulating layer may include holes or recesses corresponding to component areas.

[0017] According to some embodiments, transparent connecting wires can be disposed inside holes or grooves in the inorganic insulating layer. A first organic insulating layer can fill the holes or grooves in the inorganic insulating layer and can be disposed over the entire surface of the substrate.

[0018] According to some embodiments, the first organic insulating layer may be disposed inside the holes or grooves of the inorganic insulating layer, and the thickness of the first organic insulating layer may be less than the depth of the holes or grooves of the inorganic insulating layer.

[0019] According to some embodiments, the second organic insulating layer can fill the holes or grooves of the inorganic insulating layer, and the transparent connecting wire can be arranged on the second organic insulating layer.

[0020] According to some embodiments, the display panel may further include a thin-film encapsulation layer disposed above the auxiliary display element, wherein a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer are stacked in the thin-film encapsulation layer.

[0021] According to some embodiments, the display panel may further include a first additional inorganic encapsulation layer located between the first inorganic encapsulation layer and the organic encapsulation layer. The refractive index of the first additional inorganic encapsulation layer may have a value between the refractive index of the first inorganic encapsulation layer and the refractive index of the organic encapsulation layer.

[0022] According to some embodiments, the display panel may further include: a buffer layer disposed between a substrate and an auxiliary thin-film transistor; and a compensation layer disposed between the substrate and the buffer layer. The buffer layer may include silicon nitride, and the compensation layer may include silicon oxynitride.

[0023] According to some embodiments, the display panel may also include an anti-reflective film disposed on the lower surface of the substrate.

[0024] According to some embodiments of this disclosure, a display device includes: a display panel including a main display area, a component area, and a peripheral area, the main display area including a plurality of main sub-pixels, and the component area including a plurality of auxiliary sub-pixels; and a component arranged below the display panel corresponding to the component area, wherein the display panel includes: a substrate; an auxiliary display element disposed on the substrate in the component area; an auxiliary pixel circuit disposed on the substrate in the peripheral area, and including an auxiliary thin-film transistor and an auxiliary storage capacitor; a transparent connecting line connecting the auxiliary display element and the auxiliary pixel circuit to each other; and a first organic insulating layer and a second organic insulating layer stacked in the component area between the substrate and the auxiliary display element, wherein the first organic insulating layer is disposed between the transparent connecting line and the auxiliary display element, and the refractive index of the first organic insulating layer has a value between the refractive index of the transparent connecting line and the refractive index of the second organic insulating layer.

[0025] According to some embodiments, the difference between the refractive index of the transparent connecting wire and the refractive index of the first organic insulating layer can be 0.45 or less.

[0026] According to some embodiments, the refractive index of the first organic insulating layer can be greater than the refractive index of the second organic insulating layer.

[0027] According to some embodiments, the first organic insulating layer may include a photosensitive polyimide, and the second organic insulating layer may include a siloxane resin.

[0028] According to some embodiments, the display device may further include an inorganic insulating layer disposed on a substrate. The inorganic insulating layer may include holes or grooves corresponding to component regions.

[0029] According to some embodiments, the component may include an image picking device. Attached Figure Description

[0030] The above and other aspects, features and characteristics of some embodiments of the present disclosure will become more apparent from the following description taken in conjunction with the accompanying drawings, in which:

[0031] Figure 1 This is a schematic perspective view of a display device according to some embodiments;

[0032] Figure 2A This is a schematic cross-sectional view of a portion of a display device according to some embodiments;

[0033] Figure 2B This is a schematic cross-sectional view of a portion of a display device according to some embodiments;

[0034] Figure 3A and Figure 3B This is an illustrative representation of what may be included according to some embodiments. Figure 1 A plan view of the display panel in the display device;

[0035] Figure 4 This schematically illustrates a cross-sectional view of a portion of a display panel according to some embodiments;

[0036] Figure 5 This schematically illustrates a cross-sectional view of a portion of a display panel according to some embodiments;

[0037] Figure 6 This schematically illustrates a cross-sectional view of a portion of a display panel according to some embodiments;

[0038] Figure 7 This schematically illustrates a cross-sectional view of a portion of a display panel according to some embodiments;

[0039] Figure 8 This schematically illustrates a cross-sectional view of a portion of a display panel according to some embodiments;

[0040] Figure 9 This schematically illustrates a cross-sectional view of a portion of a display panel according to some embodiments;

[0041] Figure 10 This schematically illustrates a cross-sectional view of a portion of a display panel according to some embodiments;

[0042] Figure 11 This schematically illustrates a cross-sectional view of a portion of a display panel according to some embodiments; and

[0043] Figure 12This is a schematic cross-sectional view of a portion of a display panel according to some embodiments. Detailed Implementation

[0044] Reference will now be made in more detail to aspects of some embodiments illustrated in the accompanying drawings, wherein the same reference numerals refer to the same elements throughout this disclosure. In this respect, the embodiments may take different forms and should not be construed as limited to the description set forth herein. Therefore, embodiments are described below only by reference to the accompanying drawings to explain aspects of this disclosure. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items. Throughout this disclosure, the expression “at least one of a, b, and c” indicates only a, only b, only c, both a and b, both a and c, both b and c, all a, b, and c, or any variation thereof.

[0045] Because this disclosure has various modified embodiments, embodiments are shown in the accompanying drawings and described with respect to the embodiments. The effects and characteristics of the embodiments according to this disclosure, as well as the methods of implementing them, will be apparent from the embodiments described with reference to the accompanying drawings. However, this disclosure can be implemented in many different forms and structures, and this disclosure should not be construed as limited to the embodiments set forth herein.

[0046] One or more embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. Components that are identical or corresponding to each other are given the same reference numerals and are independent of the drawing numbers, and redundant descriptions are omitted.

[0047] It will be understood that when a layer, region, or element is referred to as being "formed" "on" another layer, region, or element, it can be formed directly or indirectly on that other layer, region, or element. That is, for example, there can be one or more intervening layers, regions, or elements between them. For ease of illustration, the dimensions of the elements in the figures may be exaggerated. In other words, because the dimensions and thicknesses of the elements in the figures are arbitrarily shown for ease of illustration, the following embodiments are not limited thereto.

[0048] In the examples below, the x-axis, y-axis, and z-axis are not limited to the three axes of a Cartesian coordinate system and can be interpreted in a broader sense. For example, the x-axis, y-axis, and z-axis can be perpendicular to each other, or they can represent different directions that are not perpendicular to each other.

[0049] Figure 1 This is a schematic perspective view of a display device 1 according to some embodiments.

[0050] Reference Figure 1The display device 1 may include a display area DA and a peripheral area DPA located outside the display area DA. The display area DA may include a component area CA and a main display area MDA that at least partially surrounds the component area CA. In other words, both the component area CA and the main display area MDA may display images individually or together. The peripheral area DPA may be a non-display area (e.g., a border area) in which no display elements are arranged. The display area DA may be completely surrounded by the peripheral area DPA.

[0051] Figure 1 A component region CA is shown located within the main display area MDA. According to some embodiments, the display device 1 may include two or more component regions CA, and the shapes and sizes of the multiple component regions CA may differ from each other. When viewed from a direction substantially perpendicular to the upper surface of the display device 1 (e.g., when viewed in a plan view or when viewed in a direction orthogonal to a plane of the display surface), the component region CA can have various shapes, such as circles, ellipses, polygons such as squares, stars, or rhombuses. That is, the shape of the component region CA can be varied and can have any suitable shape depending on the design of the display device 1. Figure 1 In the display device 1, when viewed from a direction substantially perpendicular to the upper surface, the component region CA is arranged in the upper center (in the +y direction) of the main display area MDA, which has a substantially rectangular shape. However, the component region CA may be arranged on one side of the main display area MDA, which has a substantially rectangular shape, for example, on the upper right or upper left side.

[0052] Display device 1 can display images using multiple main sub-pixels Pm arranged in the main display area MDA and multiple auxiliary sub-pixels Pa arranged in the component area CA.

[0053] As will be referred to below Figure 2A and Figure 2BIn more detail, component 40, as an electronic element, may be arranged below display panel 10 corresponding to component region CA. Component 40 may include a camera using infrared or visible light and may include an image acquisition device. In some embodiments, component 40 may include a solar cell, a flash, an illuminance sensor, a proximity sensor, and an iris sensor. In some embodiments, component 40 may have the function of receiving sound. To minimize limitations on the functionality of component 40, component region CA may include a transmission region TA, through which light and / or sound output from component 40 to the outside or traveling from the outside toward component 40 may pass. That is, component region CA may include a transmission region TA configured to allow signals such as light, sound, or other wireless spectrum (e.g., from inside display device 1 or from external devices) to be transmitted through transmission region TA. In the case of display panel 10 and display device 1 including display panel 10 according to some embodiments, when light is transmitted through component region CA, the transmittance may be approximately 10% or greater, for example, 40% or greater, 25% or greater, 50% or greater, 85% or greater, or 90% or greater.

[0054] Multiple auxiliary subpixels Pa can be arranged in the component region CA. Each of the multiple auxiliary subpixels Pa can emit light to display an image. The image displayed in the component region CA can be an auxiliary image and can have a lower resolution than the image displayed in the main display region MDA. In other words, the component region CA can include a transmissive region TA through which light and sound can pass, and when no subpixels are arranged in the transmissive region TA, the number of auxiliary subpixels Pa that can be arranged per unit area in the component region CA can be less than the number of main subpixels Pm arranged per unit area in the main display region MDA.

[0055] Figure 2A and Figure 2B This is a schematic cross-sectional view of a portion of a display device 1 according to some embodiments.

[0056] Reference Figure 2A The display device 1 may include a display panel 10 and a component 40 overlapping the display panel 10. A cover window may be further arranged on the display panel 10 to protect the display panel 10 (e.g., from external impacts).

[0057] The display panel 10 may include a component area CA that overlaps with the component 40 and a main display area MDA in which the main image is displayed. The display panel 10 may include a substrate 100, a display layer DISL, a touch screen layer TSL, an optical functional layer OFL, and a panel protection member PB disposed below the substrate 100.

[0058] The display layer DISL may include: a circuit layer PCL, including thin-film transistors TFTm and TFTa; a display element layer EDL, including light-emitting elements EDm and EDA as display elements; and an encapsulation component ENCM, such as a thin-film encapsulation layer TFEL or an encapsulation substrate. An insulating layer IL may be disposed within the display layer DISL, and an insulating layer IL' may be disposed between the substrate 100 and the display layer DISL.

[0059] The substrate 100 may include an insulating material such as glass, quartz, or polymer resin. The substrate 100 may be a rigid substrate or a flexible substrate that is bendable, foldable, or rollable.

[0060] The main pixel circuit PCm and the main light-emitting element EDm connected thereto can be arranged in the main display area MDA of the display panel 10. The main pixel circuit PCm may include at least one thin-film transistor TFTm and can control the emission of the main light-emitting element EDm. The main sub-pixel Pm can be realized by the emission of the main light-emitting element EDm.

[0061] The auxiliary light-emitting element EDA can be arranged in the component area CA of the display panel 10 to realize the auxiliary sub-pixel Pa. According to some embodiments, the auxiliary pixel circuit PCa for driving the auxiliary light-emitting element EDA may not be arranged in the component area CA, but may be arranged in the peripheral area DPA, which is a non-display area. According to some embodiments, the auxiliary pixel circuit PCa may be arranged in a portion of the main display area MDA or between the main display area MDA and the component area CA, and various modifications can be made. In other words, the auxiliary pixel circuit PCa can be arranged so that it does not overlap with the auxiliary light-emitting element EDA.

[0062] The auxiliary pixel circuit PCa may include at least one thin-film transistor TFTa and may be electrically connected to the auxiliary light-emitting element EDA via a transparent connecting line TWL. The transparent connecting line TWL may include a transparent conductive material. The auxiliary pixel circuit PCa may control the emission of the auxiliary light-emitting element EDA. The auxiliary sub-pixel Pa may be realized by the emission of the auxiliary light-emitting element EDA. The area in the component region CA where the auxiliary light-emitting element EDA is disposed may be referred to as the auxiliary display region ADA.

[0063] Additionally, the area in the component region CA where the auxiliary light-emitting element EDA, which is not arranged as a display element, can be referred to as the transmission region TA. The transmission region TA can be a region through which light / signal emitted from the component 40 corresponding to the component region CA or incident on the component 40 can be transmitted. The auxiliary display region ADA and the transmission region TA can be arranged alternately in the component region CA. The transparent connecting line TWL connecting the auxiliary pixel circuit PCa to the auxiliary light-emitting element EDA can be arranged in the transmission region TA. Because the transparent connecting line TWL can include a transparent conductive material with high transmittance, the transmittance of the transmission region TA can still be ensured even if the transparent connecting line TWL is arranged in the transmission region TA.

[0064] According to some embodiments, since the auxiliary pixel circuit PCa is not arranged in the component region CA, the area of ​​the transmission region TA can be ensured, and therefore, the transmittance can be further improved.

[0065] The display element layer (EDL) can be covered by a thin-film encapsulation layer (TFEL) or an encapsulation substrate. For example... Figure 2A and Figure 2B As shown, in some embodiments, the thin-film encapsulation layer TFEL may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. According to some embodiments, the thin-film encapsulation layer TFEL may include a first inorganic encapsulation layer 131 and a second inorganic encapsulation layer 133, and an organic encapsulation layer 132 located therebetween.

[0066] Each of the first inorganic encapsulation layer 131 and the second inorganic encapsulation layer 133 may include materials such as silicon oxide (SiO2) and silicon nitride (SiN). x ), silicon oxynitride (SiO) x N y Aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), or zinc oxide (ZnO) x It can be one or more inorganic insulating materials such as ZnO and / or ZnO2, and can be formed by chemical vapor deposition (CVD) or the like. The organic encapsulation layer 132 can include polymer-based materials. Polymer materials can include silicone-based resins, acrylic-based resins, epoxy-based resins, polyimides, and polyethylene, etc.

[0067] The first inorganic encapsulation layer 131, the organic encapsulation layer 132, and the second inorganic encapsulation layer 133 can be integrally formed to cover the main display area MDA and the component area CA.

[0068] When the display element layer EDL is sealed with a packaging substrate, the packaging substrate can be arranged facing the substrate 100, with the display element layer EDL located between them. A gap can exist between the packaging substrate and the display element layer EDL. The packaging substrate may include glass. A sealant including glass frit can be disposed between the substrate 100 and the packaging substrate, and the sealant can be disposed in the aforementioned peripheral region DPA. The sealant disposed in the peripheral region DPA can surround the display area DA (see...). Figure 1 ), and prevent moisture from penetrating through the sides.

[0069] The Touch Screen Layer (TSL) can obtain coordinate information based on external inputs such as touch events. The TSL can include touch electrodes and touch lines connected to them. The TSL can detect external input using self-capacitance or mutual capacitance methods.

[0070] The touch screen layer (TSL) can be formed on the thin-film encapsulation layer (TFEL). In some embodiments, the touch screen layer (TSL) can be formed separately on the touch substrate and then bonded to the thin-film encapsulation layer (TFEL) via an adhesive layer such as an optically clear adhesive (OCA). According to some embodiments, the touch screen layer (TSL) can be formed directly on the thin-film encapsulation layer (TFEL), and in this case, the adhesive layer may not be disposed between the touch screen layer (TSL) and the thin-film encapsulation layer (TFEL).

[0071] The optical functional layer OFL may include an anti-reflective layer. The anti-reflective layer can reduce the reflectivity of light (external light) incident from the outside toward the display device 1.

[0072] In some embodiments, the optical functional layer OFL can be a polarizing film. The optical functional layer OFL may include an opening OFL_OP corresponding to the transmission region TA. Therefore, the transmittance of the transmission region TA can be significantly improved. A transparent material such as optically transparent resin (OCR) can be filled in the opening OFL_OP.

[0073] In some embodiments, the optical functional layer OFL can be provided as a color filter plate including a black matrix and color filters.

[0074] The panel protection member PB can be attached to the lower part of the substrate 100 and can support and protect the substrate 100. The panel protection member PB can have an opening PB_OP corresponding to the component area CA. Therefore, the light transmittance of the component area CA can be improved. The panel protection member PB can include polyethylene terephthalate (PET) or polyimide (PI).

[0075] The area of ​​the component region CA can be larger than the area in which the component 40 is arranged. Therefore, the area of ​​the opening PB_OP provided in the panel protection member PB may not match the area of ​​the component region CA.

[0076] Additionally, multiple components 40 can be arranged in the component area CA. These multiple components 40 can have different functions. For example, the multiple components 40 may include at least two of a camera (image acquisition device), a solar cell, a flash, an illuminance sensor, a proximity sensor, and an iris sensor.

[0077] exist Figure 2A In the middle, the bottom metal layer BML (see Figure 2B The auxiliary light-emitting device EDA is not arranged below the component area CA, but as... Figure 2B As shown, the display device 1 according to some embodiments may include a bottom metal layer (BML).

[0078] exist Figure 2B In this configuration, a bottom metal layer (BML) can be disposed between the substrate 100 and the auxiliary light-emitting device (EDa), thereby overlapping with the auxiliary light-emitting device (EDa). The bottom metal layer (BML) can block external light from reaching the auxiliary light-emitting device (EDa). Simultaneously, the bottom metal layer (BML) can be formed corresponding to the entire component region CA and can include a lower aperture corresponding to the transmission region TA. In this case, the lower aperture can be provided in various shapes such as polygons, circles, or amorphous shapes, and the diffraction characteristics of external light can be adjusted.

[0079] Figure 3A and Figure 3B This is an illustrative representation of what may be included according to some embodiments. Figure 1 A plan view of the display panel 10 in the display device 1.

[0080] Reference Figure 3A Various components of the display panel 10 can be arranged on the substrate 100. The substrate 100 may include a display area DA and a peripheral area DPA surrounding the display area DA. The display area DA may include a main display area MDA and a component area CA, where a main image is displayed. The component area CA has a transmissive area TA and can display an auxiliary image. The auxiliary image can form a complete image together with the main image, and the auxiliary image can be an image independent of the main image. That is, according to the display device 1 (see...), Figure 1According to the design and purpose of this disclosure, the main display area MDA and the component area CA can jointly display corresponding portions of a single image, or they can be configured to display images that are separate from or independent of each other. In this disclosure, the description of elements such as pixels, circuits, or lines being disposed in a certain area (e.g., display area DA, peripheral area DPA, main display area MDA, component area CA) indicates that the elements are disposed on the substrate 100 within the range corresponding to that area.

[0081] Multiple primary sub-pixels Pm can be arranged in the main display area MDA. Each of the primary sub-pixels Pm can be implemented as a display element such as an organic light-emitting diode (OLED). Primary pixel circuits PCm driving the primary sub-pixels Pm can be arranged in the main display area MDA, and the primary pixel circuits PCm can be arranged to overlap with the primary sub-pixels Pm. For example, each primary sub-pixel Pm can emit one of red, green, blue, and white light. The main display area MDA can be covered by encapsulation components and protected from the effects of ambient air or moisture.

[0082] As described above, the component region CA can be located on one side of the main display region MDA, or it can be arranged inside the display region DA and surrounded by the main display region MDA. Multiple auxiliary sub-pixels Pa can be arranged in the component region CA. Each of the multiple auxiliary sub-pixels Pa can be implemented by a display element such as an organic light-emitting diode (OLED). The auxiliary pixel circuit PCa driving the auxiliary sub-pixels Pa can be arranged in the peripheral region DPA near the component region CA. For example, when the component region CA is arranged above the display region DA, the auxiliary pixel circuit PCa can be arranged above the peripheral region DPA. The auxiliary pixel circuit PCa and the display element implementing the auxiliary sub-pixels Pa can be connected by a transparent connecting line TWL extending in the y-direction (see [link to documentation]). Figure 3B They are connected to each other.

[0083] For example, each auxiliary subpixel Pa can emit one of red, green, blue, or white light. The component area CA can be covered by an encapsulation component and protected from ambient air, moisture, or other contaminants.

[0084] Simultaneously, the component region CA may have a transmission region TA. The transmission region TA may be arranged to surround multiple auxiliary sub-pixels Pa. In some embodiments, the transmission region TA may have multiple auxiliary sub-pixels Pa arranged in a grid shape.

[0085] Because the component area CA has a transmissive area TA, the resolution of the component area CA may be lower than the resolution of the main display area MDA. For example, the resolution of the component area CA may be approximately 1 / 2, 3 / 8, 1 / 3, 1 / 4, 2 / 9, 1 / 8, 1 / 9, or 1 / 16 of the resolution of the main display area MDA. For example, the resolution of the main display area MDA may be approximately 400 ppi or greater, and the resolution of the component area CA may be approximately 200 ppi or approximately 100 ppi.

[0086] The pixel circuits driving the main sub-pixel Pm and the auxiliary sub-pixel Pa can be electrically connected to the external circuits arranged in the peripheral area DPA. The first scan drive circuit SDRV1, the second scan drive circuit SDRV2, the terminal part PAD, the drive voltage supply line 11, and the common voltage supply line 13 can be arranged in the peripheral area DPA.

[0087] The first scan drive circuit SDRV1 can apply scan signals to each of the main pixel circuits PCm driving the main sub-pixel Pm via the main scan line SL. The first scan drive circuit SDRV1 can apply emission control signals to each pixel circuit via the main emission control line EL. The second scan drive circuit SDRV2 can be located on the opposite side of the first scan drive circuit SDRV1 relative to the main display area MDA, and can be approximately parallel to the first scan drive circuit SDRV1. Some of the main pixel circuits PCm of the main sub-pixel Pm in the main display area MDA can be electrically connected to the first scan drive circuit SDRV1, and other main pixel circuits PCm can be electrically connected to the second scan drive circuit SDRV2.

[0088] The terminal portion PAD can be disposed on one side of the substrate 100. The terminal portion PAD can be exposed without being covered by the insulating layer and can be connected to the display circuit board 30. The display driver 32 can be disposed on the display circuit board 30.

[0089] The display driver 32 can generate control signals that will be transmitted to the first scan drive circuit SDRV1 and the second scan drive circuit SDRV2. The display driver 32 can generate data signals, and the generated data signals can be transmitted to the main pixel circuit PCm via the fan-out line FW and the main data line DL connected to the fan-out line FW.

[0090] The display driver 32 can apply a driving voltage to the driving voltage supply line 11 and a common voltage to the common voltage supply line 13. The driving voltage can be applied to the pixel circuits PCm and PCa of the main sub-pixel Pm and the auxiliary sub-pixel Pa via the driving voltage line PL connected to the driving voltage supply line 11, and the common voltage can be connected to the common voltage supply line 13 and applied to the opposite electrode of the display element.

[0091] The driving voltage supply line 11 can extend in the x direction from the underside of the main display area MDA. The common voltage supply line 13 can have a loop shape with one side open and can partially surround the main display area MDA.

[0092] Figure 3A The illustration shows a scenario with one component region CA. However, multiple component regions CA can be provided. In this case, the multiple component regions CA can be spaced apart from each other, a first camera can be arranged corresponding to one component region CA, and a second camera can be arranged corresponding to another component region CA. In some embodiments, cameras can be arranged corresponding to one component region CA, and one or more other sensors or transmitters (e.g., infrared sensors) can be arranged corresponding to other component regions CA. The shapes and sizes of the multiple component regions CA can differ from each other.

[0093] Meanwhile, the component area CA can have a circular, elliptical, polygonal, or irregular shape. In some embodiments, the component area CA can have an octagonal shape. The component area CA can be provided as various polygons such as squares or hexagons. The component area CA can be surrounded by the main display area MDA.

[0094] exist Figure 3A In this embodiment, the auxiliary pixel circuit PCa is arranged adjacent to the outer side of the component region CA, but this disclosure is not limited thereto. Figure 3B As shown, the auxiliary pixel circuit PCa can be arranged adjacent to the outer side of the main display area MDA. In some embodiments, a transparent interconnect TWL can be connected to the auxiliary pixel circuit PCa via a metal interconnect TWL'. In this case, the transparent interconnect TWL can be arranged in the component area CA, and the metal interconnect TWL' can be arranged in the peripheral area DPA. The transparent interconnect TWL may include a transparent conductive material, and the metal interconnect TWL' may include a highly conductive metal. In some embodiments, the metal interconnect TWL' and the transparent interconnect TWL can be arranged on the same layer. According to some embodiments, the metal interconnect TWL' and the transparent interconnect TWL can be arranged on different layers and connected to each other via contact holes.

[0095] Figure 4 This schematically shows a cross-sectional view of a portion of a display panel 10 according to some embodiments.

[0096] Reference Figure 4The main sub-pixel Pm is arranged in the main display area MDA, and the component area CA includes auxiliary sub-pixels Pa and a transmissive area TA. In the main display area MDA, a main pixel circuit PCm, including a main thin-film transistor (TFT) and a main storage capacitor Cst, and a main organic light-emitting diode (OLED) connected to the main pixel circuit PCm as the main display element can be arranged. An auxiliary OLED' can be arranged as an auxiliary display element in the component area CA. An auxiliary pixel circuit PCa, including an auxiliary thin-film transistor (TFT) and an auxiliary storage capacitor Cst', can be arranged in the peripheral area DPA. Simultaneously, transparent interconnect lines TWL connecting the auxiliary pixel circuit PCa and the auxiliary OLED' can be arranged in the component area CA and the peripheral area DPA.

[0097] In the component region CA, a first organic insulating layer 116 and a second organic insulating layer 117 may be stacked between the substrate 100 and the auxiliary organic light-emitting diode OLED', and the first organic insulating layer 116 may be disposed on the transparent interconnect line TWL.

[0098] According to some embodiments, the refractive index (n1) of the first organic insulating layer 116 may have a value between the refractive index (n0) of the transparent connecting wire TWL and the refractive index (n2) of the second organic insulating layer 117. For example, the refractive index (n1) of the first organic insulating layer 116 may be greater than the refractive index (n2) of the second organic insulating layer 117 and less than the refractive index (n0) of the transparent connecting wire TWL (n0>n1>n2).

[0099] In some embodiments, for a wavelength of 550 nm, the refractive index (n0) of the transparent interconnect TWL can be provided to be from about 1.9 to about 2.1. For a wavelength of 550 nm, the refractive index (n1) of the first organic insulating layer 116 can be provided to be from about 1.6 to about 1.9. The refractive index (n2) of the second organic insulating layer 117 can be provided to be from about 1.4 to about 1.6. In some embodiments, the difference between the refractive index (n0) of the transparent interconnect TWL and the refractive index (n1) of the first organic insulating layer 116 can be about 0.45 or less.

[0100] In some embodiments, the light transmittance of the second organic insulating layer 117 may be greater than that of the first organic insulating layer 116. In some embodiments, the flatness of the upper surface of the second organic insulating layer 117 may be relatively better than the flatness of the upper surface of the first organic insulating layer 116. That is, the upper surface of the second organic insulating layer 117 may be flatter than the upper surface of the first organic insulating layer 116.

[0101] As the difference in refractive index between the transparent interconnect TWL and the insulating layer disposed thereon increases, the intensity of light diffraction caused by the transparent interconnect TWL may increase. According to some embodiments, by selecting a material with a small difference between the refractive index (n1) of the first organic insulating layer 116 disposed on the transparent interconnect TWL and the refractive index (n0) of the transparent interconnect TWL, the aforementioned light diffraction phenomenon can be minimized or relatively reduced. Furthermore, when only the first organic insulating layer 116 is present in the component region CA, transmittance and flatness may decrease. Therefore, a second organic insulating layer 117 with relatively better transmittance and flatness compared to the first organic insulating layer 116 can be used, thereby minimizing or relatively reducing light diffraction and relatively improving transmittance and flatness.

[0102] In some embodiments, an inorganic insulating layer may be formed between the transparent interconnect TWL and the first organic insulating layer 116. Typically, the inorganic insulating layer is formed to be thinner than the organic insulating layer and does not affect the optical path; therefore, the light diffraction caused by the inorganic insulating layer can be negligible.

[0103] Meanwhile, according to some embodiments, organic light-emitting diodes are used as display elements, but according to some embodiments, inorganic light-emitting devices or quantum dot light-emitting devices can be used as display elements.

[0104] The structure of the component stack included in the display panel 10 will be described below. The display panel 10 may be provided by a stacked substrate 100, a buffer layer 111, a circuit layer PCL, and a display element layer EDL.

[0105] The substrate 100 may include an insulating material such as glass, quartz, or polymer resin. The substrate 100 may be a rigid substrate or a flexible substrate that is bendable, foldable, or rollable.

[0106] A buffer layer 111 may be located on the substrate 100 to reduce or block the penetration of foreign substances, moisture, or ambient air from the lower part of the substrate 100, and may provide a flat surface on the substrate 100. The buffer layer 111 may comprise inorganic materials such as oxides or nitrides, organic materials, or organic-inorganic composites, and may comprise a single layer or multiple layers of inorganic and organic materials. A barrier layer that blocks the penetration of ambient air may be further included between the substrate 100 and the buffer layer 111. In some embodiments, the buffer layer 111 may comprise silicon oxide (SiO2) or silicon nitride (SiN). x ).

[0107] The circuit layer PCL can be disposed on the buffer layer 111 and can include a main pixel circuit PCm and an auxiliary pixel circuit PCa, a first gate insulating layer 112, a second gate insulating layer 113, an interlayer insulating layer 115, a first organic insulating layer 116, and a second organic insulating layer 117. The main pixel circuit PCm can include a main thin-film transistor TFT and a main storage capacitor Cst, and the auxiliary pixel circuit PCa can include an auxiliary thin-film transistor TFT' and an auxiliary storage capacitor Cst'.

[0108] The main thin-film transistor (TFT) and the auxiliary thin-film transistor (TFT') can be disposed on the buffer layer 111. The main thin-film transistor (TFT) may include a first semiconductor layer A1, a first gate electrode G1, a first source electrode S1, and a first drain electrode D1. The main thin-film transistor (TFT) can be connected to the main organic light-emitting diode (OLED) to drive the OLED. The auxiliary thin-film transistor (TFT') can be connected to the auxiliary organic light-emitting diode (OLED') to drive the OLED. The auxiliary thin-film transistor (TFT') has a structure similar to that of the main thin-film transistor (TFT), and therefore, instead of describing the auxiliary thin-film transistor (TFT'), only the description of the main thin-film transistor (TFT) will be given.

[0109] The first semiconductor layer A1 may be disposed on the buffer layer 111 and may comprise polycrystalline silicon. According to some embodiments, the first semiconductor layer A1 may comprise amorphous silicon. According to some embodiments, the first semiconductor layer A1 may comprise an oxide selected from at least one of the following: indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (Ti), and zinc (Zn). The first semiconductor layer A1 may comprise a channel region and impurity-doped source and drain regions.

[0110] The first gate insulating layer 112 may be provided to cover the first semiconductor layer A1. The first gate insulating layer 112 may include materials such as silicon oxide (SiO2) and silicon nitride (SiN). x ), silicon oxynitride (SiO) x N y Aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2), or zinc oxide (ZnO) x It can be an inorganic insulating material (ZnO and / or ZnO2). The first gate insulating layer 112 may include a single layer or multiple layers containing the inorganic insulating material described above.

[0111] The first gate electrode G1 can be disposed on the first gate insulating layer 112 to overlap with the first semiconductor layer A1. The first gate electrode G1 may include molybdenum (Mo), aluminum (Al), copper (Cu), and titanium (Ti), and may include a single layer or multiple layers. For example, the first gate electrode G1 may be a single Mo layer.

[0112] The second gate insulating layer 113 may be provided to cover the first gate electrode G1. The second gate insulating layer 113 may include materials such as SiO2 and SiN. x SiO x N y Al2O3, TiO2, Ta2O5, HfO2 or ZnO x An inorganic insulating material (which may be ZnO and / or ZnO2) may be used. The second gate insulating layer 113 may include a single layer or multiple layers comprising the inorganic insulating material described above.

[0113] The upper electrode CE2 of the main storage capacitor Cst and the upper electrode CE2' of the auxiliary storage capacitor Cst' can be arranged above the second gate insulating layer 113.

[0114] In the main display area (MDA), the upper electrode CE2 of the main storage capacitor Cst can overlap with the first gate electrode G1 located below the upper electrode CE2 of the main storage capacitor Cst. The overlapping first gate electrode G1 and upper electrode CE2 can form the main storage capacitor Cst, while the second gate insulating layer 113 is located between the first gate electrode G1 and the upper electrode CE2. The first gate electrode G1 can be the lower electrode CE1 of the main storage capacitor Cst.

[0115] In the peripheral region DPA, the upper electrode CE2' of the auxiliary storage capacitor Cst' can overlap with the second gate electrode of the auxiliary thin-film transistor TFT' located below the upper electrode CE2' of the auxiliary storage capacitor Cst'. The second gate electrode of the auxiliary thin-film transistor TFT' can be the lower electrode CE1' of the auxiliary storage capacitor Cst'.

[0116] Each of the upper electrodes CE2 and CE2' may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and / or copper (Cu), and may have a single-layer or multi-layer structure containing the above materials.

[0117] The interlayer insulating layer 115 can be formed to cover the upper electrodes CE2 and CE2'. The interlayer insulating layer 115 may include SiO2. x SiN x SiOx N y Al2O3, TiO2, Ta2O5, HfO2 or ZnO x (It can be ZnO and / or ZnO2), etc. The interlayer insulation layer 115 can have a single-layer or multi-layer structure containing the above inorganic insulating materials.

[0118] The first source electrode S1 and the first drain electrode D1 can be disposed on the interlayer insulating layer 115. Each of the first source electrode S1 and the first drain electrode D1 can include a conductive material comprising Mo, Al, Cu, or Ti, and can include a single layer or multiple layers comprising the conductive material. For example, each of the first source electrode S1 and the first drain electrode D1 can have a multilayer structure of a Ti layer, an Al layer, and another Ti layer.

[0119] A transparent interconnect line (TWL) connecting to the auxiliary pixel circuit PCa can be disposed on the interlayer insulating layer 115. The transparent interconnect line TWL can extend from the peripheral region DPA to the component region CA, and connect the auxiliary organic light-emitting diode OLED' and the auxiliary pixel circuit PCa to each other. Additionally, a data line DL can be disposed above the interlayer insulating layer 115.

[0120] A transparent interconnect TWL can be connected to a metal interconnect TWL'. The metal interconnect TWL' can be positioned within the peripheral region DPA and connected to the auxiliary pixel circuit PCa, such as an auxiliary thin-film transistor TFT'. The transparent interconnect TWL can be positioned within the transmissive region TA of the component region CA. The end of the transparent interconnect TWL can cover the end of the metal interconnect TWL'.

[0121] The metal interconnect TWL' may include a conductive material comprising Mo, Al, Cu, Ti, etc., and may be formed as a multilayer or a single layer comprising the above materials. In some embodiments, the metal interconnect TWL' and the data line DL may comprise the same material on the same layer. However, this disclosure is not limited thereto. The metal interconnect TWL' may be disposed on various layers. For example, the metal interconnect TWL' and the first pixel electrode 121 may be disposed on the same layer. In some embodiments, the metal interconnect TWL' and the first gate electrode G1 of the main thin-film transistor TFT may be disposed on the same layer. Optionally, the metal interconnect TWL' and the upper electrode CE2 of the main storage capacitor Cst may be disposed on the same layer.

[0122] Transparent interconnects (TWLs) can include transparent conductive materials. For example, a transparent interconnect TWL can include a transparent conductive oxide (TCO). The transparent interconnect TWL can include conductive oxides, including indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In₂O₃), indium gallium oxide (IGO), or aluminum zinc oxide (AZO). The transparent interconnect TWL can have a refractive index of approximately 1.9 to approximately 2.1.

[0123] Metallic interconnects (TWL') can have higher electrical conductivity than transparent interconnects (TWL). Because metallic interconnects (TWL') are arranged in the peripheral area (DPA), there is no need to ensure light transmittance, and therefore, materials with lower light transmittance but higher electrical conductivity compared to transparent interconnects (TWL) can be used.

[0124] The first organic insulating layer 116 can be arranged to cover the first source electrode S1 and the second source electrode, the first drain electrode D1 and the second drain electrode, and the transparent connecting line TWL.

[0125] The first organic insulating layer 116 may include a material with a small refractive index difference from the transparent connecting wire TWL. The first organic insulating layer 116 may include a material having a refractive index of approximately 1.6 to approximately 1.9. For example, the first organic insulating layer 116 may include photosensitive PI, polystyrene (PS), polycarbonate (PC), and acrylic polymers. In some embodiments, the first organic insulating layer 116 may include high-refractive-index nanoparticles such as TiO2 or ZrO2 in the organic polymer. Connecting electrodes CM and CM', as well as various wires DWL, can be arranged above the first organic insulating layer 116, which allows for relatively high integration.

[0126] The second organic insulating layer 117 can be disposed on the first organic insulating layer 116. The second organic insulating layer 117 can have a flat top surface, so that the first pixel electrode 121 and the second pixel electrode 121' disposed on the second organic insulating layer 117 can be formed flat. The second organic insulating layer 117 can include a siloxane-based organic material having high light transmittance and flatness. The siloxane-based organic material can include hexamethyldisiloxane, octamethyltrisiloxane, decamethyltetrasiloxane, dodecylpentasiloxane, and polydimethylsiloxane.

[0127] In some embodiments, the second organic insulating layer 117 may include, for example, benzocyclobutene (BCB), PI, hexamethyldisiloxane (HMDSO), poly(methyl methacrylate) (PMMA), general polymers such as polystyrene (PS), polymer derivatives having phenolic groups, acrylic polymers, imide polymers, aryl ether polymers, amide polymers, fluoropolymers, p-xylyl polymers, or vinyl alcohol polymers.

[0128] The main organic light-emitting diode (OLED) and the auxiliary organic light-emitting diode (OLED') can be disposed on the second organic insulating layer 117. The first pixel electrode 121 of the main organic light-emitting diode (OLED) can be connected to the main pixel circuit PCm through the connection electrode CM disposed on the first organic insulating layer 116, and the second pixel electrode 121' of the auxiliary organic light-emitting diode (OLED') can be connected to the auxiliary pixel circuit PCa through the connection electrode CM' disposed on the first organic insulating layer 116.

[0129] Each of the first pixel electrode 121 and the second pixel electrode 121' may include a conductive oxide, including ITO, IZO, ZnO, In2O3, IGO, or AZO. Each of the first pixel electrode 121 and the second pixel electrode 121' may include a reflective film, including silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or any compound thereof. For example, the first pixel electrode 121 and the second pixel electrode 121' may have a structure comprising a film of ITO, IZO, ZnO, or In2O3 located above / below the reflective film described above. In this case, each of the first pixel electrode 121 and the second pixel electrode 121' may have a stacked structure of ITO, Ag, and another ITO.

[0130] The pixel defining layer 119 may cover the edges of each of the first pixel electrode 121 and the second pixel electrode 121' on the second organic insulating layer 117, and may include a first opening OP1 and a second opening OP2 that respectively expose the central portions of the first pixel electrode 121 and the second pixel electrode 121'. The first opening OP1 and the second opening OP2 may define the emission regions of the main organic light-emitting diode (OLED) and the auxiliary organic light-emitting diode (OLED), i.e., the size and shape of the main sub-pixel Pm and the auxiliary sub-pixel Pa.

[0131] The pixel defining layer 119 can increase the distance between the edges of the first pixel electrode 121 and the second pixel electrode 121' and the opposing electrode 123 located above the first pixel electrode 121 and the second pixel electrode 121', thereby preventing electric arcing at the edges of the first pixel electrode 121 and the second pixel electrode 121'. The pixel defining layer 119 may include organic insulating materials such as PI, polyamide, acrylic resin, BCB, HMDSO and phenolic resin, and can be formed by methods such as spin coating.

[0132] Inside the first opening OP1 and the second opening OP2 of the pixel defining layer 119, a first emission layer 122b and a second emission layer 122b' may be arranged, respectively forming a first pixel electrode 121 and a second pixel electrode 121'. Each of the first emission layer 122b and the second emission layer 122b' may include a polymer material or a low molecular weight material, and may emit one of red light, green light, blue light and white light.

[0133] The organic functional layer 122e may be disposed above and / or below the first emission layer 122b and the second emission layer 122b'. The organic functional layer 122e may include the first functional layer 122a and / or the second functional layer 122c. The first functional layer 122a or the second functional layer 122c may be omitted.

[0134] The first functional layer 122a may be disposed below the first emitting layer 122b and the second emitting layer 122b'. The first functional layer 122a may be a single layer or multiple layers comprising organic materials. The first functional layer 122a may be a single hole transport layer (HTL). In some embodiments, the first functional layer 122a may include a hole injection layer (HIL) and an HTL. The first functional layer 122a may be integrally formed to correspond to the main organic light-emitting diode (OLED) and the auxiliary organic light-emitting diode (OLED') respectively included in the main display area MDA and the component area CA.

[0135] The second functional layer 122c can be disposed on the first emission layer 122b and the second emission layer 122b'. The second functional layer 122c can be a single layer or multiple layers comprising organic materials. The second functional layer 122c may include an electron transport layer (ETL) and / or an electron injection layer (EIL). The second functional layer 122c can be integrally formed to correspond to the main organic light-emitting diode (OLED) and the auxiliary organic light-emitting diode (OLED') respectively included in the main display area MDA and the component area CA.

[0136] The counter electrode 123 may be disposed on the second functional layer 122c. The counter electrode 123 may comprise a conductive material having a low work function. For example, the counter electrode 123 may comprise a (semi-)transparent layer comprising silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), or any alloy thereof. In some embodiments, the counter electrode 123 may further comprise a layer such as ITO, IZO, ZnO, or In2O3 located on the (semi-)transparent layer comprising the material described above. The counter electrode 123 may be integrally formed to correspond to the main organic light-emitting diode (OLED) and the auxiliary organic light-emitting diode (OLED') respectively included in the main display region MDA and the component region CA.

[0137] The layer formed in the main display area MDA from the first pixel electrode 121 to the opposite electrode 123 can form a main organic light-emitting diode (OLED). The layer formed in the component area CA from the second pixel electrode 121' to the opposite electrode 123 can form an auxiliary organic light-emitting diode (OLED').

[0138] An upper layer 150, comprising an organic material, can be formed on the counter electrode 123. The upper layer 150 can be a layer provided to protect the counter electrode 123 and improve light extraction efficiency. The upper layer 150 may comprise an organic material having a higher refractive index than the counter electrode 123. Alternatively, the upper layer 150 can be provided by stacking layers with different refractive indices. For example, the upper layer 150 can be provided by stacking a high refractive index layer, a low refractive index layer, and another high refractive index layer. In this case, the refractive index of the high refractive index layer can be approximately 1.7 or greater, and the refractive index of the low refractive index layer can be approximately 1.3 or less.

[0139] The upper layer 150 may also include lithium fluoride (LiF). In some embodiments, the upper layer 150 may also include silicon oxide (SiO2) and silicon nitride (SiN). x Inorganic insulating materials.

[0140] A thin-film encapsulation layer TFEL can be disposed on the upper layer 150, and the main organic light-emitting diode (OLED) and the auxiliary organic light-emitting diode (OLED') can be sealed by the thin-film encapsulation layer TFEL. The thin-film encapsulation layer TFEL can prevent external moisture or foreign substances from penetrating into the main organic light-emitting diode (OLED) and the auxiliary organic light-emitting diode (OLED').

[0141] The thin-film encapsulation layer TFEL may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. In this respect, Figure 4A stacked structure of a first inorganic encapsulation layer 131, an organic encapsulation layer 132, and a second inorganic encapsulation layer 133 is shown. According to some embodiments, the number of organic encapsulation layers, the number of inorganic encapsulation layers, and the stacking order can be varied.

[0142] Each of the first inorganic encapsulation layer 131 and the second inorganic encapsulation layer 133 may include materials such as silicon oxide (SiO2) and silicon nitride (SiN). x ), silicon oxynitride (SiON), aluminum oxide (Al2O3), titanium oxide (TiO2), tantalum oxide (Ta2O5), hafnium oxide (HfO2) or zinc oxide (ZnO) x The organic encapsulation layer 132 can be one or more inorganic insulating materials, such as ZnO and / or ZnO2, and can be formed by chemical vapor deposition (CVD) or the like. The organic encapsulation layer 132 can include a polymer-based material. The polymer-based material can include silicone-based resins, acrylic-based resins, epoxy-based resins, PI, and polyethylene, etc. The first inorganic encapsulation layer 131, the organic encapsulation layer 132, and the second inorganic encapsulation layer 133 can be integrally formed to cover the main display area MDA and the component area CA.

[0143] Figure 5 and Figure 6 This is a schematic cross-sectional view of a portion of a display panel 10 according to some embodiments. For example, the component region CA and the surrounding peripheral region DPA of the display panel 10 are shown. Figure 5 and Figure 6 In, with Figure 4 The same reference numerals in the accompanying drawings indicate the same elements, and therefore, their redundant descriptions will be omitted.

[0144] Reference Figure 5 and Figure 6 An auxiliary organic light-emitting diode (OLED) can be arranged as an auxiliary display element in the component region CA of the display panel 10, and an auxiliary pixel circuit PCa, including an auxiliary thin-film transistor (TFT) and an auxiliary storage capacitor Cst, can be arranged in the peripheral region DPA. Meanwhile, transparent interconnecting lines TWL connecting the auxiliary pixel circuit PCa and the auxiliary OLED can be arranged in both the component region CA and the peripheral region DPA.

[0145] The transparent interconnect TWL can be connected to the auxiliary pixel circuit PCa via the metal interconnect TWL'. The metal interconnect TWL' can be disposed on various layers. In some embodiments, the metal interconnect TWL' and the transparent interconnect TWL can be disposed on the same layer. According to some embodiments, the metal interconnect TWL' can be disposed on a different layer than the layer on which the transparent interconnect TWL is disposed. In this case, the transparent interconnect TWL can be connected to the metal interconnect TWL' via a contact hole.

[0146] The metal interconnect wire TWL' may include a first wire TWL1' and a second wire TWL2' arranged on different layers. For example... Figure 5 As shown, an interlayer insulating layer 115 may be disposed between the first line TWL1' and the transparent connection line TWL. In other words, the first line TWL1' may be disposed below the transparent connection line TWL. The first line TWL1' may be disposed on the second gate insulating layer 113. The first line TWL1' and the upper electrode CE2' of the auxiliary storage capacitor Cst' may comprise the same material on the same layer. The transparent connection line TWL may be connected to the first line TWL1' via a contact hole defined in the interlayer insulating layer 115.

[0147] At the same time, such as Figure 6 As shown, an interlayer insulating layer 115 and a second gate insulating layer 113 may be disposed between the first line TWL1' and the transparent interconnect line TWL. The first line TWL1' may be disposed at the lower part of the transparent interconnect line TWL. The first line TWL1' may be disposed on the first gate insulating layer 112. The first line TWL1' and the second gate electrode of the auxiliary thin film transistor TFT' (i.e., the lower electrode CE1' of the auxiliary storage capacitor Cst') may comprise the same material on the same layer. The transparent interconnect line TWL may be connected to the first line TWL1' via contact holes defined in the interlayer insulating layer 115 and the second gate insulating layer 113.

[0148] The second line TWL2' can be connected to the first line TWL1' and the auxiliary pixel circuit PCa. The second line TWL2' can be disposed on the interlayer insulating layer 115 and can be connected to the first line TWL1' and the auxiliary pixel circuit PCa respectively via contact holes.

[0149] Metallic interconnects (TWLs) can comprise materials with higher conductivity than transparent interconnects (TWLs) and can be configured in various combinations within the peripheral area (DPA). The fact that metallic interconnects (TWLs) comprise wires arranged on different layers reduces interference between the wires.

[0150] Figure 7 and Figure 8 This is a schematic cross-sectional view of a portion of a display panel 10 according to some embodiments. Figure 7 and Figure 8 In, with Figure 4 The same reference numerals in the accompanying drawings indicate the same elements, and therefore, their redundant descriptions will be omitted.

[0151] Reference Figure 7An auxiliary organic light-emitting diode (OLED) can be arranged as an auxiliary display element in the component region CA of the display panel 10, and an auxiliary pixel circuit PCa, including an auxiliary thin-film transistor (TFT) and an auxiliary storage capacitor Cst, can be arranged in the peripheral region DPA. Meanwhile, transparent interconnecting lines TWL connecting the auxiliary pixel circuit PCa and the auxiliary OLED can be arranged in both the component region CA and the peripheral region DPA.

[0152] In the component region CA, a first organic insulating layer 116 and a second organic insulating layer 117 may be stacked between the substrate 100 and the auxiliary organic light-emitting diode OLED', and the first organic insulating layer 116 may be disposed on the transparent interconnect line TWL.

[0153] According to some embodiments, the refractive index (n1) of the first organic insulating layer 116 may have a value between the refractive index (n0) of the transparent connecting wire TWL and the refractive index (n2) of the second organic insulating layer 117. For example, the refractive index (n1) of the first organic insulating layer 116 may be greater than the refractive index (n2) of the second organic insulating layer 117 and less than the refractive index (n0) of the transparent connecting wire TWL (n0>n1>n2).

[0154] In some embodiments, for a wavelength of 550 nm, the refractive index (n0) of the transparent interconnect TWL can be set to approximately 1.9 to approximately 2.1. For a wavelength of 550 nm, the refractive index (n1) of the first organic insulating layer 116 can be set to approximately 1.6 to approximately 1.9. The refractive index (n2) of the second organic insulating layer 117 can be set to approximately 1.4 to approximately 1.6. In some embodiments, the difference between the refractive index (n0) of the transparent interconnect TWL and the refractive index (n1) of the first organic insulating layer 116 can be approximately 0.45 or less.

[0155] In some embodiments, the light transmittance of the second organic insulating layer 117 may be greater than that of the first organic insulating layer 116. In some embodiments, the flatness of the upper surface of the second organic insulating layer 117 may be relatively better than the flatness of the upper surface of the first organic insulating layer 116. That is, the upper surface of the second organic insulating layer 117 may be flatter than the upper surface of the first organic insulating layer 116.

[0156] According to some embodiments, the inorganic insulating layer IL of the display panel 10 may include holes or grooves corresponding to the component region CA.

[0157] For example, when the first gate insulating layer 112, the second gate insulating layer 113, and the interlayer insulating layer 115 are collectively referred to as the inorganic insulating layer IL, the inorganic insulating layer IL may include a first aperture H1 corresponding to the transmission region TA. The first aperture H1 may expose a portion of the upper surface of the buffer layer 111 or the substrate 100. The first aperture H1 can be formed by overlapping the openings of the first gate insulating layer 112, the second gate insulating layer 113, and the interlayer insulating layer 115, which are formed to correspond to the component region CA. These openings may be formed by separate processes or by the same process simultaneously. When the openings are formed by separate processes, the inner surface of the first aperture H1 may not be smooth and may have a stepped shape. However, unlike the above, the inorganic insulating layer IL may include a recess exposing the buffer layer 111 instead of the first aperture H1. A first organic insulating layer 116 may fill the interior of the first aperture H1 or the recess in the inorganic insulating layer IL.

[0158] According to some embodiments, a transparent connecting line TWL can be disposed inside the first hole H1. The transparent connecting line TWL can be disposed on the buffer layer 111 in the component region CA. The transparent connecting line TWL can be connected via a contact hole to a metal connecting line TWL' disposed on the first organic insulating layer 116, and can be connected via the metal connecting line TWL' to the auxiliary pixel circuit PCa. The other end of the transparent connecting line TWL can be connected via a contact hole to a connecting electrode CM', and the transparent connecting line TWL can be connected to the second pixel electrode 121' via the connecting electrode CM'.

[0159] exist Figure 7 In this embodiment, transparent connecting lines TWL with small refractive index differences and a first organic insulating layer 116 are arranged on the entire surface of the substrate 100, but this disclosure is not limited thereto.

[0160] like Figure 8 As shown, the first organic insulating layer 116 can be disposed inside the first hole H1 or groove of the inorganic insulating layer IL. In other words, the thickness of the first organic insulating layer 116 can be less than the depth of the first hole H1 or groove of the inorganic insulating layer IL.

[0161] When the first organic insulating layer 116 has a high refractive index, parasitic capacitance may form when the first organic insulating layer 116 is disposed over the entire surface of the substrate 100. According to some embodiments, parasitic capacitance can be minimized or relatively reduced by disposing the first organic insulating layer 116 with a high refractive index only in the component region CA in which the light diffraction intensity is reduced.

[0162] exist Figure 8In the process, the second organic insulating layer 117 may include a (2-1) organic insulating layer 117a and a (2-2) organic insulating layer 117b, and the connecting electrode CM' and the metal connecting line TWL' may be arranged between the (2-1) organic insulating layer 117a and the (2-2) organic insulating layer 117b.

[0163] Figure 9 This is a schematic cross-sectional view of a portion of a display panel according to some embodiments. Figure 9 In, with Figure 7 The same reference numerals in the accompanying drawings indicate the same elements, and therefore, their redundant descriptions will be omitted.

[0164] Reference Figure 9 An auxiliary organic light-emitting diode (OLED) can be arranged as an auxiliary display element in the component region CA of the display panel 10, and an auxiliary pixel circuit PCa, including an auxiliary thin-film transistor (TFT) and an auxiliary storage capacitor Cst, can be arranged in the peripheral region DPA. Meanwhile, transparent interconnecting lines TWL connecting the auxiliary pixel circuit PCa and the auxiliary OLED can be arranged in both the component region CA and the peripheral region DPA.

[0165] In the component region CA, a first organic insulating layer 116 and a second organic insulating layer 117 may be stacked between the substrate 100 and the auxiliary organic light-emitting diode OLED', and the first organic insulating layer 116 may be disposed on the transparent interconnect line TWL.

[0166] According to some embodiments, a second organic insulating layer 117 may be disposed below the transparent connecting line TWL. The second organic insulating layer 117 may fill the first hole H1 or groove of the inorganic insulating layer IL and may be disposed on the entire surface of the substrate 100. The transparent connecting line TWL may be disposed on the upper surface of the second organic insulating layer 117.

[0167] The transmittance of the second organic insulating layer 117 can be greater than that of the first organic insulating layer 116. The second organic insulating layer 117 can fill the first hole H1 or groove in the inorganic insulating layer IL, and in the component region CA, the volume per unit area of ​​the second organic insulating layer 117 can be greater than the volume per unit area of ​​the first organic insulating layer 116. Therefore, as... Figure 9 The structure shown can help improve the light transmittance in the component region CA. Additionally, the refractive index of the second organic insulating layer 117 can be lower than that of the first organic insulating layer 116. Therefore, parasitic capacitance that may affect the auxiliary pixel circuit PCa can be minimized or relatively reduced.

[0168] Figure 10This is a schematic cross-sectional view of a portion of a display panel 10 according to some embodiments. Figure 10 In, with Figure 7 The same reference numerals in the accompanying drawings indicate the same elements, and therefore, their redundant descriptions will be omitted.

[0169] Reference Figure 10 An auxiliary organic light-emitting diode (OLED) can be arranged as an auxiliary display element in the component region CA of the display panel 10, and an auxiliary pixel circuit PCa, including an auxiliary thin-film transistor (TFT) and an auxiliary storage capacitor Cst, can be arranged in the peripheral region DPA. Meanwhile, transparent interconnecting lines TWL connecting the auxiliary pixel circuit PCa and the auxiliary OLED can be arranged in both the component region CA and the peripheral region DPA.

[0170] In the component region CA, a first organic insulating layer 116 and a second organic insulating layer 117 may be stacked between the substrate 100 and the auxiliary organic light-emitting diode OLED', and the first organic insulating layer 116 may be disposed on the transparent interconnect line TWL.

[0171] According to some embodiments, the thin-film encapsulation layer TFEL may further include a first intermediate inorganic encapsulation layer (i.e., a first additional inorganic encapsulation layer) 131' and / or a second intermediate inorganic encapsulation layer (i.e., a second additional inorganic encapsulation layer) 133'. The first intermediate inorganic encapsulation layer 131' may be disposed between the first inorganic encapsulation layer 131 and the organic encapsulation layer 132. The second intermediate inorganic encapsulation layer 133' may be disposed between the second inorganic encapsulation layer 133 and the organic encapsulation layer 132.

[0172] Each of the first intermediate inorganic encapsulation layer 131' and the second intermediate inorganic encapsulation layer 133' may include silicon oxynitride (SiO2). x N y (x>0, y>0). The refractive index of the first intermediate inorganic encapsulation layer 131' can be a value between the refractive index of the first inorganic encapsulation layer 131 and the refractive index of the organic encapsulation layer 132. The refractive index of the second intermediate inorganic encapsulation layer 133' can be a value between the refractive index of the second inorganic encapsulation layer 133 and the refractive index of the organic encapsulation layer 132.

[0173] Each of the first intermediate inorganic encapsulation layer 131' and the second intermediate inorganic encapsulation layer 133' can have a refractive index of approximately 1.6 to approximately 1.7. The refractive index value can be varied by changing the silicon oxynitride (SiO2) contained in each of the first intermediate inorganic encapsulation layer 131' and the second intermediate inorganic encapsulation layer 133'. x N yThe refractive index is adjusted by the ratio of oxygen to nitrogen in the equation (x>0, y>0). For example, when the amount of oxygen increases, the refractive index decreases, and when the amount of nitrogen increases, the refractive index increases.

[0174] In some embodiments, the first inorganic encapsulation layer 131 may comprise silicon oxynitride (SiO2) having a refractive index of approximately 1.7, and the organic encapsulation layer 132 may have a refractive index of approximately 1.5. In this case, the first intermediate inorganic encapsulation layer 131' may comprise silicon oxynitride (SiO2) having a refractive index of approximately 1.62. x N y (x>0, y>0).

[0175] In some embodiments, the second inorganic encapsulation layer 133 may include silicon nitride (SiN) having a refractive index of approximately 1.9. x The organic encapsulation layer 132 may have a refractive index of approximately 1.5. In this case, the second intermediate inorganic encapsulation layer 133' may comprise silicon oxynitride (SiO2) having a refractive index of approximately 1.68. x N y (x>0, y>0).

[0176] Because the refractive index difference between the stacked layers in the thin-film encapsulation layer TFEL increases, light reflection may occur at the interface, and therefore, the transmittance may decrease. According to some embodiments, light reflection at the interface can be minimized or relatively reduced by introducing a first intermediate inorganic encapsulation layer 131' and / or a second intermediate inorganic encapsulation layer 133'. Both the first intermediate inorganic encapsulation layer 131' and the second intermediate inorganic encapsulation layer 133' are shown in the figures, but this disclosure is not limited thereto. For example, one of the first intermediate inorganic encapsulation layer 131' and the second intermediate inorganic encapsulation layer 133' may be omitted, and various modifications can be made.

[0177] Figure 11 This is a schematic cross-sectional view of a portion of a display panel 10 according to some embodiments. Figure 11 In, with Figure 7 The same reference numerals in the accompanying drawings indicate the same elements, and therefore, their redundant descriptions will be omitted.

[0178] Reference Figure 11 An auxiliary organic light-emitting diode (OLED) can be arranged as an auxiliary display element in the component region CA of the display panel 10, and an auxiliary pixel circuit PCa, including an auxiliary thin-film transistor (TFT) and an auxiliary storage capacitor Cst, can be arranged in the peripheral region DPA. Meanwhile, transparent interconnecting lines TWL connecting the auxiliary pixel circuit PCa and the auxiliary OLED can be arranged in both the component region CA and the peripheral region DPA.

[0179] In the component region CA, a first organic insulating layer 116 and a second organic insulating layer 117 may be stacked between the substrate 100 and the auxiliary organic light-emitting diode OLED', and the first organic insulating layer 116 may be disposed on the transparent interconnect line TWL.

[0180] According to some embodiments, the compensation layer 111' may be disposed between the substrate 100 and the buffer layer 111. The compensation layer 111' may have a refractive index lower than that of the buffer layer 111. The compensation layer 111' may comprise silicon oxynitride (SiO2). x N y (x>0, y>0). The refractive index of the compensation layer 111' can be adjusted between approximately 1.5 and approximately 1.8.

[0181] The substrate 100 can be provided by stacking a first organic layer, a first inorganic layer, a second organic layer, and a second inorganic layer, and the second inorganic layer disposed in the uppermost portion may include silicon oxide (SiO2). x Meanwhile, the buffer layer 111 may include silicon nitride (SiN). x Because silicon dioxide (SiO) x ) and silicon nitride (SiN) x The large difference in refractive index between the two surfaces may lead to light loss due to light reflection at the interface.

[0182] According to some embodiments, light reflection can be reduced by introducing a compensation layer 111' between the substrate 100 and the buffer layer 111. Therefore, the transmittance in the component region CA can be maximized or relatively increased.

[0183] Figure 12 This is a schematic cross-sectional view of a portion of a display panel 10 according to some embodiments. Figure 12 In, with Figure 7 The same reference numerals in the accompanying drawings indicate the same elements, and therefore, their redundant descriptions will be omitted.

[0184] Reference Figure 12 An auxiliary organic light-emitting diode (OLED) can be arranged as an auxiliary display element in the component region CA of the display panel 10, and an auxiliary pixel circuit PCa, including an auxiliary thin-film transistor (TFT) and an auxiliary storage capacitor Cst, can be arranged in the peripheral region DPA. Meanwhile, transparent interconnecting lines TWL connecting the auxiliary pixel circuit PCa and the auxiliary OLED can be arranged in both the component region CA and the peripheral region DPA.

[0185] In the component region CA, a first organic insulating layer 116 and a second organic insulating layer 117 may be stacked between the substrate 100 and the auxiliary organic light-emitting diode OLED', and the first organic insulating layer 116 may be disposed on the transparent interconnect line TWL.

[0186] According to some embodiments, the antireflective film AR can be disposed below the substrate 100. The antireflective film AR can be attached to the lower part of the substrate 100 via an adhesive layer.

[0187] The antireflective coating AR may include a light-transmitting substrate, a hard coating layer, and a low-refractive-index layer. In the 550 nm wavelength region, the low-refractive-index layer may have a refractive index of approximately 1.2 to approximately 1.4. Because the antireflective coating AR is provided, light reflection that may occur at the lower interface of the substrate 100 can be minimized or relatively reduced, and therefore, the transmittance in the component region CA can be relatively improved.

[0188] Meanwhile, in the embodiments described above, the first organic insulating layer 116 and the second organic insulating layer 117 comprise different materials, but this disclosure is not limited thereto. According to some embodiments, the first organic insulating layer 116 and the second organic insulating layer 117 may comprise the same material. For example, both the first organic insulating layer 116 and the second organic insulating layer 117 may comprise a siloxane resin.

[0189] As described above, in the display panel and display device according to this embodiment, pixel circuits may not be arranged in the component area, and therefore a wider transmission area can be ensured, and thus the transmittance can be improved.

[0190] However, the scope of this disclosure is not limited by its effects.

[0191] It should be understood that the embodiments described herein should be considered descriptive only and not for limiting purposes. The description of features or aspects in each embodiment should generally be considered as other similar features or aspects that can be used in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, those skilled in the art will understand that various changes in form and detail may be made therein without departing from the spirit and scope as defined by the appended claims.

Claims

1. A display panel, wherein, The display panel includes: The base includes the main display area, component area, and peripheral area; Auxiliary display elements are located in the component area; An auxiliary pixel circuit, located in the peripheral region, includes an auxiliary thin-film transistor and an auxiliary storage capacitor; A transparent connecting line connects the auxiliary display element to the auxiliary pixel circuit, and the transparent connecting line is located in the component area and the peripheral area; and A first organic insulating layer and a second organic insulating layer located on the first organic insulating layer are stacked in the component region between the substrate and the auxiliary display element. The first organic insulating layer is located between the transparent connecting line and the auxiliary display element, and is located on the transparent connecting line. The refractive index of the first organic insulating layer is between the refractive index of the transparent connecting line and the refractive index of the second organic insulating layer.

2. The display panel according to claim 1, wherein, The difference between the refractive index of the transparent connecting line and the refractive index of the first organic insulating layer is 0.45 or less.

3. The display panel according to claim 1, wherein, The refractive index of the first organic insulating layer is greater than the refractive index of the second organic insulating layer.

4. The display panel according to claim 1, wherein, The first organic insulating layer comprises photosensitive polyimide, and the second organic insulating layer comprises a siloxane resin.

5. The display panel according to claim 1, wherein, The display panel also includes metal connecting wires that connect the transparent connecting lines to the auxiliary pixel circuit. The metal connecting wire and the transparent connecting wire are located on the same layer, and the end of the transparent connecting wire covers the end of the metal connecting wire.

6. The display panel according to claim 1, wherein, The display panel also includes metal connecting wires that connect the transparent connecting lines to the auxiliary pixel circuit. The metal connecting wire and the upper electrode of the auxiliary storage capacitor are located on the same layer, and the transparent connecting wire is connected to the metal connecting wire via a contact hole.

7. The display panel according to claim 1, wherein, The display panel also includes metal connecting lines that connect the transparent connecting lines and the auxiliary pixel circuits to each other. The metal connecting wire and the lower electrode of the auxiliary storage capacitor are located on the same layer, and the transparent connecting wire is connected to the metal connecting wire via a contact hole.

8. The display panel according to claim 1, wherein, The display panel also includes an inorganic insulating layer located on the substrate. The inorganic insulating layer includes holes or grooves corresponding to the component area.

9. The display panel according to claim 8, wherein, The transparent connecting wire is located inside the hole or groove of the inorganic insulating layer, and The first organic insulating layer fills the pores or grooves of the inorganic insulating layer and is located on the entire surface of the substrate.

10. The display panel according to claim 9, wherein, The display panel also includes metal connecting wires that connect the transparent connecting lines to the auxiliary pixel circuit. The metal connecting wire is located on the first organic insulating layer, and the transparent connecting wire is connected to the metal connecting wire via a contact hole.

11. The display panel according to claim 8, wherein, The first organic insulating layer is located inside the hole or groove of the inorganic insulating layer, and the thickness of the first organic insulating layer is less than the depth of the hole or groove of the inorganic insulating layer.

12. The display panel according to claim 8, wherein, The second organic insulating layer fills the holes or grooves of the inorganic insulating layer, and The transparent connecting line is located on the second organic insulating layer.

13. The display panel according to claim 1, wherein, The display panel further includes a thin-film encapsulation layer located above the auxiliary display element, wherein a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer are stacked in the thin-film encapsulation layer.

14. The display panel according to claim 13, wherein, The display panel further includes a first additional inorganic encapsulation layer located between the first inorganic encapsulation layer and the organic encapsulation layer, wherein the refractive index of the first additional inorganic encapsulation layer has a value between the refractive index of the first inorganic encapsulation layer and the refractive index of the organic encapsulation layer.

15. The display panel according to claim 1, wherein, The display panel also includes: A buffer layer is located between the substrate and the auxiliary thin-film transistor; and A compensation layer is located between the substrate and the buffer layer. The buffer layer comprises silicon nitride, and the compensation layer comprises silicon oxynitride.

16. The display panel according to claim 1, wherein, The display panel also includes an anti-reflective film located on the lower surface of the substrate.

17. A display device, wherein, The display device includes: A display panel includes a main display area, a component area, and a peripheral area; the main display area includes multiple main sub-pixels, and the component area includes multiple auxiliary sub-pixels; and Components are arranged below the display panel to correspond to the component area, wherein the display panel further includes: Base; An auxiliary display element is located on the substrate in the component region; An auxiliary pixel circuit, located on the substrate in the peripheral region, includes an auxiliary thin-film transistor and an auxiliary storage capacitor; A transparent connecting line connects the auxiliary display element and the auxiliary pixel circuit to each other, and the transparent connecting line is located in the component area and the peripheral area; and A first organic insulating layer and a second organic insulating layer located on the first organic insulating layer are stacked in the component region between the substrate and the auxiliary display element. The first organic insulating layer is located between the transparent connecting line and the auxiliary display element, and is located on the transparent connecting line. The refractive index of the first organic insulating layer is between the refractive index of the transparent connecting line and the refractive index of the second organic insulating layer.

18. The display device according to claim 17, wherein, The difference between the refractive index of the transparent connecting line and the refractive index of the first organic insulating layer is 0.45 or less.

19. The display device according to claim 17, wherein, The refractive index of the first organic insulating layer is greater than the refractive index of the second organic insulating layer.

20. The display device according to claim 17, wherein, The first organic insulating layer comprises photosensitive polyimide, and the second organic insulating layer comprises a siloxane resin.

21. The display device according to claim 17, wherein, The display device also includes an inorganic insulating layer located on the substrate. The inorganic insulating layer includes holes or grooves corresponding to the component area.

22. The display device according to claim 17, wherein, The component includes an image pickup device.

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