Methods and systems for forming metal silicon oxide and metal silicon nitride oxide layers
Patent Information
- Application Number
- CN202110986825.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-08-26
- Filing Date
- 2021-08-26
- Publication Date
- 2026-10-09
- Estimated Expiration
- 2041-08-26
AI Technical Summary
此外,典型的底层在衬底表面上可能具有不期望的高不均匀性
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Figure CN114121602B_ABST
Abstract
Description
Technical Field
[0001] This disclosure generally relates to methods for forming layers on a substrate surface, structures including the layers, and systems for forming the layers and structures. More specifically, this disclosure relates to methods for forming metal oxide silicon and metal oxynitride layers, structures including such layers, and systems for forming these layers. Background Technology
[0002] In the manufacturing process of electronic devices, fine patterns of features can be formed on the substrate surface by patterning the substrate surface and etching the material from the substrate surface using processes such as wet etching and / or dry etching. As the device density on the substrate increases, there is an increasing need to form features of smaller dimensions.
[0003] Photoresist is commonly used to pattern the surface of a substrate before etching. Patterning in photoresist can be achieved by: applying a photoresist layer to the surface of the substrate, masking the surface of the photoresist, exposing the unmasked portion of the photoresist to radiation, such as ultraviolet light or an electron beam, and removing a portion of the photoresist (e.g., the unmasked or masked portion), while leaving a portion of the photoresist on the substrate surface.
[0004] In some cases, photoresist may not exhibit the desired selectivity relative to the material to be etched. In such cases, the pattern can be transferred onto a hard mask material, which can then be used as an etching mask.
[0005] Hard masks can also be used to form relatively small features. For example, spacer-defined double patterning (SDDP) can utilize hard masks to achieve further pitch scaling of devices beyond the limitations of conventional photolithography. Typically, SDDP uses conformal spacers and hard mask templates. Silicon oxide layers are typically used as conformal spacers, and hard mask templates are usually prepared using spin coating or CVD processes.
[0006] In SDDP and other applications, it may be desirable to form hard masks with desired optical properties and / or etch selectivity. Furthermore, it may be desirable for such properties to be easily tunable. While existing techniques may work quite well, they may not be able to fine-tune and / or provide the required selectivity.
[0007] Furthermore, some photolithography techniques, such as extreme ultraviolet (EUV) lithography, typically employ a substrate to reduce the reflectivity of the radiation used in the step of exposing the photoresist to radiation. A typical substrate is usually relatively thick (e.g., greater than 20 nm) to achieve the desired etch selectivity. Additionally, a typical substrate may exhibit undesirable high inhomogeneity on the substrate surface. In some cases, material stacks are used as the substrate to obtain the desired refractive index, extinction coefficient, photoresist adhesion, and etch selectivity.
[0008] Therefore, there is a need for improved layer formation methods, such as layers suitable for hard masks and underlying applications. Furthermore, there is a need for improved layer structures and systems for forming these improved layers.
[0009] Any discussion of the problems and solutions set forth in this section has been included in this disclosure only to provide the circumstances of this disclosure and should not be construed as an admission that any or all of the discussions were known at the time the invention was made. Summary of the Invention
[0010] Various embodiments of this disclosure relate to methods for forming one or more of a silicon oxide layer and a silicon oxynitride layer on a substrate surface, systems for forming silicon oxide layers and silicon oxynitride layers, and structures including such layers. The silicon oxide layer and silicon oxynitride layer can be used as an underlayer and / or a hard mask—for example, during a spacer-defined double patterning (SDDP) process.
[0011] While the various embodiments of this disclosure address the shortcomings of existing methods, systems, and structures in a manner that will be discussed in more detail below, generally, the various embodiments of this disclosure provide improved methods for (e.g., finely tuning) the properties of metal oxide silicon layers and / or metal oxynitride layers. The various techniques described herein provide layers suitable for use as underlayers and / or hard marker materials and for structures including hard markers. However, unless otherwise stated, this disclosure and invention are not limited to these applications.
[0012] According to exemplary embodiments of the present disclosure, a method for forming one or more of a metal silicon oxide layer and a metal silicon oxynitride layer is provided. One or more exemplary methods include the steps of: providing a substrate within a reaction chamber of a reactor; providing a silicon precursor to the reaction chamber during a silicon precursor pulse cycle; providing a first metal precursor to the reaction chamber during a first metal precursor pulse cycle; and providing a first reactant to the reaction chamber during a first reactant pulse cycle. According to various aspects of these embodiments, the silicon precursor pulse cycle and the first metal precursor pulse cycle overlap. According to other examples, the silicon precursor pulse cycle and the first metal precursor pulse cycle may not overlap. In this case, the term overlap means overlap in both space and time. In other words, during the overlap, both the silicon precursor and the first metal precursor are provided to the reaction chamber for a time period. According to a further example of the present disclosure, the first metal precursor pulse cycle and the first reactant pulse cycle overlap. According to a further example, plasma is applied within the reaction chamber during a plasma cycle. According to an example of the present disclosure, the plasma cycle and the first reactant pulse cycle overlap. According to a further example, the plasma cycle and the silicon precursor pulse cycle and / or the first metal precursor pulse cycle do not overlap. In some cases, the plasma may be continuous during one or more silicon precursor pulse cycles and / or one or more first metal precursor pulse cycles and / or one or more reactant pulse cycles. The first reactant pulse cycle may overlap with each of the silicon precursor pulse cycle and the first metal precursor pulse cycle. According to another example, the method includes the step of providing a second reactant to the reaction chamber during a second reactant pulse cycle. One or more of the first and second reactants may include an oxygen reactant, and the other of the first and second reactants may include a nitrogen reactant. Some examples of this disclosure can be implemented as chemical vapor deposition processes, such as plasma-enhanced CVD (PECVD) processes. Some examples can be implemented as plasma-enhanced cyclic deposition processes, such as atomic layer deposition (ALD) processes (e.g., PEALD processes). According to a further example of this disclosure, the optical constants of the metal oxide layer or the metal oxynitride layer are manipulated by manipulating the flow rates of one or more of the silicon precursor and the first metal precursor and / or the flow rate ratio of the silicon precursor and the first metal precursor. In some cases, the optical constants of the metal oxide layer or the metal oxynitride layer can be manipulated by manipulating the flow rate of the carrier gas. As described in more detail below, further characteristics of the deposited layer can be manipulated using a first deposition cycle and a second deposition cycle. The first deposition cycle includes providing a first silicon precursor and a first metal precursor to the reaction chamber, and the second deposition cycle includes providing a second silicon precursor and a second metal precursor to the reaction chamber, wherein at least one of the first and second silicon precursors and / or at least one of the first and second metal precursors are different. The first deposition cycle may be repeated m times and / or the second deposition cycle may be repeated n times before proceeding to the next step of the method.The selection of precursors and / or the number of cycles can be used to ideally alter the properties of the deposited layer.
[0013] According to a further embodiment of this disclosure, a structure is provided. This structure can be formed according to the methods described herein. The structure may include a substrate and one or more of a silicon oxide layer and a silicon oxynitride layer. The extinction coefficient of the silicon oxide layer or the silicon oxynitride layer may be between about 0 and about 1.3. The refractive index of the silicon oxide layer or the silicon oxynitride layer may be between about 1.4 and about 3.0. The thickness of the silicon oxide layer and the silicon oxynitride layer may be less than 20 nm.
[0014] Based on further examples of this disclosure, a system is provided configured to perform the methods described herein and / or form the structures described herein.
[0015] These and other embodiments will become apparent to those skilled in the art from the following detailed description of certain embodiments, with reference to the accompanying drawings; however, the invention is not limited to any particular embodiment disclosed. Attached Figure Description
[0016] A more complete understanding of exemplary embodiments of the present disclosure can be obtained by considering the following illustrative drawings, along with reference to the detailed description and claims.
[0017] Figure 1 A method according to at least one embodiment of the present disclosure is shown.
[0018] Figure 2 Timing according to at least one embodiment of the present disclosure is shown.
[0019] Figure 3 The structure according to at least one embodiment of the present disclosure is shown.
[0020] Figure 4 and 5 The optical properties of a layer formed according to at least one embodiment of the present disclosure are shown.
[0021] Figure 6 A system according to at least one embodiment of the present disclosure is shown.
[0022] Figure 7 A precursor delivery system according to at least one embodiment of the present disclosure is shown.
[0023] Figure 8-15 Timing according to at least one embodiment of the present disclosure is shown.
[0024] Figure 16 The optical properties of a layer formed according to at least one embodiment of the present disclosure are shown.
[0025] It should be understood that the elements in the accompanying drawings are shown for simplicity and clarity and are not necessarily drawn to scale. For example, the dimensions of some elements in the drawings may be enlarged relative to other elements to aid in understanding the embodiments illustrated in this disclosure. Detailed Implementation
[0026] Although certain embodiments and examples are disclosed below, those skilled in the art will understand that the invention extends beyond the specific disclosed embodiments and / or uses of the invention and their obvious modifications and equivalents. Therefore, the scope of the disclosed invention should not be limited to the specific disclosed embodiments described below.
[0027] This disclosure generally relates to methods for forming a silicon oxide layer and a silicon oxynitride layer on a substrate surface, structures including silicon oxide layers and / or silicon oxynitride layers formed, for example, using the methods described herein, and systems for performing the methods and / or forming the structures. As described in more detail below, exemplary methods can be used to form silicon oxide layers and / or silicon oxynitride layers with desired properties and / or allow for easy adjustment of properties, such as refractive index, extinction coefficient, and / or etch selectivity, using another layer, such as silicon oxide (e.g., stoichiometric or non-stoichiometric silicon dioxide). The silicon oxide layers and silicon oxynitride layers described herein can be used in a variety of applications, such as for forming hard masks and / or underlayers during electronic device fabrication. However, unless otherwise stated, this disclosure and invention are not limited thereto.
[0028] In this disclosure, the gas may include materials that are gases at ambient temperature and pressure, evaporated solids, and / or evaporated liquids, and may consist of a single gas or a mixture of gases, depending on the circumstances. Gases other than process gases, such as gases introduced without passing through gas distribution components (e.g., spray heads, other gas distribution devices, etc.), may be used, for example, to seal the reaction space, and may include sealing gases, such as rare or other inert gases. The term inert gas refers to a gas that does not participate in the chemical reaction to a perceptible degree when plasma power is applied and / or a gas capable of exciting precursors. The terms precursor and reactant are used interchangeably.
[0029] As used herein, the term substrate can refer to any underlying material that can be used to form or on which devices, circuits, or thin films can be formed. A substrate can include bulk materials such as silicon (e.g., single-crystal silicon), other Group IV materials such as germanium, or compound semiconductor materials such as GaAs, and can include one or more layers on or under the bulk material. Furthermore, a substrate can include various features, such as recesses, lines, etc., formed within or on at least a portion of the substrate layers. By a specific example, a substrate can include a dielectric layer, such as silicon oxide.
[0030] In some embodiments, a membrane refers to a layer extending in a direction perpendicular to the thickness direction to cover the entire target or related surface, or simply a layer covering the target or related surface. In some embodiments, a layer refers to a structure of a certain thickness formed on a surface, or a synonym for a membrane or non-membrane structure. A layer may be continuous or discontinuous. A membrane or layer may consist of discrete single membranes or layers or multiple membranes or layers with specific properties, and the boundaries between adjacent membranes or layers may or may not be clear, and may or may not be established based on the physical, chemical and / or any other properties, formation process or sequence and / or function or purpose of adjacent membranes or layers.
[0031] In this disclosure, "continuous" can mean without breaking the vacuum, without interruption as a timeline, without any material intervention steps, without changing the processing conditions, immediately following as the next step, or in some embodiments without intervention in one or more discrete physical or chemical structures between two structures other than the two structures.
[0032] The term "cyclic deposition process" or "cyclic deposition process" can refer to the sequential introduction of precursors (and / or reactants) into a reaction chamber to deposit a layer on a substrate, and includes processing techniques such as atomic layer deposition (ALD), cyclic chemical vapor deposition (cyclic CVD), and mixed cyclic deposition processes that include ALD and CVD components.
[0033] As used herein, the term atomic layer deposition (ALD) can refer to a vapor-phase deposition process in which deposition cycles, preferably multiple consecutive cycles, are performed in a processing chamber. Typically, during each cycle, a precursor is introduced and can be chemisorbed onto the deposition surface (e.g., a substrate surface or an underlying surface previously deposited, such as material from a previous ALD cycle), forming a monolayer or sub-monolayer that is not readily reacting with additional precursors (i.e., a self-limiting reaction). Subsequently, a reactant (e.g., another precursor or a reactive gas) can be introduced into the processing chamber to convert the chemisorbed precursor into the desired material on the deposition surface. Typically, this reactant is capable of further reacting with the precursor. Furthermore, a purging step can be used during each cycle to remove excess precursor from the processing chamber and / or excess reactant and / or reaction byproducts from the processing chamber after the conversion of the chemisorbed precursor. Furthermore, as used herein, the term atomic layer deposition also means processes specified by related terms, such as chemical vapor deposition, atomic layer epitaxy (ALE), molecular beam epitaxy (MBE), gas-source MBE, or organometallic MBE, and chemical beam epitaxy when performed with alternating pulses of precursor components, reactant gases, and purge gases (e.g., inert carrier gases). PEALD refers to the ALD process in which plasma is applied in one or more ALD steps.
[0034] As used herein, silicon oxide refers to a material comprising silicon and oxygen. Silicon oxide can be represented by the formula SiOx, where x can be between 1 and 2 (e.g., SiO2). In some cases, silicon oxide may not include stoichiometric amounts of silicon oxide. In some cases, silicon oxide may include other elements such as carbon, nitrogen, and hydrogen.
[0035] As used herein, a silicon oxide layer refers to a material comprising at least one metal, silicon, and oxygen. Silicon oxide can be made of Si1M... x O z The expression indicates that x is about 0.1 to about 1 or about 0.01 to about 2, and z is about 1.5 to about 2 or about 1 to about 3. M can be or includes transition metals such as titanium, hafnium, tantalum, tungsten, zirconium, and yttrium.
[0036] The metal oxynitride layer comprises at least one metal (M), silicon, oxygen, and nitrogen. The metal oxynitride can be composed of Si1M... x O z N zz The expression indicates that x is about 0.1 to about 1 or about 0.01 to about 2, z is about 1 to about 2 or about 0.5 to about 1.5, and zz is about 0.3 to about 1 or about 0.1 to about 1. M can be or includes any of the aforementioned metals associated with the metal oxide layer.
[0037] Furthermore, in this disclosure, any two numbers of a variable can constitute a feasible range of that variable, and any range indicated may include or exclude endpoints. Additionally, any value of the indicated variable (whether or not it is indicated by an approximation) may refer to an exact value or an approximation, and includes equivalents, and in some embodiments may refer to the mean, median, representative, majority, etc. Furthermore, in this disclosure, in some embodiments, terms include, constitute, and have can independently refer to generally or broadly including, substantially constitute, or constitute. In this disclosure, in some embodiments, the meaning of any definition does not necessarily exclude the common and customary meaning.
[0038] SiO x N y C z(Where x ranges from 0.5 to about 2, y from about 0.1 to about 1.5, and z from about 0.1 to about 1.5) layers can be used as hard mask layers. The optical constants of such layers can be tuned. However, the etch selectivity (e.g., dry etching) relative to the dielectric layer (e.g., silicon oxide) may be lower than desired, especially in the case of SDDP processes. To overcome these drawbacks, laminated films containing titanium layers and other layers containing silicon have been developed. However, such laminated films have several disadvantages. For example, the film thickness of the laminate is limited to an integer multiple of the laminated layer. Furthermore, when there are differences in etch rates between the layers of the laminated structure, roughness may appear on the sidewalls of the etched regions formed within the laminated structure, which may eventually lead to an increase in roughness in the etched regions formed in the subsequently etched (e.g., silicon oxide) layers, where the hard mask layer is used to template the etched regions. The methods and structures described in this paper address these problems.
[0039] Now turn to the attached diagram. Figure 1 A method 100 for forming one or more of a metal silicon oxide layer and a metal silicon oxynitride layer according to at least one embodiment of the present disclosure is illustrated. Method 100 includes the steps of: providing a substrate in a reaction chamber (step 102), providing a silicon precursor to the reaction chamber during a silicon precursor pulse cycle (step 104), providing a first metal precursor to the reaction chamber during a first metal precursor pulse cycle (step 106), and providing a first reactant to the reaction chamber during a first reactant pulse cycle (step 110). As shown, method 100 may further include the step of applying plasma in the reaction chamber during a plasma cycle (step 114) and / or the step of providing a second metal precursor to the reaction chamber during a second metal precursor pulse cycle (step 108) and / or the step of providing a second reactant to the reaction chamber during a second reactant pulse cycle (step 112). As described in more detail below, two or more steps of method 100 may overlap, and unless otherwise stated, the steps shown need not be performed in the listed order. For example, the silicon precursor pulse cycle and the first metal and / or second metal precursor pulse cycles may overlap (e.g., temporally and within the reaction chamber). Alternatively or concurrently, steps 110 and / or 112 may precede and overlap with one or more of steps 104, 106, and / or 108. Furthermore, individual steps may be repeated before proceeding to the next step. According to a further example, two or more steps may not overlap.
[0040] During step 102, the substrate can be loaded onto the base within the reaction chamber. Once the substrate is loaded onto the base, the gate valve can be closed. In some cases, the base can be moved to the operating position. During step 102, the temperature within the reaction chamber can be brought to a temperature suitable for subsequent processing—for example, between about 75°C and about 400°C. Similarly, the pressure within the reaction chamber can be controlled to provide a depressurized atmosphere for subsequent processing. For example, the pressure within the reaction chamber can be less than 5000 Pa, or less than 2000 Pa, or less than 1000 Pa, or between about 100 Pa and about 1000 Pa, or between about 10 Pa and about 1000 Pa.
[0041] During step 104, the silicon precursor is supplied to the reaction chamber during a silicon precursor pulse cycle. During this step, the temperature and / or pressure may be as described above in conjunction with step 102.
[0042] Silicon precursors can be heated to melting temperature or higher, sublimation temperature or higher, or boiling temperature or higher. For example, silicon precursors can be heated to temperatures of approximately 40°C to approximately 70°C, or approximately 25°C to approximately 100°C.
[0043] According to various examples of this disclosure, the silicon precursor may be or include silanes, aminosilanes, methoxysilanes, and / or ethoxysilanes. As a specific example, the silicon precursor may include one or more of bis(diethylaminosilane) (BDEAS), (3-methoxypropynyl)trimethoxysilane, and tetraethoxysilane.
[0044] The exemplary silicon precursor flow rate during step 104 can be from about 10 sccm to about 1000 sccm. During step 104, the pulse duration of the silicon precursor flow can be from about 0.05 seconds to about 2 seconds.
[0045] As described in more detail below, a carrier gas can be used to facilitate the supply of silicon precursors to the reaction chamber. In these cases, the flow rate of the carrier gas can be between about 0.05 and about 3 standard liters per minute (slpm). Exemplary carrier gases include one or more of Ar, N2, and He.
[0046] During step 106, a first metal precursor is supplied to the reaction chamber during a first metal precursor pulse cycle. During this step, the temperature and / or pressure within the reaction chamber may be as described above in conjunction with steps 102 and 104.
[0047] The first metal precursor may be heated to a melting temperature or higher, a sublimation temperature or higher, or a boiling temperature or higher. For example, the first metal precursor may be heated to a temperature of about 40°C to about 70°C, or about 25°C to about 100°C.
[0048] According to various examples of this disclosure, the first metal precursor may be or include one or more of titanium, hafnium, tantalum, tungsten, zirconium, and yttrium precursors. In some cases, the first metal precursor includes a metal atom (e.g., titanium, hafnium, tantalum, or tungsten) directly bonded to one or more of nitrogen and oxygen atoms. In some cases, the first metal precursor may be or include an organometallic precursor (e.g., including one or more of titanium, hafnium, tantalum, and tungsten). The first metal precursor may be or include an alkylamide or alkoxide (e.g., including one or more of titanium, hafnium, tantalum, and tungsten). By specific examples, the first metal precursor may include titanium or tantalum. Specific example titanium precursors may be selected from tetra(dimethylamino)titanium isopropoxy titanium, titanium tetrachloride, tetradimethylaminotitanium, and isopropoxy titanium. Specific example tantalum precursors may be tris(diethylamino)(tert-butylimide)tantalum (V) (TBTDET) and tris(diethylamino)-tert-butylimide tantalum.
[0049] The example first metal precursor flow rate during step 106 can be from about 10 sccm to about 1000 sccm. During step 106, the pulse duration of the first metal precursor flow can be from about 0.05 seconds to about 2 seconds.
[0050] Similar to the silicon precursor described above, a carrier gas can be used to facilitate the supply of the first metal precursor to the reaction chamber. In these cases, the carrier gas flow rate can be between about 0.05 and about 3 slpm. The carrier gas can be as described above.
[0051] During step 108, a second metal precursor is provided to the reaction chamber during a second metal precursor pulse cycle. As described above, this step is optional. Some embodiments of this disclosure may omit providing a second metal precursor to the reaction chamber.
[0052] During step 108, the temperature and / or pressure within the reaction chamber can be as described above in conjunction with steps 102, 104, and 106. The second metal precursor can be selected from one or more of the first metal precursors described above. The flow rate and pulse duration during the second metal precursor pulse cycle can be the same as or similar to those described above in conjunction with the first metal precursor pulse cycle. The metal in the second metal precursor can be different from the metal in the first metal precursor. The second metal precursor can be supplied to the reaction chamber with the aid of a carrier gas. In these cases, the flow rate of the carrier gas can be between about 0.05 and about 3 slpm. Furthermore, the second metal precursor can be heated to the same or similar temperature as the first metal precursor described above before entering the reaction chamber. According to a specific embodiment of this disclosure, the second metal precursor comprises hafnium.
[0053] During step 110, the first reactant is supplied to the reaction chamber during the first reactant pulse cycle. In this step, the temperature and / or pressure within the reaction chamber can be as described above in conjunction with steps 102-108.
[0054] As described below, the first reactant pulse period may overlap with one or more of steps 104-108. For example, the silicon precursor pulse period, the first metal precursor pulse period, the optional second metal precursor pulse period, and the first reactant pulse period may overlap.
[0055] An exemplary first reactant flow rate during step 110 can be from about 10 sccm to about 3000 sccm. The first reactant stream during step 110 can be continuously passed through one or more deposition cycles.
[0056] The first reactant may include an oxygen reactant and / or a nitrogen reactant. An exemplary oxygen reactant may be one or more reactants selected from the group consisting of oxygen (O2), CO, CO2, N2O, O3, and H2O. An exemplary nitrogen reactant may be one or more reactants selected from the group consisting of nitrogen (N2) and NH3. In some cases, a carrier gas may be provided during step 110. In these cases, the flow rate of the carrier gas to the reaction chamber may be from about 0.05 to about 3 slpm.
[0057] When used, step 112 may be the same as or similar to step 110. The temperature and / or pressure during step 112 may be the same as or similar to the temperature and pressure in step 110. The flow rate and pulse time of the second reactant may be as described above for the first reactant. Alternatively, the total flow rate of the two reactants, alone or with any carrier gas, may be about 0.05 to about 3 slpm.
[0058] In some cases, one or more of the first reactant and the second reactant contain an oxygen reactant, and the other of the first reactant and the second reactant contains a nitrogen reactant. The oxygen and / or nitrogen reactant can be as described above in conjunction with step 110.
[0059] During optional step 114, plasma is applied during the plasma cycle. The plasma can be provided inside or outside the reaction chamber (remotely). The power frequency of the generated plasma can be between approximately 400 kHz and approximately 30 MHz. The power of the generated plasma can be between approximately 50 W and approximately 1000 W. When applied as direct plasma (within the reaction chamber), the spacing between the electrodes can be between approximately 7 mm and approximately 20 mm. During step 114, the temperature and pressure within the reaction chamber can be the same as or similar to the temperature and pressure described above in conjunction with steps 104-112. The exemplary process described herein can be performed with or without plasma.
[0060] Table 1 below illustrates exemplary process conditions for steps 104-114.
[0061]
[0062] Table 1
[0063] Figure 2 Timing 200 applicable to method 100 is shown. Timing 200 includes a first reactant pulse cycle 202, a carrier pulse cycle 204, a silicon precursor pulse cycle 206, a first metal precursor pulse cycle 208, an optional second metal precursor pulse cycle 210, an optional second reactant pulse cycle 212, and a plasma cycle 214. The steps / pulse cycles of timing 200 can be repeated multiple times to obtain a silicon oxide layer or a metal oxynitride layer of desired thickness.
[0064] During the first reactant pulse cycle 202, the first reactant is supplied to the reaction chamber. The first reactant, pulse time, flow rate, and temperature can be as described above in conjunction with step 110.
[0065] During the carrier pulse cycle 204, a carrier gas can be supplied to the reaction chamber. As described in more detail below, the carrier gas can be transferred to one or more of a silicon precursor source, a first metal precursor source, and / or a second metal precursor source to facilitate the delivery of the respective precursor. The flow rate of the carrier gas can be between about 0.05 and about 3 slpm. The carrier gas can be the carrier gas described above in conjunction with method 100.
[0066] During silicon precursor pulse cycle 206, the silicon precursor is supplied to the reaction chamber. The process conditions for the silicon precursor and during silicon precursor pulse cycle 206 can be the same as or similar to those described above in conjunction with step 104 and Table 1.
[0067] During the first metal precursor pulse cycle 208, the first metal precursor is supplied to the reaction chamber. The process conditions for the first metal precursor and during the first metal precursor pulse cycle 208 can be the same as or similar to those described above in conjunction with step 106 and Table 1.
[0068] During an optional second metal precursor pulse cycle 210, the second metal precursor is supplied to the reaction chamber. The process conditions during the second metal precursor pulse cycle 210 can be the same as or similar to those described above in conjunction with step 108 and Table 1.
[0069] During an optional second reactant pulse cycle 212, a second reactant is supplied to the reaction chamber. The second reactant, pulse duration, flow rate, and temperature, etc., can be as described above in conjunction with step 112 and Table 1.
[0070] During plasma cycle 214, plasma power is supplied to the electrodes to generate plasma. The process conditions for plasma cycle 214 can be as described above in combination with step 114 and Table 1.
[0071] like Figure 2As shown, timing 200 can be divided into a feed phase 216, a first purge phase 218, a plasma phase 220, and a second purge phase 222. During feed phase 216, a first reactant, a second reactant (if present), a carrier gas, a silicon precursor, a first metal precursor, and an optional second metal precursor can be supplied to the reaction chamber—for example, the flows of these precursors and reactants within the reaction chamber can overlap. As shown, the silicon precursor pulse period 206 and the first metal precursor pulse period 208 can overlap. In practice, each of the first reactant pulse period 202, the carrier pulse period 204, the silicon precursor pulse period 206, the first metal precursor pulse period 208, the optional second metal precursor pulse period 210, and the optional second reactant pulse period 212 can overlap (e.g., during feed phase 216). Furthermore, the plasma period 214 and the first reactant pulse period 202 and / or the second reactant pulse period 212 can overlap (e.g., during plasma phase 220). According to a further example of this disclosure, the plasma cycle 214 and the silicon precursor pulse cycle 206, the first metal precursor pulse cycle 208, and / or optionally the second metal precursor pulse cycle 210 do not overlap. In these cases, one or more precursors are not excited by plasma.
[0072] During the first purge section 218 and the second purge section 222, a carrier gas or inert gas may flow through the reaction chamber. Furthermore, as... Figure 2 As shown, one or more of the first reactant and the second reactant can flow through the reaction chamber to further promote reactor purging.
[0073] Figure 8 A precursor timing 800 suitable for method 100 according to another embodiment is shown. In timing 800, a cyclic process such as plasma-enhanced ALD is used to deposit silicon metal oxide. Timing 800 includes a silicon precursor pulse cycle 802, followed by a first purge cycle 806, and a metal precursor pulse cycle 804, followed by a second purge cycle 808. The steps / pulse cycles of timing 800 can be repeated multiple times to obtain a silicon metal oxide layer of desired thickness.
[0074] During silicon precursor pulse cycle 802, the silicon precursor is supplied to the reaction chamber. The process conditions for the silicon precursor and during silicon precursor pulse cycle 802 can be the same as or similar to those described above in conjunction with step 104 and Table 1.
[0075] During metal precursor pulse cycle 804, a metal precursor is supplied to the reaction chamber. The process conditions for the metal precursor and during metal precursor pulse cycle 804 can be the same as or similar to those described above in conjunction with step 106 and Table 1. During the first purge cycle 806 and the second purge cycle 808, a carrier gas or inert gas can flow through the reaction chamber. In some cases, plasma can be applied before, during, or after any of steps 802-808. Plasma conditions can be as described above in conjunction with... Figure 1 As stated above.
[0076] Figure 9 A precursor and reactant timing sequence 900 suitable for method 100 according to another embodiment is illustrated. In timing sequence 900, a cyclic process such as plasma-enhanced ALD is used to prepare silicon oxide. Timing sequence 900 includes a silicon precursor pulse cycle 902, followed by a first purge cycle 908, a metal precursor pulse cycle 904, followed by a second purge cycle 910, and a reactant cycle 906, followed by a third purge cycle 912. The steps / pulse cycles of timing sequence 900 can be repeated multiple times to obtain a silicon oxide layer of desired thickness.
[0077] During silicon precursor pulse cycle 902, the silicon precursor is supplied to the reaction chamber. The process conditions for the silicon precursor and during silicon precursor pulse cycle 902 can be the same as or similar to those described above in conjunction with step 104 and Table 1.
[0078] During metal precursor pulse cycle 904, a metal precursor is supplied to the reaction chamber. The process conditions for the metal precursor and during metal precursor pulse cycle 904 can be the same as or similar to those described above in conjunction with step 106 and Table 1. During the first purge cycle 908, the second purge cycle 910, and the third purge cycle 912, a carrier gas or inert gas can flow through the reaction chamber. During reactant cycle 906, reactants are supplied to the reaction chamber. The reactants, pulse duration, flow rate, and temperature can be as described above in conjunction with step 110. In some cases, plasma can be applied before, during, or after any of steps 902-912. Plasma conditions can be as described above in conjunction with... Figure 1 As stated above.
[0079] Figure 10Another precursor and reactant timing sequence 1000 suitable for method 100 according to another embodiment is shown. In timing sequence 1000, a cyclic process such as plasma-enhanced ALD is used to prepare silicon oxide. Timing sequence 1000 includes a silicon precursor pulse cycle 1002, followed by a first purge cycle 1010, a first reactant cycle 1004, followed by a second purge cycle 1014, a metal precursor pulse cycle 1006, followed by a third purge cycle 1014, and a second reactant cycle 1008, followed by a fourth purge cycle 1016. The step / pulse cycle (one cycle) of silicon 1002 and first reactant 1004 can be repeated multiple times (m) before the step / pulse cycle (another cycle) of metal precursor 1006 and second reactant 1008, while the step / pulse cycle (another cycle) of metal precursor 1006 and second reactant 1008 can be repeated multiple times (n) before the entire timing sequence 1000 is repeated. The timing sequence 1000 steps / pulse cycle can be repeated multiple times (x) to obtain a metal oxide silicon layer of desired thickness. Furthermore, the number of cycles m and n can be independently varied to obtain desired configuration and / or properties (e.g., refractive index and extinction coefficient). For example, m can range from about 0 to about 10, n can range from about 0 to about 10, and x can range from about 1 to about 1000. In some embodiments, the first reactant 1004 and the second reactant 1006 are different. In other embodiments, the first reactant 1004 and the second reactant 1006 are the same. Additionally, different or the same silicon and / or metal precursors can be used during steps 1002 and 1006. Changing the precursors and / or reactants for m and n cycles provides additional control over the desired properties of the deposited layer. In some cases, the configuration can be controlled to obtain desired properties, including adhesion to subsequently deposited photoresist, etch selectivity, and / or optical properties, which allows for the use of thinner layers (e.g., less than 20 nm).
[0080] Figure 11-15 The sequence of gases (e.g., reactants), plasma, and precursors suitable for method 100 is shown, wherein, according to additional embodiments, silicon oxide is prepared by plasma-enhanced CVD and / or plasma-enhanced cyclic processes. Figure 11 In the reaction chamber, silicon precursor (precursor 1) and metal precursor (precursor 2) flow into the reaction chamber, causing the flows of precursor 1 and precursor 2 into the reaction chamber to overlap. In addition, the plasma pulse period overlaps with the flows of precursor 1 and precursor 2 into the reaction chamber. Figure 11 The method can be a typical PECVD process.
[0081] exist Figure 12 In this process, a silicon precursor (precursor 1) and a metal precursor (precursor 2) are pulsed into the reaction chamber in an overlapping manner. Gas and plasma power are continuously supplied through multiple pulses of precursor 1 and precursor 2.
[0082] exist Figure 13 In this process, a silicon precursor (precursor 1) is pulsed into the reaction chamber, while a metallic precursor (precursor 2) continuously flows into the reaction chamber. In this configuration, gas and plasma power can be continuously supplied via one or more pulses of precursor 1.
[0083] exist Figure 14 In this process, a silicon precursor (precursor 1) continuously flows into the reaction chamber, while a metal precursor (precursor 2) pulses into the reaction chamber. Similar to the above, gas and plasma power can be continuously supplied via one or more pulses of precursor 2.
[0084] exist Figure 15 In this process, a silicon precursor (precursor 1) is pulsed into the reaction chamber, and a metal precursor (precursor 2) is pulsed into the reaction chamber. During each pulse, one precursor stops approximately simultaneously with the introduction of the other precursor. For example, precursor 2 is introduced less than 1 second or less than 0.5 seconds after precursor 1 stops, and vice versa. In some cases, there may be a period of overlap between the pulses of precursor 1 and precursor 2. In other cases, there may be no overlap or minimal overlap between the pulses of precursor 1 and precursor 2. Figure 11-15 In the timing sequence shown, gas and plasma power are continuously supplied.
[0085] Optical constants such as refractive index (n) and extinction coefficient (n) can be adjusted or manipulated, for example, by manipulating the flow rate or flow ratio of one or more of the silicon precursor and the first and / or second metal precursor. For example, the optical constants of a metal oxide silicon layer or a metal oxynitride silicon layer can be manipulated by manipulating the flow rate of a carrier gas used to facilitate the delivery of one or more of the silicon precursor, the first metal precursor, and the second metal precursor.
[0086] Figure 4 The different refractive index values and extinction coefficients are shown for silicon precursor flow rates: first metal precursor flow rates of 0:1.5, 1:2, 1.5:1.5, 2:1, 2.5:0.5 and 1.5:0 (flow rates in slpm). Figure 5 The numerical ranges of the refractive index and extinction coefficient (within the shaded triangle) of the titanium hafnium silicon oxide layer are shown. The values within the shaded triangle region can be obtained based on the corresponding fluxes of the silicon, first metal, and second metal precursors. Although titanium, silicon, and hafnium are described, other metals may also be used as discussed herein.
[0087] Figure 16 The numerical ranges of the refractive index and extinction coefficient (within the shaded triangles) of the tantalum silicon oxide layer are shown. The tantalum silicon oxide spans a wide range of parameters, including the target values shown by the rectangles.
[0088] Figure 3Structure 300 according to an exemplary embodiment of the present disclosure is shown. Structure 300 may be formed at least in part according to the methods described herein, such as method 100.
[0089] Structure 300 includes a substrate 302 and one or more of a metal oxide silicon layer and a metal oxynitride layer, formed, for example, using method 100 and / or timing 200. The thickness of layer 304 can vary depending on the application. For example, the thickness can be between about 1 nm and about 100 nm.
[0090] As described above, the methods described herein allow for easy manipulation of one or more optical constants (e.g., refractive index and extinction coefficient). According to examples of this disclosure, the extinction coefficient of the silicon oxide layer or silicon oxynitride layer 304 is between about 0 and about 1.3. Alternatively or additionally, the refractive index of the silicon oxide layer or silicon oxynitride layer 304 may be between about 1.4 and about 3.0.
[0091] Now go to Figure 6 A reactor system 600 is illustrated according to exemplary embodiments of the present disclosure. The reactor system 600 can be used to perform one or more steps or sub-steps described herein and / or form one or more structures or portions thereof described herein.
[0092] The reactor system 600 includes a pair of parallel and facing conductive plate electrodes 4, 2 within the interior 11 (reaction zone) of the reaction chamber 3. Although described using a single reaction chamber, the system 600 may include two or more reaction chambers. Plasma can be excited within the reaction chamber 3 by applying, for example, HRF power (e.g., 100 kHz, 13.56 MHz, 27 MHz, 2.45 GHz, or any value between) from a plasma power source 30 to one electrode (e.g., electrode 4) and electrically grounding the other electrode (e.g., electrode 2). A temperature regulator may be located in the lower platform 2 (lower electrode), and the temperature of the substrate 1 placed thereon can be maintained at a desired temperature, such as the substrate temperature mentioned above. Electrode 4 may serve as a gas distribution device, such as a spray plate or spray head. Precursor gas, oxygen and / or nitrogen reactant gas, and carrier gas or inert gas (if any) may be introduced into the reaction chamber 3 from sources 21, 22, 20, and 26 and through the spray plate 4 using one or more of gas lines 23, 24, 25, and 27. Although four gas lines 23, 24, 25, and 26 are illustrated, reactor system 600 may include any suitable number of gas lines. For example, source 21 may correspond to a silicon precursor source, source 22 may correspond to a first reactant (e.g., one or more of an oxygen reactant source and a nitrogen reactant source), source 20 may correspond to a first metal source, and source 26 may correspond to a second metal source or a second reactant source.
[0093] In the reaction chamber 3, a circular conduit 13 with an exhaust line 7 can be provided, through which gas in the interior 11 of the reaction chamber 3 can be discharged. Furthermore, a transfer chamber 5 located below the reaction chamber 3 can be provided with a sealing gas line 29 to introduce sealing gas into the interior 11 of the reaction chamber 3 via the interior 16 (transfer zone) of the transfer chamber 5, where a separation plate 14 for separating the reaction zone and the transfer zone can be provided (the gate valve through which the substrate is transferred to or from the transfer chamber 5 is omitted from this figure). The transfer chamber can also be provided with an exhaust line 6 connected to an exhaust source 32. In some embodiments, two or more (e.g., all) steps of method 100 and / or sequence 200 can be performed without exposing the substrate to air or other oxygen-containing atmospheres.
[0094] In some embodiments, the continuous flow of carrier gas to reaction chamber 3 can be achieved using a flow system (FPS) 700, such as Figure 7 As shown. In this configuration, the carrier gas line 702 can be provided with a bypass line 704 and a path 710 including lines 706, 708 and the precursor container 712. When only the carrier gas is intended to be fed into the reaction chamber, the bypass line 704 and valve 720 are open. When both the carrier gas and the precursor gas are intended to be fed into the reaction chamber, the carrier gas can flow together with the precursor gas through line 706 and valve 716, and exit from the precursor container 712 through line 708 and valve 718. In this way, the carrier gas can flow continuously into the reaction chamber 3, and the precursor gas can be carried in pulses by switching between lines 704 and 706, with virtually no pressure fluctuations in the reaction chamber 3. Furthermore, the amount of precursor gas fed into the reaction chamber 3 can be controlled by adjusting the amount of carrier gas supplied to the container 712 (e.g., using a flow controller 714 and / or valve 716).
[0095] Reactor system 600 may include one or more controllers 28 programmed or otherwise configured to enable the implementation of one or more method steps described herein. Controllers 28 are coupled to various power sources, heating systems, pumps, robots, and gas flow controllers or valves of the reactor, as understood by those skilled in the art. For example, controllers 28 may be configured to control the gas flow of a silicon precursor, a first metal precursor, a first reactant, and a carrier gas into at least one of one or more reaction chambers to form a silicon oxide layer or a silicon oxynitride layer on a substrate surface. As described above, the gas flow of the silicon precursor and the gas flow of the first metal precursor may overlap in at least one of the one or more reaction chambers. The controller may be similarly configured to perform additional steps described herein.
[0096] In some embodiments, a dual-chamber reactor (for processing two portions or compartments of a substrate disposed close to each other) may be used, wherein reactant gases and inert gases may be supplied via a shared line, while precursor gases may be supplied via a non-shared line.
[0097] The exemplary embodiments disclosed above do not limit the scope of the invention, as these embodiments are merely examples of embodiments of the invention. Any equivalent embodiments are within the scope of the invention. In fact, various modifications to this disclosure, such as alternative useful combinations of the described elements, will become apparent to those skilled in the art from the description, in addition to the embodiments shown and described herein. Such modifications and embodiments are also intended to fall within the scope of the appended claims.
Claims
1. A method for forming one or more of a metal silicon oxide layer and a metal silicon oxynitride layer, the method comprising the steps of: A substrate is provided within the reaction chamber of the reactor; Silicon precursors are supplied to the reaction chamber during the silicon precursor pulse cycle; The first metal precursor is supplied to the reaction chamber during the first metal precursor pulse cycle; as well as The first reactant is supplied to the reaction chamber during the first reactant pulse cycle. The silicon precursor pulse period and the first metal precursor pulse period overlap. The pulse period of the first reactant overlaps with one or more of the pulse periods of the silicon precursor and the first metal precursor; and During the step of providing the first reactant, a continuous plasma cycle is applied.
2. The method according to claim 1, wherein, The silicon precursor pulse cycle, the first metal precursor pulse cycle, and the first reactant pulse cycle overlap.
3. The method according to claim 1 further comprises forming a metal silicon oxide nitride layer.
4. The method according to claim 3, wherein, The plasma period and the second reactant pulse period overlap.
5. The method according to claim 1, wherein, The plasma cycle and the silicon precursor pulse cycle do not overlap.
6. The method according to claim 1, wherein, The plasma cycle and the first metal precursor pulse cycle do not overlap.
7. The method according to claim 1, wherein, The first reactant pulse cycle is continuous in one or more deposition cycles.
8. The method of claim 1, further comprising the step of providing a second metal precursor to the reaction chamber during a second metal precursor pulse cycle.
9. The method of claim 1, further comprising the step of providing a second reactant to the reaction chamber during a second reactant pulse cycle, wherein the second reactant pulse cycle overlaps with the first reactant pulse cycle.
10. The method according to claim 9, wherein, One of the first reactant and the second reactant includes an oxygen reactant, and the other of the first reactant and the second reactant includes a nitrogen reactant.
11. The method according to claim 10, wherein, The oxygen reactants are selected from oxygen (O2), CO, CO2, N2O, O3, and H2O.
12. The method according to claim 10 or 11, wherein, The nitrogen reactants are selected from nitrogen (N2) and NH3.
13. The method according to claim 1, wherein, The silicon precursors include silanes, aminosilanes, methoxysilanes, and / or ethoxysilanes.
14. The method according to claim 13, wherein, The silicon precursor is selected from bis(diethylaminosilane), (3-methoxypropynyl)trimethoxysilane, and tetraethoxysilane.
15. The method according to claim 8, wherein, The first metal precursor includes one or more of titanium precursor, hafnium precursor, tantalum precursor and tungsten precursor.
16. The method according to claim 15, wherein, The second metal precursor includes one or more of titanium precursor, hafnium precursor, tantalum precursor and tungsten precursor, and wherein the metal in the second metal precursor is different from the metal in the first metal precursor.
17. The method according to claim 15, wherein, The titanium precursor is selected from titanium isopropoxide and tetra(dimethylamino)titanium.
18. The method according to claim 15, wherein, The first metal precursor includes metal atoms directly bonded to one or more of nitrogen and oxygen atoms, and the second metal precursor is selected from one or more of the first metal precursor.
19. The method according to claim 15, wherein, The first metal precursor includes a metal-organic precursor, and the second metal precursor is selected from one or more of the first metal precursors.
20. The method of claim 15, wherein, The first metal precursor includes an alkylamide or an alkoxide, and the second metal precursor includes one or more selected from the first metal precursor.
21. The method according to claim 1, wherein, The optical constants of the silicon oxide layer or the silicon oxynitride layer are manipulated by manipulating the flow rate of one or more of the silicon precursor and the first metal precursor and / or the flow rate ratio of the silicon precursor and the first metal precursor.
22. The method according to claim 1, wherein, The optical constants of the metal oxide silicon layer or the metal oxynitride silicon layer are manipulated by manipulating the flow rate of the carrier gas.
23. A structure for an electronic device, comprising: Substrate; as well as One or more of a metal oxide silicon layer and a metal oxynitride silicon layer formed by the method according to any one of claims 1-20 covering the substrate.
24. The structure according to claim 23, wherein, The extinction coefficient of the metal oxide silicon layer or the metal oxynitride silicon layer is between 0 and 1.
3.
25. The structure according to claim 23 or 24, wherein, The refractive index of the metal silicon oxide layer or the metal silicon oxynitride layer is between 1.4 and 3.
0.
26. The structure according to claim 23 or 24, wherein, The thickness of the metal oxide silicon layer or the metal oxynitride silicon layer is between 1 nm and 100 nm.
27. A system for manufacturing electronic devices, comprising: One or more reaction chambers; Silicon precursor source; First metal precursor source; First reactant source; Plasma power source; Exhaust source; as well as Controller The controller is configured to control the airflow of a silicon precursor, a first metal precursor, and a first reactant into at least one of the one or more reaction chambers to form a silicon oxide layer or a silicon oxynitride layer on the substrate surface. The pulse period of the gas flow from the silicon precursor and the pulse period of the gas flow from the first metal precursor overlap in at least one of the one or more reaction chambers. The pulse period of the first reactant overlaps with one or more of the pulse periods of the silicon precursor and the first metal precursor; and During the step of providing the first reactant, a continuous plasma cycle is applied.
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