Pixel and display device comprising the same

Abstract

A pixel and a display apparatus including the same are provided. The pixel can include first and second electrodes spaced apart from each other in a first direction, each of the first and second electrodes extending in a second direction intersecting the first direction; and a light emitting element disposed between the first and second electrodes. The first electrode can include at least one first (1-1) electrode extending in a third direction oblique with respect to one of the first and second directions, and at least one first (1-2) electrode extending in a fourth direction intersecting the third direction. The second electrode can include at least one second (2-1) electrode extending in the third direction, and at least one second (2-2) electrode extending in the fourth direction.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority and benefits to Korean Patent Application No. 10-2020-0108121, filed with the Korean Intellectual Property Office on August 26, 2020, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure generally relates to pixels and display devices including such pixels. Background Technology

[0004] With increasing interest in information display and the growing demand for portable information media, research and commercialization have focused on display devices.

[0005] In the field of display technology, displays can include tablet computers, smartphone displays, computer monitors, smartwatches, personal digital assistants (PDAs), and more. These devices use various forms of displays, such as light-emitting diodes (LEDs), organic light-emitting diodes (OLEDs), and active-matrix organic light-emitting diodes (AMOLEDs). In many portable devices that rely on battery life, the display is one of the main causes of power loss and / or circuit problems.

[0006] Such display devices may include thin-film transistors (TFTs) as driving circuitry, capacitors, etc. The TFT may include an active layer and a gate electrode. The active layer includes a channel region, a source region, and a drain region. The gate electrode is electrically insulated from the active layer through a gate insulating layer. Typically, the active layer of a TFT may include amorphous silicon or polycrystalline silicon.

[0007] It will be understood that this background in the technical section is partly intended to provide useful context for understanding the technology. However, this background in the technical section may also include ideas, concepts, or knowledge that were not known or understood by one of skill in the art prior to the corresponding valid submission date of the subject matter disclosed herein. Summary of the Invention

[0008] The implementation provides a pixel that can improve luminous efficiency while minimizing short-circuit defects between two adjacent electrodes.

[0009] The implementation also provides a display device including pixels.

[0010] According to an aspect of this disclosure, a pixel is provided, which may include: a first electrode and a second electrode, spaced apart from each other in a first direction, the first electrode and the second electrode each extending in a second direction intersecting the first direction; and a light-emitting element disposed between the first electrode and the second electrode. The first electrode may include at least one first (1-1) electrode and at least one second (1-2) electrode, wherein the at least one first (1-1) electrode extends upward in a third direction inclined relative to one of the first and second directions, and the at least one second (1-2) electrode extends in a fourth direction intersecting the third direction. The second electrode may include at least one second (2-1) electrode extending upward in the third direction and at least one second (2-2) electrode extending in the fourth direction.

[0011] At least one (1-1) electrode and at least one (2-1) electrode may correspond to each other in a first direction, and at least one (1-2) electrode and at least one (2-2) electrode may correspond to each other in a first direction.

[0012] The pixel may also include a dam surrounding the light-emitting element along its periphery in the plan view, the dam including at least one opening. The at least one opening may correspond to an emitting region in each of the light-emitting elements in which light is emitted.

[0013] The first and second electrodes can have the same planar shape in the emission region.

[0014] At least one (1-1) electrode and at least one (2-1) electrode may have the same planar shape, and at least one (1-2) electrode and at least one (2-2) electrode may have the same planar shape.

[0015] At least one (1-1) electrode and at least one (1-2) electrode may form a mirror symmetry with respect to the boundary between at least one (1-1) electrode and at least one (1-2) electrode, and at least one (2-1) electrode and at least one (2-2) electrode may form a mirror symmetry with respect to the boundary between at least one (2-1) electrode and at least one (2-2) electrode.

[0016] The width of each of at least one (1-1) electrode, at least one (1-2) electrode, at least one (2-1) electrode, and at least one (2-2) electrode in the second direction may be less than the length of each of the light-emitting elements.

[0017] In the planar view, each of at least one (1-1) electrode and at least one (2-1) electrode may have a polygonal shape having an inclination corresponding to a third direction, and in the planar view, each of at least one (1-2) electrode and at least one (2-2) electrode may have a polygonal shape having an inclination corresponding to a fourth direction.

[0018] At least one (1-1) electrode and at least one (1-2) electrode may be arranged alternately along the second direction, and at least one (2-1) electrode and at least one (2-2) electrode may be arranged alternately along the second direction.

[0019] The pixel may also include an insulating layer disposed above the light-emitting element. The insulating layer may have a planar shape corresponding to the first electrode and the second electrode.

[0020] The pixel may further include: a first contact electrode disposed on an insulating layer, the first contact electrode being electrically connected to each of the light-emitting elements and the first electrode; and a second contact electrode disposed spaced apart from the first contact electrode in a first direction, the second contact electrode being electrically connected to each of the light-emitting elements and the second electrode.

[0021] The first contact electrode may have a planar shape corresponding to the first electrode, and the second contact electrode may have a planar shape corresponding to the second electrode.

[0022] In the plan view, the width between the first electrode and the second electrode in the first direction can be constant along the second direction.

[0023] The widths of at least one (1-1) electrode and at least one (2-1) electrode in the first direction may be equal to each other, and the widths of at least one (1-2) electrode and at least one (2-2) electrode in the first direction may be equal to each other.

[0024] Each of the light-emitting elements may include a first end portion and a second end portion, the first end portion and the second end portion being located at the end of each of the light-emitting elements in a length direction between a first electrode and a second electrode. The first end portion may be positioned adjacent to one of the first electrode and the second electrode, and the second end portion may be positioned adjacent to the other of the first electrode and the second electrode.

[0025] The light-emitting element may include a light-emitting element whose length direction is parallel to a third or fourth direction.

[0026] In a planar diagram, the first and second electrodes can have a serrated shape.

[0027] The first electrode and the second electrode may include at least one curve having a predetermined curvature in the planar diagram.

[0028] According to an aspect of this disclosure, a display device is provided, which may include: a substrate; and a plurality of pixels disposed on the substrate. Each of the pixels may include: a pixel circuit layer disposed on the substrate, the pixel circuit layer including at least one transistor; a first electrode and a second electrode disposed on the pixel circuit layer and spaced apart from each other in a first direction, the first electrode and the second electrode each extending in a second direction intersecting the first direction; a light-emitting element disposed between the first electrode and the second electrode; and an insulating layer disposed on the light-emitting element.

[0029] The first electrode may include at least one (1-1) electrode and at least one (1-2) electrode, wherein the at least one (1-1) electrode extends upward in a third direction inclined relative to one of the first and second directions, and the at least one (1-2) electrode extends in a fourth direction intersecting the third direction. The second electrode may include at least one (2-1) electrode extending upward in the third direction and at least one (2-2) electrode extending in the fourth direction.

[0030] At least one (1-1) electrode and at least one (2-1) electrode may correspond to each other in a first direction, and at least one (1-2) electrode and at least one (2-2) electrode may correspond to each other in a first direction. Attached Figure Description

[0031] Exemplary embodiments will now be described more fully below with reference to the accompanying drawings; however, exemplary embodiments may be implemented in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the exemplary embodiments to those skilled in the art.

[0032] In the accompanying drawings, dimensions may be exaggerated for clarity. It will be understood that when an element is referred to as being "between" two elements, the element may be the only element between the two elements, or there may be one or more intervening elements. Throughout the text, the same reference numerals denote the same elements.

[0033] Figure 1A This is a perspective view schematically showing a light-emitting element according to an embodiment of the present disclosure.

[0034] Figure 1B This is a perspective view schematically showing a light-emitting element according to another embodiment of the present disclosure.

[0035] Figure 2A yes Figure 1AA cross-sectional view of the light-emitting element shown.

[0036] Figure 2B yes Figure 1B A cross-sectional view of the light-emitting element shown.

[0037] Figure 3 This is a schematic plan view illustrating a display device according to an embodiment of the present disclosure, and in particular, it is a display device using... Figure 1A and Figure 2A The image shows a view of a display device in which the light-emitting element is used as a light source.

[0038] Figure 4 It is shown that it includes Figure 3 The circuit diagram illustrates an implementation of the electrical connection relationships between components in a pixel.

[0039] Figure 5 It is shown Figure 3 A schematic plan view of one of the pixels shown.

[0040] Figure 6A Is only shown Figure 5 A schematic plan view of the first and second electrodes in the pixel and the light-emitting element shown.

[0041] Figure 6B It is shown Figure 6A A schematic plan view of another embodiment of the first and second electrodes shown.

[0042] Figure 7 It is along Figure 5 The sectional view shown is taken by line I-I'.

[0043] Figure 8 It is along Figure 5 The sectional view shown is taken from line II-II'.

[0044] Figure 9 It is along Figure 5 The sectional view shown is taken from line III-III'.

[0045] Figure 10 This is a schematic plan view showing pixels according to another embodiment of the present disclosure.

[0046] Figure 11 It is along Figure 10 The cross-sectional view shown is taken along line IV-IV'.

[0047] Figure 12 It shows Figure 10 Another embodiment of the embankment pattern shown is along... Figure 10 The cross-sectional view shown is taken along line IV-IV'.

[0048] Figure 13 It shows Figure 10 Another embodiment of the first and second contact electrodes shown, and along... Figure 10 The cross-sectional view shown is taken along line IV-IV'.

[0049] Figure 14 This is a schematic plan view of pixels according to yet another embodiment of the present disclosure.

[0050] Figure 15 It is along Figure 14 The cross-sectional view shown is taken by line V-V'. Detailed Implementation

[0051] This disclosure is applicable to a variety of variations and different shapes, and therefore only specific examples are described in detail. However, the examples are not limited to certain shapes, but are applicable to all variations and equivalent materials and substitutions. The included figures are shown as examples in which the figures have been expanded for better understanding.

[0052] In the accompanying drawings, the thickness of certain lines, layers, components, elements, or features may be exaggerated for clarity. It will be understood that although the terms “first,” “second,” etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. Therefore, the “first” element discussed below may also be referred to as the “second” element without departing from the teachings of this disclosure. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise.

[0053] It will also be understood that, when used in this specification, the terms "include" and / or "including" specify the presence of the stated feature, integral, step, operation, element, and / or component, but do not exclude the presence and / or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof. Furthermore, the expression that an element, such as a layer, region, substrate, or plate, is placed "on" or "above" another element indicates not only that the element is placed "directly" on or "straight above" the other element, but also that another element is inserted between the element and the other element. Similarly, the expression that an element, such as a layer, region, substrate, or plate, is placed "below" or "under" another element indicates not only that the element is placed "directly" below or "straight below" the other element, but also that another element is inserted between the element and the other element.

[0054] The terms “and” and “or” can be used in a connective or disjunctive sense and should generally be interpreted as “and / or”. For example, the expression “A and / or B” means only A, only B, or both A and B. Throughout the disclosure, the expression “at least one of a, b, and c” means only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof.

[0055] In this specification, it will be understood that when an element (e.g., a first element) is "(operably or communicatively) coupled" / "(operably or communicatively) coupled to" or "connected to" another element (e.g., a second element), the element may be directly coupled to or connected to the other element, or an intermediary element (e.g., a third element) may exist between the element and the other element. Conversely, it will be understood that when an element (e.g., a first element) is "directly coupled" / "directly coupled to" or "directly connected to" another element (e.g., a second element), there is no intermediary element (e.g., a third element) between the element and the other element.

[0056] In the following, embodiments of the present disclosure and items necessary for those skilled in the art to readily understand the contents of the present disclosure will be described in detail with reference to the accompanying drawings.

[0057] The term “overlap” can include layer, stack, face or facing, extending above, extending below, covering or partially covering, or any other suitable term as would be understood and appreciated by one of ordinary skill in the art. The phrase “non-overlap” can include, as would be understood and appreciated by one of ordinary skill in the art, being separate from, side by, or offset from, and any other suitable equivalent.

[0058] As used herein, terms such as “about,” “approximately,” and “substantially” include the value and the average of the values ​​within an acceptable range of deviations from the particular value, as determined by a person of ordinary skill in the art when considering the measurement in question and the errors associated with the measurement of the particular quantity (i.e., limitations of the measurement system). For example, “about” may mean within one or more standard deviations, or, for example, within ±30%, ±20%, ±10%, or ±5% of the value.

[0059] Unless otherwise specified or implied, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will also be understood that terms (such as those defined in common dictionaries) should be interpreted as having the meaning consistent with their meaning in the context of the relevant art, and will not be interpreted in an ideal or overly formal sense unless clearly defined in the specification.

[0060] Figure 1A This is a perspective view schematically showing a light-emitting element according to an embodiment of the present disclosure. Figure 2A yes Figure 1A A cross-sectional view of the light-emitting element shown.

[0061] In embodiments of this disclosure, the type and / or shape of the light-emitting element are not limited to... Figure 1A and Figure 2A The implementation shown is illustrated.

[0062] refer to Figure 1A and Figure 2A The light-emitting element (LD) may include a first semiconductor layer 11, a second semiconductor layer 13, and an active layer 12 interposed between the first semiconductor layer 11 and the second semiconductor layer 13. In an example, the light-emitting element (LD) may be implemented as having a light-emitting stack structure in which the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13 are sequentially stacked.

[0063] The light-emitting element (LD) can be configured to extend in one direction. Assuming the extension direction of the LD is the length direction, the LD may include one end portion (or lower end portion) and another end portion (or upper end portion) along the extension direction. Either the first semiconductor layer 11 or the second semiconductor layer 13 may be disposed at the one end portion (or lower end portion) of the LD, and the other semiconductor layer 11 or the second semiconductor layer 13 may be disposed at the other end portion (or upper end portion) of the LD. In the example, the first semiconductor layer 11 may be disposed at the one end portion (or lower end portion) of the LD, and the second semiconductor layer 13 may be disposed at the other end portion (or upper end portion) of the LD.

[0064] The light-emitting element (LD) can be configured in various shapes. In an example, the LD may have a rod-like or bar-like shape that is relatively long in its length L direction (i.e., its aspect ratio is greater than 1). In embodiments of this disclosure, the length L of the LD in the length L direction may be greater than the diameter D (or the width of the cross-section) of the LD. The LD may include, for example, a light-emitting diode (LED) manufactured to be sufficiently small to have a diameter D and / or length L on a scale ranging from nanometer to micrometer.

[0065] The diameter D of the light-emitting element (LD) can be from about 0.5 μm to 5 μm, and the length L of the light-emitting element (LD) can be from about 1 μm to 10 μm. However, the diameter D and length L of the light-emitting element (LD) are not limited to these, and the dimensions of the light-emitting element (LD) can be modified to suit the requirements (or design conditions) of the lighting device or self-emissive display device to which the light-emitting element (LD) is applied.

[0066] The first semiconductor layer 11 may include, for example, at least one n-type semiconductor layer. For example, the first semiconductor layer 11 may include any one of the semiconductor materials InAlGaN, GaN, AlGaN, InGaN, AlN, and InN, and may include an n-type semiconductor layer doped with a first conductive dopant (or n-type dopant) such as Si, Ge, or Sn. However, the materials constituting the first semiconductor layer 11 are not limited thereto. The first semiconductor layer 11 can be configured with various materials. In embodiments of this disclosure, the first semiconductor layer 11 may include a gallium nitride (GaN) semiconductor material doped with a first conductive dopant (or n-type dopant). The first semiconductor layer 11 may include an upper surface in contact with the active layer 12 and a lower surface exposed to the outside along the length L direction of the light-emitting element LD. The lower surface of the first semiconductor layer 11 may be one end portion (or lower end portion) of the light-emitting element LD.

[0067] The active layer 12 can be formed on the first semiconductor layer 11, and can be formed in a single quantum well structure or a multi-quantum well structure. In the example where the active layer 12 is formed in a multi-quantum well structure, the barrier layer (not shown), strain enhancement layer (not shown), and well layer (not shown) constituting a unit can be periodically and repeatedly stacked in the active layer 12. The strain enhancement layer can have a smaller lattice constant than the barrier layer to further enhance the strain applied to the well layer, such as compressive strain. However, the structure of the active layer 12 is not limited to the above-described embodiment.

[0068] The active layer can emit light with wavelengths from 400 nm to 900 nm and uses a dual heterostructure. In embodiments of this disclosure, a cladding layer (not shown) doped with a conductive dopant can be formed on the top and / or bottom of the active layer 12 along the length L direction of the light-emitting element LD. In examples, the cladding layer can be formed as an AlGaN layer or an InAlGaN layer. In some embodiments, materials such as AlGaN or InAlGaN can be used to form the active layer 12. The active layer 12 can be configured with various materials. The active layer 12 may include a first surface in contact with the first semiconductor layer 11 and a second surface in contact with the second semiconductor layer 13.

[0069] When an electric field with a predetermined voltage or greater is applied to both ends of the light-emitting element LD, the light-emitting element LD can emit light when electron-hole pairs recombine in the active layer 12. The light emission of the light-emitting element LD can be controlled using this principle, allowing the light-emitting element LD to be used as a light source (or light source) for various light-emitting devices, including pixels of a display device.

[0070] The second semiconductor layer 13 may be formed on the second surface of the active layer 12 and may include a semiconductor layer of a different type than the first semiconductor layer 11. In an example, the second semiconductor layer 13 may include at least one p-type semiconductor material. For example, the second semiconductor layer 13 may include at least one semiconductor material selected from InAlGaN, GaN, AlGaN, InGaN, AlN, and InN, and may include a p-type semiconductor layer doped with a second conductive dopant (or p-type dopant) such as Mg. However, the materials constituting the second semiconductor layer 13 are not limited thereto. The second semiconductor layer 13 may be configured with various materials. In embodiments of this disclosure, the second semiconductor layer 13 may include gallium nitride (GaN) semiconductor material doped with a second conductive dopant (or p-type dopant). The second semiconductor layer 13 may include a lower surface in contact with the second surface of the active layer 12 and an upper surface exposed to the outside along the length L direction of the light-emitting element LD. The upper surface of the second semiconductor layer 13 may be the other end portion (or upper end portion) of the light-emitting element LD.

[0071] In embodiments of this disclosure, the first semiconductor layer 11 and the second semiconductor layer 13 may have different thicknesses along the length L direction of the light-emitting element LD. In the example, along the length L direction of the light-emitting element LD, the first semiconductor layer 11 may have a relatively thicker thickness than the second semiconductor layer 13. Therefore, the active layer 12 of the light-emitting element LD may be positioned so that its lower surface is adjacent to the upper surface of the second semiconductor layer 13.

[0072] Although it is shown that each of the first semiconductor layer 11 and the second semiconductor layer 13 may be configured with one layer, this disclosure is not limited thereto. In embodiments of this disclosure, each of the first semiconductor layer 11 and the second semiconductor layer 13 may further include at least one layer, such as a cladding layer and / or a tensile strain barrier reduction (TSBR) layer, depending on the material of the active layer 12. The TSBR layer may be a strain reduction layer disposed between semiconductor layers with different lattice structures to perform a buffering function for reducing lattice constant differences. The TSBR layer may be configured with a p-type semiconductor layer such as p-GaInP, p-AlInP, or p-AlGaInP, but this disclosure is not limited thereto.

[0073] In some embodiments, in addition to the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13 described above, the light-emitting element LD may further include an additional electrode (not shown) (hereinafter referred to as the "first additional electrode") disposed on top of the second semiconductor layer 13. In other embodiments, the light-emitting element LD may further include another additional electrode (not shown) (hereinafter referred to as the "second additional electrode") disposed at one end of the first semiconductor layer 11.

[0074] Each of the first and second additional electrodes may be an ohmic contact electrode, but this disclosure is not limited thereto. In some embodiments, each of the first and second additional electrodes may be a Schottky contact electrode. The first and second additional electrodes may include conductive materials. For example, the first and second additional electrodes may include opaque metals using one or a mixture of chromium (Cr), titanium (Ti), aluminum (Al), gold (Au), nickel (Ni), and any oxides and alloys thereof, but this disclosure is not limited thereto. In some embodiments, the first and second additional electrodes may include transparent conductive oxides, such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium gallium zinc oxide (IGZO), or indium tin zinc oxide (ITZO).

[0075] The materials included in the first and second additional electrodes may be the same or different from each other. The first and second additional electrodes may be substantially transparent or translucent. Therefore, light generated in the light-emitting element LD can be emitted to the outside of the light-emitting element LD by passing through the first and second additional electrodes. In some embodiments, where light generated in the light-emitting element LD does not pass through the first and second additional electrodes and is emitted to the outside of the light-emitting element LD through a region other than the two end portions of the light-emitting element LD, the first and second additional electrodes may comprise opaque metals.

[0076] In embodiments of this disclosure, the light-emitting element LD may further include an insulating film 14. However, in some embodiments, the insulating film 14 may be omitted, or may be configured to cover only portions of the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13.

[0077] The insulating film 14 prevents electrical short circuits that may occur when the active layer 12 comes into contact with conductive materials other than the first semiconductor layer 11 and the second semiconductor layer 13. Furthermore, the insulating film 14 minimizes surface defects in the light-emitting element (LD), thereby improving the LD's lifetime and luminous efficiency. Additionally, in the case of densely packed LDs, the insulating film 14 prevents unwanted short circuits between the LDs. Whether or not the insulating film 14 is provided is not limited, as long as the active layer 12 can prevent short circuits with external conductive materials.

[0078] The insulating film 14 can be configured to completely surround the outer circumference of the light-emitting stack structure including the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13.

[0079] Although the above embodiments describe a shape in which the insulating film 14 is configured to completely surround the outer circumference of each of the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13, this disclosure is not limited thereto. In some embodiments, where the light-emitting element LD includes a first additional electrode, the insulating film 14 may completely surround the outer circumference of each of the first semiconductor layer 11, the active layer 12, the second semiconductor layer 13, and the first additional electrode. In other embodiments, the insulating film 14 may not completely surround the outer circumference of the first additional electrode, or it may surround only a portion of the outer circumference of the first additional electrode, and may not surround other portions of the outer circumference of the first additional electrode. In some embodiments, where the first additional electrode is disposed at the other end portion (or upper end portion) of the light-emitting element LD and the second additional electrode is disposed at one end portion (or lower end portion) of the light-emitting element LD, the insulating film 14 may expose at least one area of ​​each of the first and second additional electrodes.

[0080] The insulating film 14 may include a transparent insulating material. For example, the insulating film 14 may include a material selected from silicon dioxide (SiO2). x ), silicon nitride (SiN) x ), silicon oxynitride (SiON), aluminum oxide (AlO) x It is at least one insulating material from the group consisting of titanium dioxide (TiO2), etc. However, this disclosure is not limited thereto, and various materials with insulating properties can be used as the material of the insulating film 14. The insulating film 14 can be provided in the form of a single film or in the form of a multi-film comprising at least two films.

[0081] Figure 1B This is a perspective view schematically showing a light-emitting element according to another embodiment of the present disclosure. Figure 2B yes Figure 1B A cross-sectional view of the light-emitting element shown. Figure 1B and Figure 2B In this light-emitting element (LD), the light-emitting element may include a light-emitting pattern 10 having a core-shell structure. A first semiconductor layer 11 may be located at the core, i.e., the middle (or center) of the light-emitting element LD. An active layer 12 may be disposed and / or formed in a shape surrounding the outer circumference of the first semiconductor layer 11, and a second semiconductor layer 13 may be disposed and / or formed in a shape surrounding the active layer 12. Furthermore, the light-emitting element LD may also include an additional electrode (not shown) surrounding at least one side of the second semiconductor layer 13. In some embodiments, the light-emitting element LD may also include an insulating film 14, which may be disposed on the outer circumference of the light-emitting pattern 10 having a core-shell structure, and may comprise a transparent insulating material. The light-emitting element LD including the light-emitting pattern 10 having a core-shell structure can be manufactured by a growth process.

[0082] The aforementioned light-emitting element (LD) can be used as a light source (or light source) for various display devices. The LD can be manufactured using surface treatment processes. For example, when mixing the LD in a liquid solution (or solvent) to provide light to each pixel area (e.g., the light-emitting area of ​​each pixel or the light-emitting area of ​​each sub-pixel), each LD can be surface-treated so that it does not agglomerate unevenly in the solution, but is instead uniformly dispersed within the solution.

[0083] The light-emitting unit (or light-emitting device) including the aforementioned light-emitting element LD can be used in various types of devices (including display devices) that require a light source. When the light-emitting element LD is positioned in the light-emitting area of ​​each pixel on a display panel, the light-emitting element LD can serve as the light source for the pixel. However, the application areas of the light-emitting element LD are not limited to the examples described above. For instance, the light-emitting element LD can be used in other types of devices that require a light source, such as lighting devices.

[0084] Figure 3 A display device according to an embodiment of the present disclosure is shown, and in particular, it is used... Figure 1A and Figure 2A The diagram shows a schematic plan view of a display device in which the light-emitting element serves as the light source.

[0085] exist Figure 3 For convenience, the structure of the display device DD is briefly shown based on the display area DA in which images can be displayed.

[0086] refer to Figures 1A to 3The display device DD according to the embodiments of the present disclosure may include a substrate SUB, a plurality of pixels PXL disposed on the substrate SUB and each of them may include at least one light-emitting element LD, a driving unit disposed on the substrate SUB and driving the pixels PXL, and a line unit (not shown) connecting the pixels PXL and the driving unit (not shown).

[0087] This disclosure can be applied to any electronic device in which a display surface can be applied to at least one of its surfaces, such as smartphones, televisions, tablet PCs, mobile phones, video phones, e-book readers, desktop PCs, laptop PCs, netbooks, workstations, servers, personal digital assistants (PDAs), portable multimedia players (PMPs), MP3 players, medical devices, cameras, or wearable devices.

[0088] Based on the method of driving the light-emitting element (LD), the display device (DD) can be divided into passive matrix display devices and active matrix display devices. In the example, when the display device (DD) is implemented as an active matrix display device, each of the pixels (PXL) may include a driving transistor for controlling the amount of current supplied to the light-emitting element (LD), a switching transistor for transmitting data signals to the driving transistor, etc.

[0089] The display device DD can be configured in various shapes. In the example, the display device DD can be configured as a rectangular plate shape with two pairs of parallel sides, but this disclosure is not limited thereto. When the display device DD is configured as a rectangular plate shape, either of the two pairs of sides can be longer than the other pair of sides. For convenience, a case is shown in which the display device DD can be configured as a rectangular shape with a pair of long sides and a pair of short sides. The direction of extension of the long side can be represented as a second direction DR2, the direction of extension of the short side can be represented as a first direction DR1, and the direction perpendicular to the direction of extension of the long and short sides can be represented as a third direction DR3. In a display device DD configured as a rectangular plate shape, a corner portion where a long side and a short side can touch (or meet) each other can have a rounded shape, but this disclosure is not limited thereto.

[0090] The substrate SUB may include the display area DA and the non-display area NDA.

[0091] The display area DA can be an area in which pixels PXL for displaying images are disposed. The non-display area NDA can be an area in which a driving unit for driving pixels PXL and a portion of a line unit connecting pixels PXL and the driving unit are disposed. For convenience, in Figure 3 Only one pixel PXL is shown, but multiple pixels PXL can essentially be set in the display area DA of the substrate SUB.

[0092] The non-display area NDA can be located on at least one side of the display area DA. The non-display area NDA can surround the circumference (or edge) of the display area DA. The non-display area NDA can be provided with line units connected to the pixel PXL and driving units that can be electrically connected to the line units and drive the pixel PXL.

[0093] The line unit can electrically connect the driving unit and the pixel PXL. The line unit can be a fan-out line that provides a signal to each pixel PXL and is electrically connected to signal lines (e.g., scan lines, data lines, transmit control lines, etc., electrically connected to each pixel PXL). Alternatively, the line unit can be a fan-out line electrically connected to signal lines (e.g., control lines, sensing lines, etc., electrically connected to each pixel PXL) to compensate for changes in the electrical characteristics of each pixel PXL in real time.

[0094] The substrate SUB may include a transparent insulating material to allow light to pass through it. The substrate SUB may be a rigid substrate or a flexible substrate.

[0095] One region on the substrate SUB can be designated as a display region DA, where pixel PXL is disposed, and another region on the substrate SUB can be designated as a non-display region NDA. In the example, the substrate SUB may include the display region DA and the non-display region NDA, where the display region DA includes the pixel region in which the corresponding pixel PXL is disposed, and the non-display region NDA is disposed at the periphery of the display region DA (or adjacent to the display region DA).

[0096] Each of the pixels PXL can be disposed in the display area DA. In embodiments of this disclosure, the pixels PXL can be arranged (disposed) in the display area DA in a striped or pentile pattern, but this disclosure is not limited thereto.

[0097] Each pixel PXL may include at least one light-emitting element (LD) driven by a corresponding scan signal and a corresponding data signal. The LD may have a size ranging from nanometer to micrometer scale and is connected in parallel with other light-emitting elements disposed adjacent to it. However, this disclosure is not limited thereto. The LD may constitute the light source for each pixel PXL.

[0098] Each pixel PXL can include at least one light source, for example, Figure 1A The light-emitting element LD shown can be driven by a predetermined signal (e.g., a scan signal and a data signal) and / or a predetermined power supply (e.g., a first driving power supply and a second driving power supply). However, the types of light-emitting elements LDs that can be used as the light source for the pixel PXL are not limited to this.

[0099] The driving unit provides predetermined signals and predetermined power to each pixel PXL via line units, and thus, the driving of the pixel PXL can be controlled. The driving unit may include a scan driver, a transmit driver, a data driver, and a timing controller.

[0100] Figure 4 It is shown that it includes Figure 3 The circuit diagram illustrates an implementation of the electrical connection relationships between components in a pixel.

[0101] For example, Figure 4 An embodiment of the electrical connection relationships between components included in a pixel PXL of an active matrix display device is shown. However, the types of components included in the pixel PXL to which the embodiments of this disclosure can be applied are not limited to this.

[0102] exist Figure 4 In the middle, the pixel PXL can comprehensively include not only Figure 3 Each of the pixels PXL shown includes the components, and also includes the area in which the components are set.

[0103] refer to Figures 1A to 4 A pixel PXL (hereinafter referred to as a "pixel") may include a light-emitting unit (EMU) that generates light with a brightness corresponding to the data signal. Additionally, the pixel PXL may optionally include pixel circuitry (PXC) for driving the EMU.

[0104] In some embodiments, the light-emitting unit (EMU) may include a light-emitting element (LD) electrically connected in parallel between a first power line PL1 to which a first driving power supply VDD can be applied and a second power line PL2 to which a second driving power supply VSS can be applied. For example, the EMU may include a first electrode EL1 (or "first alignment electrode") electrically connected to the first driving power supply VDD via a pixel circuit PXC and the first power line PL1, a second electrode EL2 (or "second alignment electrode") electrically connected to the second driving power supply VSS via the second power line PL2, and a light-emitting element LD electrically connected in parallel in the same direction between the first electrode EL1 and the second electrode EL2. In embodiments of this disclosure, the first electrode EL1 may be an anode electrode, and the second electrode EL2 may be a cathode electrode.

[0105] Each of the light-emitting elements (LDs) included in the light-emitting unit (EMU) may include one end portion electrically connected to a first driving power supply VDD via a first electrode EL1 and another end portion electrically connected to a second driving power supply VSS via a second electrode EL2. The first driving power supply VDD and the second driving power supply VSS may have different potentials. In the example, the first driving power supply VDD may be set to a high potential power supply, and the second driving power supply VSS may be set to a low potential power supply. The potential difference between the first driving power supply VDD and the second driving power supply VSS may be set to the threshold voltage of the light-emitting element LD during the emission cycle of pixel PXL.

[0106] As described above, light-emitting elements LD, which are electrically connected in parallel in the same direction (e.g., the forward direction) between a first electrode EL1 and a second electrode EL2 to which a voltage with a potential difference is applied, can each form an effective light source. The effective light source can constitute the light-emitting unit (EMU) of the pixel PXL.

[0107] Each of the light-emitting elements (LDs) in the light-emitting unit (EMU) can emit light with a brightness corresponding to the driving current supplied by the corresponding pixel circuit (PXC). For example, the pixel circuit (PXC) can supply the light-emitting unit (EMU) with a driving current corresponding to the grayscale value of the corresponding frame data during each frame period. The driving current supplied to the light-emitting unit (EMU) can be divided to flow through the light-emitting elements (LDs). Therefore, the light-emitting unit (EMU) can emit light with a brightness corresponding to the driving current, and each light-emitting element (LD) can emit light with a brightness corresponding to the current flowing through it.

[0108] While an embodiment is shown in which the two end portions of the light-emitting element LD are connected in the same direction between the first driving power supply VDD and the second driving power supply VSS, this disclosure is not limited thereto. In some embodiments, in addition to the light-emitting element LD forming a corresponding effective light source, the light-emitting unit EMU may also include at least one ineffective light source, for example, a reverse light-emitting element LDr. The reverse light-emitting element LDr may be electrically connected in parallel with the light-emitting element LD forming an effective light source between the first electrode EL1 and the second electrode EL2, and may be electrically connected between the first electrode EL1 and the second electrode EL2 in a direction opposite to the direction in which the light-emitting element LD is connected. Although a predetermined driving voltage (e.g., a forward driving voltage) may be applied between the first electrode EL1 and the second electrode EL2, the reverse light-emitting element LDr remains inactive, and therefore, substantially no current flows through the reverse light-emitting element LDr.

[0109] The pixel circuit PXC can be electrically connected to the scan line Si and data line Dj of the corresponding pixel PXL. In the example, assuming that pixel PXL is located in the i-th (i is a natural number) row and j-th (j is a natural number) column of display area DA, the pixel circuit PXC of pixel PXL can be electrically connected to the i-th scan line Si and the j-th data line Dj of display area DA. Furthermore, the pixel circuit PXC can be electrically connected to the i-th control line CLI and the j-th sensing line SENj of display area DA.

[0110] The aforementioned pixel circuit PXC may include a first transistor T1 to a third transistor T3 and a storage capacitor Cst.

[0111] The first terminal of the first transistor T1 (driving transistor) can be electrically connected to the first driving power supply VDD, and the second terminal of the first transistor T1 can be electrically connected to the first electrode EL1 of the light-emitting unit EMU. The gate electrode of the first transistor T1 can be electrically connected to the first node N1. The first transistor T1 can control the amount of driving current supplied to the light-emitting element LD corresponding to the voltage of the first node N1.

[0112] The first terminal of the second transistor T2 (switching transistor) can be electrically connected to the j-th data line Dj, and the second terminal of the second transistor T2 can be electrically connected to the first node N1. The first and second terminals of the second transistor T2 are different terminals. For example, if the first terminal is the source electrode, the second terminal can be the drain electrode. The gate electrode of the second transistor T2 can be electrically connected to the i-th scan line Si.

[0113] When a scan signal with a voltage that allows the second transistor T2 to conduct is provided from the i-th scan line Si, the second transistor T2 can conduct to electrically connect the j-th data line Dj and the first node N1. The data signal corresponding to the frame can then be provided to the j-th data line Dj. Therefore, the data signal can be transmitted to the first node N1. The data signal transmitted to the first node N1 can be stored in the storage capacitor Cst.

[0114] A third transistor T3 can be electrically connected between the first transistor T1 and the j-th sensing line SENj. For example, the first terminal of the third transistor T3 can be electrically connected to the j-th sensing line SENj, and the second terminal of the third transistor T3 can be electrically connected to the second terminal (e.g., the source electrode) of the first transistor T1, which is electrically connected to the first electrode EL1. The gate electrode of the third transistor T3 can be electrically connected to the i-th control line CLI. The third transistor T3 can be turned on by a control signal having a gate turn-on voltage that can be provided to the i-th control line CLI during a predetermined sensing cycle to electrically connect the j-th sensing line SENj and the first transistor T1.

[0115] The sensing period can be the period during which characteristic information (e.g., the threshold voltage of the first transistor T1, etc.) of each of the pixels PXL arranged in the display area DA is sensed.

[0116] One electrode of the storage capacitor Cst can be electrically connected to the first drive power supply VDD, and the other electrode of the storage capacitor Cst can be electrically connected to the first node N1. The storage capacitor Cst can be charged with a voltage corresponding to the data signal provided to the first node N1 and maintain the charging voltage until the data signal for the next frame can be provided.

[0117] Despite Figure 4 The illustration shows an embodiment where all of the first transistor T1, second transistor T2, and third transistor T3 are N-type transistors, but this disclosure is not limited thereto. For example, at least one of the first transistor T1, second transistor T2, and third transistor T3 can be replaced with a P-type transistor. Furthermore, although in Figure 4 The diagram shows an embodiment in which the light-emitting unit (EMU) can be electrically connected between the pixel circuit PXC and the second driving power supply VSS. However, the light-emitting unit (EMU) can also be electrically connected between the first driving power supply VDD and the pixel circuit PXC.

[0118] The structure of the pixel circuit PXC can be modified and implemented in various ways. In the example, the pixel circuit PXC may also include at least one transistor, such as a transistor for initializing the first node N1 and / or a transistor for controlling the emission time of the light-emitting element LD, or other circuit elements such as a boost capacitor for boosting the voltage of the first node N1.

[0119] In addition, although in Figure 4 The illustration shows an embodiment in which all the light-emitting elements (LDs) constituting each light-emitting unit (EMU) are electrically connected in parallel, but this disclosure is not limited thereto. In some embodiments, the EMU may be configured to include at least one series stage comprising light-emitting elements (LDs) electrically connected in parallel with each other. For example, the EMU may be configured as a hybrid series / parallel structure.

[0120] The structure of the pixel PXL applied in this disclosure is not limited to Figure 4The embodiments shown are different, and the corresponding pixels PXL can have various structures. For example, each pixel PXL can be configured inside the passive light-emitting display device. The pixel circuit PXC can be omitted, and the two end portions of the light-emitting element LD included in the light-emitting unit EMU can be directly connected to the i-th scan line Si, the j-th data line Dj, the first power line PL1 to which a first driving power supply VDD can be applied, the second power line PL2 to which a second driving power supply VSS can be applied, and / or a predetermined control line.

[0121] Figure 5 It is shown schematically. Figure 3 A planar view of one of the pixels shown. Figure 6A Is only shown Figure 5 A schematic plan view of the first and second electrodes in the pixel and the light-emitting element shown. Figure 6B It is shown Figure 6A A schematic plan view of another embodiment of the first and second electrodes shown.

[0122] exist Figure 5 For ease of description, the transistor T electrically connected to the light-emitting element LD is omitted (see [link]). Figure 7 The diagram shows the signal lines electrically connected to transistor T.

[0123] In embodiments of this disclosure, for ease of description, the transverse direction (or horizontal direction) in the plan view (or on the plane) is designated as the first direction DR1, the longitudinal direction (or vertical direction) in the plan view (or on the plane) is designated as the second direction DR2, the thickness direction of the substrate SUB in the cross section is designated as the third direction DR3, the oblique direction that is inclined relative to one of the first direction DR1 and the second direction DR2 is designated as the fourth direction DR4, and the direction that intersects with the fourth direction DR4 is designated as the fifth direction DR5.

[0124] refer to Figure 3 and Figures 5 to 6B Each pixel PXL can be formed in a pixel region PXA disposed (or set) on a substrate SUB. The pixel region PXA may include an emitting region EMA and a peripheral region. In an embodiment, the peripheral region may include a non-emitting region in which no light is emitted.

[0125] In some implementations, pixel PXL may include a levee BNK located in the peripheral region.

[0126] A dam BNK can be a structure that defines (or divides) a pixel region PXA or an emission region EMA for each of the corresponding pixel PXL and each of its adjacent pixels PXL. In an example, the dam BNK can be a pixel defining layer. In an implementation, in the process of providing a light-emitting element LD to each pixel PXL, the dam BNK can be a pixel defining layer or dam structure that defines each emission region EMA to which the light-emitting element LD will be provided. In an example, the emission region EMA of each pixel PXL can be divided by the dam BNK such that a mixture of liquid (e.g., ink) including a desired amount and / or desired type of light-emitting element LD can be provided (or input) to the emission region EMA.

[0127] The dam BNK may include at least one light-blocking material and / or at least one reflective material to prevent light leakage defects where light (or beams) may leak between each pixel PXL and its adjacent pixels PXL. In some embodiments, the dam BNK may include a transparent material (or substance). In examples, the transparent material may include polyamide resin, polyimide resin, etc., but this disclosure is not limited thereto. In another embodiment, a reflective material layer may be separately disposed and / or formed on the dam BNK to further improve the efficiency of light emitted from each pixel PXL.

[0128] The embankment BNK may include at least one opening that exposes a component located beneath the embankment BNK in the pixel region PXA of the corresponding pixel PXL. The emission region EMA of the corresponding pixel PXL may be defined by the opening of the embankment BNK. In the example, the embankment BNK may include a first opening OP1 and a second opening OP2 that exposes a component located beneath the embankment BNK in the pixel region PXA of the corresponding pixel PXL. The emission region EMA of each pixel PXL may be defined by the second opening OP2 of the embankment BNK.

[0129] In pixel region PXA, the first opening OP1 of the embankment BNK can be positioned spaced apart from the second opening OP2 and positioned adjacent to one side of pixel region PXA (e.g., the upper or lower side). In the example, the first opening OP1 of the embankment BNK can be located on the upper side of pixel region PXA.

[0130] Each pixel PXL may include a first electrode EL1 and a second electrode EL2 spaced apart from each other in a first direction DR1. The first electrode EL1 may be related to a reference electrode. Figure 4 The first electrode EL1 described corresponds to the reference electrode EL2, and the second electrode EL2 can be compared with the reference electrode EL2. Figure 4 The second electrode EL2 described corresponds to this.

[0131] In the manufacturing process of a display device, after the light-emitting element LD is provided and arranged in the pixel region PXA, the first electrode EL1 can be separated from the first electrode (not shown) in each of the other pixels (e.g., adjacent pixels PXL that are adjacent to each other in the second direction DR2). For example, the first opening OP1 of the embankment BNK can be provided to perform a separation process on the first electrode EL1.

[0132] The first electrode EL1 can be electrically connected to the reference electrode through the first contact hole CH1. Figure 4 The first transistor T1 and the second electrode EL2 described can be electrically connected to the reference. Figure 4 The second drive power supply VSS (or second power line PL2) is described.

[0133] The first electrode EL1 and the second electrode EL2 can have a multilayer structure including a reflective electrode and a conductive coating layer. The reflective electrode can have a single-layer or multilayer structure. In the example, the reflective electrode can include at least one opaque metal layer, and optionally also include at least one transparent conductive layer disposed on the top and / or bottom of the opaque metal layer.

[0134] The first electrode EL1 may include at least one (1-1) electrode EL1_1 and at least one (1-2) electrode EL1_2. The second electrode EL2 may include at least one (2-1) electrode EL2_1 and at least one (2-2) electrode EL2_2.

[0135] In the plan view, electrode (1-1) EL1_1 can extend along a fourth direction DR4 that is inclined relative to the first direction DR1 or the second direction DR2. In the plan view, electrode (1-2) EL1_2 can extend along a fifth direction DR5 that intersects with the fourth direction DR4. The fifth direction DR5 can intersect with the fourth direction DR4.

[0136] In the plan view, electrode (2-1) EL2_1 can extend along the fourth direction DR4, and electrode (2-2) EL2_2 can extend along the fifth direction DR5.

[0137] In this embodiment, the (1-1) electrode EL1_1 and the (1-2) electrode EL1_2 can be arranged alternately along the second direction DR2. The (1-1) electrode EL1_1 and the (1-2) electrode EL1_2 can be mirror-symmetrical with respect to the boundary BD between the (1-1) electrode EL1_1 and the (1-2) electrode EL1_2. In this example, the (1-1) electrode EL1_1 and the (1-2) electrode EL1_2 can be vertically symmetrical with respect to the boundary BD.

[0138] In this embodiment, the (2-1) electrode EL2_1 and the (2-2) electrode EL2_2 can be arranged alternately along the second direction DR2. The (2-1) electrode EL2_1 and the (2-2) electrode EL2_2 can be mirror-symmetrical with respect to the boundary BD between the (2-1) electrode EL2_1 and the (2-2) electrode EL2_2. In this example, the (2-1) electrode EL2_1 and the (2-2) electrode EL2_2 can be vertically symmetrical with respect to the boundary BD.

[0139] Electrode EL1_1 (1-1) can correspond to electrode EL2_1 (2-1), and electrode EL1_2 (1-2) can correspond to electrode EL2_2 (2-2). In an embodiment, electrode EL1_1 (1-1) can be spaced apart from electrode EL2_1 (2-1) in the first direction DR1, and electrode EL1_2 (1-2) can be spaced apart from electrode EL2_2 (2-2) in the first direction DR1.

[0140] The (1-1) electrode EL1_1 may include a first side surface S1 and a second side surface S2 inclined at a predetermined angle θ1 (hereinafter referred to as the "first angle") from a first virtual line VL1 extending from the boundary BD toward a second virtual line VL2 perpendicular to the first virtual line VL1. The first side surface S1 and the second side surface S2 may have the same inclination. The (2-1) electrode EL2_1 may include a first side surface EL2_S1 having the same inclination as the first side surface S1 of the (1-1) electrode EL1_1, and a second side surface EL2_S2 having the same inclination as the second side surface S2 of the (1-1) electrode EL1_1.

[0141] Electrode (1-1) EL1_1 and electrode (2-1) EL2_1 can have the same planar shape. In the example, electrode (1-1) EL1_1 and electrode (2-1) EL2_1 can have polygonal shapes with a tilt corresponding to the fourth direction DR4. The width of electrode (1-1) EL1_1 in the first direction DR1 and the width of electrode (2-1) EL2_1 in the first direction DR1 can be equal to each other.

[0142] The (2-2) electrode EL2_2 may include a third side surface S3 and a fourth side surface S4 inclined at a predetermined angle θ2 (hereinafter referred to as the "second angle") from a first virtual line VL1 extending from the boundary BD toward a second virtual line VL2. The third side surface S3 and the fourth side surface S4 may have the same inclination. The (1-2) electrode EL1_2 may include a third side surface EL1_S3 having the same inclination as the third side surface S3 of the (2-2) electrode EL2_2, and a fourth side surface EL1_S4 having the same inclination as the fourth side surface S4 of the (2-2) electrode EL2_2. In an embodiment, the first angle θ1 and the second angle θ2 may be the same.

[0143] Electrodes EL1_2 (1-2) and EL2_2 (2-2) can have the same planar shape. In the example, electrodes EL1_2 (1-2) and EL2_2 (2-2) can have polygonal shapes with a tilt corresponding to the fifth direction DR5. The width W1 of electrode EL1_2 in the first direction DR1 and the width W2 of electrode EL2_2 in the first direction DR1 can be equal to each other.

[0144] In the pixel region PXA of each pixel PXL, the width W3 of the region between the first electrode EL1 and the second electrode EL2 in the first direction DR1 can be constant along the extension direction of the first electrode EL1 and the second electrode EL2 (e.g., along the second direction DR2).

[0145] In an embodiment, each of the (1-1) electrode EL1_1, the (1-2) electrode EL1_2, the (2-1) electrode EL2_1, and the (2-2) electrode EL2_2 can be designed such that the width d (or length) in the second direction DR2 can be smaller than the length L of each of the light-emitting elements LD.

[0146] The first electrode EL1, comprising alternating (1-1) electrodes EL1_1 and (1-2) electrodes EL1_2 arranged along the second direction DR2, and the second electrode EL2, comprising alternating (2-1) electrodes EL2_1 and (2-2) electrodes EL2_2 arranged along the second direction DR2, can have the same planar shape in the emission region EMA of each pixel PXL. In the example, the first electrode EL1 and the second electrode EL2 can form bilateral symmetry along the second direction DR2 in the emission region EMA. In the emission region EMA, the first electrode EL1 and the second electrode EL2 can have a zigzag shape in the planar view.

[0147] Although the above embodiments have described a case where the first electrode EL1 and the second electrode EL2 are configured in a sawtooth shape with a predetermined inclination, this disclosure is not limited thereto. In some embodiments, the first electrode EL1 and the second electrode EL2 may be configured to include, for example, […]. Figure 6B The shape of the curve with the predetermined curvature shown. The first side surface S1 of the (1-1) electrode EL1_1 and the first side surface EL2_S1 of the (2-1) electrode EL2_1 may have the same curvature, and the second side surface S2 of the (1-1) electrode EL1_1 and the second side surface EL2_S2 of the (2-1) electrode EL2_1 may have the same curvature. The third side surface S3 of the (2-2) electrode EL2_2 and the third side surface EL1_S3 of the (1-2) electrode EL1_2 may have the same curvature, and the fourth side surface S4 of the (2-2) electrode EL2_2 and the fourth side surface EL1_S4 of the (1-2) electrode EL1_2 may have the same curvature.

[0148] Each pixel PXL may have a light-emitting element (LD). In some embodiments, each pixel PXL may also include a reference. Figure 4 The described reverse-emitting element LDr.

[0149] A light-emitting element (LD) can be disposed between a first electrode EL1 and a second electrode EL2. Each of the light-emitting elements (LD) may include a first end portion EP1 (or one end portion) and a second end portion EP2 (or the other end portion) located at both ends along its length L. In an embodiment, a p-type semiconductor layer may be located at the first end portion EP1, and an n-type semiconductor layer may be located at the second end portion EP2. The p-type semiconductor layer may be a reference... Figure 1A The second semiconductor layer 13 described herein, and the n-type semiconductor layer may be referenced. Figure 1A The first semiconductor layer 11 is described. Light-emitting elements (LDs) can be electrically connected in parallel between each other between the first electrode EL1 and the second electrode EL2. Each of the light-emitting elements LDs can have a reference [electrode name missing]. Figure 1A and Figure 2A The light-emitting element (LD) described has the same configuration.

[0150] In this embodiment, the first end portion EP1 of each of the light-emitting elements LD may not be directly disposed on the first electrode EL1, but may be electrically connected to the first electrode EL1 through at least one contact electrode, such as the first contact electrode CNE1. The second end portion EP2 of each of the light-emitting elements LD may not be directly disposed on the second electrode EL2, but may be electrically connected to the second electrode EL2 through at least one other contact electrode, such as the second contact electrode CNE2.

[0151] Each of the light-emitting elements (LDs) can be a light-emitting diode with a micro-scale (e.g., a size from the nanoscale to the microscale) that can be fabricated using materials with an inorganic crystal structure. For example, each of the light-emitting elements (LDs) can be a micro-light-emitting diode fabricated by an etching process or a micro-light-emitting diode fabricated by a growth process.

[0152] At least two to dozens of light-emitting elements (LDs) can be aligned and / or set in the emission region EMA of each pixel PXL, but the number of LDs is not limited to this. In some embodiments, the number of LDs aligned and / or set in the emission region EMA can be varied.

[0153] Each of the light-emitting elements (LDs) can emit any type of colored light and / or white light. Each of the light-emitting elements (LDs) can be aligned between a first electrode EL1 and a second electrode EL2 such that its extension direction (or length L direction) corresponds to an oblique direction tilted relative to the first direction DR1 or the second direction DR2. The light-emitting elements (LDs) can be configured such that they are dispersed in a solution to be input (or provided) to the emission region EMA of each pixel PXL.

[0154] The light-emitting element (LD) can be input (or provided) to the emitting region EMA of each pixel PXL via inkjet printing, slot coating, or various other processes. In this example, the LD can be mixed with a volatile solvent to be input (or provided) to the emitting region EMA via inkjet printing or slot coating. With a corresponding alignment signal applied to the first electrode EL1 and the second electrode EL2, an electric field can be formed between the first electrode EL1 and the second electrode EL2. Therefore, the LD can be aligned between the first electrode EL1 and the second electrode EL2. After the LD is aligned, the solvent can be evaporated or removed via another process, allowing the LD to be stably aligned between the first electrode EL1 and the second electrode EL2.

[0155] In an implementation, each pixel PXL may include a second insulating layer INS2, a first contact electrode CNE1, and a second contact electrode CNE2.

[0156] The second insulating layer INS2 may overlap with each of the light-emitting elements LD and expose the two end portions EP1 and EP2 of each of the light-emitting elements LD.

[0157] The second insulating layer INS2 can be configured as a single layer or multiple layers, and includes an inorganic insulating layer comprising at least one inorganic material or an organic insulating layer comprising at least one organic material. The second insulating layer INS2 can also fix each of the light-emitting elements LD. The second insulating layer INS2 can include an inorganic insulating layer advantageously protecting the active layer 12 of each of the light-emitting elements LD. However, this disclosure is not limited thereto. The second insulating layer INS2 can be configured as an organic insulating layer comprising organic materials, depending on the design conditions of the display device in which the above-described light-emitting elements LD are used as a light source.

[0158] After the alignment of the light-emitting element LD in the emission region EMA (or pixel region PXA) of each pixel PXL can be completed, a second insulating layer INS2 can be formed on the light-emitting element LD to prevent the light-emitting element LD from separating from the aligned position.

[0159] In embodiments of this disclosure, the second insulating layer INS2 can be designed to have a shape corresponding to the shape of the first electrode EL1 and the second electrode EL2. In an example, the second insulating layer INS2 can be designed to include a first region A1 extending in the fourth direction DR4 and a second region A2 extending in the fifth direction DR5. This is for the purpose of stably fixing the light-emitting element LD by designing the second insulating layer INS2 to the alignment direction of the light-emitting element LD. The first region A1 and the second region A2 of the second insulating layer INS2 can be mirror-symmetrical with respect to the boundary BD located between them.

[0160] The first region A1 of the second insulating layer INS2 may correspond to the (1-1) electrode EL1_1 and the (2-1) electrode EL2_1. The first region A1 of the second insulating layer INS2 may be disposed and / or formed on the light-emitting element LD aligned between the (1-1) electrode EL1_1 and the (2-1) electrode EL2_1 to expose the two end portions EP1 and EP2 of each of the light-emitting elements LD.

[0161] The second region A2 of the second insulating layer INS2 may correspond to the (1-2) electrodes EL1_2 and (2-2) electrodes EL2_2. The second region A2 of the second insulating layer INS2 may be disposed and / or formed on the light-emitting element LD aligned between the (1-2) electrodes EL1_2 and the (2-2) electrodes EL2_2 to expose the two end portions EP1 and EP2 of each of the light-emitting elements LD.

[0162] The first contact electrode CNE1 may be disposed and / or formed on the first end portion EP1 of each of the light-emitting elements LD and on a corresponding region of the first electrode EL1 to physically and / or electrically connect the first end portion EP1 of each of the light-emitting elements LD to the first electrode EL1.

[0163] In embodiments of this disclosure, the first contact electrode CNE1 may have a shape corresponding to the shape of the first electrode EL1. In an example, the first contact electrode CNE1 may include a first (1-1) contact electrode CNE1_1 extending in the fourth direction DR4 and a second (1-2) contact electrode CNE1_2 extending in the fifth direction DR5 intersecting the fourth direction DR4. The first (1-1) contact electrode CNE1_1 and the second (1-2) contact electrode CNE1_2 may be arranged alternately along the second direction DR2. The first contact electrode CNE1 may have a serrated shape with a predetermined inclination in a plan view.

[0164] The second contact electrode CNE2 may be disposed and / or formed on the second end portion EP2 of each of the light-emitting elements LD and on a corresponding region of the second electrode EL2, so as to physically and / or electrically connect the second end portion EP2 of each of the light-emitting elements LD to the second electrode EL2.

[0165] In embodiments of this disclosure, the second contact electrode CNE2 may have a shape corresponding to the shape of the second electrode EL2. In an example, the second contact electrode CNE2 may include a (2-1) contact electrode CNE2_1 extending in the fourth direction DR4 and a (2-2) contact electrode CNE2_2 extending in the fifth direction DR5. The (2-1) contact electrode CNE2_1 and the (2-2) contact electrode CNE2_2 may be arranged alternately along the second direction DR2. The second contact electrode CNE2 may have a serrated shape with a predetermined inclination in a plan view.

[0166] The first contact electrode CNE1 and the second contact electrode CNE2 can form a bilateral symmetry along the second direction DR2 in the emission region EMA of each pixel PXL.

[0167] As described above, since the (1-1) electrode EL1_1 and the (2-1) electrode EL2_1, as well as the (1-2) electrode EL1_2 and the (2-2) electrode EL2_2, have different extending directions, the direction of the electric field formed between the (1-1) electrode EL1_1 and the (2-1) electrode EL2_1 can be different from the direction of the electric field formed between the (1-2) electrode EL1_2 and the (2-2) electrode EL2_2. The light-emitting element LD (hereinafter referred to as the "first light-emitting element") disposed between the (1-1) electrode EL1_1 and the (2-1) electrode EL2_1 extending along the fourth direction DR4 can be aligned in a direction different from the direction of the light-emitting element LD (hereinafter referred to as the "second light-emitting element") disposed between the (1-2) electrode EL1_2 and the (2-2) electrode EL2_2 extending along the fifth direction DR5. In the example, some of the light-emitting elements LD between the first electrode EL1 and the second electrode EL2 can be aligned between the first electrode EL1 and the second electrode EL2 such that their length L direction corresponds to or can be parallel to the fourth direction DR4. Other light-emitting elements LD can be aligned between the first electrode EL1 and the second electrode EL2 such that their length L direction corresponds to or can be parallel to the fifth direction DR5. Still other light-emitting elements LD can be aligned between the first electrode EL1 and the second electrode EL2 such that their length L direction corresponds to or can be parallel to the first direction DR1.

[0168] As described above, when the first electrode EL1 and the second electrode EL2 have a shape that extends in an oblique direction (e.g., in a fourth direction DR4 or a fifth direction DR5) relative to the first direction DR1 or the second direction DR2, the light-emitting element LD between the first electrode EL1 and the second electrode EL2 can be aligned in various directions. The distance P between adjacent light-emitting elements LD disposed between the first electrode EL1 and the second electrode EL2 can be further ensured.

[0169] When the first electrode EL1 and the second electrode EL2 have a rod-like shape extending in the second direction DR2, an electric field can be formed between the first electrode EL1 and the second electrode EL2 in a horizontal direction parallel to the first direction DR1. Each of the light-emitting elements LDs can be disposed between the first electrode EL1 and the second electrode EL2 such that its length L direction is parallel to the first direction DR1 by the electric field formed in the horizontal direction. Some of the light-emitting elements LDs input (or provided) to the emission region EMA of the corresponding pixel PXL can be disposed adjacent to each other to form a group according to the amount and / or position of the light-emitting elements LDs, and some other light-emitting elements LDs can form a group in which they are spaced apart from each other at a certain distance. When a portion of the light-emitting elements LDs are disposed adjacent to each other to form a group, the distance between adjacent light-emitting elements LDs may not be sufficiently fixed. When the first contact electrode CNE1 and the second contact electrode CNE2 are formed on the light-emitting elements LDs, a portion of the conductive layer constituting the first contact electrode CNE1 and the second contact electrode CNE2 may remain in the tiny gaps between adjacent light-emitting elements LDs. A short circuit defect may occur between the first contact electrode CNE1 and the second contact electrode CNE2 due to conductive layer residue between adjacent light-emitting elements (LDs). The corresponding pixel PXL will not emit light due to this short circuit defect, and therefore, brightness imbalance may occur at each location in the display device.

[0170] In the above embodiment, each of the first electrode EL1 and the second electrode EL2 is designed to have a shape in which electrodes extending in an oblique direction (e.g., on a fourth direction DR4 and / or a fifth direction DR5) relative to the first direction DR1 or the second direction DR2 are alternately arranged along the second direction DR2. Therefore, the light-emitting elements LDs between the first electrode EL1 and the second electrode EL2 can be aligned in various directions. The distance P between adjacent light-emitting elements LDs disposed between the first electrode EL1 and the second electrode EL2 can be sufficiently fixed such that the conductive layer constituting the first contact electrode CNE1 and the second contact electrode CNE2 does not remain between adjacent light-emitting elements LDs. Therefore, short-circuit defects between the first contact electrode CNE1 and the second contact electrode CNE2 can be prevented.

[0171] Furthermore, according to the above embodiment, the second insulating layer INS2 can be designed to have a shape corresponding to the first electrode EL1 and the second electrode EL2, so that the light-emitting element LD is stably fixed in the emission region EMA of each pixel PXL. Therefore, the loss of the light-emitting element LD can be reduced. Therefore, the number of effective light-emitting elements LD in the emission region EMA increases, thereby improving the luminous efficiency of the corresponding pixel PXL.

[0172] Furthermore, according to the above embodiment, the first contact electrode CNE1 and the second contact electrode CNE2 are designed to have shapes corresponding to the first electrode EL1 and the second electrode EL2, so as to prevent contact defects from occurring when the two end portions EP1 and EP2 of each of the light-emitting elements LD do not contact the corresponding contact electrodes.

[0173] In the following text, reference will be made to Figures 7 to 9 The structure of the pixel PXL according to the above embodiment is described in stacking order.

[0174] Figure 7 It is along Figure 5 The sectional view shown is taken by line I-I'. Figure 8 It is along Figure 5 The sectional view shown is taken from line II-II'. Figure 9 It is along Figure 5 The sectional view shown is taken from line III-III'.

[0175] refer to Figure 5 and Figures 7 to 9 The pixel PXL may include a substrate SUB, a pixel circuit layer PCL, and a display element layer DPL.

[0176] The substrate SUB may include a transparent insulating material to allow light to pass through it. The substrate SUB may be a rigid substrate or a flexible substrate.

[0177] Rigid substrates may include, for example, glass substrates, quartz substrates, glass-ceramic substrates, and crystal glass substrates.

[0178] The flexible substrate can be one of a membrane substrate comprising polymeric organic materials and a plastic substrate. For example, the flexible substrate may include at least one of polystyrene, polyvinyl alcohol, polymethyl methacrylate, polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, cellulose triacetate, and cellulose acetate propionate.

[0179] The pixel circuit layer PCL may include a buffer layer BFL, at least one transistor T, at least one storage capacitor Cst, and a protective layer PSV.

[0180] The buffer layer BFL can prevent impurities from spreading into the pixel circuitry (see [link]). Figure 4 In the transistor T (shown as "PXC"), the buffer layer BFL can be an inorganic insulating layer comprising inorganic materials. The buffer layer BFL can include, for example, silicon nitride (SiN). x ), silicon dioxide (SiO) x ), silicon oxynitride (SiON) and aluminum oxide (AlO)x At least one of the metal oxides of the substrate SUB. The buffer layer BFL can be a single layer or a multilayer comprising at least two layers. When the buffer layer BFL is multilayered, these layers can be formed of the same material or different materials. Depending on the material and process conditions of the substrate SUB, the buffer layer BFL may be omitted.

[0181] Transistor T may include a driving transistor Tdr for controlling the drive current of the light-emitting element LD and a switching transistor (not shown) connected to the driving transistor Tdr. The driving transistor Tdr may be a reference transistor. Figure 4 The first transistor T1 is described, and the switching transistor may be a reference. Figure 4 The second transistor T2 is described. The driving transistor Tdr and the switching transistor can have substantially similar or identical structures. Therefore, the description of the switching transistor will be replaced by the description of the driving transistor Tdr.

[0182] The driving transistor Tdr may include a semiconductor pattern SCL, a gate electrode GE, a first terminal ET1, and a second terminal ET2. The first terminal ET1 may be either the source electrode or the drain electrode, and the second terminal ET2 may be the other of the source electrode and the drain electrode.

[0183] A semiconductor pattern SCL can be disposed and / or formed on a buffer layer BFL. The semiconductor pattern SCL may include a first contact region contacting a first terminal ET1 and a second contact region contacting a second terminal ET2. The region between the first and second contact regions may be a channel region. The channel region may overlap with the gate electrode GE of the corresponding transistor T. The semiconductor pattern SCL may be made of polycrystalline silicon, amorphous silicon, oxide semiconductor, etc. The channel region may be an undoped semiconductor pattern and may be an intrinsic semiconductor. Each of the first and second contact regions may be a doped semiconductor pattern.

[0184] The gate electrode GE can be disposed and / or formed on the gate insulating layer GI to correspond to the channel region of the semiconductor pattern SCL. The gate electrode GE can be disposed on the gate insulating layer GI to overlap with the channel region of the semiconductor pattern SCL. The gate electrode GE can be formed in a monolayer comprising one selected from the group consisting of copper (Cu), molybdenum (Mo), tungsten (W), neodymium (Nd), titanium (Ti), aluminum (Al), silver (Ag), and any alloys thereof and mixtures thereof, which may be low-resistance materials to reduce wiring resistance, or in a bilayer or multilayer structure comprising molybdenum (Mo), titanium (Ti), copper (Cu), aluminum (Al), or silver (Ag), which may be low-resistance materials to reduce wiring resistance.

[0185] The gate insulating layer GI can be an inorganic insulating layer comprising inorganic materials. In an example, the gate insulating layer GI may comprise silicon nitride (SiN). x ), silicon dioxide (SiO) x ), silicon oxynitride (SiON) and aluminum oxide (AlO) x The gate insulating layer GI is at least one of the metal oxides described above. However, the material of the gate insulating layer GI is not limited to the embodiments described above. In some embodiments, the gate insulating layer GI may be an organic insulating layer comprising organic materials. The gate insulating layer GI may be a single layer or a multilayer comprising at least two layers.

[0186] First terminal ET1 and second terminal ET2 may be disposed and / or formed on the second interlayer insulating layer ILD2, and contact the first contact area and the second contact area of ​​the semiconductor pattern SCL respectively through contact holes that sequentially penetrate the gate insulating layer GI and the first interlayer insulating layer ILD1 and the second interlayer insulating layer ILD2. In the example, first terminal ET1 may contact the first contact area of ​​the semiconductor pattern SCL, and second terminal ET2 may contact the second contact area of ​​the semiconductor pattern SCL. Each of the first terminal ET1 and second terminal ET2 may include the same material as the gate electrode GE, or include at least one material selected from the materials exemplified as constituting the gate electrode GE.

[0187] The first interlayer insulating layer ILD1 may comprise the same material as the gate insulating layer GI, or may comprise at least one material selected from those exemplified as constituting the gate insulating layer GI.

[0188] The second interlayer insulating layer ILD2 may be disposed on and / or formed on the first interlayer insulating layer ILD1. The second interlayer insulating layer ILD2 may be an inorganic insulating layer comprising inorganic materials or an organic insulating layer comprising organic materials. In some embodiments, the second interlayer insulating layer ILD2 may comprise the same material as the first interlayer insulating layer ILD1, but this disclosure is not limited thereto. The second interlayer insulating layer ILD2 may be a single layer or a multilayer comprising at least two layers.

[0189] Although the above embodiments have described the case where the first terminal ET1 and the second terminal ET2 of transistor T are electrically connected to separate electrodes of semiconductor pattern SCL via contact holes that sequentially penetrate gate insulating layer GI and first interlayer insulating layer ILD1 and second interlayer insulating layer ILD2, this disclosure is not limited thereto. In some embodiments, the first terminal ET1 of transistor T may be a first contact region adjacent to the channel region of the corresponding semiconductor pattern SCL, and the second terminal ET2 of transistor T may be a second contact region adjacent to the channel region of the corresponding semiconductor pattern SCL. The second terminal ET2 of transistor T may be electrically connected to the light-emitting element LD of the corresponding pixel PXL via a separate connection means such as a bridging electrode.

[0190] In embodiments of this disclosure, transistor T can be implemented using a low-temperature polycrystalline silicon (LTPS) thin-film transistor, but this disclosure is not limited thereto. In some embodiments, transistor T can be implemented using an oxide semiconductor thin-film transistor. Furthermore, although the implementation of transistor T using a thin-film transistor with a top-gate structure has been described in the above embodiments, this disclosure is not limited thereto, and the structure of transistor T can be modified in various ways.

[0191] The storage capacitor Cst may include a lower electrode LE disposed on the gate insulating layer GI and an upper electrode UE disposed on the first interlayer insulating layer ILD1 to overlap with the lower electrode LE.

[0192] The lower electrode LE can be disposed in the same layer as the gate electrode GE of the driving transistor Tdr, and comprises the same material as the gate electrode GE of the driving transistor Tdr. The lower electrode LE can be integrally disposed with the gate electrode GE of the driving transistor Tdr. The lower electrode LE can be considered a region of the driving transistor Tdr. In some embodiments, the lower electrode LE can be configured as a component separate from (or not integral with) the gate electrode GE of the driving transistor Tdr. The lower electrode LE and the gate electrode GE of the driving transistor Tdr can be electrically connected to each other via separate connection means.

[0193] The upper electrode UE can overlap with and cover the lower electrode LE. The wider overlap between the upper electrode UE and the lower electrode LE allows for an increase in the capacitance of the storage capacitor Cst. The upper electrode UE can be electrically connected to the first power supply line (see...). Figure 4 (as shown in "PL1"). The storage capacitor Cst can be covered by the second interlayer insulation layer ILD2.

[0194] The pixel circuit layer PCL may include a drive voltage line DVL disposed and / or formed on the second interlayer insulating layer ILD2. The drive voltage line DVL may be related to a reference... Figure 4The second power line PL2 described is the same component. Therefore, the voltage of the second drive power supply VSS can be applied to the drive voltage line DVL. The pixel circuit layer PCL may also include a first power line PL1 electrically connected to the first drive power supply VDD (see...). Figure 4 Although not directly shown in the accompanying drawings, the first power line PL1 can be disposed in the same layer as the driving voltage line DVL, or it can be disposed in a different layer than the driving voltage line DVL. While the case where the driving voltage line DVL can be disposed in the same layer as the first terminal ET1 and the second terminal ET2 of the transistor T has been described in the above embodiments, this disclosure is not limited thereto. In some embodiments, the driving voltage line DVL can be disposed in the same layer as any of the conductive layers disposed in the pixel circuit layer PCL. For example, the position of the driving voltage line DVL in the pixel circuit layer PCL can be varied.

[0195] Each of the first power line PL1 and the drive voltage line DVL may include a conductive material (or substance). In the example, each of the first power line PL1 and the drive voltage line DVL may be formed in a single layer comprising one of the group consisting of copper (Cu), molybdenum (Mo), tungsten (W), neodymium (Nd), titanium (Ti), aluminum (Al), silver (Ag), and any alloys and mixtures thereof, which may be low-resistance materials to reduce wiring resistance, or in a double-layer or multi-layer structure comprising molybdenum (Mo), titanium (Ti), copper (Cu), aluminum (Al), or silver (Ag), which may be low-resistance materials to reduce wiring resistance. In the example, each of the first power line PL1 and the drive voltage line DVL may be configured as a double layer in which titanium (Ti) / copper (Cu) are sequentially stacked.

[0196] The first power line PL1 can be electrically connected to a component, such as the first electrode EL1 of the display element layer DPL, and the drive voltage line DVL can be electrically connected to another component, such as the second electrode EL2 of the display element layer DPL.

[0197] The protective layer PSV can be disposed and / or formed on the transistor T and the drive voltage line DVL.

[0198] The protective layer PSV can be configured to include an organic insulating layer, an inorganic insulating layer, or an organic insulating layer disposed on an inorganic insulating layer. The inorganic insulating layer may include, for example, silicon oxide (SiO₂). x ), silicon nitride (SiN) x ), silicon oxynitride (SiON) and aluminum oxide (AlO) xThe organic insulating layer may include at least one of the following metal oxides: polyacrylate resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene ether resin, polyphenylene sulfide resin, and benzocyclobutene resin.

[0199] The protective layer PSV may include a first contact hole CH1 that exposes the second terminal ET2 of the drive transistor Tdr and a second contact hole CH2 that exposes the drive voltage line DVL.

[0200] The display element layer (DPL) can be set on the protective layer (PSV).

[0201] The display element layer DPL may include a dam BNK, a first electrode EL1 and a second electrode EL2, a light-emitting element LD, a first contact electrode CNE1 and a second contact electrode CNE2, and a first insulating layer INS1 to a third insulating layer INS3.

[0202] A dam portion (BNK) may be disposed and / or formed on the first insulating layer (INS1) and define (or divide) the emission region (EMA) of the corresponding pixel (PXL). The dam portion (BNK) may include a first opening (OP1) and a second opening (OP2) spaced apart from the first opening (OP1). The second opening (OP2) of the dam portion (BNK) may correspond to the emission region (EMA) of each pixel (PXL).

[0203] The first electrode EL1 and the second electrode EL2 can be arranged to be spaced apart from each other along the first direction DR1. One end portion of the first electrode EL1 can be located in the first opening OP1 of the embankment BNK. In the manufacturing process of the display device, after the light-emitting element LD is provided and arranged in the emission region EMA of the corresponding pixel PXL, the first electrode EL1 can be separated from the first electrode (not shown) of another electrode provided in the first opening OP1 (for example, the first electrode (not shown) provided in adjacent pixels PXL adjacent to each other in the second direction DR2). The first opening OP1 of the embankment BNK can be configured for the purpose of a separation process for the first electrode EL1.

[0204] Although the above embodiments have described a scenario where only the first electrode EL1 can be separated from the other electrode in the first opening OP1 of the dam portion BNK, this disclosure is not limited thereto. In some embodiments, the second electrode EL2 can also be separated from the other electrode in the first opening OP1 of the dam portion BNK (e.g., a second electrode (not shown) disposed in adjacent pixels PXL in the second direction DR2). The first opening OP1 of the dam portion BNK can be configured for the purpose of a separation process for the first electrode EL1 and the second electrode EL2.

[0205] Each of the first electrode EL1 and the second electrode EL2 may be made of a material with a constant reflectivity to allow light emitted from each of the light-emitting elements LD to travel in the image display direction (or forward direction) of the display device. In an example, each of the first electrode EL1 and the second electrode EL2 may be made of a conductive material (or substance) with a constant reflectivity. The conductive material (or substance) may include an opaque metal that facilitates the reflection of light emitted from the light-emitting element LD in the image display direction of the display device. The opaque metal may include, for example, metals such as silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), titanium (Ti), and alloys thereof. In some embodiments, each of the first electrode EL1 and the second electrode EL2 may include a transparent conductive material (or substance). Transparent conductive materials (or substances) may include conductive oxides such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium gallium zinc oxide (IGZO), or indium tin zinc oxide (ITZO), conductive polymers such as poly(3,4-ethylenedioxythiophene) (PEDOT), and so on. When each of the first electrode EL1 and the second electrode EL2 comprises a transparent conductive material, a separate conductive layer may additionally be included, which may be made of an opaque metal for reflecting light emitted from the light-emitting element LD in the image display direction of the display device. However, the materials of each of the first electrode EL1 and the second electrode EL2 are not limited to the materials described above.

[0206] Furthermore, each of the first electrode EL1 and the second electrode EL2 may be configured and / or formed as a single layer, but this disclosure is not limited thereto. In some embodiments, each of the first electrode EL1 and the second electrode EL2 may be configured and / or formed as a multilayer in which two or more materials selected from metals, alloys, conductive oxides, and conductive polymers are stacked. Each of the first electrode EL1 and the second electrode EL2 may be configured as a multilayer comprising at least two layers, so that a signal (or voltage) is transmitted to both end portions of each of the light-emitting elements LD (see [link to relevant documentation]). Figure 6A In the case of “EP1” and “EP2”, the distortion caused by signal delay is minimized. In the example, each of the first electrode EL1 and the second electrode EL2 can be configured to have a multilayer of indium tin oxide (ITO) / silver (Ag) / indium tin oxide (ITO) stacked sequentially.

[0207] The first electrode EL1 can be electrically connected to the driving transistor Tdr of the pixel circuit layer PCL through the first contact hole CH1, and the second electrode EL2 can be electrically connected to the driving voltage line DVL of the pixel circuit layer PCL through the second contact hole CH2 of the protective layer PSV.

[0208] The first insulating layer INS1 may be disposed on and / or formed on the first electrode EL1 and the second electrode EL2.

[0209] The first insulating layer INS1 may comprise an inorganic insulating layer made of an inorganic material or an organic insulating layer made of an organic material. The first insulating layer INS1 may be configured as an inorganic insulating layer that facilitates the protection of the light-emitting element LD from the pixel circuit layer PCL of each pixel PXL. In an example, the first insulating layer INS1 may comprise silicon oxide (SiO2). x ), silicon nitride (SiN) x ), silicon oxynitride (SiON) and aluminum oxide (AlO) x The first insulating layer INS1 may be at least one of the metal oxides of the light-emitting element LD, but this disclosure is not limited thereto. In some embodiments, the first insulating layer INS1 may be configured as an organic insulating layer that facilitates the planarization of the support surface of the light-emitting element LD.

[0210] A first insulating layer INS1 may be disposed and / or formed on the protective layer PSV to completely cover the first electrode EL1 and the second electrode EL2. After the light-emitting element LD is provided and aligned on the first insulating layer INS1, the first insulating layer INS1 may be partially opened to expose... Figure 7 and Figure 8 The diagram shows one region of each of the first electrode EL1 and the second electrode EL2. After the light-emitting element LD is provided and aligned, the first insulating layer INS1 can be patterned into the shape of a separate pattern partially disposed on the bottom of the light-emitting element LD. The first insulating layer INS1 can cover areas other than one region of each of the first electrode EL1 and the second electrode EL2. In some embodiments, the first insulating layer INS1 can be omitted.

[0211] A dam section (BNK) may be disposed on and / or formed on the first insulating layer (INS1). The dam section (BNK) may be formed between other pixels (PXL) to surround the emission region (EMA) of each pixel (PXL). Therefore, the dam section (BNK) may constitute a pixel defining layer that divides the emission region (EMA) of the corresponding pixel (PXL). In the process of forming the light-emitting element (LD) into the emission region (EMA), the dam section (BNK) may serve as a dam structure that prevents the introduction of a solution containing the light-emitting element (LD) into the emission region (EMA) of adjacent pixels (PXL), or controls a constant amount of solution to be supplied to each emission region (EMA).

[0212] A light-emitting element (LD) can be provided and aligned in the emission region EMA of each pixel PXL, wherein a first insulating layer INS1 may be formed. In the example, the light-emitting element LD is provided (or input) to the emission region EMA via an inkjet process or the like, and is aligned between the first electrode EL1 and the second electrode EL2 by a predetermined alignment voltage (or alignment signal) applied to each of the first electrode EL1 and the second electrode EL2.

[0213] The second insulating layer INS2 may be disposed and / or formed on the light-emitting element LD. The second insulating layer INS2 may be disposed and / or formed on the light-emitting element LD aligned between the first electrode EL1 and the second electrode EL2, to partially cover the outer circumferential surface (or surface) of each of the light-emitting elements LD, and expose the two end portions EP1 and EP2 of each of the light-emitting elements LD to the outside.

[0214] The first contact electrode CNE1 and the second contact electrode CNE2 can be components that stably connect the first electrode EL1 and the second electrode EL2 to the light-emitting element LD.

[0215] A first contact electrode CNE1 may be disposed and / or formed on an end portion (e.g., a first end portion EP1) of each of the light-emitting elements LD and on the first electrode EL1. The first contact electrode CNE1 may be disposed to contact the first electrode EL1 in a region of the first electrode EL1 that may not be covered by the first insulating layer INS1. In some embodiments, where a conductive overlay (not shown) is disposed on the first electrode EL1, the first contact electrode CNE1 may be disposed on the conductive overlay to connect to the first electrode EL1 through the conductive overlay. The conductive overlay may protect the first electrode EL1 from failures occurring during the manufacturing process of the display device and further strengthen the adhesion between the first electrode EL1 and the pixel circuit layer PCL located beneath it. The conductive overlay may include a transparent conductive material (or substance) such as indium zinc oxide (IZO).

[0216] Furthermore, the first contact electrode CNE1 may be disposed on the first end portion EP1 of each of the light-emitting elements LD adjacent to the first electrode EL1, so as to contact the first end portion of each of the light-emitting elements LD. For example, the first contact electrode CNE1 may be configured to cover at least one corresponding region of the first end portion EP1 of each of the light-emitting elements LD and the first electrode EL1.

[0217] The second contact electrode CNE2 may be disposed and / or formed on the second end portion EP2 of each of the light-emitting elements LD and on the second electrode EL2. The second contact electrode CNE2 may be disposed on a region of the second electrode EL2 that is not covered by the first insulating layer INS1 to contact the second electrode EL2. In some embodiments, if a conductive coating layer is disposed on the second electrode EL2, the second contact electrode CNE2 may be disposed on the conductive coating layer to connect to the second electrode EL2 through the conductive coating layer.

[0218] Furthermore, the second contact electrode CNE2 can be disposed on the second end portion EP2 of each of the light-emitting elements LD adjacent to the second electrode EL2, so as to contact the second end portion EP2 of each of the light-emitting elements LD. For example, the second contact electrode CNE2 can be configured to cover the second end portion EP2 of each of the light-emitting elements LD and at least one corresponding region of the second electrode EL2.

[0219] The first contact electrode CNE1 and the second contact electrode CNE2 can be made of various transparent conductive materials (or substances) to allow light emitted from each of the light-emitting elements LD and then reflected by the first electrode EL1 and the second electrode EL2 to travel in the image display direction of the display device without light loss. In an example, the first contact electrode CNE1 and the second contact electrode CNE2 may comprise at least one of various transparent conductive materials (or substances) including indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium gallium zinc oxide (IGZO), and indium tin zinc oxide (ITZO), and may be substantially transparent or translucent to meet a predetermined transmittance (or light transmittance). However, the materials of the first contact electrode CNE1 and the second contact electrode CNE2 are not limited to the embodiments described above. In some embodiments, the first contact electrode CNE1 and the second contact electrode CNE2 may be made of various opaque conductive materials. The first contact electrode CNE1 and the second contact electrode CNE2 may be formed as a single layer or multiple layers.

[0220] The first contact electrode CNE1 and the second contact electrode CNE2 can be disposed in the same layer. The first contact electrode CNE1 and the second contact electrode CNE2 can be formed using the same material in the same process, but this disclosure is not limited thereto. In some embodiments, the first contact electrode CNE1 and the second contact electrode CNE2 can be formed using different processes to be disposed in different layers. This will be referred to later. Figure 14 and Figure 15 Describe it.

[0221] A third insulating layer INS3 may be disposed and / or formed on the first contact electrode CNE1 and the second contact electrode CNE2. The third insulating layer INS3 may be an inorganic insulating layer comprising inorganic materials or an organic insulating layer comprising organic materials. In an example, the third insulating layer INS3 may have a structure in which at least one inorganic insulating layer and at least one organic insulating layer are alternately stacked. The third insulating layer INS3 may completely cover the display element layer DPL to prevent moisture, humidity, etc., from external sources from being introduced into the display element layer DPL, including the light-emitting element LD.

[0222] In some embodiments, in addition to the third insulating layer INS3, the display element layer DPL may optionally include an optical layer. In an example, the display element layer DPL may also include a color conversion layer comprising color conversion particles for converting light emitted from the light-emitting element LD into light of a specific color.

[0223] In other embodiments, at least one outer coating layer (e.g., a layer that flattens the top surface of the display element layer DPL) may also be disposed on top of the third insulating layer INS3.

[0224] Figure 10 This is a schematic plan view of pixels according to another embodiment of the present disclosure. Figure 11 It is along Figure 10 The cross-sectional view shown is taken along line IV-IV'. Figure 12 It shows Figure 10 Another embodiment of the embankment pattern shown is along... Figure 10 The cross-sectional view shown is taken along line IV-IV'. Figure 13 It shows Figure 10 Another embodiment of the first and second contact electrodes shown, and along... Figure 10 The cross-sectional view shown is taken along line IV-IV'.

[0225] Figures 10 to 13 The pixel PXL shown can have the same as Figures 5 to 9 The configurations of the pixels PXL shown are substantially the same or similar, wherein the embankment pattern BNKP can be disposed between the protective layer PSV and each of the first electrode EL1 and the second electrode EL2.

[0226] Therefore, regarding Figures 10 to 13 The pixels shown will be described in a way that differs from the parts described in the above embodiments to avoid redundancy.

[0227] refer to Figures 10 to 13 The support member can be located between each of the first electrode EL1 and the second electrode EL2 and the protective layer PSV. In the example, as... Figures 11 to 13As shown, the embankment pattern BNKP can be located between the first electrode EL1 and the second electrode EL2 and the protective layer PSV.

[0228] The embankment pattern BNKP can be located in the emission region EMA, where light can be emitted in the pixel region PXA of each pixel PXL. The embankment pattern BNKP can be a support member supporting each of the first electrode EL1 and the second electrode EL2 to change the surface profile (or shape) of each of the first electrode EL1 and the second electrode EL2, such that light emitted from the light-emitting element LD can be guided in the image display direction of the display device.

[0229] The embankment pattern BNKP can be set in the emission region EMA of the corresponding pixel PXL between the protective layer PSV and each of the first electrode EL1 and the second electrode EL2.

[0230] The embankment pattern BNKP can be an inorganic insulating layer comprising inorganic materials or an organic insulating layer comprising organic materials. In some embodiments, the embankment pattern BNKP may comprise a single layer of organic insulating layer and / or a single layer of inorganic insulating layer, but this disclosure is not limited thereto. In some embodiments, the embankment pattern BNKP may be configured as a multilayer in which at least one organic insulating layer and at least one inorganic insulating layer are stacked. However, the material of the embankment pattern BNKP is not limited to the embodiments described above. In some embodiments, the embankment pattern BNKP may comprise a conductive material.

[0231] The embankment pattern BNKP may have a cross-section with a trapezoidal shape, the width of which narrows from one surface (e.g., the upper surface) of the protective layer PSV along the third direction DR3 as it approaches the top, but this disclosure is not limited thereto. In some embodiments, such as Figure 12 As shown, the embankment pattern BNKP may include a curved surface having a cross-section such as a semi-elliptical or semi-circular (or hemispherical) shape, the width of which narrows from one surface of the protective layer PSV along the third direction DR3 as it approaches the top. When viewed in cross-section, the shape of the embankment pattern BNKP is not limited to the embodiments described above and can be modified differently within a range that can improve the efficiency of light emitted from each of the light-emitting elements LD.

[0232] The dam pattern BNKP can be designed to have a shape corresponding to the shape of the first electrode EL1 and the second electrode EL2. In the example, the dam pattern BNKP located between the first electrode EL1 and the protective layer PSV (hereinafter referred to as the "first dam pattern") can be designed to have a shape corresponding to the shape of the first electrode EL1 located on top of it, and the dam pattern BNKP located between the second electrode EL2 and the protective layer PSV (hereinafter referred to as the "second dam pattern") can be designed to have a shape corresponding to the shape of the second electrode EL2 located on top of it.

[0233] The first embankment pattern BNKP may include a first region B1 extending in a fourth direction DR4 (e.g., an oblique direction inclined relative to the first direction DR1 (or horizontal direction) and / or the second direction DR2 (or vertical direction)) and a second region B2 extending in a fifth direction DR5 intersecting the fourth direction DR4. The first region B1 and the second region B2 may be arranged alternately along the second direction DR2. The first embankment pattern BNKP may have a serrated shape in a plan view. The second embankment pattern BNKP may include a first region B1 extending in the fourth direction DR4 and a second region B2 extending in the fifth direction DR5 intersecting the fourth direction DR4. The first region B1 and the second region B2 may be arranged alternately along the second direction DR2. The second embankment pattern BNKP may have a serrated shape in a plan view.

[0234] The first embankment pattern BNKP and the second embankment pattern BNKP can form a bilateral symmetry along the second direction DR2 in the emission region EMA of each pixel PXL.

[0235] Each of the first electrode EL1 and the second electrode EL2 can be disposed and / or formed on a corresponding embankment pattern BNKP. Each of the first electrode EL1 and the second electrode EL2 can have a surface profile corresponding to the shape of the embankment pattern BNKP disposed on its bottom. Therefore, light emitted from the light-emitting element LD can be reflected by each of the first electrode EL1 and the second electrode EL2 to further propagate in the image display direction of the display device. The embankment pattern BNKP and each of the first electrode EL1 and the second electrode EL2 can serve as a reflective member to guide the light emitted from the light-emitting element LD in a desired direction, thereby improving the light efficiency of the display device. Therefore, the luminous efficiency of the light-emitting element LD can be further improved.

[0236] The second insulating layer INS2 may be disposed and / or formed on each of the light-emitting elements LD.

[0237] In this implementation, after the provisioning and alignment of the light-emitting element LD in the emission region EMA of each pixel PXL is completed, a second insulating layer INS2 can be formed on the light-emitting element LD to prevent the light-emitting element LD from separating from the aligned position. Figure 13 As shown, if there is a gap (or space) between the first insulating layer INS1 and the light-emitting element LD before the formation of the second insulating layer INS2, the gap can be filled with the second insulating layer INS2 during the process of forming the second insulating layer INS2. The second insulating layer INS2 can be configured as an organic insulating layer that facilitates filling the gap between the first insulating layer INS1 and the light-emitting element LD.

[0238] Figure 14 This is a schematic plan view of pixels according to yet another embodiment of the present disclosure. Figure 15 It is along Figure 14 The cross-sectional view shown is taken by line V-V'.

[0239] Figure 14 and Figure 15 The pixel PXL shown can have the same as Figures 5 to 9 The pixel PXL shown has a substantially identical or similar configuration, wherein the first contact electrode CNE1 and the second contact electrode CNE2 are formed in different layers.

[0240] Therefore, regarding Figure 14 and Figure 15 The pixels shown will be described in a way that differs from the description in the above embodiments to avoid redundancy.

[0241] refer to Figure 14 and Figure 15 The auxiliary insulating layer AUINS can be disposed and / or formed between the first contact electrode CNE1 and the second contact electrode CNE2.

[0242] The first contact electrode CNE1 may be disposed and / or formed on the first electrode EL1 exposed by the first insulating layer INS1, the first end portion EP1 of each of the light-emitting elements LD, and the second insulating layer INS2. The first contact electrode CNE1 may be made of various transparent conductive materials, such that light emitted from each of the light-emitting elements LD and then reflected by the first electrode EL1 travels in the image display direction of the display device without loss. The auxiliary insulating layer AUINS may be entirely disposed and / or formed on the first contact electrode CNE1.

[0243] An auxiliary insulating layer AUINS can be disposed above the first contact electrode CNE1 to prevent the first contact electrode CNE1 from being exposed to the outside, thereby preventing corrosion of the first contact electrode CNE1. The auxiliary insulating layer AUINS can include an inorganic insulating layer made of inorganic materials or an organic insulating layer made of organic materials. In an example, the auxiliary insulating layer AUINS can include silicon oxide (SiO2). x ), silicon nitride (SiN) x ), silicon oxynitride (SiON) and aluminum oxide (AlO) x The auxiliary insulating layer AUINS may be formed as a single layer or multiple layers. (The material may contain at least one of the following metal oxides: )

[0244] The auxiliary insulating layer AUINS can be designed to have a size (or area) that is relatively larger than the size (or area) of the first contact electrode CNE1 in order to fully cover the first contact electrode CNE1, while having a shape that corresponds to the shape of the first contact electrode CNE1 located on its bottom.

[0245] The auxiliary insulating layer AUINS can be designed to include a first region C1 and a second region C2. The first region C1 extends in a fourth direction DR4 corresponding to an oblique direction inclined relative to a first direction DR1 (or horizontal direction) and / or a second direction DR2 (or vertical direction). The second region C2 extends in a fifth direction DR5 intersecting the fourth direction DR4. The first region C1 of the auxiliary insulating layer AUINS can be designed to have a size (or area) relatively larger than that of the (1-1)th contact electrode CNE1_1 of the first contact electrode CNE1. Therefore, the first region C1 of the auxiliary insulating layer AUINS can completely cover the (1-1)th contact electrode CNE1_1. The second region C2 of the auxiliary insulating layer AUINS can be designed to have a size (or area) relatively larger than that of the (1-2)th contact electrode CNE1_2 of the first contact electrode CNE1. Therefore, the second region C2 of the auxiliary insulating layer AUINS can completely cover the (1-2)th contact electrode CNE1_2.

[0246] The auxiliary insulating layer AUINS can have a serrated shape in a plan view, including straight lines with a predetermined inclination. The first region C1 and the second region C2 can be arranged alternately along the second direction DR2. The second contact electrode CNE2 can be disposed and / or formed on the auxiliary insulating layer AUINS.

[0247] The second contact electrode CNE2 may be disposed and / or formed on the second end portion EP2 of each of the auxiliary insulating layer AUINS, the second electrode EL2 exposed by the first insulating layer INS1, and the light-emitting element LD. The second contact electrode CNE2 may be made of a transparent conductive material. The second contact electrode CNE2 may include the same material as the first contact electrode CNE1, but this disclosure is not limited thereto.

[0248] A third insulating layer INS3 covering the second contact electrode CNE2 may be disposed and / or formed on the second contact electrode CNE2. The third insulating layer INS3 may include a thin film encapsulation layer comprising at least one inorganic layer and / or at least one organic layer, but this disclosure is not limited thereto. In some embodiments, at least one outer coating layer (e.g., a layer planarizing the top surface of the display element layer DPL) may also be disposed on top of the third insulating layer INS3.

[0249] In the pixel according to the present disclosure and the display device including the pixel, the light-emitting element between two adjacent electrodes can be effectively aligned, thereby improving the light-emitting efficiency.

[0250] Exemplary embodiments have been disclosed herein, and although specific terminology has been used, it is used only in a general and descriptive sense and will be interpreted in a general and descriptive sense only, and not for limiting purposes. In some instances, as will be apparent to those skilled in the art upon filing this application, unless otherwise specifically indicated, features, characteristics, and / or elements described in connection with particular embodiments may be used alone or in combination with features, characteristics, and / or elements described in connection with other embodiments. Therefore, those skilled in the art will understand that various changes in form and detail may be made without departing from the spirit and scope of this disclosure as set forth in the appended claims, including their equivalents.

Claims

1. Pixel, including: The first electrode and the second electrode are spaced apart from each other in a first direction, and the first electrode and the second electrode each extend in a second direction intersecting the first direction; as well as A light-emitting element is disposed between the first electrode and the second electrode, wherein, The first electrode includes: At least one first (1-1) electrode extends upward in a third direction inclined relative to one of the first and second directions; and At least one (1-2) electrode extends in a fourth direction intersecting the third direction. The second electrode includes: At least one (2-1) electrode extends upward from the third electrode; and At least one (2-2)th electrode extends in the fourth direction. The at least one (1-1) electrode and the at least one (2-1) electrode correspond to each other in the first direction. The at least one (1-2) electrode and the at least one (2-2) electrode correspond to each other in the first direction. One of the at least one (1-2) electrodes directly contacts the first end of one of the at least one (1-1) electrodes, and the other of the at least one (1-2) electrodes directly contacts the opposite second end of the at least one (1-1) electrode. One of the at least (2-2) electrodes directly contacts a first end of one of the at least (2-1) electrodes, and the other of the at least (2-2) electrodes directly contacts the opposite second end of one of the at least (2-1) electrodes.

2. The pixel according to claim 1, further comprising a dam portion, wherein, in a plan view, the dam portion surrounds the light-emitting element along its periphery, the dam portion including at least one opening, wherein, The at least one opening corresponds to the emitting region in each of the light-emitting elements in which light is emitted, and The first electrode and the second electrode have the same planar shape in the emission region.

3. The pixel according to claim 2, wherein, The at least one (1-1) electrode and the at least one (2-1) electrode have the same planar shape, and The at least one (1-2) electrode and the at least one (2-2) electrode have the same planar shape.

4. The pixel according to claim 3, wherein, The at least one (1-1) electrode and the at least one (1-2) electrode are mirror-symmetric with respect to the boundary between the at least one (1-1) electrode and the at least one (1-2) electrode, and The at least one (2-1) electrode and the at least one (2-2) electrode are mirror-symmetric with respect to the boundary between the at least one (2-1) electrode and the at least one (2-2) electrode.

5. The pixel according to claim 3, wherein, The width of each of the at least one (1-1) electrode, the at least one (1-2) electrode, the at least one (2-1) electrode, and the at least one (2-2) electrode in the second direction is less than the length of each of the light-emitting elements.

6. The pixel according to claim 3, wherein, In the plan view, each of the at least one (1-1) electrode and the at least one (2-1) electrode has a polygonal shape having a tilt angle corresponding to the third direction, and In the plan view, each of the at least one (1-2) electrode and the at least one (2-2) electrode has a polygonal shape having an inclination corresponding to the fourth direction.

7. The pixel according to claim 3, wherein, The at least one first (1-1) electrode and the at least one first (1-2) electrode are arranged alternately along the second direction, and The at least one (2-1) electrode and the at least one (2-2) electrode are arranged alternately along the second direction.

8. The pixel according to claim 3 further includes an insulating layer disposed on the light-emitting element. in, The insulating layer has a planar shape corresponding to the first electrode and the second electrode.

9. The pixel according to claim 8, further comprising: A first contact electrode is disposed on the insulating layer, and the first contact electrode is electrically connected to each of the light-emitting elements and the first electrode. as well as The second contact electrode is configured to be spaced apart from the first contact electrode in the first direction, and the second contact electrode is electrically connected to each of the light-emitting elements and the second electrode.

10. The pixel according to claim 9, wherein, The first contact electrode has a planar shape corresponding to the first electrode, and The second contact electrode has a planar shape corresponding to the second electrode.

11. The pixel according to claim 2, wherein, In the plan view, the width between the first electrode and the second electrode in the first direction is constant along the second direction.

12. The pixel according to claim 11, wherein, The width of the at least one (1-1) electrode in the first direction and the width of the at least one (2-1) electrode in the first direction are equal to each other, and The width of the at least one (1-2) electrode in the first direction and the width of the at least one (2-2) electrode in the first direction are equal to each other.

13. The pixel according to claim 12, wherein, Each of the light-emitting elements includes a first end portion and a second end portion, the first end portion and the second end portion being located at the end of each of the light-emitting elements in the length direction between the first electrode and the second electrode, and The first end portion is positioned adjacent to one of the first electrode and the second electrode, and The second end portion is positioned adjacent to the other of the first electrode and the second electrode.

14. The pixel according to claim 13, wherein, The light-emitting element includes a light-emitting element whose length direction is parallel to the third or fourth direction.

15. The pixel according to claim 2, wherein, In the plan view, the first electrode and the second electrode have a serrated shape.

16. The pixel according to claim 2, wherein, The first electrode and the second electrode comprise at least one curve having a predetermined curvature in a plan view.

17. A display device, comprising: Substrate; as well as Multiple pixels are disposed on the substrate, wherein, Each of the plurality of pixels includes: A pixel circuit layer is disposed on the substrate, the pixel circuit layer including at least one transistor; A first electrode and a second electrode are disposed on the pixel circuit layer and spaced apart from each other in a first direction, and the first electrode and the second electrode each extend in a second direction intersecting the first direction; A light-emitting element is disposed between the first electrode and the second electrode; and An insulating layer is disposed on the light-emitting element. The first electrode includes: At least one first (1-1) electrode extends upward in a third direction inclined relative to one of the first and second directions; and At least one (1-2) electrode extends in a fourth direction intersecting the third direction. The second electrode includes: At least one (2-1) electrode extends upward from the third electrode; and At least one (2-2)th electrode extends in the fourth direction. The at least one (1-1) electrode and the at least one (2-1) electrode correspond to each other in the first direction. The at least one (1-2) electrode and the at least one (2-2) electrode correspond to each other in the first direction, and The adjacent (1-1) electrodes are electrically connected through the (1-2) electrodes, and the adjacent (2-1) electrodes are electrically connected through the (2-2) electrodes.

18. The display device according to claim 17, wherein, The at least one (1-1) electrode and the at least one (2-1) electrode have the same planar shape, and The at least one (1-2) electrode and the at least one (2-2) electrode have the same planar shape.

19. The display device according to claim 18, wherein, The width of each of the at least one (1-1) electrode, the at least one (1-2) electrode, the at least one (2-1) electrode, and the at least one (2-2) electrode in the second direction is less than the length of each of the light-emitting elements.

20. The display device according to claim 17, further comprising: A dam, in a plan view, surrounds the light-emitting element along its periphery, the dam including at least one opening; The first contact electrode is electrically connected to each of the light-emitting elements and the first electrode; as well as A second contact electrode is configured to be spaced apart from the first contact electrode in the first direction, and the second contact electrode is electrically connected to each of the light-emitting elements and the second electrode, wherein... The at least one opening corresponds to the emitting region in each of the light-emitting elements in which light is emitted, and Each of the insulating layer, the first contact electrode, and the second contact electrode has a planar shape in the emission region corresponding to the first electrode and the second electrode.

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