Quantum noise power device
Patent Information
- Application Number
- CN202080035117.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2020-04-22
- Filing Date
- 2020-05-05
- Publication Date
- 2026-09-15
- Estimated Expiration
- 2040-05-05
AI Technical Summary
[0006] In one aspect, the apparatus disclosed herein utilizes a zero-point energy density reduction structure to, for example, create a region with a zero-point energy density lower than its surrounding environment. This can allow for the driving of energy flow, such as between an electrical device adjacent to or adjacent to the zero-point energy density reduction structure and another device. Exemplary apparatuses of this aspect may include an electrical device and a zero-point energy density reduction structure adjacent to the electrical device. The zero-point energy density reduction structure can reduce the zero-point energy density in the electrical device compared to the zero-point energy density in a second electrical device (such as a second electrical device that is not adjacent to the zero-point energy density reduction structure but is electrically connected to the electrical device). In some examples, the zero-point energy density reduction structure includes a Casimir cavity.
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Abstract
Description
[0001] Cross-referencing of related patent applications
[0002] This application claims the benefit and priority of U.S. Patent Application No. 16 / 855,897, filed April 22, 2020, and U.S. Provisional Application No. 62 / 904,666, filed September 23, 2019, and U.S. Provisional Application No. 62 / 920,636, filed May 10, 2019, which are incorporated herein by reference in their entirety. Technical Field
[0003] This invention belongs to the field of electronic devices. Specifically, it relates to quantum devices for collecting and generating electrical energy. Background Technology
[0004] According to quantum theory, the quantum vacuum is filled with electromagnetic radiation in the form of quantum vacuum fluctuations, and devices exhibiting correlated quantum noise. Extensive discussion has been held about whether this energy can be harvested (and if so, how). A major problem with harvesting this energy is that it forms an energy ground state and therefore does not flow from one region to another. However, quantum vacuum energy is geometrically dependent, and its density is lower inside the Casimir cavity than outside. Therefore, the use of the Casimir cavity opens up the possibility of using quantum vacuum fluctuations to drive energy from one location to another. Summary of the Invention
[0005] This document describes an apparatus for generating electrical energy. In an embodiment, the apparatus described herein uses two distinct regions in which zero-point fluctuations differ to allow the collection of a portion of the noise power generated by the zero-point fluctuations.
[0006] In one aspect, the apparatus disclosed herein utilizes a zero-point energy density reduction structure to, for example, create a region with a zero-point energy density lower than its surrounding environment. This can allow for the driving of energy flow, such as between an electrical device adjacent to or adjacent to the zero-point energy density reduction structure and another device. Exemplary apparatuses of this aspect may include an electrical device and a zero-point energy density reduction structure adjacent to the electrical device. The zero-point energy density reduction structure can reduce the zero-point energy density in the electrical device compared to the zero-point energy density in a second electrical device (such as a second electrical device that is not adjacent to the zero-point energy density reduction structure but is electrically connected to the electrical device). In some examples, the zero-point energy density reduction structure includes a Casimir cavity.
[0007] The device disclosed herein differs from solar cells, photodiodes, or other devices that convert light from an external light source into an electric current and are capable of generating an energy flow that occurs even in the absence of an external light source. In other words, the disclosed device is capable of generating power under both dark and light conditions.
[0008] The apparatuses of this aspect include those in which the electrical components include resistors (such as resistors adjacent to a Casimir cavity). Such apparatuses may be described herein as Casimir resistors. In a particular example, the resistor includes a conductive layer that is adjacent to or includes components of the Casimir cavity. For example, the resistor may be a metal layer that provides the resistive structure while at least partially serving as a reflector for the Casimir cavity. Such resistors may use materials other than metals. In one example, graphene may be used.
[0009] The devices of this aspect include those in which the electrical components include rectifiers, one-way valves, or diodes (such as diodes adjacent to a Casimir cavity). Such devices may be described herein as Casimir diodes. In a particular example, the diode includes a geometric diode. Diodes that can be used with the devices of this aspect include, but are not limited to, geometric diodes and other structures such as conductor / insulator / conductor structures or conductor / semiconductor structures.
[0010] The devices of this aspect are useful in circuits that allow for the harvesting and / or transfer of energy. In one example, a circuit may include: an electrical device, such as a Casimir resistor or a Casimir diode; and a free-space electrical device electrically connected between a first electrical contact and a second electrical contact of the electrical device. For example, the free-space electrical device may correspond, for instance, to an electrical device, such as a resistor, diode, or other device, that does not have an adjacent zero-point energy density reduction structure. This configuration allows the first zero-point energy density at the electrical device to differ from the second zero-point energy density at the free-space electrical device, and allows the first zero-point energy noise power obtainable from the electrical device to differ from the second zero-point energy noise power obtainable from the free-space electrical device. In some cases, the free-space electrical device is a free-space diode or a free-space resistor.
[0011] Optionally, a pair (or more pairs) of antennas can be used to transmit energy or power between different parts of a circuit, such as a first antenna in one pair being electrically connected between electrical contacts of a device or its components, and a second antenna in the pair being optically coupled to the first antenna and electrically connected to another device (such as a free-space electrical device).
[0012] Effective coupling between electrical devices and free-space electrical devices can be used to limit power losses between devices. For example, the electrical transmission line between free-space electrical devices can be a high-frequency transmission line, such as a transmission line capable of carrying signals with frequencies from 1 THz to 3 PHz. This configuration can use very short electrical transmission lines (e.g., less than 10 μm in length or shorter) and / or highly conductive materials. In a particular example, the electrical transmission line may include a superconductor.
[0013] The devices and circuits of this aspect can be used in a variety of applications, including thermal applications, such as providing cooling or heating by transferring energy between free-space electrical installations and devices of adjacent zero-point energy density reduction structures. In some examples, components of the circuits described herein can be thermally coupled to heat transfer components such as radiators or heat sources to absorb or transfer heat energy from or to the environment, depending on the arrangement of the heat transfer components.
[0014] In some cases, the devices and circuits described herein can be used to capture noise power for use by external loads. In some exemplary circuits, the electrical device corresponds to a resistor or diode (i.e., where the electrical device and an adjacent zero-point energy density reduction structure together form a Casimir resistor or Casimir diode), and the free-space electrical device also corresponds to a resistor or diode, but the electrical device is a resistor or diode and the free-space device is a component of the opposite type, or the electrical device is a diode and the free-space device is a diode. For example, the electrical device may include a resistor, while the free-space device may include a free-space diode. Alternatively, the electrical device may include a Casimir diode, while the free-space device may include a free-space resistor. Such configurations can be used to allow net zero-point energy noise power to be obtained as DC power output because the diode in such circuits can be used to rectify the noise current.
[0015] As described above, the zero-point energy density reduction structure may include a Casimir cavity. In some examples, the Casimir cavity includes: a first reflective layer; a cavity layer; and a second reflective layer, wherein the cavity layer is positioned between the first and second reflective layers. The reflective layer may include a metal or other reflective material or structure. The cavity layer may include an optically transparent material. In some examples, the cavity layer has a thickness from 10 nm to 2 μm. At least one of the two reflectors in the Casimir cavity may have a reflectivity greater than 50% for at least some electromagnetic radiation wavelengths from 100 nm to 10 μm. In some examples, the reflective layer of the Casimir cavity may be used as a hybrid layer, serving both as a reflector and as a component of an electrical device. For example, the reflective layer of the Casimir cavity may also include a resistive layer or a diode layer.
[0016] On the other hand, arrays of devices for generating electrical energy are disclosed. Exemplary device arrays of this aspect include multiple devices or circuits arranged in an array configuration as described herein. In one example, an array may include multiple circuits comprising free-space devices and electrical devices adjacent to the Casimir cavity, as described above. In some examples, at least a subset of the multiple devices or circuits is optionally arranged in a series configuration. Optionally, at least a subset of the multiple devices or circuits is arranged in a parallel configuration. In some examples, the multiple devices or circuits are arranged in a combination of series and parallel configurations.
[0017] Not wishing to be bound by any particular theory, this document may discuss beliefs or understandings of the fundamental principles relating to this invention. It should be recognized that, regardless of the ultimate correctness of any mechanical interpretation or assumption, embodiments of the invention remain operable and useful. Attached Figure Description
[0018] Figure 1 A graph showing the energy density spectrum of quantum vacuum radiation and blackbody radiation is provided.
[0019] Figure 2 Schematic illustrations are provided of exemplary zero-point energy density reduction structures coupled to a first device in a configuration for transferring energy from a second device to a first device, according to at least some embodiments.
[0020] Figure 3 A cross-sectional illustration of an exemplary Casimir cavity adjacent to an exemplary electronic device is provided according to at least some embodiments.
[0021] Figure 4A and Figure 4B Cross-sectional illustrations of exemplary Casimir resistor devices according to at least some embodiments are provided.
[0022] Figure 5A and Figure 5B A schematic diagram of an exemplary circuit for transferring energy between different regions, according to at least some embodiments, is provided.
[0023] Figure 6A and Figure 6B A schematic diagram of an exemplary circuit for transferring thermal energy between different regions, according to at least some embodiments, is provided.
[0024] Figure 7A and Figure 7B A schematic diagram of an exemplary circuit for collecting noise power according to at least some embodiments is provided.
[0025] Figure 8A and Figure 8B Cross-sectional illustrations of exemplary Casimir diode devices according to at least some embodiments are provided.
[0026] Figure 9A A schematic illustration of a top view of an exemplary geometric diode according to at least some embodiments is provided, and Figure 9B A schematic cross-sectional view of an exemplary Casimir diode device including a geometrically shaped diode according to at least some embodiments is provided.
[0027] Figure 10A A schematic top view of an exemplary thin-film transistor according to at least some embodiments is provided, and Figure 10BCross-sectional illustrations of an exemplary Casimir resistor device including a thin-film transistor according to at least some embodiments are provided.
[0028] Figure 11A Cross-sectional views of an exemplary noise power harvesting device including a geometrically shaped Casimir diode and a thin-film transistor, according to at least some embodiments, are provided. Figure 11B Provided according to at least some embodiments Figure 11A A top view of the noise power collection device. Figure 11C Cross-sectional illustrations of exemplary noise power harvesting devices including Casimir resistors and geometric diodes according to at least some embodiments are provided, and Figure 11D Provided according to at least some embodiments Figure 11C A top view of the noise power collection device.
[0029] Figure 12 Schematic circuit diagrams of exemplary device arrays according to at least some embodiments are provided.
[0030] Figure 13A Pattern layouts for manufacturing exemplary Casimir resistor devices are provided according to at least some embodiments.
[0031] Figure 13B Cross-sectional illustrations of exemplary Casimir resistor devices according to some embodiments are provided. Detailed Implementation
[0032] Quantum vacuum fluctuations fill all space with electromagnetic radiation. The energy density of this radiation in free space is...
[0033]
[0034] Where h is Planck's constant, f is the radiation frequency, c is the speed of light, k is Boltzmann's constant, and T is the temperature. The first term in parentheses in Equation 1 is due to thermal blackbody radiation at non-zero temperatures, and the second term is independent of temperature and corresponds to quantum vacuum radiation.
[0035] The energy density (ρ(hf)) spectra of the temperature-dependent and temperature-independent terms in Equation 1 are as follows: Figure 1 As shown, the data is plotted as a function of photon energy hf, where h is Planck's constant and f is the optical frequency, varying with the reciprocal of the wavelength. At 300 K, the thermal component (in...) Figure 1 The spectrum of blackbody (hf) reaches its maximum in the visible light portion of the spectrum and in the infrared portion, while quantum vacuum radiation (in...) Figure 1The quantum vacuum radiation component (QVR(hf)) increases with the cube of the frequency and becomes much larger than the thermal component of the spectrum at visible light frequencies and higher frequencies (as shown in Equation 1 above and Equation 2 below). For 300 K blackbody radiation, the quantum vacuum radiation component exceeds the thermal portion at any frequency above 7 THz, corresponding to a photon energy of approximately 29 meV. Since the energy density of the quantum vacuum radiation portion of the spectrum at high frequencies is much greater than that of the thermal spectrum, more energy can be obtained from quantum vacuum radiation.
[0036] Harvesting energy generated by quantum vacuum radiation does not appear to violate any physical laws, but since the energy corresponds to the energy of the ground state, there is usually no driving force for energy flow. However, quantum vacuum radiation is geometrically dependent, and its density may differ in different spatial regions. For example, a zero-point energy density reduction structure can establish a geometric condition in which the quantum vacuum radiation density in one spatial region may be lower than that in free space (such as outside the structure), thus providing conditions for energy flow to occur. A method is described in U.S. Patent 7,379,286, which is incorporated herein by reference.
[0037] Another approach is to harvest energy using electrical fluctuations (also known as noise) in resistors and other electronic devices. The fundamental noise in resistors and other electronic devices has two sources: thermal fluctuations and zero-point energy fluctuations. Thermal fluctuations are described by the Johnson-Nyquist equation.
[0038] S(f) = 4R(f)hfN(f,T), Equation 2, where S(f) is the power spectrum of the voltage noise density (equal to the mean square voltage per unit frequency) available to resistor R(f) under matched load. N(f,T) is the average number of energy quanta, each with an energy hf.
[0039]
[0040] N decreases when the temperature drops to zero or the frequency becomes very high.
[0041] The noise power of the thermistor can be collected by another device. For example, a diode connected to the noise resistor can correct the noise and generate DC power. This can be achieved if the devices are at different temperatures. If the source (resistor) and sink (diode) are at the same temperature, being able to collect heat energy from the system would violate the second law of thermodynamics.
[0042] The Johnson-Nyquist formula given above does not consider the zero-point energy. When the zero-point energy is considered, there is an additional term of 1 / 2 of the energy quantum in the expression for S(f), which makes...
[0043]
[0044] Above 7 THz, the half-term of the zero-point energy exceeds the thermal term at room temperature. At very high frequencies or very low temperatures, the thermal component of the power spectrum is negligible, and the power spectrum can be approximated as follows:
[0045]
[0046] This is resistor noise caused solely by zero-point energy fluctuations.
[0047] Zero-point resistance noise power cannot be collected by another device in the same way as thermal resistance noise because it is temperature-independent. Under normal conditions, the source and sink will each have the same level of zero-point energy and there will be no difference to drive the net power flow that can be collected. By using a zero-point energy density reduction structure to establish different zero-point energy densities in different spatial regions, zero-point energy fluctuations in resistors and other electronic devices can be collected.
[0048] An example of a zero-point energy density reduction structure is a Casimir cavity, which can be formed using two closely spaced parallel reflectors. The requirement that the tangential electric field must disappear at the boundary (for an ideal reflector) limits the permissible quantum vacuum modes (i.e., field modes) between the plates. Generally, permissible modes include those with a gap spacing equal to an integer multiple of half the wavelength. Modes with wavelengths greater than twice the gap spacing are largely excluded. This results in a larger and more numerous set of full-spectrum quantum vacuum modes outside the plates (described by Equation 1) than the restricted set of modes inside, thus leading to a lower energy density inside. The critical size determining the wavelength at which quantum vacuum modes are suppressed is the gap spacing (in the case of a one-dimensional Casimir cavity). A Casimir cavity can also be constructed in the form of a cylinder (nanopore), in which case the critical size is the diameter. Casimir cavities can also be formed with other geometries that can be used with the disclosed devices. The aspects described herein utilize the fact that quantum vacuum levels depend on local geometries, particularly the presence of zero-point energy density reduction structures such as Casimir cavities.
[0049] Zero-point energy is the ground-state energy of a system, which remains constant even at zero temperature. Quantum vacuum fluctuations are zero-point energy fluctuations in the form of electromagnetic radiation. Internal zero-point energy fluctuations also exist in materials that do not support electromagnetic radiation. To utilize differences in zero-point energy density, structural asymmetries can be reduced with respect to zero-point energy density, thereby allowing the harvesting of some energy. Figure 2As shown, for example, the zero-point energy density reduction structure 200 can be used to establish an asymmetry in zero-point energy density between the first device 250 and the second device 260, such as by positioning the first device 250 adjacent to or adjacent to the zero-point energy density reduction structure 200. By using a structure for reducing zero-point energy density adjacent to the first device 250 but not adjacent to the second device 260, and a device for energy transfer schematically shown as arrow 255, net power flows out from the second device 260, which has no zero-point energy density reduction structure nearby and therefore has a higher zero-point energy level relative to the first device 250, which is adjacent to the zero-point energy density reduction structure 200 and therefore has a lower zero-point energy density. The same concept applies if both devices are adjacent to the zero-point energy density reduction structure but have different critical dimensions or frequency cutoff values.
[0050] Another way to describe the asymmetry requirement is through equilibrium and fine-grained balancing. In equilibrium, the energy flow from any first element to any second element must be balanced by an equal energy flow from the second element to the first element. This is the result of fine-grained balancing. Zero-point energy density reduction structures facilitate methods to break this equilibrium, resulting in a smaller energy flow from devices adjacent to or adjacent to the zero-point energy density reduction structure than from devices without it.
[0051] Kasimir cavity. Figure 3A schematic illustration of an exemplary Casimir cavity 300 adjacent to a first electrical device 350 but not adjacent to a second electrical device 360 is provided. The Casimir cavity 300 includes a first reflector 305, a second reflector 310, and a gap 315 between the first reflector 305 and the second reflector 310. The gap 315 (also referred to herein as a cavity layer) may be a space gap (e.g., emptied or corresponding to a vacuum) or filled with gas, which can be achieved by a rigid substrate and spacers. In some embodiments, the gap 315 may be filled with a material 316, such as an optical material that is at least partially transparent to at least some wavelengths of electromagnetic radiation supported by the Casimir cavity, preferably through the entire visible range of the near-ultraviolet. In contrast to a gas, the material 316 may comprise a condensed phase material, such as a solid, liquid, or liquid crystal. Exemplary materials that can be used as a cavity layer include, but are not limited to, silicon oxide or alumina. Alternatively, filling the gap with polymers such as PMMA (polymethyl methacrylate), polyimide, polymethyl methacrylate, or silicone may be sufficient or desirable, as these polymers provide sufficient transparency at the wavelengths of interest. In some examples, the cavity layer material (such as those described above) may have a transmittance greater than 20% for at least some electromagnetic radiation wavelengths from 100 nm to 10 μm. Advantageously, the cavity layer material may have a transmittance greater than 50% for at least some electromagnetic radiation wavelengths from 100 nm to 10 μm. In some cases, the cavity layer material (including at least some of the materials described above) may have a transmittance greater than 70% or greater than 90% for at least some electromagnetic radiation wavelengths from 100 nm to 10 μm. The thickness or spacing of the gap 315 can be set according to the target wavelength range of the Casimir cavity. In some examples, the gap 315 of the Casimir cavity may have a spacing from 10 nm to 2 μm.
[0052] The reflector material used for the first reflector 305 and / or the second reflector 310 may be selected based on its reflectivity in the wavelength range of interest, ease of deposition, and / or other considerations such as cost. The thickness of the reflector must be sufficient to provide adequate reflectivity, but not so thick that it is difficult to pattern. In some examples, the reflector may have a thickness of at least 10 nm, such as from 10 nm to 1 cm. Exemplary materials that can be used as reflectors for Casimir cavities include, but are not limited to, metals, dielectric reflectors, or diffractive reflectors such as Bragg reflectors or metamaterial reflectors. Exemplary metals that can be used as reflectors for Casimir cavities include, but are not limited to, Al, Ag, Au, Cu, Pd, or Pt. Exemplary dielectrics that can be used as dielectric reflectors include, but are not limited to, ZrO2, SiO2, Si3N4, Nb2O5, TiO2, MgF2, LiF, Na3AlF6, Ta2O5, LaTiO3, HfO2, ZnS, ZnSe, etc. For electromagnetic radiation of at least some wavelengths from 100 nm to 10 μm, the exemplary reflectivity of at least one of the two reflectors in a Casimir cavity is 50% to 100%. The reflectors of a Casimir cavity do not need to be metallic or dielectric reflectors; reflective interfaces can be used. For example, the reflective layer can be a step in refractive index at the interface between two adjacent materials (such as between the cavity layer and its surrounding material). In some cases, the cavity walls may provide a step in dielectric constant or refractive index when transitioning from one dielectric material to another or more dielectric materials, or between a dielectric material and free space.
[0053] Alternatively, the Casimir cavity can be formed by a multilayer dielectric stack of the distributed Bragg reflector type. For example, such a stack can comprise alternating layers of two or more dielectric materials with different refractive indices. In the case of two materials, the thickness of each pair of layers characterizes the pitch. Wavelengths twice the pitch are reflected, while longer wavelengths are largely suppressed. It is important to note that this differs from antireflective coatings, where the pitch is one-quarter of the wavelength rather than half, as is the case here. The layer thickness can be further chirped to enhance the spectral width of the reflection. Any suitable number of alternating dielectric layers can be used, such as 2 to 100 layers, or more. For example, to suppress a 250 nm wavelength using a stack of alternating layers of SiO2 and Al2O3, the layer thicknesses would be 42 nm and 35 nm, respectively. For a total of ten pairs of layers, the total thickness would be 770 nm.
[0054] exist Figure 3In this configuration, a first electrical device 350 is positioned adjacent to a Casimir cavity 300 such that its zero-point energy density or internal zero-point fluctuations are reduced compared to a second electrical device 360, which is either a free-space electrical device (i.e., not constrained by any Casimir cavity) or positioned adjacent to another Casimir cavity. An electrical lead 395 can be connected between the first electrical device 350 and the second electrical device 360, providing an electrical connection to external circuitry, such as including loads or other free-space electrical devices.
[0055] Casimir resistors. In principle, to limit zero-point fluctuations in a resistor, it can be placed within a Casimir cavity. A more practical method of forming such a device is to integrate the Casimir cavity into the resistor (“Casimir resistor”). For example, the resistor can be formed from a thin metal film or other conductive film. Zero-point energy fluctuations in the metal film are generated by internal zero-point energy modes and also by the incident zero-point field (quantum vacuum radiation), described by the right-hand side of Equation 1. This incident zero-point field generates photoexcited hot electrons in the metal film, which produce resistive noise due to the zero-point energy fluctuations. When a Casimir cavity is adjacent to a metal film, it suppresses a portion of the zero-point field, thereby suppressing some of the fluctuations in the resistor, i.e., the noise.
[0056] The role of the zero-point field in providing electrons is not necessarily achieved via thermionic emission. Charges can be excited from thermal plasma carriers and other waves in the material. It should be understood that while the aspects described herein can be interpreted with reference to electrons as charge carriers, other charge carriers may be used instead of electrons for various embodiments and operations of the disclosed devices, systems, techniques, and methods. Exemplary charge carriers include, but are not limited to, electrons, holes, Cooper pairs, any charged matter, or magnetic flux, such as that used in the field of spintronics.
[0057] Figure 4A and Figure 4B A schematic cross-sectional view of a resistor including a thin conductive film 405 is provided. Electrical contacts can be formed at the top and bottom of the conductive film 405, as depicted by electrical leads 495. A Casimir cavity 400 can be formed on one side of the conductive film 405, as shown... Figure 4A As shown. A Casimir cavity 400 is formed by a conductive film 405 and a reflective layer 410, wherein a light-transmitting region is located therebetween at a gap 415. The conductive film 405 may include a metal, such as chromium, silver, palladium, and aluminum. For example, the reflective layer 410 may include a metal or a dielectric. The transmission region at the gap 415 may be transmissive in at least a portion of the spectral region of the suppressed mode of the Casimir cavity 400. Exemplary materials for the transmission region include, but are not limited to, polymers such as polyimide or PMMA, oxides such as SiO2 or Al2O3, vacuum or gas, liquid, or liquid crystal filling the gap 415.
[0058] Instead of using a single Casimir cavity 400, a second Casimir cavity 401 can be formed on the other side of the conductive membrane 405, such as... Figure 4B As shown. The second Casimir cavity 401 may be similar to the Casimir cavity 400, such as being formed by a conductive film 405 and a second reflective layer 411, wherein a light-transmitting region is located therebetween at the gap 416. The gap 415 in the Casimir cavity 400 and the gap 416 in the Casimir cavity 401 may have the same or different thickness dimensions. The combination of the Casimir cavity 400 and the second Casimir cavity 401 can be used to further suppress even more resistor noise caused by zero-point energy fluctuations.
[0059] replace Figure 4A and Figure 4B The image shows a thin-film resistor, exemplified by a Casimir resistor. Resistors can be formed from other structures, where the Casimir cavity is adjacent to or adjacent to one or both sides. These structures include metal / insulator / metal devices, metal / multi-insulator / metal devices, metal / insulator / semiconductor devices, semiconductor layers, graphene, other two-dimensional semiconductors, Schottky diodes, superconductor / insulator / superconductor devices, vacuum diodes, and other electronic device structures.
[0060] One problem with the parallel-plate electrode devices (metal / insulator / metal devices, metal / multi-insulator / metal devices, metal / insulator / semiconductor devices, semiconductor layers, Schottky diodes, superconductor / insulator / superconductor devices) listed above that are adjacent to or adjacent to a Casimir cavity is that the suppressed zero-point field is orthogonal to the current flow direction. Specifically, for Figure 4A and Figure 4B The orientation shown indicates that the electric field in the suppression mode is in the vertical direction and the current flow is in the horizontal direction. This appears to be to enhance the effect of the Casimir cavity on resistor current fluctuations, where both the zero-point field and current flow should be in the same direction.
[0061] However, in such devices, proximity to the Casimir cavity can still reduce resistor noise due to zero-point energy fluctuations. This is because parallel-plate resistors (and diodes) utilize electron and hole transport across a gap, where a zero-point field perpendicular to the surface affects the transport of electrons and holes in the direction perpendicular to the surface. These are "photon" devices because each absorbed photon excites an electron or hole, thus generating a current. On the other hand, in Figure 4A and Figure 4B In thin-film resistors, the direction of current flow is perpendicular to the Poynting vector and lies in the electric field plane from the zero-point field. The current in these types of resistors is not generated by particles excited by photons propagating through the gap, but rather by the electric field in the zero-point field. For such "field" devices, Figure 4A and Figure 4B The configuration shown is correct for effectively suppressing fluctuations caused by the zero-point field in the resistor. Specifically, in Figure 4A and Figure 4B The electric field component polarized along the vertical direction will cause fluctuation current between the two leads in the metal film resistor.
[0062] Casimir resistor / free-space resistor circuit. One way to utilize the energy flow caused by the asymmetry of zero-point energy density is to use interconnected resistors. Figure 5A A schematic diagram of an exemplary circuit for interconnecting resistors is provided, wherein a first resistor 505 is located inside or near a Casimir cavity 500 (i.e., wherein the first resistor 505 and the Casimir cavity 500 together comprise or correspond to a Casimir resistor 510), as described above, and a second resistor 515 is a free-space resistor, such as a Casimir cavity without adjoining elements. Here, the resistor power described by Equation 5 will flow primarily to the Casimir resistor 510, as... Figure 5A Arrow 520 schematically depicts this. The electrical connection 595 between the first resistor 505 and the second resistor 515 can limit the energy flow caused by asymmetry; therefore, a high-frequency transmission line capable of carrying terahertz signals may be useful for the electrical connection 595. It should be understood that resistors 505 and 515 are not necessarily resistors themselves, but rather electrical devices exhibiting a certain resistance, such as diodes, transistors, lamps, heating elements, or other circuit components, electrical devices, or electronic devices. In some cases, capacitors can be used in place of one or both of resistors 505 or 515 to complete zero-point energy signal transmission.
[0063] Because the resistance of a metal increases with signal frequency, the transmission line for the electrical connection 595 between resistors 505 and 515 must typically be very short, such as less than 1 mm. For some applications described herein, a greater distance between the resistor pairs may be desirable. In some cases, the electrical connection 595 may comprise a superconductor, in which case the length of the electrical connection 595 is not limited. In some other examples, the distance between resistors 505 and 515 can be increased by connecting each resistor (a Casimir resistor or a free-space resistor) to an adjacent antenna, such as... Figure 5B As depicted. Here, the Casimir resistor 510 is electrically connected to the first antenna 530, while the second resistor 515 is electrically connected to the second antenna 535. The first antenna 530 and the second antenna 535 can be optically coupled to each other to allow signal exchange between the two resistors via transmission. Figure 5BIn this configuration, signals are exchanged via an optional waveguide 540, or via free space. In some cases, multiple antenna pairs can be used, such as in cases where there is a one-to-one correspondence between each pair of resistive antenna elements. Optionally, one type of resistor-antenna element array can exchange signals with another type of resistor-antenna element array, such as via free space. In many cases, antennas, resistors, Casimir cavities, etc., can be very small, so an array can include many elements, such as up to 100,000,000 elements per square centimeter.
[0064] Casimir resistors can be used in a variety of different applications, as described in more detail below. Examples include, but are not limited to, energy harvesting, electronic refrigeration, electronic heating, signal communication, electronic noise reduction, and zero-point energy detection.
[0065] Refrigerator and heater. Figure 5A and Figure 5B The example shown can be used to transfer energy between a free-space resistor and a Casimir resistor. In some cases, free-space resistors and Casimir resistors can be used in refrigerators and electric heaters. Figure 6A As shown, the Casimir resistor 610 is coupled to a heat sink 650 maintained at ambient temperature, which stabilizes the temperature of the Casimir resistor 610. The heat sink 650 may correspond to a device, structure, or other element for absorbing heat and dissipating it into the environment, as schematically depicted by arrow 620. Energy transfer between the Casimir resistor 610 and the free-space resistor 615 may result in the free-space resistor 615 cooling (i.e., the free-space resistor 615 absorbing ambient heat), thus providing a cooling effect. On the other hand, as... Figure 6B As shown, when the temperature of the free-space resistor 615 is kept constant, such as by using a heat source 651 at ambient temperature, the Casimir resistor 610 is heated, thereby providing an electric heater. The heat source 651 may correspond to a device, structure, or other element for absorbing and providing ambient heat, as schematically depicted by arrow 621. In some cases, the heat may be used to heat the area where the Casimir resistor 610 is located, or the heat may be used in conjunction with another device (such as a heat engine) to provide electrical or mechanical power. It should be understood that... Figure 5A or Figure 5B The configurations depicted herein, or variations thereof (e.g., including arrays or multiple antenna pairs), may be used in refrigerators or heaters.
[0066] Communication devices. Modulation of quantum vacuum noise can be used for communication. The movement or modulation of a Casimir cavity adjacent to a resistor or other electronic device can modulate noise, which can then be transmitted to a distant detector for communication. Modulation of the Casimir cavity can be achieved, for example, by vibrating the cavity with ultrasound or by electronically altering its reflection or transmission characteristics. One or more antenna pairs can be used to perform noise transmission, as described in the reference above. Figure 5B As described.
[0067] Electronic noise reduction device. By placing the Casimir cavity adjacent to the electronic device, the net zero-point energy fluctuations incident on the device are reduced, thus it can be used to reduce high-frequency electronic noise in the device. This configuration can correspond to Figure 3 The configuration shown depicts a Casimir cavity 300 adjacent to a first electrical device 350. For example, in high-frequency detectors, inherent electronic noise can reduce sensitivity, while the combination of adjacent Casimir cavities can reduce noise and improve detector sensitivity. Besides detectors, this can also be applied to amplification devices such as transistors, rectifier devices such as diodes, optical detectors, thermal detectors, and ultrasonic detectors. For example, the Casimir cavity may be on one or more sides of the device, or the device may be placed within the Casimir cavity.
[0068] Detector. Because the Casimir resistor has a reduced level of zero-point energy noise, the difference between its average output and the average output of the free resistor can provide a measure of zero-point energy noise. Therefore, this combination can be advantageously used as an average zero-point energy fluctuation detector.
[0069] Casimir resistor and Casimir diode energy harvesting circuit. At each operating voltage, the diode has an associated effective resistance. Therefore, when the diode is connected to a resistor in a circuit, both the diode and the resistor generate zero-point fluctuation noise current. Under normal conditions (i.e., without zero-point energy density reduction structures such as Casimir cavities), each element emits and receives the same noise power, so there is no net power flow.
[0070] On the other hand, if the Casimir cavity is incorporated into a diode (“Casimir diode,” discussed in detail below), the zero-point fluctuation noise current emanating from it is reduced. In this case, there may be a net noise power current flowing from the free-space resistor to the Casimir diode. Figure 7A This configuration is schematically depicted in the figure, wherein diode 705 is positioned adjacent to Casimir cavity 700 (i.e., wherein diode 705 and Casimir cavity 700 together include or correspond to Casimir diode 710) and wherein resistor 715 is a free space resistor, such as one without an adjacent Casimir cavity.
[0071] Diode 705 can be used to rectify the zero-point energy noise current from resistor 715 and generate a DC voltage output. Even in the absence of an external lighting source, the DC voltage output can be used to power load 720, such as... Figure 7A As depicted in the text. Generally speaking, the diode 705 can correspond to any structure used as a one-way valve or rectifier, which can be used to restrict the flow of charge carriers in one direction.
[0072] To limit losses, the electrical connection 795 between resistor 715 and diode 705 must be able to carry terahertz signals, such as high-frequency transmission lines. An optional low-pass filter 725 is shown, which can be used to prevent noise current from flowing out of the load or to the load. In some examples, the low-pass filter 725 can provide a cutoff frequency below 30 THz. In most implementations, such as when the load is not connected via a high-frequency transmission line, the low-pass filter 725 may not be necessary because conventional electrical conductors can serve as suitable low-pass filters. In some cases, the electrical connection 795 may include a superconductor, in which case the low-pass filter 725 may be useful.
[0073] As Figure 7A The alternative to the configuration described in the text Figure 7B A circuit including a free-space diode 716 and a Casimir resistor 711 is shown (i.e., where resistor 706 and Casimir cavity 701 together include or correspond to Casimir resistor 711). An electrical connection 795 is shown between resistor 706 and free-space diode 716. Here, the zero-point fluctuation noise current from resistor 706 is reduced, and there is a net noise power flow from free-space diode 716 to resistor 706. Free-space diode 716 can rectify this excess noise power and generate a DC voltage output that can be used to power load 720. Figure 7A Other characteristics of the circuit depicted in the diagram are applicable to Figure 7B .
[0074] Furthermore, circuits incorporating both free-space diodes and Casimir diodes offer similar functionality. In such circuits, each diode rectifies the noise difference between the free-space diode and the Casimir diode; however, due to the presence of two diodes, the noise voltage to be rectified is shunt between them, which reduces rectification efficiency. On the other hand, this circuit can exhibit superior performance compared to... Figure 7A and Figure 7B The circuit depicted in the diagram has the advantage of better impedance matching between the two components, and thus improves power delivery.
[0075] for Figure 7A and Figure 7B The situation described herein should be understood and can be used. Figure 5A or Figure 5B Any configuration or variations thereof depicted (e.g., including arrays or multiple antenna pairs), such as Figure 5A or Figure 5B One of the resistors shown is replaced by a diode coupled to the low-pass filter and the load.
[0076] Casimir diode. A conductor / insulator / conductor diode is a thin-film device in which the insulator is thin enough, such as 0.5 nm to 10 nm thick, or generally less than 100 nm, to facilitate the tunneling of electrons (or holes) from one conductor through the insulator to another. Generally, the two conductors can be, for example, any two metals, and can be different to provide an asymmetry in the barrier height and therefore an asymmetry in the tunneling characteristics in one direction relative to the other, and thus provide asymmetric diode current-voltage characteristics. Other conductive materials besides metals can also be used. The diode can also, or alternatively, incorporate multiple insulators to provide asymmetry and / or enhance current-voltage nonlinearity. In the case of multiple insulators, the conductors do not need to be different to facilitate diode formation.
[0077] Figure 8AA schematic cross-sectional view of a diode 850 including a first conductive layer 855, an electrically insulating layer 865, and a second conductive layer 860 is provided, wherein a Casimir cavity 800 is formed on one side of the diode 850. The Casimir cavity 800 is formed between the first conductive layer 855 and a reflective layer 810 on the side forming the diode, with a gap 815 therebetween, which may include, for example, a transmissive material. Electrical leads 895 are connected to the two conductive layers 855 and 860 surrounding the electrically insulating layer 865. The electrically insulating layer 865 may include one or more electrically insulating layers. The first conductive layer 855 of the diode 850, adjacent to or including a portion of the Casimir cavity 800, is thin enough for thermionic electrons to be emitted from the outer surface through the first conductive layer 855 and into the electrically insulating layer 865 into the first conductive layer 855. The first conductive layer 855 and the second conductive layer 860 may include a variety of conductors known for forming conductor / insulator / conductor diodes (or metal / insulator / metal diodes), including but not limited to nickel, niobium, palladium, or aluminum. The electrically insulating layer 865 may include many possible choices, such as nickel oxide, niobium pentoxide, titanium oxide, and aluminum oxide. In some cases, the electrically insulating layer 865 may include multiple sublayers of different electrically insulating materials. For example, the reflective layer 810 may include a metal or dielectric reflector. The material in the gap 815 may be transmissive in at least a portion of the spectral region of the Casimir cavity suppression mode. For example, if the critical size (the gap 815 between the reflective layer 810 and the first conductive layer 855) is 0.15 μm, and the refractive index of the material in the gap 815 is 1.6, then the approximate suppression wavelength will be equal to or greater than 0.15 μm x 2 x 1.6 = 0.48 μm. The material in the gap 815 may include polymers such as polyimide or PMMA, oxides such as SiO2 or Al2O3, vacuum or gas, liquid or liquid crystal, etc.
[0078] Alternatively, a Casimir diode can have Casimir cavities formed on both sides, such as... Figure 8B As shown, this provides a schematic cross-sectional view of diode 850, a first Casimir cavity 800 on one side of diode 805, and a second Casimir cavity 801 on the other side of diode 850. The gap 815 in Casimir cavity 800 and the gap 816 in Casimir cavity 801 may have the same or different thickness dimensions. Diode 850 includes a first conductive layer 855, an electrically insulating layer 865, and a second conductive layer 860. In this case, both conductive layers 855 and 860 of diode 850 are thin enough to allow the emission of hot electrons from the outer surfaces of conductive layers 855 and 860 through the conductive layers and through the electrically insulating layer 865.
[0079] The above about Figure 7B The free-space diode 716 described above can be structurally similar to the one above. Figure 8A and Figure 8BThe Casimir diodes described in the text are not Casimir cavities 800 and 801.
[0080] Conductor / insulator / conductor diode has been Figure 8A and Figure 8B As shown, because they exhibit ultra-high frequency tunneling effect, but other diodes can be used alternatively for the Casimir diode 710 and... Figure 7A and Figure 7B The free-space diode 716 is depicted in the image. Examples include geometric diodes, Schottky diodes, metal / insulator / semiconductor (MIS) diodes, Mott diodes, quantum well diodes, ballistic diodes, carbon nanotube diodes, superconductor / insulator / superconductor (SIS) devices, and other diodes as known to those skilled in the art.
[0081] Implementation methods for energy harvesting using Casimir resistors and Casimir diodes. One challenge in harvesting energy from zero-point energy fluctuations using Casimir resistors and Casimir diodes is... Figure 7A and Figure 7B The circuit shown illustrates power loss during the transmission of multi-terahertz signals between the diodes and resistors. Even at a distance as short as 1 μm, the loss can be substantial. Furthermore, RC losses caused by the capacitance of high-frequency diodes, such as metal / insulator / metal diodes, can significantly reduce the amount of rectified fluctuation current. One technique to address this challenge is to utilize… Figure 5B The two resistors in the diagram describe the antenna pair. This paper introduces an alternative technique that eliminates the need for an antenna to mitigate power loss due to lead resistance in multi-terahertz signals and provides a high-frequency diode with low capacitance.
[0082] The aforementioned Casimir resistors include those incorporating metal film resistors, but these devices can also incorporate graphene films instead of metal films. Analysis of the optical properties of graphene shows that it can conduct current at very high frequencies, although the resistance to conduct current over paths of one micrometer or longer may still be high.
[0083] Graphene films can also be used in thin-film diodes. One example is a graphene geometry diode, which has a planar structure and therefore inherently has lower capacitance than parallel-plate devices such as metal / insulator / metal diodes. Figure 9A The figure depicts a specific configuration of a geometric diode known as a Z-diode, shown as a top view. The geometric diode comprises a graphene film 905 on an insulating substrate, patterned into an asymmetric shape to provide preferential movement of charge carriers in one direction rather than the other, as indicated by arrow 955. The dimensions (e.g., lateral dimensions) of the geometric diode can be approximately 1 μm, but can also be smaller.
[0084] A Casimir diode is formed by placing Casimir cavities on one or both sides of a geometrically shaped diode, such as... Figure 9B The image depicts a side view. Like other Casimir cavities described herein, the spacing between the reflective elements of the Casimir cavity 900 determines the spectral range of suppressed modes, and the Casimir cavity 900 should be thinner to suppress higher-energy modes. The outer surface of the Casimir cavity 900 includes reflectors 910, such as an aluminum layer. The inner surface corresponds to the graphene film 905 in the region where it is located, and to the substrate 970 in the region where it is not. Even in the region where the graphene film 905 is located, the reflection caused by the refractive index step at the interface to the substrate 970 dominates the reflectivity of the inner surface because it only reflects or absorbs a small fraction of the incident radiation. For example, if the substrate 970 is boron nitride with a refractive index between 1.6 and 2.2, and the Casimir cavity 900 contains a medium with a refractive index of 1.5, the reflectivity is between 0.1% and 3.6%, neglecting the effect of the graphene film 905 on the reflectivity. The reflectivity of the inner surface can be enhanced in various ways. For example, one approach is to use free space instead of the medium in the Casimir cavity 900, which reduces its refractive index from approximately 1.5 to 1. Another approach is to use a substrate 970 with a refractive index greater than 1.6–2.2. Yet another approach is to deposit a very thin substrate, such as 5 nm of boron nitride, on a material with high reflectivity, such as metals or high-index semiconductors.
[0085] Casimir resistors can be formed from graphene layers similar to those in Casimir diodes, but without being patterned into asymmetrical shapes. Figure 10A (Top view) and Figure 10B An example of this graphene layer 1005 is depicted in the side view. The Casimir cavity 1000 is shown as having a reflector 1010 and the graphene layer 1005, and is supported by a substrate 1070. The same reflection enhancement described for a geometric diode used to form a Casimir diode can also be used for a Casimir resistor.
[0086] As mentioned above, the challenge of coupling a Casimir diode to a resistor or a Casimir resistor to a diode for energy harvesting lies in the potentially large conduction losses in the electrical leads between the two devices at multi-terahertz frequencies. This problem exists in... Figure 11A , Figure 11B , Figure 11C and Figure 11D The situation was alleviated in the example depicted in the text. Figure 11A and Figure 11B Examples include a graphene geometry Casimir diode 1100 coupled to a graphene resistor 1150 via an electrical lead 1195. Figure 11AA side view is provided, showing a substrate 1170, a graphene geometry diode 1105, a reflector 1110, a graphene resistor 1150, and a spacer layer 1165 (e.g., including an insulator). Figure 11B The top layout diagram shows the location 1180 of the active components (i.e., the graphene geometry Casimir diode 1100 and the graphene resistor 1150) and the location 1190 of the electrical leads 1195. Figure 11A The example in corresponds to Figure 7A The circuit shown is without a load and a low-pass filter.
[0087] Figure 11C and Figure 11D Examples include a graphene Casimir resistor 1101 coupled to a graphene geometry diode 1151 via electrical leads 1196. Figure 11C A side view is provided, showing a substrate 1171, a graphene geometric resistor 1106, a reflector 1111, a graphene geometric diode 1151, and a spacer layer 1166 (e.g., including an insulator). Figure 11D A top layout diagram is shown, illustrating the location 1181 of the active components (i.e., the graphene Casimir resistor 1101 and the graphene geometry diode 1151) and the location 1191 of the electrical leads 1196. For example, Figure 11C The example in corresponds to Figure 7B The circuit shown is without a load and a low-pass filter.
[0088] The advantage of these examples is that the diodes and resistors are very close to each other, for example, separated only by an opaque insulator, so the electrical leads need to carry high-frequency current over a distance of only the thickness of the opaque insulator (e.g., a fraction of a micrometer).
[0089] In these examples, the electrical leads can make direct contact with the graphene device, in which case, for example, the material must make a low-resistance contact with the graphene. One such material is titanium. Alternatively, the leads can comprise highly conductive materials such as copper, and only the areas in contact with the graphene need to include a low-resistance contact material. Figure 11B and Figure 11D As shown, electrical leads extend from the device and carry the rectified DC power to the load, such as... Figure 7A and Figure 7BAs shown. An opaque insulator can be sufficiently insulating to have a conductivity significantly lower than that of graphene, and sufficiently opaque or reflective to primarily isolate the effects of the Casimir cavity to the upper graphene layer. The insulator can comprise a multilayer structure comprising at least one insulating layer (such as an oxide) and a reflective material (such as a metal). Alternatively, the insulator can comprise a material combining both properties, such as an intrinsic semiconductor. For example, hydrogenated amorphous silicon has sufficient insulation and an absorption depth of approximately 100 nm or less for light with photon energies of 2 eV or greater. This would allow a lead length of only 100 nm between the two graphene layers.
[0090] In one example, for instance, corresponding to the above regarding Figure 7A or Figure 7B Each device in the described example can generate 50nW. Regarding the above... Figures 11A to 11D The described example allows for even higher power outputs because the graphene geometry diodes can rectify frequencies up to and greater than 1 Hz, corresponding to, for example, 660 μW of power. Furthermore, the power can be even greater because the proximity of the diodes and resistors reduces conduction losses. For example, with 10% rectification efficiency and 85% conduction power loss, the output power per device pair can be 10 μW. This will be further described in detail below. Figure 12 The connection scheme shown depicts a device array where device pairs are arranged at 10 μm intervals, and a 10 cm x 10 cm array may include 10 8 A device, thereby providing, for example, 1kW DC power output.
[0091] One of the challenges of terahertz frequency domain rectification is transmission line loss. A useful feature of the example above is that the diodes and resistors are close enough to allow for sufficiently low losses of the high-frequency current carried between the diodes and resistors, making the system suitable for energy harvesting. One way to avoid at least some of these losses and contact resistance losses is to use capacitor coupling. For a Casimir diode / resistor pair, the diodes can be formed on a single layer on a substrate, and the resistors can be formed on separate layers separated by spacers, such as those including insulators. Power can be coupled between each resistor and each diode in the diode / resistor pair via electrodes on opposite sides of the insulating insulator. This electrode sandwich is a capacitor, which has very low impedance at terahertz frequencies, thus allowing signal coupling with almost no loss. This configuration can be similar to Figure 7A As shown, the capacitor interrupts the electrical connection 795 between the free-space resistor 715 and the diode 705, or as... Figure 7B As shown, there is an electrical connection 795 between the capacitor interrupt resistor 706 and the free space diode 716.
[0092] It should be understood, for reference Figures 9A to 11D The provided embodiments are merely examples of a set of implementation methods and are not intended to be limiting. Other materials, such as MoS2 and metals, can be used for the diodes and resistors, and the diodes can be configured in other ways besides the geometric diode shape. Furthermore, the system can be inverted, for example, with the Casimir cavity adjacent to the substrate, or formed into a vertical structure.
[0093] Energy harvesting in Casimir resistors and Casimir diodes. The available power is a strong function of the diode's cutoff frequency. The mean square voltage of the zero-point energy noise in the resistor, obtained using Equation 5, is...
[0094] For the integral from DC (i.e., f1 = 0), the available power at the matched load is
[0095] This indicates the maximum power obtainable from the Casimir resistor connected to the diode via a high-frequency transmission line, such as Figure 7B As shown, this makes the equivalent resistance of the diode equal to the equivalent resistance of the Casimir resistor. When a free-space resistor is connected to a Casimir diode via a high-frequency transmission line, the same power can be obtained, such as... Figure 7A As shown.
[0096] For a diode and transmission line with a cutoff frequency of 1THz, Equation 7 gives a power of 0.66nW. This power level is too low for effective rectification for available diodes. For a 30THz cutoff frequency, the power is 0.60μW, and for 1PHz (10 15 The cutoff frequency is Hz, and the power is 0.66mW. In some cases, due to rectification and transmission losses, the generated DC power may be less than the power given in Equation 7.
[0097] Can be used as Figure 7A and Figure 7B The circuit shown continuously collects this power. Each diode-resistor pair provides a small amount of power to the load. To obtain higher power, multiple devices can be configured into an array, increasing the power of each diode / resistor pair and thus providing a higher total power output from the array. Figure 12 An example of such an array is shown in the figure.
[0098] exist Figure 12 In the diagram, array 1200 is shown as an array of individual devices 1205 connected in a series and parallel combination, having two output electrodes 1210 and 1215. Figure 12 Each device 1205 in the diagram represents any suitable device or pair of devices, such as a Casimir diode in parallel with a free resistor, or a Casimir resistor in parallel with a free diode. The load is not in... Figure 12As shown, but may be connected between electrodes 1210 and 1215. The load may correspond to any suitable electrical device, such as, but not limited to, a battery, motor, light-emitting device, electrolysis system for producing chemical fuels, communication device, computer, circuit component, electrical device, or any combination thereof.
[0099] In the 64-device array shown, the DC output voltage between electrodes 1210 and 1215 is the sum of the voltages along the series path between the output electrodes. In this case, there are eight devices 1205 connected in series, so if each device provides 100mV at its maximum power point, the total output voltage is, for example, 800mV. The current is proportional to the number of devices 1205 connected in parallel. In this case, there are eight devices connected in parallel. For example, if each device 1205 produces 500nA at its maximum power point, the total output current is 4μA. In this configuration, the total output power is calculated (using P=IV) as 800mV x 4μA or 3.2μW.
[0100] It should be understood that these values are provided as examples only and are not intended to limit the output voltage or current provided by any particular array of devices. Furthermore, it should be understood that a 64-device array with 8 series devices and 8 parallel devices is also an example, and other array sizes and configurations can be used. For example, linear arrays, square arrays with the same number of series and parallel devices, rectangular arrays with different numbers of series and parallel devices, or irregular arrays can be used.
[0101] Although linear arrays (i.e., one-dimensional arrays with only series-connected devices 1205 or only parallel-connected devices 1205) are considered, advantages are gained by using devices 1205 with a combination of series and parallel connections. For example, in the event of a short circuit between any individual device 1205 in array 1200, the voltage between electrodes 1210 and 1215 drops only slightly, not completely (i.e., drops to 0V), as is the case in an array with only parallel connections having a short circuit at any one device. Similarly, in the event of an open or broken path at any individual device 1205 in array 1200, the current between electrodes 1210 and 1215 drops only slightly, not completely (i.e., drops to 0A), as is the case in an array with only series connections having open or broken paths.
[0102] Each device 1205 in array 1200 can have any suitable size and physical arrangement. As an example, the devices can be arranged in a planar configuration across regions, such as... Figure 12 As depicted in the illustration. In a specific example, the area occupied by the diodes and resistors in each device 1205 may be 1 μm. 2An area of 1 μm x 1 μm (e.g., 1 μm x 1 μm). For an area with a 5 μm pitch (25 μm per diode-resistor pair). 2 With an array that allows for interconnection, a 10cm x 10cm array can contain 400 million diode-resistor pairs. Given the voltage and current of each device given above, i.e., 50nW per device pair, the DC power output of the 10cm x 10cm array would be 20W.
[0103] There are trade-offs when selecting resistors in the aforementioned devices and arrays. To obtain higher resistance values, for a given zero-point energy fluctuation power, the voltage will be higher and the current lower. For higher voltages, diodes are generally more efficient at rectification. Meanwhile, the larger the resistor-capacitor (RC) time constant, the greater the resistance. Therefore, as the resistance changes, there is a trade-off between rectification efficiency and RC losses.
[0104] The devices and arrays described above have been illustrated with reference to a planar configuration. To form a compact system with a greater area density, multiple layers of these devices may optionally be stacked on top of each other and separated by an insulator or free space. The devices may also be formed in a non-planar configuration. For example, the devices may be formed on the surface of trenches formed in a substrate or on a rollable flexible substrate.
[0105] The device manufacturing is described below according to Figure 13A An exemplary manufacturing process for pattern 1301 shown in the Casimir resistor device 1300, such as... Figure 13B The cross-section is shown in the figure.
[0106] The Casimir resistor device 1300 is shown to include a planar conductor device comprising a metal layer 1305 adjacent to a Casimir cavity, the Casimir cavity comprising a cavity layer 1320 and a reflective layer 1325. Pattern 1301 includes a metal layer pattern 1306 and a Casimir cavity pattern 1321.
[0107] In the example, the cell including the Casimir resistor device 1300 may have a total area of 2μm x 3μm.
[0108] Metal layer. Metal layer 1305 forms a resistor. By way of example, the following steps can be used to prepare metal layer 1305.
[0109] 1. Evaporate 20nm chromium onto substrate 1302.
[0110] 2. Spin-coat the positive photoresist onto the substrate and perform soft baking.
[0111] 3. Using the alignment tool, Figure 13A The area of the metal pattern 1306 shown is exposed, followed by exposure baking, development and rinsing.
[0112] 4. Use Freon (CF2Cl2) gas to etch the field in a reactive ion etching (RIE) system.
[0113] 5. Remove the resist in acetone, then use isopropanol, followed by rinsing with water, according to... Figure 13A The metal pattern 1306 shown forms a metal layer 1305.
[0114] Cavity transparent layer and mirror (Kasimir cavity). ZPF pattern on one side of the Kasimir cavity confinement device. For example, the following steps can be used to fabricate cavity layer 1320 and reflective layer 1325.
[0115] 1. 30nm SiO2 is deposited onto the substrate by sputtering, and then 150nm aluminum is used.
[0116] 2. Spin-coat the positive photoresist onto the substrate and perform soft baking.
[0117] 3. Using the alignment tool, Figure 13A The field exposure of the Casimir cavity pattern 1321 shown is followed by post-exposure baking, development and rinsing.
[0118] 4. Etch the exposed aluminum and SiO2 with a 6:1 buffered oxide etch (BOE), then rinse with water, according to... Figure 13A The Casimir cavity pattern 1321 shown forms a cavity layer 1320 and a reflective layer 1325.
[0119] 5. Remove the remaining photoresist using oxygen plasma.
[0120] It should be understood that the above description of the manufacturing scheme for manufacturing the Casimir resistor device 1300 is merely exemplary, and those skilled in the art can use a variety of different sizes, processing schemes, materials, patterns, etc. to prepare Casimir resistor elements.
[0121] Exemplary size range. Although a 2μm x 3μm cell size was described above, other cell sizes can also be used. Exemplary cell sizes can range from 0.1μm to 1mm square at the edges. Resistance is determined by the metal, its thickness, and the length and width of the unstable region. For example, 20nm chromium has a resistance of 1kΩ / sq. Given as... Figure 10A or Figure 13A The resistance pattern shown, for a length ten times the width, corresponding to ten squares, would have a resistance of 10kΩ. For a resistor producing 10μW of zero-point energy noise power, as shown in Equation 7, the zero-point energy noise voltage would be (10μW x 10kΩ). 0.5 =0.32V, which is the appropriate voltage for diode rectification.
[0122] Regarding ease of manufacturing, smaller units may require more expensive or complex manufacturing processes. For example, large-area devices with feature sizes of at least 1 millimeter can be patterned using inexpensive screen printing, while submicron features may require expensive deep ultraviolet lithography. However, there are exceptions. For instance, nanoimprint lithography can produce certain types of submicron features at a lower cost, while roll-to-roll manufacturing can produce small features over large areas at a lower cost. Generally, however, larger features are easier to manufacture.
[0123] The conductive layer should be thin enough to provide sufficiently high resistance so that noise voltage can be easily rectified by the diode. On the other hand, if the conductive layer is too thin, it may oxidize and degrade over time. Another factor is that the conductive layer should be thick enough to provide sufficient reflectivity for the Casimir cavity. For example, with chromium, a useful range is 4 nm to 100 nm, but different conductors will have different useful thickness ranges.
[0124] illustrative aspects
[0125] As used below, any reference to a series of aspects (e.g., “aspects 1 to 4”) or an unlisted group of aspects (e.g., “any preceding or subsequent aspect”) shall be understood as a selective reference to each of those aspects (e.g., “aspects 1 to 4” shall be understood as “aspects 1, 2, 3 or 4”).
[0126] Aspect 1 is an apparatus comprising: an electrical device; and a zero-point energy density reduction structure adjacent to the electrical device, the zero-point energy density reduction structure driving an energy flow or a particle flow to or from the electrical device.
[0127] Aspect 2 is an apparatus according to any of the foregoing or subsequent aspects, wherein the zero-point energy density reduction structure reduces the zero-point energy density in the electrical device compared to the zero-point energy density in a second electrical device that is not adjacent to the zero-point energy density reduction structure and is electrically connected to the electrical device.
[0128] Aspect 3 is an apparatus according to any of the foregoing or subsequent aspects, wherein the zero-point energy density reduction structure includes a Casimir cavity adjacent to an electrical device.
[0129] Aspect 4 is a device according to any of the foregoing or subsequent aspects, wherein energy flow occurs even in the absence of an external lighting source.
[0130] Aspect 5 is an apparatus according to any of the foregoing or subsequent aspects, further comprising: a second Qasimir cavity adjacent to an electrical device, wherein the electrical device is located between the Qasimir cavity and the second Qasimir cavity.
[0131] Aspect 6 is an apparatus according to any of the foregoing or subsequent aspects, which includes a Casimir resistor or a Casimir diode.
[0132] Aspect 7 is an apparatus according to any of the foregoing or subsequent aspects, wherein the electrical apparatus includes a resistor.
[0133] Aspect 8 is an apparatus according to any of the foregoing or subsequent aspects, wherein the resistor includes a conductive layer that is adjacent to or includes a component of the Casimir cavity.
[0134] Aspect 9 is an apparatus according to any of the foregoing or subsequent aspects, wherein the conductive layer has a thickness of 3 nm to 1 mm.
[0135] Aspect 10 is an apparatus according to any of the foregoing or subsequent aspects, wherein the conductive layer comprises a multilayer structure, the multilayer structure comprising one or more conductive sublayers.
[0136] Aspect 11 is an apparatus according to any of the foregoing or subsequent aspects, wherein the conductive layer comprises a metal.
[0137] Aspect 12 is an apparatus according to any of the foregoing or subsequent aspects, wherein the conductive layer comprises a semiconductor.
[0138] Aspect 13 is an apparatus according to any of the foregoing or subsequent aspects, wherein the conductive layer comprises a two-dimensional conductive material.
[0139] Aspect 14 is an apparatus according to any of the foregoing or subsequent aspects, wherein the conductive layer comprises conductive ceramic.
[0140] Aspect 15 is a device according to any of the foregoing or subsequent aspects, wherein the conductive layer comprises or is in contact with a component of a metal / insulator / metal (MIM) device, a metal / multi-insulator / metal device, a metal / insulator / semiconductor (MIS) device, a semiconductor layer, a two-dimensional semiconductor layer, a Schottky diode, a superconductor / insulator / superconductor (device) or a vacuum diode.
[0141] Aspect 16 is an apparatus according to any of the foregoing or subsequent aspects, wherein the electrical device includes a one-way valve or a rectifier.
[0142] Aspect 17 is an apparatus according to any of the foregoing or subsequent aspects, wherein the electrical device includes a diode.
[0143] Aspect 18 is a device according to any of the foregoing or subsequent aspects, wherein the diode is selected from metal / insulator / metal diodes, geometric diodes, Schottky diodes, metal / insulator / semiconductor (MIS) diodes, MOT diodes, quantum well diodes, ballistic diodes, carbon nanotube diodes, or superconductor / insulator / superconductor devices.
[0144] Aspect 19 is an apparatus according to any of the foregoing or subsequent aspects, wherein the diode includes a geometric diode.
[0145] Aspect 20 is an apparatus according to any of the foregoing or subsequent aspects, wherein the geometric diode has an asymmetrical shape that, compared to the opposite direction, provides preferential movement of charge carriers through the geometric diode in one direction.
[0146] Aspect 21 is an apparatus according to any of the foregoing or subsequent aspects, wherein the geometric diode is a Z-type diode.
[0147] Aspect 22 is an apparatus according to any of the foregoing or subsequent aspects, wherein the geometric diode comprises graphene or another two-dimensional conductive material.
[0148] Aspect 23 is an apparatus according to any of the foregoing or subsequent aspects, wherein a geometric diode is arranged to be adjacent to and in contact with a substrate.
[0149] Aspect 24 is an apparatus according to any of the foregoing or subsequent aspects, wherein the substrate is at least partially in contact with a component of the Casimir cavity.
[0150] Aspect 25 is an apparatus according to any of the foregoing or subsequent aspects, wherein the diode includes: a first conductive layer adjacent to or including a component of the Casimir cavity; an electrically insulating layer configured to be adjacent to and in contact with the first conductive layer; and a second conductive layer configured to be adjacent to and in contact with the electrically insulating layer.
[0151] Aspect 26 is an apparatus according to any of the foregoing or subsequent aspects, wherein the diode comprises: a conductive layer adjacent to or including a component of the Casimir cavity; and a semiconductor layer configured to be adjacent to and in contact with the conductive layer.
[0152] Aspect 27 is an apparatus according to any of the foregoing or subsequent aspects, wherein the semiconductor layer has 10 15 cm -3 Up to 10 21 cm -3 or a subset thereof, optionally 10 15 cm -3 Up to 10 16 cm-3 10 16 cm -3 Up to 10 17 cm -3 10 17 cm -3 Up to 10 18 cm -3 10 18 cm -3 Up to 10 19 cm -3 10 19 cm -3 Up to 10 20 cm -3 Or 10 20 cm -3 Up to 10 21 cm -3 The concentration of dopants.
[0153] Aspect 28 is a circuit comprising: means according to any of the foregoing or subsequent aspects; a first antenna electrically connected between electrical contacts of an electrical device; a second antenna optically coupled to the first antenna; and a free-space electrical device, wherein the second antenna is electrically connected between electrical contacts of the free-space electrical device.
[0154] Aspect 29 is a circuit according to any of the foregoing or subsequent aspects, which further includes a waveguide optically coupled to the first antenna and the second antenna.
[0155] Aspect 30 is a circuit comprising: means according to any of the foregoing or subsequent aspects; and a free-space electrical device electrically connected between a first electrical contact and a second electrical contact of the electrical device.
[0156] Aspect 31 is a circuit according to any of the foregoing or subsequent aspects, wherein the first zero-point energy density at the electrical device is different from the second zero-point energy density at the free-space electrical device.
[0157] Aspect 32 is a circuit according to any of the foregoing or subsequent aspects, wherein the first zero-point energy noise power available from the electrical device is different from the second zero-point energy noise power available from the free-space electrical device.
[0158] Aspect 33 is a circuit according to any of the foregoing or subsequent aspects, wherein the free space electrical device and the electrical device are separated from each other by a distance of 1 μm or less.
[0159] Aspect 34 is a circuit according to any of the foregoing or subsequent aspects, wherein free-space electrical devices and electrical devices are arranged opposite to each other.
[0160] Aspect 35 is a circuit according to any of the foregoing or subsequent aspects, wherein an electrical transmission line between free-space electrical devices is capable of carrying signals with a frequency of 1 THz to 3 PHz.
[0161] Aspect 36 is a circuit according to any of the foregoing or subsequent aspects, wherein the electrical transmission line between the free-space electrical devices has a length of less than 1 mm, less than 100 μm, less than 10 μm, less than 1 μm, or less than 100 nm.
[0162] Aspect 37 is a circuit according to any of the foregoing or subsequent aspects, wherein the electrical transmission line between the free-space electrical devices comprises a superconductor.
[0163] Aspect 38 is a circuit according to any of the foregoing or subsequent aspects, which further includes a heat sink coupled to an electrical device.
[0164] Aspect 39 is a circuit according to any of the foregoing or subsequent aspects, which is operable to provide cooling.
[0165] Aspect 40 is a circuit according to any of the foregoing or subsequent aspects, which further includes a heat source coupled to a free-space electrical device.
[0166] Aspect 41 is a circuit according to any of the foregoing or subsequent aspects, which is operable to provide heating.
[0167] Aspect 42 is a circuit according to any of the foregoing or subsequent aspects, wherein the free-space electrical device is a free-space diode or a free-space resistor.
[0168] Aspect 43 is a circuit according to any of the foregoing or subsequent aspects, wherein the device includes a Casimir diode, or wherein the free-space electrical device is a free-space diode; and wherein the difference between the zero-point energy noise power from the electrical device and from the free-space electrical device is rectified to generate a DC power output.
[0169] Aspect 44 is a circuit according to any of the foregoing or subsequent aspects, further comprising a low-pass filter positioned between a first electrical contact and a load connected to a second electrical contact.
[0170] Aspect 45 is a circuit according to any of the foregoing or subsequent aspects, wherein the electrical conductor between the first electrical contact and the load serves as, corresponds to, or includes a low-pass filter.
[0171] Aspect 46 is a circuit according to any of the foregoing or subsequent aspects, further comprising an insulating layer or spacer, wherein the insulating layer or spacer is positioned between the electrical device and the free space electrical device to define a spacing between the electrical device and the free space electrical device.
[0172] Aspect 47 is a circuit according to any of the preceding or subsequent aspects, wherein the insulating layer or spacer has a thickness of 5 nm to 10 μm, or wherein one or more transmission lines connecting the free-space electrical device to the first electrical contact or the second electrical contact have a length of 5 nm to 10 μm.
[0173] Aspect 48 is a circuit comprising: means according to any of the preceding or subsequent aspects; an insulating layer or spacer, wherein the insulating layer or spacer is positioned adjacent to an electrical device; and a free-space electrical device, wherein the free-space electrical device is capacitively coupled to the electrical device.
[0174] Aspect 49 is a circuit according to any of the foregoing or subsequent aspects, wherein the insulating layer has a thickness of 5 nm to 10 μm.
[0175] Aspect 50 is an apparatus according to any of the foregoing or subsequent aspects, wherein the Casimir cavity includes: a first reflective layer; a cavity layer; and a second reflective layer, wherein the cavity layer is located between the first reflective layer and the second reflective layer.
[0176] Aspect 51 is an apparatus according to any of the foregoing or subsequent aspects, wherein the cavity layer has a thickness of 10 nm to 2 μm.
[0177] Aspect 52 is an apparatus according to any of the foregoing or subsequent aspects, wherein the cavity layer comprises a condensed phase optically transparent material layer.
[0178] Aspect 53 is an apparatus according to any of the foregoing or subsequent aspects, wherein the cavity layer comprises a material having a transmittance of greater than 20% for at least some electromagnetic radiation wavelengths from 100 nm to 10 μm.
[0179] Aspect 54 is an apparatus according to any of the foregoing or subsequent aspects, wherein the first reflective layer comprises a metal, a dielectric reflector, a diffractive reflector, or an interface providing a refractive index step located between the cavity layer and an adjacent material.
[0180] Aspect 55 is an apparatus according to any of the foregoing or subsequent aspects, wherein the reflectivity of at least one of the first reflective layer or the second reflective layer is greater than 50%.
[0181] Aspect 56 is an apparatus according to any of the foregoing or subsequent aspects, wherein the second reflective layer includes one or more components of an electrical device.
[0182] Aspect 57 is an apparatus according to any of the foregoing or subsequent aspects, further comprising a substrate, wherein the zero-point energy density reduction structure is configured to be adjacent to and supported by the substrate.
[0183] Aspect 58 is an apparatus according to any of the foregoing or subsequent aspects, further comprising a substrate, wherein the electrical device is configured to be adjacent to and supported by the substrate.
[0184] Aspect 59 is a device array comprising: a plurality of circuits arranged in an array configuration according to any of the foregoing or subsequent aspects.
[0185] Aspect 60 is an array of devices according to any of the foregoing or subsequent aspects, wherein at least a subset of a plurality of circuits are arranged in series with each other.
[0186] Aspect 61 is an array of devices according to any of the foregoing or subsequent aspects, wherein at least a subset of a plurality of circuits are arranged in parallel configuration with each other.
[0187] Aspect 62 is an array of devices according to any of the foregoing or subsequent aspects, wherein a plurality of circuits are arranged in a combination of series and parallel configurations.
[0188] Aspect 63 is a device stack comprising: a plurality of device layers arranged in a stacked configuration, wherein each device layer includes one or more devices or circuits according to any of the foregoing or subsequent aspects.
[0189] Aspect 64 is an apparatus according to any of the foregoing or subsequent aspects, wherein each apparatus layer is positioned above and / or below another apparatus layer.
[0190] Aspect 65 is a device stack according to any of the foregoing or subsequent aspects, wherein each device layer corresponds to an array comprising a plurality of devices or circuits according to any of the foregoing or subsequent aspects.
[0191] Aspect 66 is an apparatus according to any of the foregoing or subsequent aspects, which further includes a load positioned to receive electrical power from an electrical device.
[0192] Aspect 67 is an apparatus according to any of the foregoing or subsequent aspects, which is incorporated into a system for providing signal communication.
[0193] Aspect 68 is an apparatus according to any of the foregoing or subsequent aspects, which is used to provide detection of zero-point energy fluctuation levels.
[0194] Aspect 69 is according to any of the foregoing devices, which is used to provide reduced electrical noise in the electrical device.
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[0227] Statement regarding references and changes to the merger
[0228] All references throughout this application, such as patent documents, including published or granted patents or equivalents, patent application publications, non-patent documents, or other source materials, are incorporated herein by reference as if they were incorporated separately.
[0229] All patents and publications mentioned in this specification represent the skill level of a person skilled in the art to which this invention pertains. References cited herein are incorporated by way of citation to indicate the state of the art as of their submission date in certain circumstances, and may be used herein, if necessary, to exclude (e.g., abandon) specific embodiments in the prior art.
[0230] When a group of substitutes is disclosed herein, it should be understood that all individual members of that group, as well as all subgroups and classes that can be formed using the substitutes, are disclosed separately. When the Markusi group or other groupings are used herein, all individual members of that group, as well as all possible combinations and subcombinations of that group, are intended to be included separately in this disclosure. As used herein, “and / or” means that one, all, or any combination of items separated by “and / or” in a list is included in the list; for example, “1, 2, and / or 3” is equivalent to “1” or “2” or “3” or “1 and 2” or “1 and 3” or “2 and 3” or “1, 2, and 3”.
[0231] Unless otherwise stated, every combination of formulations or components described or illustrated can be used to practice this invention. Specific names of materials are intended as examples, as it is well known that those skilled in the art can give the same materials different names. It should be understood that other methods, apparatus elements, starting materials, and synthetic methods may be used in the practice of this invention without the need for excessive experimentation, in addition to those specifically illustrated methods, apparatus elements, starting materials, and synthetic methods. All functional equivalents known in the art of any such methods, apparatus elements, starting materials, and synthetic methods are intended to be included in this invention. Whenever ranges are given in the specification, such as temperature ranges, time ranges, or composition ranges, all intermediate ranges and sub-ranges, as well as all individual values included within a given range, are intended to be included in this disclosure.
[0232] As used herein, “comprising” is synonymous with “including,” “containing,” or “characterized in,” and is inclusive or open-ended, and does not exclude additional, unlisted elements or method steps. As used herein, “consisting of” excludes any element, step, or component not specified in the elements of the claim. As used herein, “consisting substantially of” does not exclude materials or steps that do not substantially affect the essential and novel features of the claim. Any expression of the term “comprising” herein, particularly in the description of the components of a composition or the elements of an apparatus, is to be understood to cover compositions and methods that are substantially composed of and constituted by the stated components or elements. The invention described illustratively herein may be suitably practiced without the presence of any one or more elements or limitations not specifically disclosed herein.
[0233] The terms and expressions used are for description and not limitation, and their use is not intended to exclude any equivalents of the features shown and described or portions thereof, but it should be recognized that various modifications are possible within the scope of the claimed invention. Therefore, it should be understood that although the invention has been specifically disclosed through preferred embodiments and optional features, modifications and variations of the concepts disclosed herein can be made by those skilled in the art, and such modifications and variations are considered to be within the scope of the invention as defined in the appended claims.
Claims
1. An apparatus for collecting zero-point energy noise power, the apparatus comprising: Electrical installations; as well as A Casimir cavity that is directly adjacent to the electrical device or shares one or more components with the electrical device; in, The Casimir cavity establishes a first zero-point energy density at the electrical device, which is different from the second zero-point energy density at the free-space electrical device that is not adjacent to the Casimir cavity. The electrical device has a first zero-point energy noise power that is partially based on the first zero-point energy density; The free-space electrical device has a second zero-point energy noise power that is partly based on the second zero-point energy density; and When the electrical device is electrically connected to the free space electrical device, the electrical device and the free space electrical device establish a net noise power flow to or from the electrical device, the net noise power flow being based on the difference between the first zero-point energy noise power and the second zero-point energy noise power.
2. The apparatus of claim 1, further comprising a second Qasimir cavity adjacent to the electrical device, wherein the electrical device is positioned between the Qasimir cavity and the second Qasimir cavity.
3. The apparatus of claim 1, wherein the electrical device comprises a resistor.
4. The apparatus of claim 3, wherein the resistor includes a conductive layer that is adjacent to or includes a component of the Casimir cavity.
5. The apparatus of claim 4, wherein the conductive layer comprises a multilayer structure, the multilayer structure comprising one or more conductive sublayers.
6. The apparatus of claim 4, wherein the conductive layer comprises a metal.
7. The apparatus of claim 4, wherein the conductive layer comprises a semiconductor.
8. The apparatus of claim 4, wherein the conductive layer comprises a two-dimensional conductive material.
9. The apparatus of claim 4, wherein the conductive layer comprises conductive ceramic.
10. The apparatus of claim 1, wherein the electrical device comprises a rectifier.
11. The apparatus of claim 1, wherein the electrical device comprises a diode.
12. The apparatus of claim 11, wherein the diode comprises a geometric diode.
13. The device of claim 12, wherein the geometric diode comprises graphene.
14. The apparatus of claim 11, wherein the diode comprises: A first conductive layer, the first conductive layer being adjacent to or including components of the Casimir cavity; An electrically insulating layer, wherein the electrically insulating layer is configured to be adjacent to and in contact with the first conductive layer; by and A second conductive layer is configured to be adjacent to and in contact with the electrically insulating layer.
15. The apparatus of claim 11, wherein the diode comprises: A conductive layer, the conductive layer being adjacent to or including components of the Casimir cavity; And a semiconductor layer, wherein the semiconductor layer is configured to be adjacent to and in contact with the conductive layer.
16. The apparatus of claim 1, wherein the Casimir cavity comprises: First reflective layer; Cavity layer; as well as A second reflective layer, wherein the cavity layer is located between the first reflective layer and the second reflective layer.
17. The device of claim 16, wherein the cavity layer has a thickness ranging from 10 nm to 2 μm.
18. The apparatus of claim 16, wherein the cavity layer comprises a condensed phase optically transparent material layer.
19. The apparatus of claim 16, wherein the cavity layer comprises a material having a transmittance of greater than 20% for at least some electromagnetic radiation wavelengths ranging from 100 nm to 10 μm.
20. The apparatus of claim 16, wherein the first reflective layer comprises metal.
21. The apparatus of claim 16, wherein at least one of the first reflective layer or the second reflective layer has a reflectivity greater than 50%.
22. The apparatus of claim 16, wherein the second reflective layer comprises one or more components of the electrical apparatus.
23. The apparatus of claim 1, further comprising a load positioned to receive electrical power from the electrical device.
24. A circuit for collecting zero-point energy noise power, the circuit comprising: The apparatus according to claim 1; A first antenna, which is electrically connected between the electrical contacts of the electrical device; The second antenna is optically coupled to the first antenna. as well as The free-space electrical device; The second wire is connected between the electrical contacts of the free-space electrical device.
25. The circuit of claim 24, further comprising a waveguide optically coupled to the first antenna and the second antenna.
26. A circuit for collecting zero-point energy noise power, the circuit comprising: The apparatus according to claim 1; as well as The free-space electrical device; The free-space electrical device is electrically connected between the first electrical contact and the second electrical contact of the electrical device.
27. The circuit of claim 26, wherein the free-space electrical device and the electrical device are separated from each other by a distance of 1 μm or less.
28. The circuit of claim 26, wherein the free-space electrical device and the electrical device are arranged opposite to each other.
29. The circuit of claim 26, wherein the electrical transmission line between the free-space electrical device and the electrical device is capable of carrying signals in the frequency range of 1THz to 3PHz.
30. The circuit of claim 26, wherein the electrical transmission line between the free-space electrical device and the electrical device comprises a superconductor.
31. The circuit of claim 26, further comprising a heat sink coupled to the electrical device.
32. The circuit of claim 26, further comprising a heat source coupled to the free-space electrical device.
33. The circuit according to claim 26, wherein the free-space electrical device is a free-space diode or a free-space resistor.
34. The circuit of claim 26, wherein the device comprises a Casimir diode, or the free-space electrical device is a free-space diode; and The net noise power flow is rectified to produce DC power output.
35. The circuit of claim 26, further comprising a low-pass filter positioned between the first electrical contact and a load connected to the second electrical contact.
36. The circuit of claim 26, further comprising an insulating layer or spacer, wherein the insulating layer or spacer is positioned between the electrical device and the free space electrical device to define a spacing between the electrical device and the free space electrical device.
37. The circuit of claim 36, wherein the insulating layer or spacer has a thickness ranging from 5 nm to 10 μm, or wherein one or more transmission lines connecting the free-space electrical device to the first electrical contact or the second electrical contact have a length ranging from 5 nm to 10 μm.
38. A circuit for collecting zero-point energy noise power, the circuit comprising: The apparatus according to claim 1; An insulating layer or spacer, wherein the insulating layer or spacer is positioned adjacent to the electrical device; as well as The free-space electrical device, wherein the free-space electrical device is capacitively coupled to the electrical device.
39. The circuit of claim 38, wherein the insulating layer has a thickness ranging from 5 nm to 10 μm.
40. An array of devices for collecting zero-point energy noise power, the array comprising: Multiple circuits, each of which is an example of the circuit according to claim 26; The plurality of circuits are arranged in an array configuration.
41. The device array of claim 40, wherein the plurality of circuits are arranged in a combination of series and parallel configurations.
42. A device stack for collecting zero-point energy noise power, the device stack comprising: Multiple device layers arranged in a stacked configuration, wherein each of the multiple device layers includes one or more devices, each of the one or more devices being an example of the device according to claim 1.
43. The device stack of claim 42, wherein each device layer corresponds to an array comprising a plurality of the devices.
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