Solid-state imaging device, driving method thereof, and electronic apparatus

Abstract

This technology relates to a solid-state imaging device and driving method similar to those used to avoid blackouts at low readout speeds, and also to an electronic device. The solid-state imaging device includes: a pixel array unit in which a plurality of pixels are arranged in a two-dimensional matrix; and a control unit that exposes all pixels of the pixel array unit to the same exposure time and performs sparse readout, wherein all pixels are sparsified to 1 / N for 2(N-1) times to read out the charge in all pixels of the pixel array unit generated at the same exposure time. This technology can be applied, for example, to solid-state imaging devices incorporated into imaging devices.

Description

Technical Field

[0001] The present technology relates to a solid-state imaging device, a driving method thereof, and an electronic apparatus, and more particularly to a solid-state imaging device, a driving method thereof, and an electronic apparatus capable of avoiding occurrence of a black screen in low-speed readout. Background Art

[0002] For example, with an imaging device such as a digital single-lens camera or a compact digital camera, a user checks an image displayed on a display unit such as an LCD or an electronic viewfinder (EVF), determines image capture timing, and captures an image by pressing a release button (shutter button). The image displayed on the display unit at this time is referred to as a live view image, a through image, etc. There may be a case where a so-called black screen phenomenon occurs in an imaging device, in which a live view image is not displayed on the display unit due to an exposure preparation process started by pressing the release button.

[0003] In order to avoid the occurrence of a black screen, for example, there is a configuration in which an image for display stored in a frame memory is displayed on a display unit until display of an image for recording is enabled (see, for example, Patent Document 1).

[0004] Reference List

[0005] Patent Literature

[0006] Patent Document 1: WO 2018 / 179711 Summary of the invention

[0007] Problems to be solved by the present invention

[0008] Although the occurrence of a black screen can be avoided by increasing the image readout speed, the circuit for high-speed readout increases in scale and power consumption also increases.

[0009] The present technology has been developed to solve such problems as described above and makes it possible to avoid the occurrence of a black screen by using a low-speed readout.

[0010] Solution to the problem

[0011] According to the first aspect of the present technology, a solid-state imaging device includes: a pixel array unit in which a plurality of pixels are arranged two-dimensionally in a matrix; and a control unit which exposes all pixels of the pixel array unit at the same exposure timing and performs 2(N-1) times of thinned read-out of all pixels to 1 / N to read the charges in all pixels of the pixel array unit generated at the same exposure timing.

[0012] According to the second aspect of the present technology, a method for driving a solid-state imaging device includes: exposing all pixels of the pixel array unit at the same exposure timing through a solid-state imaging device including a pixel array unit in which a plurality of pixels are arranged two-dimensionally in a matrix, and performing 2(N-1) times of sparse readout to thin out all pixels to 1 / N to read the charges in all pixels of the pixel array unit generated at the same exposure timing.

[0013] An electronic device according to a third aspect of the present technology includes a solid-state imaging device, which includes: a pixel array unit in which a plurality of pixels are arranged two-dimensionally in a matrix; and a control unit which exposes all pixels of the pixel array unit at the same exposure timing and performs 2(N-1) times of sparse readout to thin out all pixels to 1 / N to read the charges in all pixels of the pixel array unit generated at the same exposure timing.

[0014] According to the first to third aspects of the present technology, in a pixel array unit in which a plurality of pixels are two-dimensionally arranged in a matrix, all pixels of the pixel array unit are exposed at the same exposure timing, and sparse readout is performed 2(N-1) times to thin out all pixels to 1 / N, thereby reading the charges in all pixels of the pixel array unit generated at the same exposure timing.

[0015] The solid-state imaging device or electronic apparatus may be a stand-alone device or a module incorporated into other devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 is a block diagram showing an embodiment of an imaging device including a solid-state imaging device to which the present technology is applied.

[0017] Figure 2 is a block diagram showing a schematic configuration of a solid-state imaging device.

[0018] Figure 3 is a diagram showing a circuit configuration example of a pixel.

[0019] Figure 4 is a conceptual diagram illustrating imaging methods as a global shutter method and a rolling shutter method.

[0020] Figure 5 is a diagram for briefly describing the operation of the global shutter method on a pixel.

[0021] Figure 6 is a conceptual diagram showing a first driving method for achieving a black screen-free state.

[0022] Figure 7 is a conceptual diagram showing a second driving method for achieving no black screen.

[0023] Figure 8is a conceptual diagram showing a third driving method for achieving no black screen.

[0024] Fig. 9 is a conceptual diagram showing a third driving method for achieving no black screen.

[0025] Fig.10 is a conceptual diagram showing a third driving method for achieving no black screen.

[0026] Fig.11 is a conceptual diagram showing a third driving method for achieving no black screen.

[0027] Fig.12 This is a diagram comparing the readout speeds of the first to third driving methods. DETAILED DESCRIPTION

[0028] A mode for carrying out the present technology (hereinafter, referred to as an embodiment) will be described below. Note that the description will be made in the following order.

[0029] 1. Configuration example of imaging equipment

[0030] 2. Schematic configuration example of solid-state imaging device

[0031] 3. Circuit configuration example of a pixel

[0032] 4. Comparison example of achieving no black screen

[0033] 5. Driving of solid-state imaging devices

[0034] <1. Configuration Example of Imaging Device>

[0035] Figure 1 is a block diagram showing an embodiment of an imaging device including a solid-state imaging device to which the present technology is applied.

[0036] Figure 1 The imaging device 1 in the invention includes, for example, a digital single-lens camera, a compact digital camera, etc., captures an image of a subject to generate a captured image, and records the captured image as a still image or a moving image. In the following, it is assumed that a still image is mainly recorded.

[0037] The imaging device 1 includes a lens unit 11 , an operation unit 12 , a control unit 13 , a solid-state imaging device 14 , a signal processing unit 15 , a recording unit 16 , a display unit 17 , an AF control unit 18 , and a driving unit 19 .

[0038] The lens unit 11 collects light from a subject (subject light). The subject light collected by the lens unit 11 is incident on the solid-state imaging device 14.

[0039] The lens unit 11 includes a zoom lens 21 , an aperture 22 , and a focus lens 23 .

[0040] The zoom lens 21 moves in the optical axis direction by being driven by the drive unit 19 to change the focal length and adjust the magnification of the subject included in the captured image. The diaphragm 22 changes the aperture degree by being driven by the drive unit 19 to adjust the amount of subject light incident on the solid-state imaging device 14. The focus lens 23 moves in the optical axis direction by being driven by the drive unit 19 to adjust the focal length. Note that the zoom lens 21 may be omitted.

[0041] The operation unit 12 receives an operation by a user. The user performs operations such as changing an imaging mode, pressing a release button (not shown), etc. using the operation unit 12. For example, in the case where the release button is pressed, the operation unit 12 supplies an operation signal indicating that the release button has been pressed to the control unit 13.

[0042] The control unit 13 controls the operation of each unit of the imaging device 1 .

[0043] For example, in the case where the control unit 13 receives an operation signal indicating that the release button has been pressed, the control unit supplies an instruction to record a still image to the signal processing unit 15. In addition, in the case where a live view image as a real-time image of a subject is to be displayed on the display unit 17, the control unit 13 supplies an instruction to generate a live view image to the signal processing unit 15.

[0044] In addition, in the case where focus judgment is to be performed, the control unit 13 supplies an instruction to operate focus judgment to the signal processing unit 15. Although examples of the focus control method include a contrast method, a phase difference detection method, and the like, the focus control method is not limited thereto.

[0045] The solid-state imaging device 14 performs photoelectric conversion on the received subject light and outputs the subject light as an electric signal. The solid-state imaging device 14 is implemented by, for example, a complementary metal oxide semiconductor (CMOS) image sensor. The solid-state imaging device 14 has a pixel array unit in which a plurality of pixels are two-dimensionally arranged in a matrix, and supplies a pixel signal obtained as a result of receiving light in each pixel to the signal processing unit 15. This will be referred to later. Figure 2 and subsequent drawings describe details of the solid-state imaging device 14 .

[0046] The signal processing unit 15 performs various types of signal processing on the pixel signal supplied from the solid-state imaging device 14. For example, in the case where an instruction to record a still image is supplied from the control unit 13, the signal processing unit 15 generates data of a still image (still image data) as an image for recording based on the pixel signal from the solid-state imaging device 14, and supplies the data to the recording unit 16. In addition, in the case where an instruction to generate a live view image as an image for display is supplied from the control unit 13, the signal processing unit 15 generates data of a live view image (live view image data) based on the pixel signal from the solid-state imaging device 14, and supplies the data to the display unit 17. The signal processing unit 15 can perform predetermined image processing such as, for example, demosaic processing, shading correction, or color mixture correction as needed.

[0047] In addition, the signal processing unit 15 generates a signal for focus control based on the pixel signal supplied from the solid-state imaging device 14 , and supplies the generated signal to the AF control unit 18 .

[0048] The recording unit 16 records (stores) image data of an image (still image) for recording supplied from the signal processing unit 15. The recording unit 16 includes, for example, one or more removable recording media such as a disk (such as a digital versatile disc (DVD)) or a semiconductor memory (such as a memory card). These recording media may be incorporated into the imaging device 1 or may be detached from the imaging device 1.

[0049] The display unit 17 displays an image based on the image data for display supplied from the signal processing unit 15. The display unit 17 displays, for example, a live view image, a still image read from the recording unit 16, and the like. The display unit 17 is implemented by, for example, a liquid crystal display (LCD), an organic electroluminescent (EL) display, an electronic viewfinder (EVF), and the like.

[0050] The AF control unit 18 calculates a focus shift amount (defocus amount) based on the signal for focus control supplied from the signal processing unit 15, and determines whether the object to be focused (focus target object) is in focus. In a case where the object in the focus area is in focus, the AF control unit 18 supplies information indicating the focus state as a focus determination result to the drive unit 19. In addition, in a case where the focus target object is out of focus, the AF control unit 18 supplies information indicating the calculated defocus amount as a focus determination result to the drive unit 19.

[0051] The drive unit 19 drives the zoom lens 21, the diaphragm 22, and the focus lens 23. For example, the drive unit 19 calculates the drive amount of the focus lens 23 based on the focus determination result supplied from the AF control unit 18, and moves the focus lens 23 according to the calculated drive amount.

[0052] Specifically, when focusing is achieved, the drive unit 19 maintains the current position of the focus lens 23. In addition, when focusing is not achieved, the drive unit 19 calculates a drive amount (movement distance) based on a focus determination result indicating a defocus amount and the position of the focus lens 23, and moves the focus lens 23 according to the drive amount.

[0053] In the imaging device 1 configured as described above, the user checks the image displayed on the display unit 17, determines the image capturing timing, and presses the release button (shutter button) to capture the image. At this time, a live view image as an image for checking is displayed on the display unit 17, and image data of a still image as an image for recording is recorded in the recording unit 16 at the timing of pressing the release button.

[0054] The solid-state imaging device 14 of the imaging device 1 can perform driving to achieve no black screen not only before the user checks the live view image displayed on the display unit 17 and confirms the release timing, but also after the user presses the release button. Here, black screen refers to a phenomenon that the live view image is not displayed on the display unit 17, and no black screen refers to a state where no black screen occurs.

[0055] Hereinafter, the details of the solid-state imaging device 14 will be described.

[0056] <2. Schematic Configuration Example of Solid-State Imaging Device>

[0057] Figure 2 is a block diagram showing a schematic configuration of the solid-state imaging device 14 .

[0058] Figure 1 The solid-state imaging device 1 in the embodiment has a pixel array unit 52 in which pixels 51 are two-dimensionally arranged in a matrix on a semiconductor substrate using, for example, silicon (Si) as a semiconductor, and a peripheral circuit unit around the pixel array unit 52. The peripheral circuit unit includes a vertical drive circuit 53, a column signal processing circuit 54, a horizontal drive circuit 55, an output circuit 56, a control circuit 57, and the like.

[0059] In the pixel array unit 52, for example, pixels 51 on which red, green and blue color filters are arranged in a Bayer pattern are arranged two-dimensionally in a matrix. The pixel 51 has a photodiode as a photoelectric conversion unit and a plurality of pixel transistors. The plurality of pixel transistors include, for example, four MOS transistors, which are a transfer transistor, a selection transistor, a reset transistor and an amplifier transistor.

[0060] In addition, the pixel 51 may have a shared pixel structure. The shared pixel structure includes a plurality of photodiodes, a plurality of transfer transistors, a shared floating diffusion (floating diffusion region), and each of the shared other pixel transistors. That is, in the shared pixel structure, the photodiodes and transfer transistors constituting the plurality of unit pixels are configured as each of the shared other pixel transistors.

[0061] The vertical drive circuit 53 includes, for example, a shift register or an address decoder, selects a predetermined pixel drive wiring 59, supplies a pulse for driving the pixel 51 to the selected pixel drive wiring 59, and drives the pixel 51 row by row. That is, the vertical drive circuit 53 sequentially selects and scans each pixel 51 of the pixel array unit 52 row by row in the vertical direction, and supplies a pixel signal based on a signal charge generated according to the amount of received light in the photoelectric conversion unit of each pixel 51 to the column signal processing circuit 54 via the vertical signal line 58. Note that although in Figure 2 Each pixel driving wiring 59 is shown with a single line in FIG. 1 , but the pixel driving wiring 59 actually includes a plurality of lines.

[0062] The column signal processing circuit 54 is arranged for each column of the pixels 51, and performs signal processing such as noise removal on the signals output from the pixels 51 of one row for each pixel column. For example, the column signal processing circuit 54 performs signal processing such as correlated double sampling (CDS) or AD conversion for removing pixel-specific fixed pattern noise.

[0063] The horizontal drive circuit 55 includes, for example, a shift register, sequentially selects each of the column signal processing circuits 54 by sequentially outputting horizontal scanning pulses, and causes each of the column signal processing circuits 54 to output a pixel signal to the horizontal signal line 60 .

[0064] The output circuit 56 performs predetermined signal processing on the signals sequentially supplied from each column signal processing circuit 54 through the horizontal signal line 60 and outputs the processed signals. For example, the output circuit 56 may perform only buffering or may perform various types of digital signal processing such as black level adjustment or column variation correction.

[0065] The control circuit 57 receives data such as an input clock and a command operation mode, and outputs data such as internal information about the solid-state imaging device 14. That is, the control circuit 57 generates a clock signal or a control signal based on the vertical synchronization signal, the horizontal synchronization signal, and the main clock, which is used as a reference for the operation of the vertical drive circuit 53, the column signal processing circuit 54, the horizontal drive circuit 55, etc. Then, the control circuit 57 outputs the generated clock signal and control signal to the vertical drive circuit 53, the column signal processing circuit 54, the horizontal drive circuit 55, etc. The input / output terminal 61 includes, for example, a solder ball, etc., and exchanges signals with the outside.

[0066] The solid-state imaging device 14 configured as described above is a CMOS image sensor called a column AD method in which a column signal processing circuit 54 is arranged for each pixel column and performs CDS processing and AD conversion processing.

[0067] <3. Circuit Configuration Example of Pixel>

[0068] Figure 3 An equivalent circuit of the pixel 51 is shown.

[0069] The pixel 51 has a photodiode 71 , a first transfer transistor 72 , a memory unit (MEM) 73 , a second transfer transistor 74 , a floating diffusion (FD) 75 , a reset transistor 76 , an amplification transistor 77 , a selection transistor 78 , and a discharge transistor 79 .

[0070] The photodiode 71 is a photoelectric conversion unit that receives incident light and performs photoelectric conversion on it to generate and accumulate charge (signal charge). The anode terminal of the photodiode 71 is grounded, and the cathode terminal of the photodiode 71 is connected to the memory unit 73 via the first transfer transistor 72. In addition, the cathode terminal of the photodiode 71 is also connected to the discharge transistor 79.

[0071] When turned on by the transfer signal TRX, the first transfer transistor 72 reads the charge generated by the photodiode 71 and transfers the charge to the memory unit 73. The memory unit 73 is a charge holding unit that temporarily holds the charge until the readout timing comes, and the charge is transferred to the FD 75. When turned on by the transfer signal TRG, the second transfer transistor 74 transfers the charge held in the memory unit 73 to the FD 75.

[0072] The FD 75 is a charge holding unit that holds the charge read from the memory unit 73 to read the charge as a signal. When the reset transistor 76 is turned on by the reset signal RST, the charge held in the FD 75 is discharged to the constant voltage source VDD to reset the potential of the FD 75.

[0073] The amplifying transistor 77 outputs a pixel signal corresponding to the potential of the FD 75. That is, together with the load MOS 80 as a constant current source, the amplifying transistor 77 constitutes a source follower circuit, and the pixel signal 80 indicating a level corresponding to the charge held in the FD 75 is output from the amplifying transistor 77 to the column signal processing circuit 54 via the selecting transistor 78 ( Figure 2 ). For example, the load MOS 80 is provided in the column signal processing circuit 54.

[0074] The selection transistor 78 is turned on when the pixel 51 is selected by the selection signal SEL, and outputs the pixel signal of the pixel 51 to the column signal processing circuit 54 via the vertical signal line 58. When turned on by the discharge signal OFG, the discharge transistor 79 discharges the unnecessary charge accumulated in the photodiode 71 to the constant voltage source VDD. The transfer signals TRX and TRG, the reset signal RST, the selection signal SEL and the discharge signal OFG are controlled by the vertical drive circuit 53 and are transmitted via the pixel drive wiring 59 ( Figure 2 )supply.

[0075] The pixel 51 has the pixel circuit as described above, and the solid-state imaging device 14 can capture an image using the global shutter method.

[0076] Figure 4 is a conceptual diagram illustrating imaging methods as a global shutter method and a rolling shutter method.

[0077] like Figure 4 As shown on the left side, the rolling shutter method is a method of performing exposure start, exposure end, and readout of accumulated charges in sequence row by row starting from the upper portion (first row) of the pixel array unit 52. Even if the exposure period of each row is the same, the exposure periods of all pixels for accumulating charges cannot coincide with each other because the exposure and readout operations are performed in sequence row by row, and therefore, distortion occurs when capturing an image in a case where the subject is moving, etc.

[0078] At the same time, if Figure 4 As shown on the right, the global shutter method is a method for performing operations covering the following: performing exposure from the start to the end of exposure simultaneously for all pixels of the pixel array unit 52, and performing reading in sequence after the end of exposure starting from the upper part of the pixel array unit 52. With the global shutter method, the exposure periods of all pixels coincide with each other, so distortion does not occur even in a situation such as when the subject is moving.

[0079] Will refer to Figure 5 The operation of the global shutter method on pixel 51 is briefly described.

[0080] First, before starting exposure, the discharge transistor 79 is turned on by the discharge signal OFG at a high level being supplied to the discharge transistor 79 , and the charge accumulated in the photodiode 71 is discharged to the constant voltage source VDD, whereby the photodiode 71 is reset.

[0081] After the photodiode 71 is reset, when the discharge transistor 79 is turned off by the discharge signal OFG at a low level, exposure starts in all pixels.

[0082] When the scheduled exposure time has elapsed, as Figure 5As shown in A of FIG. 1 , a charge corresponding to the amount of light received is generated and accumulated in the photodiode 71. Then, as shown in FIG. Figure 5 As shown in FIG. 8B , in all pixels of the pixel array unit 52 , the first transfer transistor 72 is turned on by the transfer signal TRX, and the charge accumulated in the photodiode 71 is transferred to the memory unit 73 .

[0083] After the first transfer transistor 72 is turned off, the charge held in the memory unit 73 of each pixel 51 is sequentially read row by row to the column signal processing circuit 54. In the readout operation, as shown in FIG. Figure 5 As shown in FIG. C, the second transfer transistor 74 of the pixel 51 on the read row is turned on by the transfer signal TRG, and the charge held in the memory cell 73 is transferred to the FD 75. Then, when the selection transistor 78 is turned on by the selection signal SEL, a signal indicating a level corresponding to the charge held in the FD 75 is output from the amplification transistor 77 to the column signal processing circuit 54 via the selection transistor 78.

[0084] <4. Comparative example of achieving no black screen>

[0085] Before describing the driving of the solid-state imaging device 14 that realizes no black screen, other driving that realizes no black screen will be briefly described as a comparative example.

[0086] Note, reference Figure 6 and Figure 7 The described driving may also be performed by the solid-state imaging device 14 under certain conditions such as setting a frame rate, and thus will be described as being performed by the solid-state imaging device 14 .

[0087] Hereinafter, it is assumed that a vertical synchronization signal corresponding to a frame rate of 120 fps is supplied to the pixel array unit 52 , and exposure and readout of all pixels of the pixel array unit 52 are performed based on the vertical synchronization signal.

[0088] Figure 6 is a conceptual diagram showing a first driving method as a comparative example of achieving no black screen.

[0089] The first driving method is a method of simply generating a still image as an image for recording by exposing and reading out all pixels of the pixel array unit 52 at a frame rate of 120fps and causing the display unit 17 to display (LV display) the still image as a live view image at the same speed. Although this driving method has no problem in the case of a relatively low frame rate (such as 30fps), as the frame rate increases (such as 60fps or 120fps), the scale of the circuit increases and the power consumption also increases. In addition, in the case of an excessively low frame rate (such as 10fps), the live view image appears to be a discontinuous image in frame-by-frame advance.

[0090] Figure 7 is a conceptual diagram showing a second driving method as a comparative example of achieving no black screen.

[0091] The second driving method is a method of generating a live view image by thinning out and displaying the live view image separately from a still image as an image for recording to be recorded in the recording unit 16 on the display unit 17. Although both a still image obtained by exposing and reading out all pixels and a live view image obtained by thinning out can be displayed on the display unit 17 by this driving method, it is necessary to switch between the driving of the image for recording and the driving of the live view image, and an image cannot be generated when the mode is switched. Therefore, as Figure 7 As shown, an image is not generated at one of every two vertical synchronization timings, and therefore, the frame rate of the live view image displayed on the display unit 17 is 60fps, which corresponds to half the frame rate of the vertical synchronization signal. If an image is to be displayed on the display unit 17 at a frame rate (120fps) similar to that in the first driving method, pixel readout needs to be performed at twice the speed, and power consumption also increases due to high-speed driving.

[0092] Therefore, due to the Figure 6 and Figure 7 In both the first driving method and the second driving method, it is necessary to read an image at a high-speed drive, so a circuit for high-speed readout is required, and power consumption increases.

[0093] <5. Driving of Solid-State Imaging Device>

[0094] Next, we will refer to Figures 8 to 12 A driving method of the solid-state imaging device 14 realizing no black screen is described. The driving method described below will be referred to as a third driving method.

[0095] In the third driving method, the solid-state imaging device 14 exposes all pixels of the pixel array unit 52 at the same exposure timing, and performs 2(N-1) times of sparse readout in which all pixels are thinned to 1 / N (N is a natural number). The solid-state imaging device 14 reads the charges in all pixels of the pixel array unit 52 generated at the same exposure timing through the sparse readout, and records the charges as a still image in the recording unit 16.

[0096] Figure 8 An example of the case where N=5 is shown, that is, 1 / 5 thinning-out readout in which the charges in all pixels exposed at the same exposure timing are thinned to 1 / 5 is performed eight times, whereby a still image is output and recorded in the recording unit 16. In the 1 / 5 thinning-out readout, the 1 / 5 thinning-out readout is performed eight times as a sequence, whereby one still image exposed at the same exposure timing is output to the imaging device 1.

[0097] exist Figure 8 In FIG. 1 , times t1 , t2 , t3 , . . . indicate readout timings of the pixel array unit 52 according to the vertical synchronization signal of the frame rate of 120 fps.

[0098] First, the solid-state imaging device 14 performs exposure on all pixel rows of the pixel array unit 52 for the same exposure period in one vertical scanning cycle from time t1 to t2. Figure 8 The pixel data 101 shown on the far left of indicates that the charge is accumulated in each pixel 51 of the pixel array unit 52 after the exposure period from time t1 to t2 ends.

[0099] After the exposure period ends, the solid-state imaging device 14 performs 1 / 5 thinning readout, in which all pixel rows of the pixel array unit 52 are read every five rows (every five rows). By the 1 / 5 thinning readout in the period from time t1 to t2, the (1+5p)th pixel row (p=0, 1, 2, 3, 4, ..., etc.) of the pixel array unit 52 is read sequentially row by row starting from the first pixel row. The pixel data 102 indicates the pixel row read by the 1 / 5 thinning readout during the time t1 to t2.

[0100] In the imaging device 1 , pixel signals on respective pixel rows read by 1 / 5 thinning-out during time t1 to t2 are used as part of a still image as an image for recording and as a live view image as an image for display.

[0101] In the next vertical scanning period from time t2 to t3, the solid-state imaging device 14 performs the next 1 / 5 thinning readout. Through the 1 / 5 thinning readout during this period, the (2+5p)th pixel row of the pixel array unit 52 is read sequentially row by row starting from the second pixel row. The pixel data 103 indicates the pixel row read by the 1 / 5 thinning readout during time t2 to t3.

[0102] In the imaging device 1 , the pixel signals on the respective pixel rows read by the 1 / 5 thinning-out during the time t2 to t3 are used as part of a still image as an image for recording.

[0103] In the next vertical scanning cycle from time t3 to t4, the solid-state imaging device 14 performs exposure and readout of the (1+5p)th pixel row, which is the same as the row read at time t1. That is, the solid-state imaging device 14 performs exposure and readout by using only the pixel rows from which the pixel signals of the still image have been read out of all the pixel rows of the pixel array unit 52. The pixel data 104 indicates the pixel rows read by 1 / 5 sparse readout during time t3 to t4. In the pixel data 104, each pixel is represented by a pattern (dot) different from the cross-hatching line. This shows that the pixel signal read is a pixel signal different from the pixel signal of the still image generated at time t1.

[0104] In the imaging device 1 , the pixel signals on the respective pixel rows read by the 1 / 5 thinning-out during the time t3 to t4 are used as part of the live view image as an image for display.

[0105] In the next vertical scanning period from time t4 to t5, the solid-state imaging device 14 performs the next 1 / 5 thinning readout. Through the 1 / 5 thinning readout during this period, the (3+5p)th pixel row of the pixel array unit 52 is read sequentially row by row starting from the third pixel row. The pixel data 105 indicates the pixel row read by the 1 / 5 thinning readout during time t4 to t5.

[0106] In the imaging device 1 , the pixel signals on the respective pixel rows read by the 1 / 5 thinning-out during the time t4 to t5 are used as part of a still image as an image for recording.

[0107] In the next vertical scanning cycle from time t5 to t6, the solid-state imaging device 14 performs exposure and readout of the (1+5p)th pixel row, which is the same as the row read at time t1. That is, the solid-state imaging device 14 performs exposure and readout by using only the pixel rows from which the pixel signals of the still image have been read out of all the pixel rows of the pixel array unit 52. The pixel data 106 indicates the pixel rows read by 1 / 5 sparse readout during time t5 to t6. In the pixel data 106, each pixel is represented by a pattern (diagonal dot matrix) different from the cross section line. This shows that the pixel signal read is a pixel signal different from the pixel signal of the still image generated at time t1.

[0108] In the imaging device 1 , the pixel signals on the respective pixel rows read by the 1 / 5 thinning-out during the time t5 to t6 are used as part of the live view image as an image for display.

[0109] In the next vertical scanning period from time t6 to t7, the solid-state imaging device 14 performs the next 1 / 5 thinning readout. Through the 1 / 5 thinning readout during this period, the (4+5p)th pixel row of the pixel array unit 52 is read sequentially row by row starting from the fourth pixel row. The pixel data 107 indicates the pixel row read by the 1 / 5 thinning readout during time t6 to t7.

[0110] In the imaging device 1 , the pixel signals on the respective pixel rows read by the 1 / 5 thinning-out during the time t6 to t7 are used as part of a still image as an image for recording.

[0111] In the next vertical scanning cycle from time t7 to t8, the solid-state imaging device 14 performs exposure and readout of the (1+5p)th pixel row, which is the same as the row read at time t1. That is, the solid-state imaging device 14 performs exposure and readout by using only the pixel rows from which the pixel signals of the still image have been read out of all the pixel rows of the pixel array unit 52. The pixel data 108 indicates the pixel rows read by 1 / 5 sparse readout during time t7 to t8. In the pixel data 108, each pixel is represented by a pattern (grid) different from the hatching line. This shows that the pixel signal read is a pixel signal different from the pixel signal of the still image generated at time t1.

[0112] In the imaging device 1 , the pixel signals on the respective pixel rows read by the 1 / 5 thinning-out during the time t7 to t8 are used as part of the live view image as the image for display.

[0113] In the next vertical scanning period from time t8 to t9, the solid-state imaging device 14 performs the next 1 / 5 thinning readout. Through the 1 / 5 thinning readout during this period, the (5+5p)th pixel row of the pixel array unit 52 is read sequentially row by row starting from the fifth pixel row. The pixel data 107 indicates the pixel row read by the 1 / 5 thinning readout during time t8 to t9.

[0114] In the imaging device 1 , the pixel signals on the respective pixel rows read by the 1 / 5 thinning-out during the time t8 to t9 are used as part of a still image as an image for recording.

[0115] As described above, in the 1 / 5 thinning-out, the 1 / 5 thinning-out is performed eight times as a sequence, whereby one still image exposed at the same exposure timing is output to the imaging device 1 .

[0116] In one sequence, the solid-state imaging device 14 repeatedly exposes 1 / 5 pixel rows of the pixel array unit 52 at a frame rate of 60 fps (which is half of 120 fps). Then, in one vertical scanning cycle, the solid-state imaging device 14 alternately performs reading of charges in pixel rows exposed at the same exposure timing in the first vertical scanning cycle (time t1 to t2) of one sequence and reading of charges in pixel rows exposed at a frame rate of 60 fps. The pixel rows to which exposure is repeated at a frame rate of 60 fps are pixel rows read at odd times in the 8 times of 1 / 5 thinning readout from time t1 to t9, and are the same pixel rows.

[0117] In each pixel 51 in the (1+5p)th pixel row for which exposure is repeatedly performed at a frame rate of 60fps, resetting of the photodiode 71 and the FD 75, generation of charges corresponding to the amount of received light, transfer to and retention in the memory unit 73, and transfer to and reading from the FD 75 are performed in one vertical scanning cycle.

[0118] In each pixel 51 in a pixel row read at an even number of times in one sequence, after the charge corresponding to the amount of received light is transferred to the memory unit 73 in one vertical scanning cycle from time t1 to t2, the charge is held as it is in the memory unit 73 until one vertical scanning cycle of the readout timing. Then, when one vertical scanning cycle of the readout timing has come, the charge held in the memory unit 73 is transferred to the FD 75 and read.

[0119] like Fig. 9As shown, the recording unit 16 of the imaging device 1 records a still image 110 generated by outputting in five parts at a frame rate of 60fps (which is half of 120fps) by means of a signal output from the solid-state imaging device 14 during the above-mentioned eight vertical scanning periods (a sequence) from time t1 to t9.

[0120] In addition, the display unit 17 of the imaging device 1 sequentially displays live view images 121 to 124 having a resolution of 1 / 5 of the full resolution of the pixel array unit 52 and being updated at a frame rate of 60 fps which is half of 120 fps.

[0121] Fig.10 An example of a case where N=4 is shown, that is, 1 / 4 thinning readout that thins out the charges in all pixels exposed at the same exposure timing to 1 / 4 is performed six times, whereby a still image is output.

[0122] In the 1 / 4 thinning-out, one sequence includes 6 times of 1 / 4 thinning-out, and one still image exposed at the same exposure timing is output to the imaging device 1 by performing the 1 / 4 thinning-out six times.

[0123] The pixel data 141 obtained by exposure in a vertical scanning cycle from time t11 to t12 is divided into pixel data 142 obtained by 1 / 4 sparse readout during a first time period from time t11 to t12, pixel data 143 obtained by 1 / 4 sparse readout during a second time period from time t12 to t13, pixel data 145 obtained by 1 / 4 sparse readout during a fourth time period from time t14 to t15, and pixel data 147 obtained by 1 / 4 sparse readout during a sixth time period from time t16 to t17, and are output to the imaging device 1 in sequence and recorded in the recording unit 16 of the imaging device 1 as a still image.

[0124] At the same time, pixel data 142 obtained by 1 / 4 sparse readout during the first time period from time t11 to t12, pixel data 144 obtained by 1 / 4 sparse readout during the third time period from time t13 to t14, and pixel data 146 obtained by 1 / 4 sparse readout during the fifth time period from time t15 to t16 are sequentially output to the imaging device 1 and displayed on the display unit 17 of the imaging device 1 as a live view image.

[0125] Here, in Figure 8 In the 1 / 5 sparse readout shown, pixel rows are read every five rows during one vertical scanning period, while Fig.10 In the 1 / 4 sparse readout, the intervals of two lines and four lines are arranged alternately. In other words, in Figure 8In the 1 / 5 sparse readout shown, the 1 / 5 sparse readout is repeatedly performed in the vertical direction, and Fig.10 In the 1 / 4 thinning readout in , 1 / 3 thinning readout and 1 / 5 thinning readout are performed alternately and repeatedly in the vertical direction, thereby realizing 1 / 4 thinning readout. This is due to the following reason.

[0126] In an image sensor having a Bayer pattern, if readout is performed at intervals of N rows in the case where N in 1 / N sparse is an even number (such as in 1 / 4 sparse readout or 1 / 6 sparse readout), only the RG pixel row, which is a pixel row of red pixels and green pixels, or the GB pixel row, which is a pixel row of green pixels and blue pixels, is read, and unevenness occurs in the color information of the live view image. Therefore, in the 1 / N sparse readout in the case where N is an even number, the solid-state imaging device 14 performs 1 / N sparse readout on the pixel array unit 52 as a whole by alternately performing 1 / (N-1) sparse readout and 1 / (N+1) sparse readout. With this arrangement, the RG pixel row and the GB pixel row can be read alternately, and unevenness in the color information in the live view image can be prevented from occurring.

[0127] Fig.11 An example of a case where N=3 is shown, that is, 1 / 3 thinning readout that thins out the charges in all pixels exposed at the same exposure timing to 1 / 3 is performed four times, whereby a still image is output.

[0128] In the 1 / 3 thinning-out, one sequence includes four times of 1 / 3 thinning-out, and one still image exposed at the same exposure timing is output to the imaging device 1 by performing the 1 / 3 thinning-out four times.

[0129] The pixel data 161 obtained by exposure in a vertical scanning cycle from time t21 to t22 is divided into pixel data 162 obtained by 1 / 3 sparse readout during a first time period from time t21 to t22, pixel data 163 obtained by 1 / 3 sparse readout during a second time period from time t22 to t23, and pixel data 165 obtained by 1 / 3 sparse readout during a fourth time period from time t24 to t25, and are output to the imaging device 1 in sequence and recorded in the recording unit 16 of the imaging device 1 as a still image.

[0130] At the same time, pixel data 162 obtained by 1 / 3 thinning out during the first time period from time t21 to t22 and pixel data 164 obtained by 1 / 3 thinning out during the third time period from time t33 to t34 are sequentially output to the imaging device 1 and displayed as a live view image on the display unit 17 of the imaging device 1.

[0131] because Fig.11The 1 / 3 sparse readout in is the 1 / N sparse readout when N is an odd number, so it is the same as Figure 8 The 1 / 5 sparse readout shown similarly reads pixel rows every three rows during one vertical scan period.

[0132] As described above, in the 1 / N sparse readout, one sequence includes 2(N-1) times of 1 / N sparse readout, and one still image exposed at the same exposure timing is output to the imaging device 1 by performing the 1 / N sparse readout 2(N-1) times. In the 1 / N sparse readout in the case where N is an odd number, the solid-state imaging device 14 repeats the readout at intervals of N lines in the vertical direction, and in the 1 / N sparse readout in the case where N is an even number, the solid-state imaging device 14 performs the reading of the (N-1)-line interval and the reading of the (N+1)-line interval alternately in the vertical direction.

[0133] In addition, the solid-state imaging device 14 performs alternately the reading of charges in the pixel rows exposed at the same exposure timing and the reading of charges in the pixel rows repeatedly exposed at a frame rate of 60fps (which is half of 120fps) for each vertical scanning period for 1 / N pixel rows of the pixel array unit 52. The pixel rows repeatedly exposed at a frame rate of 60fps (which is half of 120fps) are pixel rows read at odd times in the 2(N-1) times of 1 / N times of sparse readout, and are the same pixel rows.

[0134] Fig.12 This is a table comparing the readout speeds of the first to third driving methods.

[0135] like Fig.12 As shown, the cases where the frame rate (display frame rate) of the live view image to be displayed on the display unit 17 of the imaging device 1 is set to, for example, 30 fps, 60 fps, and 120 fps are compared.

[0136] According to the first driving method, the solid-state imaging device 14 needs to read and output images at the same speed as the display frame rate. That is, in the first driving method, the readout speeds corresponding to the display frame rates of 30fps, 60fps and 120fps are 30fps, 60fps and 120fps respectively.

[0137] According to the second driving method, the solid-state imaging device 14 needs to read and output images at twice the display frame rate. That is, in the second driving method, the readout speeds corresponding to the display frame rates of 30fps, 60fps and 120fps are 60fps, 120fps and 240fps respectively.

[0138] At the same time, according to the third driving method, as shown in reference Figure 8As described above, in the case of 1 / 5 thinning readout, display is performed at a frame rate of 60fps (which is half of 120fps), and because 1 / 5 thinning readout is performed, the readout speed at this time corresponds to 120 / 5=24fps. That is, the readout speed corresponding to the display frame rate of 60fps is 24fps. Accordingly, in the third driving method, the readout frame rates corresponding to the display frame rates of 30fps, 60fps, and 120fps are 12fps, 24fps, and 48fps, respectively.

[0139] As described above, according to the third driving method, it is not necessary to perform reading at an excessively high speed, and no black screen can be achieved by low-speed reading. Because high-speed reading is not required, power consumption can be reduced, and the circuit for high-speed reading can be removed, thereby making the solid-state imaging device 14 manufactured at low cost.

[0140] Processing of the imaging device 1 corresponding to output of a still image and a live view image from the solid-state imaging device 14 according to the third driving method will be described.

[0141] According to the imaging mode set by the user in the operation unit 12, etc., the control unit 13 of the imaging device 1 specifies the operation mode according to the third driving method to the solid-state imaging device 14 and the signal processing unit 15. The operation mode according to the third driving method can be specified by the control unit 13 to the signal processing unit 15, and the signal processing unit 15 can specify the third driving method to the solid-state imaging device 14.

[0142] When the operation mode according to the third driving method is specified, as described above, the solid-state imaging device 14 performs full-pixel exposure at the same exposure timing in the first vertical scanning cycle of a sequence. Then, the solid-state imaging device 14 performs 1 / N thinning readout for a live view image as an image for display in a vertical scanning cycle of an odd number of times in a sequence, and performs 1 / N thinning readout for a still image as an image for recording in a vertical scanning cycle of an even number of times in a sequence. However, the first data of the live view image in a sequence is also used as data of the still image.

[0143] When the operation mode according to the third driving method is specified, the signal processing unit 15 recognizes that the data of the still image and the live view image are supplied from the solid-state imaging device 14 in the above order, and performs processing corresponding to the supplied image data. Specifically, in the case where the data of the live view image is supplied from the solid-state imaging device 14, the signal processing unit 15 supplies the data to the display unit 17 and causes the display unit 17 to display the data. In addition, in the case where the data of the still image is supplied from the solid-state imaging device 14, the signal processing unit 15 supplies the data to the recording unit 16 and causes the recording medium to record the data. The data of both the live view image and the still image are supplied to both the display unit 17 and the recording unit 16.

[0144] By using the solid-state imaging device 14 to which the above-described embodiment is applied, no black screen can be realized in the imaging device 1 .

[0145] <Others>

[0146] Depending on the imaging mode specified by the user through the operation unit 12, the control unit 13 of the imaging device 1 can also assign the operation mode according to the above-mentioned first driving method or second driving method to the solid-state imaging device 14 and the signal processing unit 15 to enable the solid-state imaging device 14 and the signal processing unit 15 to operate.

[0147] Although the above-mentioned pixel circuit of the pixel 51 includes the memory unit 73 that holds the charge generated by the photodiode 71 before the readout timing comes, the above-mentioned third driving method can be performed by using a circuit configuration that does not include the memory unit 73 as the pixel circuit of the pixel 51. In this case, the charge generated by the photodiode 71 is held in the FD 75 before the readout timing comes.

[0148] Although an embodiment of an imaging device including a solid-state imaging device to which the present technology is applied has been described above, the present technology can be applied to electronic devices other than imaging devices including solid-state imaging devices, for example, mobile terminal devices with imaging functions, such as smart phones, personal computers, game consoles, wearable terminals, etc.

[0149] The embodiments of the present technology are not limited to the above-described embodiments, and various changes may be made without departing from the scope of the present technology.

[0150] For example, parts of the above-described embodiments may be used in combination as appropriate.

[0151] Note that the effects described herein are merely examples, and the effects of the present technology are not limited to these effects. Effects other than those described in this specification can also be obtained.

[0152] Note that the present technology can have the following configurations.

[0153] (1) A solid-state imaging device comprising:

[0154] a pixel array unit in which a plurality of pixels are arranged two-dimensionally in a matrix; and

[0155] A control unit that exposes all pixels of the pixel array unit at the same exposure timing and performs 2(N-1) times of sparse readout to thin out all pixels to 1 / N to read the charges in all pixels of the pixel array unit generated at the same exposure timing.

[0156] (2) The solid-state imaging device according to (1),

[0157] When N is an odd number, the control unit repeatedly performs reading of N rows in a vertical direction to perform sparse readout for thinning all pixels to 1 / N.

[0158] (3) The solid-state imaging device according to (1) or (2),

[0159] When N is an even number, the control unit alternately reads (N-1)-th row and (N+1)-th row in the vertical direction to perform sparse readout to thin out all pixels to 1 / N.

[0160] (4) The solid-state imaging device according to any one of (1) to (3),

[0161] The control unit reads the same pixel row at odd times in the 2(N-1) sparse readouts.

[0162] (5) The solid-state imaging device according to any one of (1) to (4),

[0163] In each vertical scanning period, the control unit alternately performs the reading of charges in the pixel rows exposed at the same exposure timing and the reading of charges in the pixel rows repeatedly exposed at a predetermined frame rate.

[0164] (6) The solid-state imaging device according to any one of (1) to (5),

[0165] The control unit repeatedly exposes the same pixel row of the pixel array unit at the predetermined frame rate.

[0166] (7) The solid-state imaging device according to any one of (1) to (6),

[0167] The pixels have

[0168] a photoelectric conversion unit that generates electric charge by receiving incident light and performing photoelectric conversion on the incident light,

[0169] a first transfer transistor that transfers the charge generated by the photoelectric conversion unit,

[0170] a first charge holding unit that holds the charge transferred from the photoelectric conversion unit by the first transfer transistor before readout timing,

[0171] a second transfer transistor which transfers the charge held by the first charge holding unit at the readout timing, and

[0172] a second charge holding unit that holds the charge transferred from the first charge holding unit by the second transfer transistor.

[0173] (8) A method for driving a solid-state imaging device, comprising, through a solid-state imaging device including a pixel array unit in which a plurality of pixels are two-dimensionally arranged in a matrix, exposing all pixels of the pixel array unit at the same exposure timing, and performing 2(N-1) times of sparse readout to thin out all pixels to 1 / N to read charges in all pixels of the pixel array unit generated at the same exposure timing.

[0174] (9) An electronic device comprising

[0175] Solid-state imaging devices, including

[0176] a pixel array unit in which a plurality of pixels are arranged two-dimensionally in a matrix; and

[0177] A control unit that exposes all pixels of the pixel array unit at the same exposure timing and performs 2(N-1) times of sparse readout to thin out all pixels to 1 / N to read the charges in all pixels of the pixel array unit generated at the same exposure timing.

[0178] (10) The electronic device according to (9), further comprising

[0179] A signal processing unit that causes a display unit to display image data at odd times and performs processing to cause a recording medium to record image data at even times, both of which are among the image data supplied from the solid-state imaging device through 2(N-1) times of thinning-out.

[0180] Label list

[0181] 1 Imaging equipment

[0182] 12 Operating units

[0183] 13 Control Unit

[0184] 14 Solid-state imaging devices

[0185] 15 Signal Processing Unit

[0186] 16 Recording Unit

[0187] 17 Display unit

[0188] 51 pixels

[0189] 52 pixel array unit

[0190] 53 Vertical drive circuit

[0191] 71 Photodiode

[0192] 72 first transfer transistor

[0193] 73 Memory unit (MEM)

[0194] 74 Second transfer transistor

[0195] 75 FD

[0196] 76 Reset transistor

[0197] 77 Amplifier transistor

[0198] 78 Select transistor

Claims

1. A solid-state imaging device comprising: A pixel array unit in which a plurality of pixels are arranged two-dimensionally in a matrix; and a control unit that exposes all pixels of the pixel array unit in the same exposure period and performs 2(N-1) times of sparse readout in the vertical direction to thin out all pixels to 1 / N, where N is a natural number greater than or equal to 3, to read the charges in all pixels of the pixel array unit generated in the same exposure period, In each vertical scanning period, the control unit alternately performs the reading of charges in the pixel rows exposed in the same exposure period and the reading of charges in the pixel rows repeatedly exposed at a predetermined frame rate, Furthermore, the control unit repeatedly exposes the same pixel row of the pixel array unit at the predetermined frame rate.

2. The solid-state imaging device according to claim 1, in, In the case where N is an odd number, the control unit repeatedly performs reading every N rows in the vertical direction to perform thinning readout in which all pixels are thinned out to 1 / N.

3. The solid-state imaging device according to claim 1, in, The control unit reads the same pixel row at odd times in the 2(N-1) sparse readouts.

4. The solid-state imaging device according to claim 1, The pixels have: a photoelectric conversion unit that generates electric charge by receiving incident light and performing photoelectric conversion on the incident light, a first transfer transistor that transfers the charge generated by the photoelectric conversion unit, a first charge holding unit that holds the charge transferred from the photoelectric conversion unit by the first transfer transistor before readout timing, a second transfer transistor which transfers the charge held by the first charge holding unit at the readout timing, and a second charge holding unit that holds the charge transferred from the first charge holding unit by the second transfer transistor.

5. A method for driving a solid-state imaging device, comprising: By a solid-state imaging device including a pixel array unit in which a plurality of pixels are two-dimensionally arranged in a matrix: Exposing all pixels of the pixel array unit in the same exposure period, and performing 2(N-1) times of sparse readout in the vertical direction to thin out all pixels to 1 / N, where N is a natural number greater than or equal to 3, to read the charges in all pixels of the pixel array unit generated in the same exposure period, In each vertical scanning period, the reading of charges in the pixel rows exposed in the same exposure period and the reading of charges in the pixel rows repeatedly exposed at a predetermined frame rate are performed alternately. Furthermore, exposure is repeated at the predetermined frame rate on the same pixel row of the pixel array unit.

6. An electronic device comprising: Solid-state imaging devices, including: a pixel array unit in which a plurality of pixels are arranged two-dimensionally in a matrix; and a control unit that exposes all pixels of the pixel array unit in the same exposure period and performs 2(N-1) times of sparse readout in the vertical direction to thin out all pixels to 1 / N, where N is a natural number greater than or equal to 3, to read the charges in all pixels of the pixel array unit generated in the same exposure period, In each vertical scanning period, the control unit alternately performs the reading of charges in the pixel rows exposed in the same exposure period and the reading of charges in the pixel rows repeatedly exposed at a predetermined frame rate, Furthermore, the control unit repeatedly exposes the same pixel row of the pixel array unit at the predetermined frame rate.

7. The electronic device according to claim 6, further comprising: A signal processing unit causes a display unit to display image data at odd times and performs processing to cause a recording medium to record image data at even times, both of which are image data supplied from the solid-state imaging device by 2(N-1) times of thinning-out.

Images