半导体结构的制作方法及半导体结构
By designing special structures for the gate oxide layer and gate dielectric layer in the semiconductor structure, the problem of gate-induced drain leakage was solved, thereby improving the performance and yield of the semiconductor structure.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- CHANGXIN MEMORY TECH INC
- Filing Date
- 2021-11-30
- Publication Date
- 2026-07-17
AI Technical Summary
As semiconductor device dimensions shrink, gate-induced drain leakage (GIDL) negatively impacts semiconductor structure performance and yield, and existing technologies struggle to effectively address this issue.
In the fabrication of semiconductor structures, a gate oxide layer is formed on the second sidewall, the top surface of the first section, and the bottom surface of the third section of the active pillar. A gate dielectric layer is formed on the sidewall of the gate oxide layer. The length of the gate dielectric layer is smaller than that of the gate oxide layer and it is placed close to the third section, thereby controlling the capacitance difference and reducing the gate-induced drain leakage current.
Effectively control the turn-off current of semiconductor structures, reduce gate-induced drain leakage current and inter-band tunneling problems, and improve the performance and yield of semiconductor structures.
Smart Images
Figure CN114141713B_ABST