Electronic device

Abstract

The present invention relates to an electronic device. The electronic device includes a display panel; and an input sensor disposed on the display panel and including a first electrode, a second electrode, a first sensing line connected to the first electrode, and a second sensing line connected to the second electrode. The first electrode includes first patterns spaced apart from each other and including a first side and a second side longer than the first side, and a first bridge pattern disposed between the first patterns spaced apart from each other. The second electrode includes second patterns spaced apart from each other and including a third side and a fourth side longer than the third side, and a second bridge pattern disposed between the second patterns spaced apart from each other. The first side faces the fourth side, and the second side faces the third side.

Description

[0001] Cross-references to related applications

[0002] This patent application claims priority to Korean Patent Application No. 10-2020-0113970, filed on September 7, 2020, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present invention relates to electronic devices, and more specifically, to electronic devices with improved sensing performance. Background Technology

[0004] Multimedia electronic devices such as televisions, mobile phones, tablet computers, navigators, and game consoles include display devices for displaying images. Such electronic devices may include input sensors capable of providing touch-based input methods that allow users to intuitively and easily input information or commands, in addition to input methods such as buttons, keyboards, and mice.

[0005] Input sensors can detect touch or pressure applied by a user's body (e.g., fingers). The demand for fine tactile input using active pens is increasing among users accustomed to inputting information using writing tools or specific applications (e.g., applications for sketching or drawing). Summary of the Invention

[0006] This disclosure provides electronic devices with improved sensing performance for both passive and active inputs.

[0007] Embodiments of the present invention provide an electronic device comprising: a display panel; and an input sensor disposed on the display panel, including a first electrode extending in a first direction, a second electrode extending in a second direction intersecting the first direction and insulated from the first electrode, a first sensing line connected to the first electrode, and a second sensing line connected to the second electrode. The first electrode includes: a plurality of first patterns spaced apart from each other, each of the plurality of first patterns including a first side and a second side longer than the first side; and a plurality of first bridge patterns, each of the plurality of first bridge patterns disposed between corresponding pairs of adjacent first patterns. The second electrode includes: a plurality of second patterns spaced apart from each other, each of the plurality of second patterns including a third side and a fourth side longer than the third side; and a plurality of second bridge patterns, each of the plurality of second bridge patterns disposed between corresponding pairs of adjacent second patterns. The first side faces the fourth side, and the second side faces the third side.

[0008] The first electrode and the second electrode intersect each other at the node region, and a first number of first patterns among a plurality of first patterns and a second number of second patterns among a plurality of second patterns are disposed in the node region.

[0009] In an embodiment, the first quantity of the first pattern and the second quantity of the second pattern are the same as each other.

[0010] In the embodiment, the first quantity of the first pattern and the second quantity of the second pattern are different from each other.

[0011] In an embodiment, the first side and the fourth side extend in the second direction, and the second side and the third side extend in the first direction.

[0012] In an embodiment, a plurality of first bridge patterns and a plurality of second bridge patterns extend in a diagonal direction between a first direction and a second direction.

[0013] In an embodiment, the first side and the fourth side extend along a first diagonal direction between the first direction and the second direction, and the second side and the third side extend along a second diagonal direction between the first direction and the second direction, which is different from the first diagonal direction.

[0014] In an embodiment, the plurality of first patterns include a first pattern having a first pattern hole, and the plurality of second patterns include a second pattern having a second pattern hole.

[0015] In an embodiment, the electronic device further includes: a first dummy pattern, which is located within a first pattern hole of the first pattern and is insulated from the first pattern; and a second dummy pattern, which is located within a second pattern hole of the second pattern and is insulated from the second pattern.

[0016] In one embodiment, the plurality of first patterns includes a third pattern having a third pattern hole, and the first pattern hole and the third pattern hole have different areas from each other.

[0017] In an embodiment, the plurality of first patterns include a first pattern having a first recess that is recessed inward from a second side, and the plurality of second patterns include a second pattern having a second recess that is recessed inward from a fourth side.

[0018] In an embodiment, the electronic device further includes: a first dummy pattern disposed in a first recess of the first pattern and insulated from the first pattern; and a second dummy pattern disposed in a second recess of the second pattern and insulated from the second pattern.

[0019] In an embodiment, each of the plurality of first patterns and the plurality of second patterns includes a plurality of first grid lines extending in a first diagonal direction between the first direction and the second direction, a plurality of second grid lines extending in a second diagonal direction different from the first diagonal direction between the first direction and the second direction, and a plurality of grid openings defined by the plurality of first grid lines and the plurality of second grid lines.

[0020] In an embodiment, each of the plurality of first patterns includes: a body having an outer boundary that is rectangular in shape; and a first protrusion protruding from a first portion of the outer boundary of the body.

[0021] In an embodiment, each of the plurality of first patterns further includes: a second protrusion protruding from a second portion of the outer boundary of the body and spaced apart from the first protrusion; the first protrusion is connected to a corresponding bridge pattern among the plurality of first bridge patterns, and the second protrusion is spaced apart from the plurality of first bridge patterns and the plurality of second bridge patterns.

[0022] In one embodiment, the display panel includes: a substrate layer; a circuit element layer disposed on the substrate layer and including at least one transistor; a display element layer including a light-emitting element connected to the transistor; and an upper insulating layer covering the display element layer. An input sensor is disposed directly on the upper insulating layer.

[0023] In one embodiment, the input sensor includes: a first sensor insulating layer disposed on a display panel; a first conductive layer disposed on the first sensor insulating layer; a second sensor insulating layer disposed on the first sensor insulating layer to cover the first conductive layer; and a second conductive layer disposed on the second sensor insulating layer.

[0024] In an embodiment, the first conductive layer includes a plurality of first bridge patterns, the second conductive layer includes a plurality of first patterns, a plurality of second patterns and a plurality of second bridge patterns, and each of the plurality of first bridge patterns is connected to a corresponding pair of adjacent first patterns through a corresponding pair of two contact holes passing through the second sensor insulating layer.

[0025] In an embodiment, the plurality of first patterns include a plurality of first upper patterns and a plurality of first lower patterns. Each of the plurality of first upper patterns vertically overlaps with a corresponding first lower pattern among the plurality of first lower patterns and has the same shape as the corresponding first lower pattern. Each of the plurality of first bridge patterns connects a pair of adjacent first lower patterns among the plurality of first lower patterns. The plurality of second patterns include a plurality of second upper patterns and a plurality of second lower patterns. Each of the plurality of second upper patterns vertically overlaps with a corresponding second lower pattern among the plurality of second lower patterns and has the same shape as the corresponding second lower pattern. Each of the plurality of second bridge patterns connects a pair of adjacent second upper patterns among the plurality of second upper patterns. The first conductive layer includes a plurality of first lower patterns, a plurality of first bridge patterns, and a plurality of second lower patterns. The second conductive layer includes a plurality of first upper patterns, a plurality of second upper patterns, and a plurality of second bridge patterns.

[0026] In one embodiment, each of the plurality of first upper patterns is connected to a corresponding first lower pattern of the plurality of first lower patterns through a first contact hole passing through the second sensor insulating layer. Each of the plurality of second upper patterns is connected to a corresponding second lower pattern of the plurality of second lower patterns through a second contact hole passing through the second sensor insulating layer. Attached Figure Description

[0027] The accompanying drawings are included to provide a further understanding of the inventive concept and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the inventive concept and, together with the description, serve to explain the principles of the inventive concept. In the drawings:

[0028] Figure 1A This is a perspective view of an electronic device according to an embodiment of the present invention.

[0029] Figure 1B This is an exploded perspective view of an electronic device according to an embodiment of the present invention.

[0030] Figure 2A and Figure 2B It is along the electronic devices Figure 1B A cross-sectional view taken from line I-I';

[0031] Figure 2C and Figure 2D It is along the display device Figure 1B A cross-sectional view taken from line I-I';

[0032] Figure 3A This is a block diagram used to explain the operation of an electronic device according to an embodiment of the concept of the present invention;

[0033] Figure 3B yes Figure 3A A block diagram of the input unit;

[0034] Figure 4 This is a cross-sectional view of a display device according to an embodiment of the present invention;

[0035] Figure 5A This is a plan view of an input sensor according to an embodiment of the present invention;

[0036] Figure 5B This is a plan view illustrating a node of an input sensor according to an embodiment of the present invention.

[0037] Figure 6 This is a plan view illustrating the pattern of an input sensor according to an embodiment of the present invention;

[0038] Figure 7 This is a plan view illustrating the pattern of an input sensor according to an embodiment of the present invention;

[0039] Figure 8 This is a plan view illustrating the pattern of an input sensor according to an embodiment of the present invention;

[0040] Figure 9 This is a plan view illustrating the pattern of an input sensor according to an embodiment of the present invention;

[0041] Figure 10 This is a plan view illustrating the pattern of an input sensor according to an embodiment of the present invention;

[0042] Figure 11 This is a plan view illustrating the pattern of an input sensor according to an embodiment of the present invention;

[0043] Figure 12 This is a plan view illustrating a node of an input sensor according to an embodiment of the present invention.

[0044] Figure 13 This is a plan view illustrating a node of an input sensor according to an embodiment of the present invention.

[0045] Figure 14 This is a plan view illustrating a node of an input sensor according to an embodiment of the present invention.

[0046] Figure 15 This is a plan view illustrating the pattern of an input sensor according to an embodiment of the present invention;

[0047] Figure 16 It is along the embodiment of the concept of the present invention. Figure 5B A cross-sectional view of the input sensor taken by line II-II';

[0048] Figure 17 It is along the embodiment of the concept of the present invention. Figure 5B A cross-sectional view of the input sensor taken by line II-II'; and

[0049] Figure 18 It is along the embodiment of the concept of the present invention. Figure 5B The cross-sectional view of the input sensor taken by line II-II'. Detailed Implementation

[0050] In this specification, it will also be understood that when a component (or area, layer, part, etc.) is referred to as being “on”, “connected to” or “attached to” another component, it can be directly set on / connected to / attached to that other component, or there may be an intermediary third component.

[0051] The same reference numerals always denote the same elements. In the accompanying drawings, the thickness, scale, and dimensions of parts are enlarged for clarity.

[0052] The term “and / or” includes any and all combinations of one or more of the associated listed items.

[0053] It will be understood that although terms such as “first” and “second” are used herein to describe various elements, these elements should not be limited by these terms. Terms are used only to distinguish one component from others. For example, an element referred to as a first element in one embodiment can be referred to as a second element in another embodiment without departing from the scope of the appended claims. Singular terms may include plural forms unless otherwise indicated.

[0054] The terms "below," "under," "above," and "above" are used to explain the relationships between the components illustrated in the accompanying drawings. These terms can be relative concepts and are described based on the directions shown in the drawings.

[0055] Unless otherwise specified, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. Terms such as those defined in common dictionaries shall be interpreted as having the meaning consistent with their meaning in the context of the relevant field and shall not be interpreted in an idealized or overly formal manner unless expressly so defined herein.

[0056] The word "comprising" or "including" specifies a property, a fixed quantity, a step, an operation, an element, a component, or a combination thereof, but does not exclude other properties, fixed quantities, steps, operations, elements, components, or combinations thereof. In the following, exemplary embodiments of the inventive concept will be described with reference to the accompanying drawings.

[0057] Figure 1AThis is a perspective view of an electronic device according to an embodiment of the present invention. Figure 1B This is an exploded perspective view of an electronic device according to an embodiment of the present invention. Figure 2A and Figure 2B It is along the electronic devices Figure 1B The cross-sectional view taken from line I-I'. Figure 2C and Figure 2D It is along the display device Figure 1B The cross-sectional view taken from line I-I'. Figure 3A This is a block diagram used to explain the operation of an electronic device according to an embodiment of the concept of the present invention. Figure 3B yes Figure 3A A block diagram of the input unit.

[0058] refer to Figure 1A and Figure 1B An electronic device (ELD) can be a device that is activated by an electrical signal. Electronic device ELDs can include a variety of examples. For instance, electronic device ELDs can be applied to smartphones, tablets, laptops, computers, and smart TVs.

[0059] An electronic device ELD can display an image IM on a display surface IS parallel to each of the first direction DR1 and the second direction DR2 on a third-party direction DR3. The display surface IS on which the image IM is displayed can correspond to the front surface of the electronic device ELD. The image IM can include still images and moving images.

[0060] The front (or top) or rear (or bottom) surface of each component can be defined based on the orientation in which the image IM is displayed. The front and rear surfaces can be opposite each other on a third direction DR3. The normal direction of each of the front and rear surfaces can be parallel to the third direction DR3.

[0061] The distance between the front and rear surfaces in the third direction DR3 can correspond to the thickness of the electronic device ELD in the third direction DR3. The directions indicated as the first to third directions DR1, DR2, and DR3 can be... Figure 1A The direction specified in the middle is different.

[0062] An electronic device ELD can sense external inputs applied from the outside. External inputs can include various inputs provided from outside the electronic device ELD. An electronic device ELD according to an embodiment of the present invention can sense a first input TC1 applied from the outside. The first input TC1 can be an input made by the user US's body as an input made by a passive input unit, and may also include an input capable of changing capacitance. Depending on the structure of the electronic device ELD, the electronic device ELD can sense the first input TC1 applied by the user US to the side or rear surface of the electronic device ELD, but is not limited to a particular embodiment.

[0063] The electronic device ELD can sense a second input TC2, which is of a different type than the first input TC1. The second input TC2 can be an input of an active input unit AP. The input unit AP can provide a drive signal to the input sensor ISP.

[0064] The front surface of an electronic device's ELD may include an image region IA and a border region BZA. The image region IA may be the area on which an image IM is displayed. A user can visually identify the image IM through the image region IA. Each vertex of the image region IA may have a rounded rectangular shape. However, this is merely an example. For instance, the image region IA may have various shapes and is not limited to a particular embodiment.

[0065] The border region BZA is adjacent to the image region IA. The border region BZA may have a predetermined color. The border region BZA may surround the image region IA. Therefore, the shape of the image region IA may be substantially defined by the border region BZA. However, this is merely an example. For example, the border region BZA may be configured to be adjacent only to one side of the image region IA or may be omitted. The electronic device ELD according to embodiments of the present invention may be implemented according to various embodiments, but is not limited to a particular embodiment.

[0066] like Figure 1B As illustrated, an electronic device ELD may include a display device DD, an optical component AF, a window WM, an electronic module EM, a power module PSM, and a housing EDC. The display device DD generates images and senses external input. The display device DD may include a display panel DP and an input sensor ISP. The display device DD includes image areas IA (see diagram) of the electronic device ELD. Figure 1A ) and border area BZA (see Figure 1A The corresponding effective area AA and the peripheral area NAA.

[0067] The display panel (DP) is not specifically limited and can be, for example, an organic light-emitting display panel or a quantum dot light-emitting display panel. The input sensor (ISP) will be described in detail later.

[0068] The display device DD may include a main circuit board MCB, a flexible circuit film FCB, and a driver chip DIC. One of the components described above may be omitted. The main circuit board MCB may be connected to the flexible circuit film FCB and electrically connected to the display panel DP. The main circuit board MCB may include multiple driving elements (e.g., driving circuitry). The multiple driving elements may include an integrated chip for driving or operating the display panel DP. The main circuit board MCB may be electrically connected to the electronics module EM via a connector.

[0069] A flexible circuit film (FCB) is connected to the display panel (DP) to electrically connect the DP to the main circuit board (MCB). The FCB can be bent so that the MCB faces the rear surface of the display device (DD). A driver chip (DIC) can be mounted on the FCB. The DIC may include driving elements, such as data driving circuitry, for driving or operating the pixels of the DP.

[0070] Figure 1B The illustration shows a structure in which the driver chip DIC is mounted on a flexible circuit film FCB, but embodiments of the present invention are not limited thereto. For example, the driver chip DIC can be mounted on a display panel DP. In an embodiment, the driver chip DIC is directly mounted on the display panel DP. A portion of the display panel DP can be bent, and the portion on which the driver chip DIC is mounted can be positioned to face the rear surface of the display device DD.

[0071] Although not shown, the input sensor ISP can be electrically connected to the main circuit board MCB via an additional flexible circuit film. However, embodiments of the present invention are not limited thereto. The input sensor ISP can be electrically connected to the display panel DP and electrically connected to the main circuit board MCB via a flexible circuit film FCB.

[0072] Optical components (AF) can reduce the reflectivity of external light. AF can include polarizers and retarders. Polarizers and retarders can be stretched or coated. In coated optical films, the optical axis is defined according to the stretching direction of the functional film. Coated optical films can include liquid crystal molecules disposed on a substrate film.

[0073] In embodiments of the present invention, the optical component AF can be omitted. The display device DD may further include a color filter and a black matrix in place of the optical component AF. A window WM is disposed on the outer surface of the electronic device ELD. The window WM includes a substrate and may further include functional layers such as an anti-reflective layer and an anti-fingerprint layer.

[0074] Although not shown separately, the display device DD may further include at least one adhesive layer. The adhesive layer may bond adjacent components of the display device DD to each other. The adhesive layer may be an optically transparent adhesive layer or a pressure-sensitive adhesive layer.

[0075] The electronic module (EM) includes at least a main controller. The EM may include a wireless communication module, an image input module, an audio input module, an audio output module, a memory, and an external interface module. Modules can be mounted on a circuit board or electrically connected to each other via a flexible circuit board. The EM is electrically connected to the power supply module (PSM).

[0076] The main controller controls the overall operation of the electronic device (ELD). For example, the main controller activates or deactivates the display device (DD) based on user input. The main controller can control the operation of the display device (DD), wireless communication module, image input module, audio input module, and audio output module. The main controller may include at least one microprocessor.

[0077] The housing EDC can be attached to the window WM. The housing EDC absorbs impacts applied from the outside and prevents foreign objects / moisture from being introduced into the display device DD, thereby protecting the components housed within the housing EDC. In embodiments of the inventive concept, the housing EDC can be provided in a shape in which multiple housing members are connected to each other.

[0078] Although not shown, the electronic device ELD conceived according to the present invention can operate in an inwardly folded state in which different portions of the display surface IS face each other relative to folding axes extending in the first direction DR1 or the second direction DR2, or in an outwardly folded state in which different portions of the housing EDC face each other, but is not limited thereto.

[0079] refer to Figure 2A The input sensor ISP can be directly disposed on the display panel DP. In an embodiment, the input sensor ISP is directly disposed on the display panel DP. According to an embodiment of the present invention, the input sensor ISP can be disposed on the display panel DP through a continuous process. That is, when the input sensor ISP is directly disposed on the display panel DP, an adhesive layer may not be disposed between the input sensor ISP and the display panel DP.

[0080] However, as Figure 2B As illustrated in the diagram, the adhesive layer ADL can be disposed between the input sensor ISP and the display panel DP. The input sensor ISP may not be manufactured in a continuous process with the display panel DP. For example, after being manufactured through a process separate from the process of forming the display panel DP, the input sensor ISP can be fixed to the top surface of the display panel DP via the adhesive layer ADL. Figure 2Aand Figure 2B middle, Figure 1B The optical component AF shown in the diagram is not shown. The component located below the display device DD is also not shown.

[0081] like Figure 2A As shown in the diagram, the window WM may include a border area BZA (see diagram). Figure 1A The light-blocking pattern WBM can be, for example, a colored organic film coated onto one surface of a substrate layer WM-BS.

[0082] like Figure 2C As illustrated in the diagram, the display panel DP may include a substrate layer BL, a circuit element layer DP-CL disposed on the substrate layer BL, a display element layer DP-OLED, an encapsulation layer ES, and a sealant SM that connects the substrate layer BL to the encapsulation layer ES.

[0083] The substrate layer BL may include at least one plastic film. The substrate layer BL may include a plastic substrate, a glass substrate, a metal substrate, or an organic / inorganic composite substrate. The substrate layer BL may be a thin-film glass substrate with a thickness of tens to hundreds of micrometers. The substrate layer BL may have a multilayer structure. For example, the substrate layer BL may include a polyimide film, at least one inorganic layer, or a combination thereof, or may be formed from a polyimide film, at least one inorganic layer, or a combination thereof.

[0084] The circuit element layer DP-CL includes at least one insulating layer and circuit elements. The insulating layer includes at least one inorganic layer and at least one organic layer. The circuit elements include signal lines and pixel driving circuits, etc. This will be described in detail later.

[0085] The display element layer of a DP-OLED may include at least a light-emitting element. The display element layer of a DP-OLED may further include an organic layer such as a pixel-defining layer.

[0086] The encapsulation layer ES can be spaced apart from the display element layer DP-OLED by a predetermined gap. Each of the substrate layer BL and the encapsulation layer ES can include a plastic substrate, a glass substrate, a metal substrate, or an organic / inorganic composite substrate. The sealant SM can include an organic adhesive or a glass frit. A predetermined material can be filled in the gap. A desiccant or resin material can be filled in the gap.

[0087] like Figure 2DAs illustrated in the diagram, the display panel DP may include a substrate layer BL, a circuit element layer DP-CL disposed on the substrate layer BL, a display element layer DP-OLED, and an upper insulating layer TFL. The upper insulating layer TFL may include multiple thin films. The upper insulating layer TFL may include a protective layer for protecting the light-emitting elements. The upper insulating layer TFL may include a thin film encapsulation layer comprising at least an inorganic layer / organic layer / inorganic layer. For example, the thin film encapsulation layer may be a multilayer consisting of a first inorganic layer, a second inorganic layer, and an organic layer between the first and second inorganic layers. The first and second inorganic layers may be different inorganic layers or the same inorganic layer. The thin film encapsulation layer may be disposed on the protective layer.

[0088] Figure 3A This is a block diagram used to explain the operation of an electronic device ELD according to an embodiment of the present invention, and Figure 3B yes Figure 3A A block diagram of the input unit AP.

[0089] refer to Figure 3A and Figure 3B An electronic device ELD according to an embodiment of the present invention may include a main controller 200 for controlling the drive of a display device DD and a sensor controller 100 connected to an input sensor ISP. The main controller 200 may control the drive of the sensor controller 100.

[0090] According to an embodiment of the present invention, the main controller 200 and the sensor controller 100 can be mounted on the main circuit board MCB (see...). Figure 1B According to an embodiment of the present invention, the sensor controller 100 can be embedded in the driver chip DIC (see...). Figure 1B )middle.

[0091] An input sensor ISP may include electrodes. These electrodes may include a first electrode and a second electrode. The structure of the input sensor ISP will be described later.

[0092] The sensor controller 100 can be connected to the electrodes of the input sensor ISP. The sensor controller 100 can allow the input sensor ISP to operate in a first mode to sense a first input TC1 (see...). Figure 1A It also allows the input sensor ISP to operate in a second mode to sense a second input TC2 (see...). Figure 1A The operations of the first and second modes can be performed alternately, or they can be performed in different parts in a preset manner.

[0093] like Figure 3BAs illustrated, the input unit AP may include a housing 11, a conductive tip 12, and a communication module 13. The housing 11 may be pen-shaped, and a receiving space may be defined within the housing 11. The conductive tip 12 may protrude outward from an open end portion of the housing 11. The conductive tip 12 may be part of a contact input sensor ISP of the input unit AP.

[0094] The communication module 13 may include a transmitting circuit 13a and a receiving circuit 13b. The transmitting circuit 13a can transmit downlink signals to the sensor controller 100. The downlink signals may include the position of the input unit AP, the tilt angle of the input unit AP, and the status information of the input unit AP. When the input unit AP contacts the input sensor ISP, the sensor controller 100 can receive the downlink signals through the input sensor ISP.

[0095] The receiving circuit 13b can receive uplink signals from the sensor controller 100. The uplink signals may include information such as panel information and protocol version. The sensor controller 100 can supply the uplink signals to the input sensor ISP, and the input unit AP can receive the uplink signals by contacting the input sensor ISP.

[0096] The input unit AP further includes an input controller 14 that controls the drive of the input unit AP. The input controller 14 can operate according to a predetermined program. The transmitting circuit 13a receives signals supplied from the input controller 14 to modulate the received signals into signals that can be sensed by the input sensor ISP, and the receiving circuit 13b receives signals received by the input sensor ISP to modulate the received signals into signals that can be processed by the input controller 14. The input unit AP may further include a power module 15 for supplying power to the input unit AP.

[0097] Figure 4 This is an enlarged cross-sectional view of a display device according to an embodiment of the present invention. Figure 4 The main illustrations are Figure 2D The display device DD.

[0098] refer to Figure 4 The display device DD may include a display panel DP and an input sensor ISP disposed on the display panel DP. In an embodiment, the input sensor ISP is disposed directly on the display panel DP. The display panel DP may include a substrate layer BL, a circuit element layer DP-CL, a display element layer DP-OLED, and an upper insulating layer TFL.

[0099] The substrate layer BL provides a substrate surface on which the circuit element layer DP-CL is disposed. The circuit element layer DP-CL can be disposed on the substrate layer BL. The circuit element layer DP-CL may include insulating layers, semiconductor patterns, conductive patterns, and signal lines. The insulating layer, semiconductor layer, and conductive layer can be formed on the substrate layer BL by means such as coating or vapor deposition, and then the insulating layer, semiconductor layer, and conductive layer can be selectively patterned by multiple photolithography processes. Subsequently, semiconductor patterns, conductive patterns, and signal lines included in the circuit element layer DP-CL can be provided.

[0100] At least one inorganic layer may be disposed on the top surface of the substrate layer BL. The display panel DP is shown as including a buffer layer BFL. The buffer layer BFL can increase the adhesion between the substrate layer BL and the semiconductor pattern. The buffer layer BFL may include a silicon oxide layer and a silicon nitride layer, and the silicon oxide layer and the silicon nitride layer may be stacked alternately.

[0101] Semiconductor patterns can be disposed on the buffer layer BFL. The semiconductor pattern may include polycrystalline silicon. However, embodiments of the present invention are not limited thereto. For example, the semiconductor pattern may include amorphous silicon or metal oxide.

[0102] Figure 4 Only a portion of the semiconductor pattern is illustrated. For example, the semiconductor pattern can be further disposed in other regions. The semiconductor pattern can be arranged across pixels according to specific rules. Depending on whether the semiconductor pattern is doped, it has different electrical properties. The semiconductor pattern may include a first region with high conductivity and a second region with low conductivity. The first region may be doped with N-type or P-type dopant. A P-type transistor includes a doped region in which P-type dopant is doped. The second region may be an undoped region (i.e., an intrinsic semiconductor region), or it may be doped at a lower concentration than the first region.

[0103] The first region can have a higher conductivity than the second region and can be used as an electrode or signal line. The second region can correspond to the active region (or channel region) of the transistor TR. For example, a portion of the semiconductor pattern can be the active region of the transistor TR, and another portion of the semiconductor pattern can be the source or drain region of the transistor TR.

[0104] Each pixel can have an equivalent circuit comprising seven transistors, a capacitor, and a light-emitting element, and the equivalent circuit diagram of a pixel can be modified in various ways. Figure 4 In the illustration, a transistor TR and a light-emitting element ED, which are included in a pixel, are shown as an example.

[0105] The source region SR, channel region CHR, and drain region DR of a transistor TR can be formed from a semiconductor pattern. The source region SR and drain region DR can be provided in the cross-section in the opposite direction to the channel region CHR. Figure 4 The illustration shows the signal line SCL being provided as part of a first region of a semiconductor pattern. Although not shown separately, the signal line SCL can be electrically connected to the transistor TR.

[0106] A first insulating layer IL1 may be disposed on a buffer layer BFL. The first insulating layer IL1 typically overlaps with multiple pixels to cover a semiconductor pattern. The first insulating layer IL1 may include inorganic and / or organic layers, and may have a single-layer or multi-layer structure. The first insulating layer IL1 may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide. The first insulating layer IL1 may include a single-layer silicon oxide layer.

[0107] The insulating layer of the circuit element layer DP-CL, which will be described later, and the first insulating layer IL1 can be inorganic and / or organic layers, and can have a single-layer structure or a multi-layer structure. The inorganic layer can include, but is not limited to, at least one of the materials described above.

[0108] The gate GE of transistor TR is disposed on the first insulating layer IL1. Gate GE may be part of a metal pattern. Gate GE overlaps with the channel region CHR. In the process of doping semiconductor patterning, gate GE can be used as a mask.

[0109] A second insulating layer IL2 can be disposed on the first insulating layer IL1 to cover the gate GE. The second insulating layer IL2 can typically overlap with a pixel. The second insulating layer IL2 can be an inorganic layer and / or an organic layer, and has a single-layer or multi-layer structure. The second insulating layer IL2 can be a single-layer silicon oxide layer.

[0110] A third insulating layer IL3 can be disposed on the second insulating layer IL2. The third insulating layer IL3 can be a single layer of silicon oxide. A first connecting electrode CNE1 can be disposed on the third insulating layer IL3. The first connecting electrode CNE1 can be connected to the signal line SCL through a contact hole CNT1 passing through the first insulating layer IL1, the second insulating layer IL2, and the third insulating layer IL3.

[0111] The fourth insulating layer IL4 can be disposed on the third insulating layer IL3. The fourth insulating layer IL4 can be a single layer of silicon oxide. The fifth insulating layer IL5 can be disposed on the fourth insulating layer IL4. The fifth insulating layer IL5 can be an organic layer.

[0112] The second connecting electrode CNE2 can be disposed on the fifth insulating layer IL5. The second connecting electrode CNE2 can be connected to the first connecting electrode CNE1 through the contact hole CNT2 passing through the fourth insulating layer IL4 and the fifth insulating layer IL5.

[0113] A sixth insulating layer IL6 can be disposed on the fifth insulating layer IL5 to cover the second connection electrode CNE2. The sixth insulating layer IL6 can be an organic layer. The display element layer DP-OLED can be disposed on the circuit element layer DP-CL. The display element layer DP-OLED can include a light-emitting element ED. The light-emitting element ED can include a first electrode AE, an emitting layer EL, and a second electrode CE. For example, the emitting layer EL can include organic light-emitting materials, quantum dots, quantum rods, micro-LEDs, or nano-LEDs.

[0114] The first electrode AE ​​can be disposed on the sixth insulating layer IL6. The first electrode AE ​​can be connected to the second connecting electrode CNE2 through the contact hole CNT3 passing through the sixth insulating layer IL6.

[0115] A pixel defining layer IL7 may be disposed on a sixth insulating layer IL6 to cover a portion of the first electrode AE. An opening OP7 is defined in the pixel defining layer IL7. The opening OP7 of the pixel defining layer IL7 exposes at least a portion of the first electrode AE. An emitting region PXA may be defined to correspond to the portion of the region of the first electrode AE ​​exposed by the opening OP7. A non-emitting region NPXA may surround the emitting region PXA.

[0116] An emitting layer EL can be disposed on the first electrode AE. The emitting layer EL can be disposed within the opening OP7. For example, the emitting layer EL can be disposed individually in each of the pixels. When the emitting layer EL is disposed individually in each of the pixels, each of the emitting layer ELs can emit light having at least one of blue, red, and green. However, embodiments of the inventive concept are not limited thereto. For example, the emitting layer ELs can be provided publicly and connected throughout the pixels. The emitting layer EL can provide blue light or white light.

[0117] The second electrode CE can be disposed on the emitter layer EL. The second electrode CE can have a monolithic shape and is typically disposed on multiple pixels. A common voltage can be provided to the second electrode CE, and the second electrode CE can be referred to as the common electrode.

[0118] Although not illustrated, a hole control layer can be disposed between the first electrode AE ​​and the emitter layer EL. The hole control layer can typically be disposed within the emitter region PXA and the non-emitter region NPXA. The hole control layer may include a hole transport layer and may further include a hole injection layer. An electron control layer can be disposed between the emitter layer EL and the second electrode CE. The electron control layer may include an electron transport layer and may further include an electron injection layer. The hole control layer and the electron control layer can typically be formed in a pixel using an aperture mask.

[0119] The input sensor ISP can be directly disposed on the top surface of the upper insulating layer TFL using a continuous process. In an embodiment, the input sensor ISP is directly disposed on the top surface of the upper insulating layer TFL using a continuous process. The input sensor ISP may include a first sensor insulating layer TIL1, a first conductive layer ICL1, a second sensor insulating layer TIL2, a second conductive layer ICL2, and a third sensor insulating layer TIL3. In embodiments of the present invention, the first sensor insulating layer TIL1 may be omitted.

[0120] Each of the first conductive layer ICL1 and the second conductive layer ICL2 may include multiple patterns having a single-layer structure or a multilayer structure in which multiple layers are stacked on a third-direction DR3. The conductive layer having a single-layer structure may include a metal layer or a transparent conductive layer.

[0121] The metal layer may include molybdenum, silver, titanium, copper, aluminum, or alloys thereof. The transparent conductive layer may include transparent conductive oxides such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), and indium zinc tin oxide (IZTO). The transparent conductive layer may also include conductive polymers such as PEDOT, metal nanowires, and graphene.

[0122] A conductive layer with a multilayer structure may include a metal layer. The metal layer may have a titanium / aluminum / titanium three-layer structure. A conductive layer with a multilayer structure may include at least one metal layer and at least one transparent conductive layer.

[0123] Figure 4 The arrangement of the first conductive layer ICL1 and the second conductive layer ICL2 shown in the figure is illustrated as an example, and embodiments of the first conductive layer ICL1 and the second conductive layer ICL2 applied to the inventive concept will be described later.

[0124] The second sensor insulating layer TIL2 covers the first conductive layer ICL1, and the third sensor insulating layer TIL3 covers the second conductive layer ICL2. The first sensor insulating layer TIL1 to the third sensor insulating layer TIL3 are illustrated as a single layer, but are not limited thereto.

[0125] The third insulating layer IL3 may include an organic layer. The organic layer may include at least one of acrylic resins, methacrylic resins, polyisoprene resins, vinyl resins, epoxy resins, urethane resins, cellulose resins, siloxane resins, polyimide resins, polyamide resins, and dinaphthalene-containing resins.

[0126] Figure 5A This is a plan view of an input sensor according to an embodiment of the present invention. Figure 5B This is a plan view illustrating a node of an input sensor according to an embodiment of the present invention.

[0127] refer to Figure 5A and Figure 5B The input sensor ISP can be divided into a sensing region AA-I and a non-sensing region NAA-I. The sensing region AA-I and the non-sensing region NAA-I can be respectively compared with... Figure 1B The effective area AA and the peripheral area NAA of the display device DD in the diagram correspond to each other.

[0128] The input sensor ISP may include multiple electrodes TE1 and TE2, multiple sensing lines TL1, TL2 and TL3, and multiple sensing pads PDT. The multiple electrodes TE1 and TE2 may include a first electrode TE1 and a second electrode TE2. The first electrode TE1 and the second electrode TE2 may be insulated from each other and cross each other.

[0129] Each of the first electrodes TE1 may extend in a first direction DR1, and the first electrodes TE1 may be arranged in a second direction DR2. For example, the first electrodes TE1 may be spaced apart from each other in the second direction DR2. The first electrodes TE1 may include a first pattern SP1, a first bridge pattern BP1, and a first connection pattern CP1. The first pattern SP1 may be arranged in a zigzag shape to extend along the first direction DR1.

[0130] Two first patterns SP1 in a first pattern SP1 can be connected to a first connecting pattern CP1, and two first patterns SP1 spaced apart from each other in the first direction DR1 can be offset from the two first patterns SP1 connected to the first connecting pattern CP1 in the second direction DR2. For example, the two uppermost first patterns SP1 in each first electrode TE1 can be connected to the corresponding first connecting pattern CP1, and the two first patterns SP1 adjacent to the two uppermost first patterns SP1 in each first electrode TE1 can be spaced apart from the two uppermost first patterns SP1 in the first direction DR1, and can be offset from the two uppermost first patterns SP1 connected to the first connecting pattern CP1 in the second direction DR2. This arrangement of the first patterns SP1 in each first electrode TE1 can be repeated, and the first patterns SP1 can be arranged in a zigzag shape in two columns.

[0131] The first bridge pattern BP1 can connect the first patterns SP1 that are spaced apart from each other. For example, the first patterns SP1 arranged diagonally between the first direction DR1 and the second direction DR2 can be connected to each other by the first bridge pattern BP1. The first bridge pattern BP1 can extend diagonally between the first direction DR1 and the second direction DR2 to connect the first patterns SP1 to each other. The first bridge pattern BP1 can extend from the edge of one first pattern SP1 to the edge of another first pattern SP1. For example, each first bridge pattern BP1 can connect a corresponding pair of two first patterns SP1 to each other. The two first patterns SP1 can be spaced apart from each other diagonally.

[0132] Each of the first connection patterns CP1 can be connected to the first pattern SP1 closest to the non-sensing region NAA-I in the first pattern SP1 included in the first electrode TE1. The second sensing line TL2 and the third sensing line TL3 can be connected to the corresponding first connection pattern CP1 to connect to the first pattern SP1.

[0133] Each of the second electrodes TE2 may extend in the second direction DR2, and the second electrodes TE2 may be arranged in the first direction DR1. For example, the second electrodes TE2 may be spaced apart from each other in the first direction DR1. The second electrodes TE2 may include a second pattern SP2, a second bridge pattern BP2, and a second connecting pattern CP2. The second pattern SP2 may be arranged in a zigzag shape to extend in the second direction DR2.

[0134] Two second patterns SP2 in the second pattern SP2 can be connected to the second connecting pattern CP2, and two second patterns SP2 spaced apart from each other in the second direction DR2 can be set to be offset from the two second patterns SP2 connected to the second connecting pattern CP2 in the first direction DR1. For example, the two rightmost second patterns SP2 in each second electrode TE2 can be connected to the corresponding second connecting pattern CP2, and the two second patterns SP2 adjacent to the two rightmost second patterns SP2 in each second electrode TE2 can be spaced apart from the two rightmost second patterns SP2 in the second direction DR2, and can be offset from the two rightmost second patterns SP2 connected to the second connecting pattern CP2 in the first direction DR1. The above arrangement relationship of the second patterns SP2 in each second electrode TE2 can be repeated, and the second patterns SP2 can be arranged in a zigzag shape in two rows.

[0135] The second bridge pattern BP2 can connect the second patterns SP2 that are spaced apart from each other. For example, the second patterns SP2 arranged to be spaced apart from each other along the diagonal direction between the first direction DR1 and the second direction DR2 can be connected to each other by the second bridge pattern BP2. The second bridge pattern BP1 can extend in the diagonal direction between the first direction DR1 and the second direction DR2 to connect the second patterns SP2 to each other. The second bridge pattern BP2 can extend from the edge of one second pattern SP2 to the edge of another second pattern SP2. At least a portion of the second bridge pattern BP2 can intersect the first bridge pattern BP1 in a plane. For example, when viewed in a planar view (hereinafter referred to as "in the planar view") of the input sensor ISP, at least a portion of the second bridge pattern BP2 can intersect the first bridge pattern BP1. In the case where the first bridge pattern BP1 and the second bridge pattern BP2 intersect, the first bridge pattern BP1 and the second bridge pattern BP2 can be insulated from each other.

[0136] Each of the second connection patterns CP2 can be connected to the second pattern SP2 closest to the non-sensing region NAA-I in the second pattern SP2 included in the second electrode TE2. The first sensing line TL1 can be connected to the corresponding second connection pattern CP2 to connect to the second pattern SP2.

[0137] Sensing lines TL1, TL2, and TL3 are disposed in the non-sensing area NAA-I. Sensing lines TL1, TL2, and TL3 may include a first sensing line TL1, a second sensing line TL2, and a third sensing line TL3.

[0138] The first sensing line TL1 can be connected to the second electrode TE2. The second sensing line TL2 can be connected to one end of the first electrode TE1. The third sensing line TL3 can be connected to the other end of the first electrode TE1. The other end of the first electrode TE1 can be a portion opposite to one end of the first electrode TE1.

[0139] According to an embodiment of the present invention, the first electrode TE1 can be connected to the second sensing line TL2 and the third sensing line TL3. Therefore, the sensitivity of the first electrode TE1, which has a length relatively longer than the second electrode TE2, can be maintained uniformly over a region. This is merely an example. The third sensing line TL3 according to an embodiment of the present invention can be omitted and is not limited to a particular embodiment.

[0140] The sensing pad PDT can be located in the non-sensing area NAA-I. The sensing pad PDT may include a first sensing pad TP1, a second sensing pad TP2, and a third sensing pad TP3. The first sensing pad TP1 can be connected to a first sensing line TL1 to be electrically connected to a second electrode TE2. The second sensing pad TP2 can be connected to a second sensing line TL2. The third sensing pad TP3 can be connected to a third sensing line TL3. Therefore, the second sensing pad TP2 and the third sensing pad TP3 are electrically connected to the first electrode TE1.

[0141] In an embodiment of the present invention, the region where the first electrode TE1 and the second electrode TE2 intersect each other is defined as a node ND (i.e., a node region). Figure 5B The node ND, where the first electrode TE1 and the second electrode TE2 intersect each other, is shown. Figure 5B In the diagram, the second pattern SP2 of the second electrode TE2 is shown in thick lines, and the first pattern SP1 and the second pattern SP2 are represented by different shaded lines.

[0142] A node ND can include the same number of first patterns SP1 and second patterns SP2. For example, eight first patterns SP1 and eight second patterns SP2 can be set in a node ND. The first patterns SP1 and second patterns SP2 can be alternately set in the first direction DR1 and the second direction DR2.

[0143] The first pattern SP1 may have a rectangular shape. In an embodiment, the rectangular shape has rounded corners. Each of the first patterns SP1 may include a first side S1 and a second side S2. The first side S1 may extend in a second direction DR2, and the second side S2 may extend from the first side S1 in a first direction DR1. The first side S1 may have a shorter length than the second side S2.

[0144] The second pattern SP2 may have a rectangular shape. In an embodiment, the rectangular shape has rounded corners. Each of the second patterns SP2 may include a third side S3 and a fourth side S4. The third side S3 may extend in a first direction DR1, and the fourth side S4 may extend from the third side S3 in a second direction DR2. The third side S3 may have a shorter length than the fourth side S4.

[0145] According to an embodiment of the present invention, the first edge S1 of each of the first patterns SP1 may face the fourth edge S4 of each of the second patterns SP2 in the first direction DR1. The second edge S2 of each of the first patterns SP1 may face the third edge S3 of each of the second patterns SP2 in the second direction DR2. Therefore, the edges of the first patterns SP1, which are spaced apart from each other in the first direction DR1 and the second direction DR2, face each other, and the edges of the second patterns SP2, which are spaced apart from each other in the first direction DR1 and the second direction DR2, may face each other. In an embodiment, the first patterns SP1 and the second patterns SP2 have the same area. The invention is not limited thereto. For example, the first patterns SP1 and the second patterns SP2 may be different in size, that is, the area of ​​each of the first patterns SP1 may be larger than the area of ​​each of the second patterns SP2, or vice versa. In an embodiment, the first patterns SP1 and the second patterns SP2 have the same shape, except that the shape of the first pattern SP1 is a shape formed by rotating the second pattern SP2 by a predetermined angle with a value between 0° and 180°. In an embodiment, the predetermined angle is 90°.

[0146] According to embodiments of the present invention, the patterns disposed in the node ND can be alternately arranged to ensure signal uniformity based on the location of the input applied to the input sensor ISP. Since multiple patterns are arranged in one node ND, the signal generated not only by the first input TC1 but also by the second input TC2 can be amplified. Therefore, an electronic device ELD including an input sensor ISP with improved sensing sensitivity can be provided.

[0147] Figure 6 This is a plan view illustrating the pattern of an input sensor according to an embodiment of the present invention. Figure 7 This is a plan view illustrating the pattern of an input sensor according to an embodiment of the present invention. Figure 8 This is a plan view illustrating the pattern of an input sensor according to an embodiment of the present invention; Figure 9 This is a plan view illustrating the pattern of an input sensor according to an embodiment of the present invention; Figure 10 This is a plan view illustrating the pattern of an input sensor according to an embodiment of the present invention. Figure 11This is a plan view illustrating the pattern of an input sensor according to an embodiment of the present invention.

[0148] Figures 6 to 11 The illustration shows the relationship with Figure 5A and Figure 5B The embodiment of the region corresponding to node ND described in the text, and with reference to Figure 5A and Figure 5B The sensor lines, connection patterns, and sensor pads of the components of the input sensor ISP described will be omitted.

[0149] refer to Figure 6 The input sensor ISP-A1 according to an embodiment may include a first electrode TE1 (see Figure 5A ) and the second electrode TE2 (see Figure 5A The first electrode TE1 may include a first pattern SP1 and a first bridge pattern BP1. The second electrode TE2 may include a second pattern SP2 and a second bridge pattern BP2.

[0150] At least one of the first pattern SP1 and the second pattern SP2 may have a pattern hole in which a portion of at least one of the first pattern SP1 and the second pattern SP2 is removed in the direction from the outside to the inside of the pattern.

[0151] For example, the first pattern SP1 may have a first pattern hole H1 (i.e., a first recess), wherein a portion of the first pattern SP1 is removed in a direction from the outside to the inside (i.e., recessed inward). For example, a portion of the second side S2 may be removed by forming the first pattern hole H1. The first pattern hole H1 may be defined by the inner surface of the first pattern SP1 exposed by removing a portion of the first pattern SP1.

[0152] The second pattern SP2 may have a second pattern hole H2 (i.e., a second recess), wherein a portion of the second pattern SP2 is removed in a direction from the outside to the inside (i.e., recessed inward). For example, a portion of the fourth side S4 may be removed by forming the second pattern hole H2. The second pattern hole H2 may be defined by the inner surface of the second pattern SP2 that is exposed to the outside by removing a portion of the second pattern SP2.

[0153] The first pattern SP1 disposed in the first row may have a first pattern hole H1 opening to the left, and the first pattern SP1 disposed in the second row, which is spaced apart from the first pattern SP1 disposed in the first row in the first direction DR1, may have a first pattern hole H1 opening to the right. However, embodiments of the inventive concept are not limited thereto. For example, the direction in which the first pattern hole H1 is defined in each row may be the same or may be randomly defined.

[0154] The second pattern SP2 disposed in the first row may have a second pattern hole H2 opening to the upward side, and the second pattern SP2 disposed in the second row, spaced apart from the second pattern SP2 disposed in the first row in the first direction DR1, may have a second pattern hole H2 opening to the downward side. However, embodiments of the present invention are not limited thereto. For example, the direction in which the second pattern hole H2 is defined in each row may be the same or may be randomly defined.

[0155] According to embodiments of the present invention, patterns SP1 and SP2 included in electrodes TE1 and TE2 respectively may have partially removed pattern holes H1 and H2, and thus, the parasitic capacitance between adjacent patterns to which different signals are applied can be reduced. In an embodiment, the first pattern SP1 and the second pattern SP2 have the same area. The invention is not limited thereto. For example, the first pattern SP1 and the second pattern SP2 may differ in area size, i.e., the area size of each of the first patterns SP1 is larger than the area size of each of the second patterns SP2, and vice versa. In an embodiment, the first pattern SP1 and the second pattern SP2 have the same shape, except that the shape of the first pattern SP1 is a shape formed by rotating the second pattern SP2 clockwise or counterclockwise by a predetermined angle with a value between 0° and 180°. In an embodiment, the predetermined angle is 90°.

[0156] refer to Figure 7 The input sensor ISP-A2 according to an embodiment may include a first electrode TE1 (see Figure 5A ) and the second electrode TE2 (see Figure 5A The first electrode TE1 may include a first pattern SP1-A and a first bridge pattern BP1. The second electrode TE2 may include a second pattern SP2-A and a second bridge pattern BP2.

[0157] At least one of the first pattern SP1-A and the second pattern SP2-A may have a pattern hole in which a portion of the first pattern SP1-A and the second pattern SP2-A is removed in the direction from the outside to the inside of the pattern.

[0158] For example, the first pattern SP1-A may have a first pattern hole H1-A (i.e., a first recess), wherein a portion of the first pattern SP1-A is removed in a direction from the outside to the inside (i.e., recessed inward). The second side S2 of the first pattern SP1-A (see...) Figure 6 A portion of the pattern SP1-A can be removed by forming the first pattern hole H1-A. The first pattern hole H1-A can be defined by the inner surface of the first pattern SP1-A exposed by removing a portion of the first pattern SP1-A.

[0159] The second pattern SP2-A may have a second pattern hole H2-A (i.e., a second recess), wherein a portion of the second pattern SP2-A is removed in a direction from the outside to the inside (i.e., recessed inward). For example, the fourth side S4 of the second pattern SP2-A (see...) Figure 6 A portion of the second patterned hole H2-A can be removed by forming the second patterned hole H2-A. The second patterned hole H2-A can be defined by the inner surface of the second pattern SP2-A that is exposed to the outside by removing a portion of the second pattern SP2-A.

[0160] The input sensor ISP-A2 may further include dummy patterns D1-A and D2-A. The first dummy pattern D1-A may be disposed in the first pattern aperture H1-A and electrically insulated from the first pattern SP1-A by being spaced apart. A portion of the first dummy pattern D1-A may be surrounded by the inner surface of the first pattern SP1-A defining the first pattern aperture H1-A.

[0161] The second dummy pattern D2-A may be disposed in the second pattern hole H2-A and electrically insulated from the second pattern SP2-A by being spaced apart. A portion of the second dummy pattern D2-A may be surrounded by the inner surface of the second pattern SP2-A defining the second pattern hole H2-A.

[0162] Dummy patterns D1-A and D2-A can be disposed within pattern holes H1-A and H2-A. Dummy patterns D1-A and D2-A can be spaced apart from the inner surfaces of patterns SP1-A and SP2-A, respectively, to insulate them from SP1-A and SP2-A, thereby preventing the shapes of patterns SP1-A and SP2-A from being visually recognized by the user. For ease of description, dummy patterns D1-A and D2-A are described as elements separate from patterns SP1-A and SP2-A. However, the first dummy pattern D1-A can be a part of the first pattern SP1-A, and the second dummy pattern D2-A can be a part of the second pattern SP2-A. In an embodiment, the first pattern SP1-A and the second pattern SP2-A have the same area. The invention is not limited thereto. For example, the first pattern SP1-A and the second pattern SP2-A can differ in area size, i.e., the area size of each of the first patterns SP1-A is larger than the area size of each of the second patterns SP2-A, and vice versa. In this embodiment, the first pattern SP1-A and the second pattern SP2-A have the same shape, except that the shape of the first pattern SP1-A is formed by rotating the second pattern SP2-A by a predetermined angle with a value between 0° and 180°. In this embodiment, the predetermined angle is 90°.

[0163] refer to Figure 8 The input sensor ISP-B1 according to an embodiment may include a first electrode TE1 (see Figure 5A ) and the second electrode TE2 (see Figure 5A The first electrode TE1 may include a first pattern SP1-B and a first bridge pattern BP1. The second electrode TE2 may include a second pattern SP2-B and a second bridge pattern BP2.

[0164] At least one of the first pattern SP1-B and the second pattern SP2-B may have a patterned hole passing through the annular structure at the center of the annular structure.

[0165] For example, the first pattern SP1-B may have a first pattern hole H1-B passing through the annular structure at the center of the annular structure. The first pattern hole H1-B may be defined by the inner surface of the first pattern SP1-B that is penetrated and exposed to the outside.

[0166] The second pattern SP2-B may have a second pattern hole H2-B passing through the annular structure at the center of the annular structure. The second pattern hole H2-B may be defined by the inner surface of the second pattern SP2-B that is penetrated and exposed to the outside.

[0167] According to an embodiment of the invention, patterns SP1-B and SP2-B respectively included in electrodes TE1 and TE2 may have pattern holes H1-B and H2-B penetrating patterns SP1-B and SP2-B, and therefore, the parasitic capacitance between adjacent patterns to which different signals are applied can be reduced. In an embodiment, the first pattern SP1-B and the second pattern SP2-B have the same area. The invention is not limited thereto. For example, the first pattern SP1-B and the second pattern SP2-B may differ in area size, i.e., the area size of each of the first patterns SP1-B is larger than the area size of each of the second patterns SP2-B, and vice versa. In an embodiment, the first pattern SP1-B and the second pattern SP2-B have the same shape, except that the shape of the first pattern SP1-B is a shape in which the second pattern SP2-B is rotated by a predetermined angle with a value between 0° and 180°. In an embodiment, the predetermined angle is 90°.

[0168] refer to Figure 9 The input sensor ISP-B2 according to an embodiment may include a first electrode TE1 (see Figure 5A ) and the second electrode TE2 (see Figure 5A The first electrode TE1 may include a first pattern SP1-B and a first bridge pattern BP1. The second electrode TE2 may include a second pattern SP2-B and a second bridge pattern BP2.

[0169] At least one of the first pattern SP1-B and the second pattern SP2-B may have a patterned hole passing through the annular structure at the center of the annular structure.

[0170] For example, the first pattern SP1-B may have a first pattern hole H1-B (see Figure 8 The annular structure passes through the center of the annular structure. The first pattern hole H1-B can be defined by the inner surface of the first pattern SP1-B that is penetrated and exposed to the outside.

[0171] The second pattern SP2-B may have a second pattern hole H2-B (see...) Figure 8 The annular structure passes through the center of the annular structure. The second pattern hole H2-B can be defined by the inner surface of the second pattern SP2-B that is penetrated and exposed to the outside.

[0172] The input sensor ISP-B2 may further include dummy patterns D1-B and D2-B. The first dummy pattern D1-B may be disposed in the first pattern aperture H1-B and electrically insulated from the first pattern SP1-B by being spaced apart. The first dummy pattern D1-B may be surrounded by the inner surface of the first pattern SP1-B defining the first pattern aperture H1-B.

[0173] The second dummy pattern D2-B can be disposed within the second pattern hole H2-B and electrically insulated from the second pattern SP2-B by being spaced apart. The second dummy pattern D2-B can be surrounded by the inner surface of the second pattern SP2-B defining the second pattern hole H2-B.

[0174] Dummy patterns D1-B and D2-B can be disposed within pattern holes H1-B and H2-B, and are spaced apart from the inner surfaces of patterns SP1-B and SP2-B respectively to insulate them from SP1-B and SP2-B, thereby preventing the shapes of patterns SP1-B and SP2-B from being visually recognized by the user. For ease of description, dummy patterns D1-B and D2-B are described as elements separate from patterns SP1-B and SP2-B. However, the first dummy pattern D1-B can be a part of the first pattern SP1-B, and the second dummy pattern D2-B can be a part of the second pattern SP2-B. In an embodiment, the first pattern SP1-B and the second pattern SP2-B have the same area. The invention is not limited thereto. For example, the first pattern SP1-B and the second pattern SP2-B can differ in area size, i.e., the area size of each of the first patterns SP1-B is larger than the area size of each of the second patterns SP2-B, and vice versa. In this embodiment, the first pattern SP1-B and the second pattern SP2-B have the same shape, except that the shape of the first pattern SP1-B is formed by rotating the second pattern SP2-B by a predetermined angle with a value between 0° and 180°. In this embodiment, the predetermined angle is 90°.

[0175] refer to Figure 10 The input sensor ISP-C according to an embodiment may include a first electrode TE1 (see Figure 5A ) and the second electrode TE2 (see Figure 5A The first electrode TE1 may include a first pattern SP1-C and a first bridge pattern BP1. The second electrode TE2 may include a second pattern SP2-C and a second bridge pattern BP2.

[0176] At least one of the first pattern SP1-C and the second pattern SP2-C may have a patterned hole passing through the annular structure at the center of the annular structure.

[0177] The first pattern SP1-C may have first pattern holes H1-C1 and H1-C2 passing through it. For example, the first pattern SP1-C may have a first type of first pattern SP1-C1 and a second type of first pattern SP1-C2, where the first type of first pattern SP1-C1 has a first pattern hole H1-C1 passing through the annular structure at its center, and the second type of first pattern SP1-C2 has a first pattern hole H1-C2 passing through the annular structure at its center. The first pattern holes H1-C1 and H1-C2 may be defined by the inner surfaces of the first type of first pattern SP1-C1 and the second type of first pattern SP1-C2, respectively, which are penetrated by the first pattern holes H1-C1 and H1-C2 and exposed to the outside.

[0178] The first pattern holes H1-C1 and H1-C2 may include a first small pattern hole H1-C1 and a first large pattern hole H1-C2. The first small pattern hole H1-C1 may have an area smaller than that of the first large pattern hole H1-C2. Each of the first patterns SP1-C2 of the second type disposed in the first row may have a first large pattern hole H1-C2, and each of the first patterns SP1-C1 of the first type disposed in the second row, spaced apart from the first patterns SP1-C2 of the second type disposed in the first direction DR1, may have a first small pattern hole H1-C1. The first row and the second row may be alternately disposed in the first direction DR1. In an embodiment, the area defined by the outer boundary of the first pattern SP1-C1 of the first type is the same as the area defined by the outer boundary of the first pattern SP1-C2 of the second type, but the area defined by the outer boundary and the inner boundary of the first pattern SP1-C1 of the first type is larger than the area defined by the outer boundary and the inner boundary of the first pattern SP1-C2 of the second type. The first pattern SP1-C1 of the first type can be arranged in a first column extending in the first direction DR1, and the first pattern SP1-C2 of the second type can be arranged in a second column extending in the first direction DR1. The first column of the first pattern SP1-C1 of the first type and the second column of the first pattern SP1-C2 of the second type can be arranged alternately in the second direction DR2.

[0179] However, embodiments of the present invention are not limited thereto. For example, three or more patterned holes with different areas can be defined, and patterned holes with different areas can be randomly arranged.

[0180] The second pattern SP2-C may have second pattern holes H2-C1 and H2-C2 passing through it. For example, the second pattern SP2-C may have a first type of second pattern SP2-C1 and a second type of second pattern SP2-C2, where the first type of second pattern SP2-C1 has a second pattern hole H2-C1 passing through the annular structure at its center, and the second type of second pattern SP2-C2 has a second pattern hole H2-C2 passing through the annular structure at its center. The second pattern holes H2-C1 and H2-C2 may be defined by the inner surfaces of the first type of second pattern SP2-C1 and the second type of second pattern SP2-C2, respectively, which are penetrated and exposed to the outside.

[0181] The second pattern holes H2-C1 and H2-C2 may include a second small pattern hole H2-C1 and a second large pattern hole H2-C2. The second small pattern hole H2-C1 may have an area smaller than that of the second large pattern hole H2-C2. Each of the second patterns SP2-C1 of the first type arranged in the first and fourth rows may have a second small pattern hole H2-C1, and each of the second patterns SP2-C2 of the second type arranged in the second and third rows, spaced apart from each other in the first direction DR1, may have a second large pattern hole H2-C2. The first to fourth rows may be repeated in the first direction DR1. In an embodiment, the area defined by the outer boundary of the second pattern SP2-C1 of the first type is the same as the area defined by the outer boundary of the second pattern SP2-C2 of the second type, but the area defined by the outer boundary and inner boundary of the second pattern SP2-C1 of the first type is larger than the area defined by the outer boundary and inner boundary of the second pattern SP2-C2 of the second type. The second pattern SP2-C1 of the first type and the second pattern SP2-C2 of the second type can be alternately arranged in a first column and a second column extending in a first direction DR1, with different orders of the second pattern SP2-C1 of the first type and the second pattern SP2-C2 of the second type. The first column and the second column can be alternately arranged in a second direction DR2. In an embodiment, the first pattern SP1-C1 of the first type and the second pattern SP2-C1 of the first type have the same area, and the first pattern SP1-C2 of the second type and the second pattern SP2-C2 of the second type have the same area. The invention is not limited thereto. For example, the first pattern SP1-C1 of the first type and the second pattern SP2-C1 of the first type can be different in size, that is, the area of ​​the first pattern SP1-C1 of the first type is larger than the area of ​​the second pattern SP2-C1 of the first type, and vice versa; and the first pattern SP1-C2 of the second type and the second pattern SP2-C2 of the second type can be different in size, that is, the area of ​​the first pattern SP1-C2 of the second type is larger than the area of ​​the second pattern SP2-C2 of the second type, and vice versa. In one embodiment, the first pattern SP1-C1 of the first type and the second pattern SP2-C1 of the first type have the same shape, except that the shape of the first pattern SP1-C1 of the first type is formed by rotating the second pattern SP2-C1 of the first type by a predetermined angle with a value between 0° and 180°. In this embodiment, the predetermined angle is 90°. In another embodiment, the first pattern SP1-C2 of the second type and the second pattern SP2-C2 of the second type have the same shape, except that the shape of the first pattern SP1-C2 of the second type is formed by rotating the second pattern SP2-C2 of the second type by a predetermined angle with a value between 0° and 180°.In this embodiment, the predetermined angle is 90°.

[0182] However, embodiments of the present invention are not limited thereto. For example, three or more patterned holes with different areas can be defined, and patterned holes with different areas can be randomly arranged.

[0183] refer to Figure 11 The input sensor ISP-D according to an embodiment may include a first electrode TE1 (see Figure 5A ) and the second electrode TE2 (see Figure 5A The first electrode TE1 may include a first pattern SP1-D and a first bridge pattern BP1. The second electrode TE2 may include a second pattern SP2-D and a second bridge pattern BP2.

[0184] The first pattern SP1-D may have a rectangular shape. In an embodiment, the rectangular shape has rounded corners. Each of the first patterns SP1-D may include a fifth side S5 and a sixth side S6. The fifth side S5 may extend in a first direction DR1, and the sixth side S6 may extend from the fifth side S5 in a second direction DR2. The fifth side S5 may have a shorter length than the sixth side S6.

[0185] The second pattern SP2-D may have a rectangular shape. In an embodiment, the rectangular shape has rounded corners. Each of the second patterns SP2-D may include a seventh side S7 and an eighth side S8. The seventh side S7 may extend in the second direction DR2, and the eighth side S8 may extend from the seventh side S7 in the first direction DR1. The seventh side S7 may have a shorter length than the eighth side S8.

[0186] exist Figure 6 In this design, the major axis of the input sensor ISP-A1 extends in the first direction DR1, and the minor axis of the input sensor ISP-A1 extends in the second direction DR2. In the first pattern SP1 included in the first electrode TE1 of the input sensor ISP-A1, the second side S2 extending in the first direction DR1 can also be larger than the first side S1 extending in the second direction DR2. However, in Figure 11 In the first pattern SP1-D, the fifth side S5 extending in the first direction DR1 may be smaller than the sixth side S6 extending in the second direction DR2.

[0187] Figure 12 This is a plan view illustrating a node of an input sensor according to an embodiment of the present invention. Figure 13 This is a plan view illustrating a node of an input sensor according to an embodiment of the present invention. Figure 14 This is a plan view illustrating a node of an input sensor according to an embodiment of the present invention.

[0188] refer to Figure 12 In node ND-1 according to the embodiment, the first pattern SP1-1 and the second pattern SP2-1 can be arranged in different quantities. For example, thirteen first patterns SP1-1 and twelve second patterns SP2-1 can be arranged in node ND-1. The first patterns SP1-1 and the second patterns SP2-1 can be arranged alternately along the first direction DR1 and the second direction DR2.

[0189] The first bridge pattern BP1-1 can connect the first patterns SP1-1 that are spaced apart from each other. The second bridge pattern BP2-1 can connect the second patterns SP2-1 that are spaced apart from each other.

[0190] refer to Figure 13 In node ND-2, the first pattern SP1-2 and the second pattern SP2-2 can be set in the same number. For example, nine first patterns SP1-2 and nine second patterns SP2-2 can be set in node ND-2. The first patterns SP1-2 and the second patterns SP2-2 can be alternately set in the first direction DR1 and the second direction DR2. Each of the first patterns SP1-2 and the second patterns SP2-2 can have a [missing information - likely a number or pattern]. Figure 5B The patterns SP1 and SP2 described herein are rotated approximately 45 degrees. The first patterns SP1-2 are respectively included in... Figure 5B The corresponding sides of the first side S1 and the second side S2 in the first pattern SP1 described herein can extend in the diagonal direction between the first direction DR1 and the second direction DR2. The second pattern SP2-2 is respectively included in... Figure 5B The corresponding sides of the third side S3 and the fourth side S4 in the second pattern SP2 described herein can extend in the diagonal direction between the first direction DR1 and the second direction DR2.

[0191] Some of the first pattern SP1-2 and the second pattern SP2-2, which are counted as the number of patterns SP1-2 and SP2-2 included in node ND-2, may be spaced apart from the area inside the dashed line defining node ND-2. The number of specific patterns SP1-2 and SP2-2 that partially overlap each other can be counted by adding them to other patterns SP1-2 and SP2-2 that face each other. For example, the first pattern SP1-2 arranged in the first row is counted as one pattern by adding it to the first pattern SP1-2 arranged in the fourth row, which are spaced apart from each other in the first direction DR1.

[0192] The first bridge pattern BP1-2 can connect the spaced-apart first patterns SP1-2 to each other. The second bridge pattern BP2-2 can connect the spaced-apart second patterns SP2-2 to each other.

[0193] refer to Figure 14 In node ND-3, the first pattern SP1-3 and the second pattern SP2-3 can be set in the same number. For example, sixteen first patterns SP1-3 and sixteen second patterns SP2-3 can be set in node ND-3. The first patterns SP1-3 and the second patterns SP2-3 can be alternately set in the first direction DR1 and the second direction DR2.

[0194] Each of the first pattern SP1-3 and the second pattern SP2-3 can have from Figure 5B The shapes of patterns SP1 and SP2 described herein are rotated approximately 45 degrees. The first patterns SP1-3 are respectively included in... Figure 5B The corresponding sides of the first side S1 and the second side S2 in the first pattern SP1 described herein can extend in the diagonal direction between the first direction DR1 and the second direction DR2. The second patterns SP2-3 are respectively included in... Figure 5B The corresponding sides of the third side S3 and the fourth side S4 in the second pattern SP2 described herein can extend in the diagonal direction between the first direction DR1 and the second direction DR2.

[0195] The first bridge pattern BP1-3 can connect the first patterns SP1-3 that are spaced apart from each other. The second bridge pattern BP2-3 can connect the second patterns SP2-3 that are spaced apart from each other.

[0196] Figure 15 This is a plan view illustrating a pattern of an input sensor according to an embodiment of the present invention. The same / similar reference numerals are used in conjunction with... Figure 5A and Figure 5B The components are the same as the components, and therefore, their repeated descriptions will be omitted.

[0197] refer to Figure 15 The input sensor ISP-E according to an embodiment may include a first electrode TE1 (see Figure 5A ) and the second electrode TE2 (see Figure 5A The first electrode TE1 may include a first pattern SP1-E and a first bridge pattern BP1-E. The second electrode TE2 may include a second pattern SP2-E and a second bridge pattern BP2-E.

[0198] The input sensor ISP-E may include multiple grid lines MSL. The grid lines MSL may include a first grid line MSL1 extending in the fourth direction DR4 and a second grid line MSL2 extending in the fifth direction DR5. The grid lines MSL may be provided in a grid pattern to provide grid openings MS-OP. The grid lines MSL can be... Figure 4 The non-emitting region NPXA described herein overlaps, and the grid opening MS-OP can overlap with the emitting region PXA. Therefore, even if an input sensor ISP-E is provided that is directly mounted on the display panel DP, an image can be provided without being affected by the pattern included in the input sensor ISP-E.

[0199] Each of the first pattern SP1-E and the second pattern SP2-E may include a main body TSP and protrusions TPP1 and TPP2. The outer boundary of the main body TSP is rectangular. Figure 15 In this illustration, the main body TSP and protrusions TPP1 and TPP2 included in the first pattern SP1-E are described as examples, but embodiments of the inventive concept are not limited thereto. For example, the main body TSP and protrusions TPP1 and TPP2 may also be applied to the second pattern SP2-E.

[0200] The main TSP can be with Figure 5B The first pattern SP1 corresponds to this. In an embodiment, the body TSP may have a body hole TH defined therein. The body hole TH may be formed by grid lines MSL and defined to pass through the body TSP.

[0201] Protrusions TPP1 and TPP2 may protrude from the edge of the body TPP. Protrusions TPP1 and TPP2 may include a first protrusion TPP1 and a second protrusion TPP2 extending from the body TPP and spaced apart from each other.

[0202] The first protrusion TPP1 can be connected to the first bridge pattern BP1-E. The second protrusion TTP2 can be spaced apart from the first bridge pattern BP1-E and the second bridge pattern BP2-E.

[0203] The first pattern SP1-E and the second pattern SP2-E, including the grid lines MSL, may include protrusions TPP1 and TPP2 disposed between the bridge patterns BP1-E and BP2-E and the main body TSP to reduce the length of each of the bridge patterns BP1-E and BP2-E. Therefore, protrusions TPP1 and TPP2, which prevent the bridge patterns BP1-E and BP2-E from breaking and have an area larger than that of the bridge patterns BP1-E and BP2-E, can be disposed between the main body TSP and the bridge patterns BP1-E and BP2-E to improve the limitations of the bridge patterns BP1-E and BP2-E being visually recognized by the user. An input sensor ISP-E with improved visibility can be provided.

[0204] Figure 16 It is along Figure 5B The cross-sectional view of the input sensor taken by line II-II'. Figure 17 It is along Figure 5B The cross-sectional view of the input sensor taken by line II-II'. Figure 18 It is along Figure 5B A cross-sectional view of the input sensor taken by line II-II'. Same / similar reference numerals are used with... Figures 1A to 5B The components are identical to the components, and therefore, their repeated descriptions will be omitted. (Reference) Figures 16 to 18 The described upper insulating layer TFL can be with Figure 4 The upper insulating layer TFL corresponds to this.

[0205] refer to Figure 16 According to an embodiment, the input sensor ISP-1 can be disposed on the top surface of the upper insulating layer TFL. In an embodiment, the input sensor ISP-1 is directly disposed on the top surface of the upper insulating layer TFL. The input sensor ISP-1 may include a first sensor insulating layer TIL1, a second sensor insulating layer TIL2, a third sensor insulating layer TIL3, and a plurality of patterns. In an embodiment of the present invention, the first sensor insulating layer TIL1 may be omitted.

[0206] The first sensor insulating layer TIL1 can be disposed on the upper insulating layer TFL. In an embodiment, the first sensor insulating layer TIL1 is disposed directly on the upper insulating layer TFL. The first pattern SP1 and the first bridge pattern BP1 are disposed on the first sensor insulating layer TIL1. The first bridge pattern BP1 can be disposed between the first patterns SP1. The first bridge pattern BP1 can connect the first patterns SP1 to each other.

[0207] A second sensor insulating layer TIL2 is disposed on the first sensor insulating layer TIL1 to cover the first pattern SP1 and the first bridge pattern BP1. The second pattern SP2 and the second bridge pattern BP2 may be disposed on the second sensor insulating layer TIL2. Although not shown in the cross-sectional view taken along line II-II', the second bridge pattern BP2 may be disposed between the second patterns SP2 to connect them to each other. The first bridge pattern BP1 may overlap with the second bridge pattern BP2, wherein the second sensor insulating layer TIL2 is located between the first bridge pattern BP1 and the second bridge pattern BP2.

[0208] A third sensor insulating layer TIL3 is disposed on the second sensor insulating layer TIL2 to cover the second pattern SP2 and the second bridge pattern BP2.

[0209] Figure 4 The first conductive layer ICL1 described herein may be composed of a first pattern SP1 and a first bridge pattern BP1, and the second conductive layer ICL2 may be composed of a second pattern SP2 and a second bridge pattern BP2.

[0210] refer to Figure 17 According to an embodiment, the input sensor ISP-2 can be directly disposed on the top surface of the upper insulating layer TFL. In this embodiment, the input sensor ISP-2 is directly disposed on the top surface of the upper insulating layer TFL. The input sensor ISP-2 may include a first sensor insulating layer TIL1, a second sensor insulating layer TIL2, a third sensor insulating layer TIL3, and a plurality of patterns. In an embodiment of the present invention, the first sensor insulating layer TIL1 may be omitted.

[0211] The first sensor insulating layer TIL1 can be disposed on the upper insulating layer TFL. For example, the first sensor insulating layer TIL1 is disposed directly on the upper insulating layer TFL. The first bridge pattern BP1 is disposed on the first sensor insulating layer TIL1. The first bridge pattern BP1 can overlap with at least a portion of the first pattern SP1.

[0212] A second sensor insulating layer TIL2 is disposed on the first sensor insulating layer TIL1 to cover the first bridge pattern BP1. The first pattern SP1, the second pattern SP2, and the second bridge pattern BP2 may be disposed on the second sensor insulating layer TIL2. Although not shown in the cross-sectional view taken along line II-II', the second bridge pattern BP2 may be disposed between the second patterns SP2 to connect the spaced-apart second patterns SP2 to each other. The first pattern SP1 may be configured to be spaced apart from the second patterns SP2 and the second bridge pattern BP2.

[0213] The first pattern SP1 can be connected to the first bridge pattern BP1 through the contact hole CH defined in the second sensor insulating layer TIL2.

[0214] A third sensor insulating layer TIL3 is disposed on the second sensor insulating layer TIL2 to cover the first pattern SP1, the second pattern SP2 and the second bridge pattern BP2.

[0215] Figure 4 The first conductive layer ICL1 described herein may be composed of a first bridge pattern BP1, and the second conductive layer ICL2 may be composed of a first pattern SP1, a second pattern SP2, and a second bridge pattern BP2.

[0216] refer to Figure 18 According to an embodiment, the input sensor ISP-3 can be disposed on the top surface of the upper insulating layer TFL. In an embodiment, the input sensor ISP-3 is directly disposed on the top surface of the upper insulating layer TFL. The input sensor ISP-3 may include a first sensor insulating layer TIL1, a second sensor insulating layer TIL2, a third sensor insulating layer TIL3, and a plurality of patterns. In an embodiment of the inventive concept, the first sensor insulating layer TIL1 may be omitted.

[0217] The first pattern SP1 of the input sensor ISP-3 (see) Figure 5B It includes a first lower pattern SP1-a, a first upper pattern SP1-b, and a first bridge pattern BP1. The first lower pattern SP1-a and the first upper pattern SP1-b may have the same shape. Therefore, on a plane, the first lower pattern SP1-a and the first upper pattern SP1-b can be visually recognized as a single pattern.

[0218] Second pattern SP2 (see) Figure 5B This includes a second lower pattern SP2-a, a second upper pattern SP2-b, and a second bridge pattern BP2. The second lower pattern SP2-a and the second upper pattern SP2-b can have the same shape. Therefore, on a plane, the second lower pattern SP2-a and the second upper pattern SP1-b can be visually recognized as a single pattern.

[0219] The first sensor insulating layer TIL1 can be directly disposed on the upper insulating layer TFL. In an embodiment, the first sensor insulating layer TIL1 is directly disposed on the upper insulating layer TFL. A first lower pattern SP1-a, a first bridge pattern BP1, and a second lower pattern SP2-a are disposed on the first sensor insulating layer TIL1. The first bridge pattern BP1 can connect the first lower patterns SP1-a to each other. The second lower pattern SP2-a can be spaced apart from the first lower pattern SP1-a and the first bridge pattern BP1.

[0220] The second sensor insulating layer TIL2 is disposed on the first sensor insulating layer TIL1 to cover the first lower pattern SP1-a, the first bridge pattern BP1, and the second lower pattern SP2-a.

[0221] A first upper pattern SP1-b, a second upper pattern SP2-b, and a second bridge pattern BP2 can be disposed on the second sensor insulating layer TIL2. Although not shown in the cross-sectional view taken along line II-II', the second bridge pattern BP2 can be disposed between the second upper patterns SP2-b to connect the second upper patterns SP2-b to each other. The first upper pattern SP1-b can be spaced apart from the second upper pattern SP2-b and the second bridge pattern BP2.

[0222] The first upper pattern SP1-b can be connected to the overlapping first lower pattern SP1-a through the first contact hole CH1 defined in the second sensor insulating layer TIL2. The second upper pattern SP2-b can be connected to the overlapping second lower pattern SP2-a through the second contact hole CH2 defined in the second sensor insulating layer TIL2.

[0223] Figure 4 The first conductive layer ICL1 described herein may be composed of a first lower pattern SP1-a, a first bridge pattern BP1, and a second lower pattern SP2-a, and the second conductive layer ICL2 may be composed of a first upper pattern SP1-b, a second upper pattern SP2-b, and a second bridge pattern BP2.

[0224] According to embodiments of the present invention, the patterns constituting the node can be alternately arranged to ensure signal uniformity based on the location of the input applied to the input sensor. Since multiple patterns are arranged in a single node, both active and passive signals are increased. Therefore, an electronic device including an input sensor with improved sensing sensitivity can be provided.

[0225] It will be apparent to those skilled in the art that various modifications and alterations can be made to this invention. Therefore, this disclosure is intended to cover such modifications and alterations, provided they fall within the scope of the appended claims and their equivalents.

[0226] Therefore, the scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be determined by the claims.

Claims

1. An electronic device, comprising: Display panel; and An input sensor is disposed on the display panel and includes a first electrode extending in a first direction, a second electrode extending in a second direction intersecting the first direction and insulated from the first electrode, a first sensing line connected to the first electrode, and a second sensing line connected to the second electrode. The first electrode includes: a plurality of first patterns spaced apart from each other, each of the plurality of first patterns including a first side and a second side longer than the first side; and a plurality of first bridge patterns, each of the plurality of first bridge patterns being disposed between a corresponding pair of adjacent first patterns among the plurality of first patterns. The second electrode includes: a plurality of second patterns spaced apart from each other, each of the plurality of second patterns including a third side and a fourth side longer than the third side; and a plurality of second bridge patterns, each of the plurality of second bridge patterns being disposed between corresponding pairs of adjacent second patterns. Wherein, the first side faces the fourth side. Wherein, the second side faces the third side, and Each of the plurality of first patterns and each of the plurality of second patterns are alternately arranged.

2. The electronic device according to claim 1, in, The first electrode and the second electrode intersect each other at the node region, and Specifically, a first number of first patterns among the plurality of first patterns and a second number of second patterns among the plurality of second patterns are set in the node area.

3. The electronic device according to claim 2, in, The first quantity of the first pattern and the second quantity of the second pattern are the same as each other.

4. The electronic device according to claim 2, in, The first quantity of the first pattern and the second quantity of the second pattern are different from each other.

5. The electronic device according to claim 1, in, The first side and the fourth side extend in the second direction, and The second side and the third side extend in the first direction.

6. The electronic device according to claim 5, in, The plurality of first bridge patterns and the plurality of second bridge patterns extend in a diagonal direction between the first direction and the second direction.

7. The electronic device according to claim 1, in, The first side and the fourth side extend along a first diagonal direction between the first direction and the second direction, and Wherein, the second side and the third side extend in a second diagonal direction that is different from the first diagonal direction between the first direction and the second direction.

8. The electronic device according to claim 1, in, The plurality of first patterns includes a first pattern having a first pattern hole, and The plurality of second patterns includes a second pattern having a second pattern hole.

9. The electronic device according to claim 8, further comprising: The first dummy pattern is located within the first pattern hole of the first pattern and is insulated from the first pattern. and The second dummy pattern is located within the second pattern hole of the second pattern and is insulated from the second pattern.

10. The electronic device according to claim 8, in, The plurality of first patterns includes a third pattern having a third pattern hole, and The first patterned hole and the third patterned hole have different areas.

11. The electronic device according to claim 1, in, The plurality of first patterns includes a first pattern having a first recessed portion that is recessed inward from the second side, and The plurality of second patterns includes a second pattern having a second recessed portion that is recessed inward from the fourth side.

12. The electronic device of claim 11, further comprising: The first dummy pattern is disposed in the first recess of the first pattern and is insulated from the first pattern; as well as The second dummy pattern is disposed in the second recess of the second pattern and is insulated from the second pattern.

13. The electronic device according to claim 1, in, Each of the plurality of first patterns and the plurality of second patterns includes a plurality of first grid lines extending in a first diagonal direction between the first direction and the second direction, a plurality of second grid lines extending in a second diagonal direction different from the first diagonal direction between the first direction and the second direction, and a plurality of grid openings defined by the plurality of first grid lines and the plurality of second grid lines.

14. The electronic device according to claim 13, wherein, Each of the plurality of first patterns includes: The main body, the outer boundary of which is rectangular; and The first protrusion protrudes from a first portion of the outer boundary of the body.

15. The electronic device according to claim 14, wherein, Each of the plurality of first patterns further includes: The second protrusion protrudes from a second portion of the outer boundary of the body and is spaced apart from the first protrusion. Wherein, the first protrusion is connected to the corresponding bridge pattern among the plurality of first bridge patterns, and The second protrusion is spaced apart from the plurality of first bridge patterns and the plurality of second bridge patterns.

16. The electronic device according to any one of claims 1-15, wherein, The display panel includes: basal layer; A circuit element layer is disposed on the substrate layer and includes transistors; The display element layer includes light-emitting elements connected to the transistor; and An upper insulating layer covers the display element layer. The input sensor is directly disposed on the upper insulating layer.

17. The electronic device according to any one of claims 1-15, wherein, The input sensor includes: A first sensor insulating layer is disposed on the display panel; A first conductive layer is disposed on the first sensor insulating layer; A second sensor insulating layer is disposed on the first sensor insulating layer to cover the first conductive layer; and The second conductive layer is disposed on the insulating layer of the second sensor.

18. The electronic device according to claim 17, in, The first conductive layer includes the plurality of first bridge patterns. The second conductive layer includes the plurality of first patterns, the plurality of second patterns, and the plurality of second bridge patterns, and Each of the plurality of first bridge patterns is connected to a corresponding pair of adjacent first patterns through a pair of corresponding contact holes passing through the insulating layer of the second sensor.

19. The electronic device according to claim 17, in, The plurality of first patterns includes a plurality of first upper patterns and a plurality of first lower patterns. Each of the plurality of first upper patterns vertically overlaps with a corresponding first lower pattern among the plurality of first lower patterns and has the same shape as the corresponding first lower pattern. Furthermore, each of the plurality of first bridge patterns connects a pair of adjacent first lower patterns among the plurality of first lower patterns. The plurality of second patterns includes a plurality of second upper patterns and a plurality of second lower patterns. Each of the plurality of second upper patterns vertically overlaps with a corresponding second lower pattern among the plurality of second lower patterns and has the same shape as the corresponding second lower pattern. Furthermore, each of the plurality of second bridge patterns connects a pair of adjacent second upper patterns among the plurality of second upper patterns. The first conductive layer includes the plurality of first lower patterns, the plurality of first bridge patterns, and the plurality of second lower patterns. The second conductive layer includes the plurality of first upper patterns, the plurality of second upper patterns, and the plurality of second bridge patterns.

20. The electronic device according to claim 19, in, Each of the plurality of first upper patterns is connected to the corresponding first lower pattern of the plurality of first lower patterns through a first contact hole passing through the second sensor insulating layer, and Each of the plurality of second upper patterns is connected to the corresponding second lower pattern of the plurality of second lower patterns through a second contact hole passing through the second sensor insulating layer.

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