Method of fabricating a semiconductor structure

Abstract

Embodiments of the present application provide a semiconductor structure manufacturing method, comprising: providing a substrate; forming a first mask layer with a first mask pattern on the substrate; etching the substrate to form an active region by taking the first mask layer as a mask; forming a plurality of discrete bit lines on the active region; forming a sacrificial layer between adjacent bit lines; forming a second mask layer with a second mask pattern on the sacrificial layer, and the first mask pattern and the second mask pattern are complementary; etching the sacrificial layer by taking the second mask layer and the bit lines as masks to form a plurality of contact hole structures. Embodiments of the present application are conducive to reducing the manufacturing cost of the semiconductor structure.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a method for fabricating a semiconductor structure. Background Technology

[0002] A photomask is a master image made of quartz material that can be used in semiconductor exposure processes. The manufacturing cost of a photomask includes not only the cost of raw materials such as quartz, but also the cost of using a photomask writer, the software and server costs for detecting photomask-related data, and the labor development costs, thus making the manufacturing cost of photomasks high.

[0003] The fabrication of semiconductor structures involves many steps, and the patterns of the mask layers often differ in different steps. Therefore, the photomasks required to fabricate the mask layers also vary. The more photomasks required, the higher the fabrication cost of the semiconductor structure. Summary of the Invention

[0004] This invention provides a method for fabricating a semiconductor structure, solving the problem of high manufacturing costs for semiconductor structures.

[0005] To address the aforementioned problems, embodiments of the present invention provide a method for fabricating a semiconductor structure, comprising: providing a substrate; forming a first mask layer having a first mask pattern on the substrate; etching the substrate using the first mask layer as a mask to form an active region; forming a plurality of discrete bit lines on the active region; forming a sacrificial layer between adjacent bit lines; forming a second mask layer having a second mask pattern on the sacrificial layer, wherein the first mask pattern and the second mask pattern are complementary; etching the sacrificial layer using the second mask layer and the bit lines as masks to form a plurality of contact structures.

[0006] In addition, the photomasks used to form the first mask pattern and the second mask pattern are the same.

[0007] In addition, the first mask pattern includes an elongated shape, and the second mask pattern includes an elongated opening.

[0008] In addition, the elongated pattern and the elongated opening are arranged in an array.

[0009] In addition, the elongated graphic and the elongated opening are the same in size and shape.

[0010] In addition, the projections of the elongated pattern and the elongated opening onto the substrate overlap.

[0011] Additionally, the bit line includes a capping layer located on top of the bit line, and the capping layer has etch selectivity with the sacrificial layer.

[0012] In addition, the first photomask pattern is formed using the first photomask and the second photomask; the second photomask pattern is formed using the first photomask and the second photomask.

[0013] Furthermore, the process of forming the first mask pattern using the first photomask and the second photomask includes: forming an unpatterned first mask layer on the substrate; forming a first photoresist line extending in a first direction on the first mask layer using the first photomask; etching the first mask layer using the first photoresist line to form the first mask line; forming a second photoresist line extending in a second direction on the first mask line using the second photomask; and etching the first mask line using the second photoresist line to form the elongated pattern.

[0014] Furthermore, the process of forming the second mask pattern using the first and second photomasks includes: forming an unpatterned second mask layer on the sacrificial layer; forming a third mask layer on the second mask layer; forming a first photoresist opening extending in a first direction on the third mask layer using the first photomask; etching the third mask layer using the first photoresist opening to form the first mask opening; forming a second photoresist opening extending in a second direction on the first mask opening using the second photomask; and etching the second mask layer using the second photoresist opening and the first mask opening to form the elongated opening.

[0015] In addition, the photoresist that forms the first photoresist line and the first photoresist opening has different properties; the photoresist that forms the second photoresist line and the second photoresist opening has different properties.

[0016] Additionally, a repair layer is formed on the sidewall of the elongated graphic.

[0017] In addition, the projection of the second mask pattern onto the substrate completely covers the projection of the first mask pattern onto the substrate.

[0018] In addition, the angle between the extension direction of the second mask pattern and the extension direction of the first mask pattern is less than 30 degrees.

[0019] In addition, the methods for forming the first mask pattern and the second mask pattern include one or a combination of a double pattern self-alignment process and a reverse double pattern self-alignment process.

[0020] Compared with the prior art, the technical solution provided by the embodiments of the present invention has the following advantages:

[0021] In the process of forming an active region by etching a substrate with a first mask layer having a first mask pattern, and in the process of forming a contact structure by etching a sacrificial layer with a second mask layer having a second mask pattern, since the first mask pattern and the second mask pattern are complementary, the same photomask can be used to prepare the first mask layer and the second mask layer. That is, the photomask used to form the active region and the contact structure is the same, so the manufacturing cost of the semiconductor structure can be reduced by reducing the number of photomasks prepared.

[0022] In addition, since the projections of the elongated pattern in the first mask pattern and the elongated opening in the second mask pattern onto the substrate overlap, the projections of the active region formed by etching the substrate with the first mask layer as the mask and the contact structure formed by etching the sacrificial layer with the second mask layer onto the substrate overlap, which is beneficial for the alignment of the active region and the contact structure.

[0023] Furthermore, since the bit line includes a capping layer, and the capping layer is located at the top of the bit line, it has etching selectivity with the sacrificial layer. When the sacrificial layer is etched using the second mask layer as a mask, the elongated opening of the second mask layer will expose not only the sacrificial layer located under the second mask layer, but also the capping layer. Since the capping layer and the sacrificial layer have etching selectivity, only the sacrificial layer exposed by the elongated opening will be etched. That is, one elongated opening can correspond to the formation of two contact hole structures on both sides of the same bit line. Attached Figure Description

[0024] One or more embodiments are illustrated by way of example with reference to the accompanying drawings. These illustrations do not constitute a limitation on the embodiments, and unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0025] Figure 1 This is a top view of the structure of the first mask layer in an embodiment of the present invention;

[0026] Figure 2 This is a schematic cross-sectional view of the first mask layer in an embodiment of the present invention;

[0027] Figure 3 This is a top view of the structure of the first mask pattern in an embodiment of the present invention;

[0028] Figures 4-11 This is a top view structural diagram of each step in forming the first mask pattern using the first photomask and the second photomask in an embodiment of the present invention;

[0029] Figure 12 This is a schematic cross-sectional view of the active region formed by etching the substrate in an embodiment of the present invention;

[0030] Figure 13 This is a top view schematic diagram of the active region with a potential line and a sacrificial layer formed in an embodiment of the present invention;

[0031] Figure 14 for Figure 13 A schematic diagram of a partial cross-sectional structure along the CC1 direction;

[0032] Figure 15 This is a top view schematic diagram of the structure with a second mask layer on the sacrificial layer in an embodiment of the present invention;

[0033] Figure 16 for Figure 15 A schematic diagram of a partial cross-sectional structure along the DD1 direction;

[0034] Figures 17-23 This is a top view structural diagram of each step in forming the second mask pattern using the first and second photomasks in an embodiment of the present invention;

[0035] Figure 24 This is a cross-sectional view of the contact hole structure formed in an embodiment of the present invention;

[0036] Figure 25 This is a cross-sectional structural diagram of the contact structure formed in an embodiment of the present invention. Detailed Implementation

[0037] As can be seen from the background technology, the manufacturing cost of semiconductor structures in the existing technology is high.

[0038] Specifically, in the process of fabricating a semiconductor structure, the first mask layer required to form the active region is different from the second mask layer required to form the contact structure. Furthermore, the first mask pattern of the first mask layer and the second mask pattern of the second mask layer are unrelated. Therefore, the photomasks required to fabricate the first and second mask layers are different. Because the fabrication cost of photomasks is high, the fabrication cost of semiconductor structures relying on photomasks is also high.

[0039] To address the aforementioned problems, embodiments of the present invention provide a method for fabricating a semiconductor structure. An active region is formed using a first mask layer with a first mask pattern as the mask etching substrate, and a contact structure is formed using a second mask layer with a second mask pattern and a capping layer for bit lines as the mask etching sacrificial layer. The first and second mask patterns are complementary, allowing the same photomask to be used to fabricate both layers. Therefore, the number of photomasks required can be reduced, thereby lowering the fabrication cost of the semiconductor structure.

[0040] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the various embodiments of the present invention will be described in detail below with reference to the accompanying drawings. However, those skilled in the art will understand that many technical details have been presented in the various embodiments of the present invention to enable the reader to better understand this application. However, the technical solutions claimed in this application can be implemented even without these technical details and various changes and modifications based on the following embodiments.

[0041] The manufacturing method of the semiconductor structure provided in this embodiment will be described in detail below with reference to the accompanying drawings.

[0042] refer to Figures 1 to 3 , Figure 1 This is a top view of the structure of the first mask layer. Figure 2 for Figure 1 A schematic diagram of the cross-sectional structure along the AA1 direction. Figure 3 This is a top view of the structure of the first mask pattern. A substrate 100 is provided, and a first mask layer 101 having a first mask pattern 111 is formed on the substrate 100.

[0043] In this embodiment, the substrate 100 is a silicon substrate. In other embodiments, the substrate may also be a semiconductor substrate such as a germanium substrate, a silicon germanide substrate, a silicon carbide substrate, or a silicon-on-insulator substrate.

[0044] The first mask pattern 111 is used to define the shape and location of the subsequently formed active regions. Specifically, in this embodiment, the first mask pattern 111 includes elongated patterns, and the first mask layer 101 has multiple elongated patterns arranged in an array. In the subsequent process steps for forming the active regions, the substrate 100 directly below the elongated pattern is not etched, while the substrate 100 directly below the area between adjacent elongated patterns is etched, thereby forming multiple active regions.

[0045] In this embodiment, the first mask layer 101 is a single-layer structure, and the material of the first mask layer 101 can be a hard mask material such as silicon oxide, silicon nitride, or titanium nitride. In other embodiments, the first mask layer can also be a stacked structure.

[0046] In this embodiment, a first photomask and a second photomask are used to form a first mask pattern. The steps for forming the first mask pattern will be described in detail below with reference to the accompanying drawings.

[0047] Figures 4-11 This is a schematic diagram of the structure corresponding to each step in forming the first mask pattern using the first photomask and the second photomask in this embodiment.

[0048] refer to Figure 4 An unpatterned first mask layer 101 is formed on the substrate 100.

[0049] Specifically, the first mask layer 101 is located on the substrate 100 and serves to provide a process basis for the subsequent formation of a patterned first mask layer. In this embodiment, the first mask layer 101 is a single-layer structure.

[0050] To improve the accuracy of graphic transmission, in this embodiment, a fourth mask layer 102 may be formed on the unpatterned first mask layer 101, and the material of the fourth mask layer 102 is different from the material of the first mask layer 101.

[0051] In the subsequent pattern transfer process, the first photoresist line formed subsequently has high etching selectivity with the fourth mask layer 102, the fourth mask layer 102 has high etching selectivity with the first mask layer 101, and the first mask layer 101 has high etching selectivity with the substrate 100, thereby improving the pattern accuracy of the active region formed in the first photoresist line formed subsequently to the substrate 100.

[0052] refer to Figure 5 and Figure 6 , Figure 5 This is a top view of the structure of the first photomask. Figure 6 A top view of a fourth mask layer having first photoresist lines is provided, and a first photomask 2 is provided; the first photoresist lines 103 extending in a first direction are formed on the first mask layer 101 using the first photomask 2.

[0053] The first photomask 2 has a first light-shielding area 21 and a first light-transmitting area 22. The positions of the first light-shielding area 21 and the first light-transmitting area 22 are related to the photoresist properties of the first photoresist line 103. Specifically, if the first photoresist line 103 is a positive photoresist, then the position of the first light-shielding area 21 corresponds to the position of the first photoresist line 103, and the first light-transmitting area 22 is used to define the positions of adjacent first photoresist lines; in other embodiments, if the first photoresist line is a negative photoresist, then the position of the first light-transmitting area corresponds to the position of the first photoresist line, and the first light-transmitting area is used to define the positions of adjacent first photoresist lines.

[0054] In this embodiment, taking the first photoresist line 103 as a positive photoresist as an example, the process steps for forming the first photoresist line 103 include: forming a photoresist film on the first mask layer 101; exposing the photoresist film using the first photomask 2, wherein the photoresist film has an exposed area and a non-exposed area, the exposed area is directly opposite the first light-transmitting area 22, and the non-exposed area is directly opposite the first light-shielding area 21, and the material properties of the photoresist film in the exposed area change during the exposure process; after the exposure process, a development process is performed to remove the photoresist film in the exposed area, thereby forming the first photoresist line 103.

[0055] It is understood that in other embodiments, the first photoresist line may also be a negative photoresist.

[0056] refer to Figure 7 and Figure 8 , Figure 7 for Figure 6 A schematic diagram of the cross-sectional structure along the BB1 ​​direction. Figure 8 This is a cross-sectional structural diagram of a substrate with a first mask line. The first mask line 121 is formed by etching the first mask layer 101 using the first photoresist line 103.

[0057] In this embodiment, since a fourth mask layer 102 is formed between the first photoresist line 103 and the first mask layer 101, the first photoresist line 103 is first used to etch the fourth mask layer 102 to transfer the pattern in the first photoresist line 103 to the fourth mask layer 102. Then, the fourth mask layer 102 is used to etch the first mask layer 101 to form the first mask line 121.

[0058] Since there is high etching selectivity between the first photoresist line 103 and the fourth mask layer 102, and between the fourth mask layer 102 and the first mask layer 101, the pattern precision of the first mask line 121 is high, which helps to improve the pattern consistency between the first mask line 121 and the first photoresist line 103.

[0059] In this embodiment, both the fourth mask layer 102 and the first mask layer 101 can be etched using dry etching to form the first mask line 121.

[0060] refer to Figure 9 and Figure 10 , Figure 9 This is a top view of the structure of the second photomask. Figure 10 A top view of the structure of the first mask line having a second photoresist line is provided, and a second photomask 3 is provided; the second photoresist line 104 extending in a second direction is formed on the first mask line 121 using the second photomask 3.

[0061] The second photomask 3 has a second light-shielding area 31 and a second light-transmitting area 32. The positions of the second light-shielding area 31 and the second light-transmitting area 32 are related to the photoresist properties of the second photoresist line 104. Specifically, if the second photoresist line 104 is a positive photoresist, then the position of the second light-shielding area 31 corresponds to the position of the second photoresist line 104, and the second light-transmitting area 32 is used to define the positions of adjacent second photoresist lines 104; in other embodiments, if the second photoresist line is a negative photoresist, then the position of the second light-transmitting area corresponds to the position of the second photoresist line, and the second light-shielding area is used to define the positions of adjacent second photoresist lines.

[0062] In this embodiment, taking the second photoresist line 104 as a positive photoresist as an example, the process steps for forming the second photoresist line 104 include: forming a photoresist film on the first mask line 121 and in the interval between adjacent first mask lines 121; exposing the photoresist film using the second photomask 3, wherein the photoresist film has an exposed area and a non-exposed area, the exposed area is directly opposite the second light-transmitting area 32, and the non-exposed area is directly opposite the second light-shielding area 31, and the material properties of the photoresist film in the exposed area change during the exposure process; after the exposure process, a development process is performed to remove the photoresist film in the exposed area, thereby forming the second photoresist line 104.

[0063] It is understood that in other embodiments, the second photoresist line may also be a negative photoresist.

[0064] Reference Figure 10 and Figure 3 The first mask line 121 is etched using the second photoresist line 104 to form a long strip pattern.

[0065] In this embodiment, the process steps for forming the elongated pattern include: etching the fourth mask layer 102 between adjacent second photoresist lines 104 using the second photoresist lines 104 (reference). Figure 8 Then, using the remaining fourth mask layer 102 as a mask, the first mask layer 101 is etched (see reference). Figure 8 Remove the second photoresist line 104 and the remaining fourth mask layer 102 to form a strip-shaped pattern.

[0066] refer to Figure 11 , Figure 11 This is a cross-sectional schematic diagram of a long strip-shaped graphic with a repair layer on its sidewall, where the repair layer 105 is formed on the sidewall of the long strip-shaped graphic.

[0067] In this embodiment, the process steps for forming the repair layer 105 include: forming an initial repair layer on the top and in the gaps of the elongated pattern, wherein the initial repair layer fills the gaps of the elongated pattern; removing a portion of the initial repair layer, retaining the initial repair layer on the sidewalls and top of the elongated pattern, to form the repair layer 105, so that subsequent processes using a first mask pattern 111 (reference) Figure 2 The first mask layer 101 (reference) Figure 2 When etching the substrate 100 to form the active region for the mask, the edges of the active region are relatively rounded. In other embodiments, only the initial repair layer of the elongated pattern sidewalls can be retained to form the repair layer.

[0068] In this embodiment, the repair layer 105 and the substrate 100 have high etching selectivity, allowing the first mask pattern 111 with the repair layer 105 to be accurately transferred onto the substrate 100. The material of the repair layer 105 includes silicon oxide, and the thickness of the repair layer 105 is 0.1 nm to 5 nm. (Reference) Figure 11 and Figure 12 With a first mask pattern 111 (reference) Figure 2 The first mask layer 101 (reference) Figure 2 The active region 106 is formed by etching the substrate 100 for masking.

[0069] In this embodiment, during the step of forming the active region 106, since adjacent elongated patterns are staggered, the spacing between adjacent elongated patterns is unequal. When the spacing between adjacent elongated patterns is small, the pattern distribution is dense, and the etched opening width of this region is small; when the spacing between adjacent elongated patterns is large, the pattern distribution is sparse, and the etched opening width of this region is large. As the etching depth increases, the renewal rate of effective reactive components in the region with a smaller etched opening width decreases, resulting in a decrease in the etching rate.

[0070] Specifically, etching proceeds smoothly when the volatile components generated during etching are discharged from the deep trench, and sufficient effective reactive components enter the trench to replenish the consumed portion. However, as the etching depth increases, and when the width of the etching opening is small, the rate of volatile component discharge slows down, the rate of effective reactive component renewal slows down, and thus the etching rate decreases. Consequently, within the same etching time, the area with a dense pattern distribution is etched to a less depth than the area with a sparse pattern distribution.

[0071] In this embodiment, the substrate 100 is etched using dry etching, and after the substrate 100 is etched, the first mask layer 101 is removed (see reference). Figure 2 If ), then an active region of 106 is formed.

[0072] refer to Figure 13 and Figure 14 , Figure 13 This is a top view schematic diagram of the potential line and sacrificial layer formed on the active region. Figure 14 for Figure 13 A partial cross-sectional structural diagram along the CC1 direction shows that several discrete bit lines 107 are formed on the active region 106.

[0073] In this embodiment, before forming the bit line 107, an isolation structure 118 and a word line 128 are formed in the active region 106. In this embodiment, the formed bit line 107 includes a capping layer 117, a sidewall protective layer 127, and a bit line conductive layer 137. The capping layer 117 is located at the top of the bit line 107, and the capping layer 117 and the subsequently formed sacrificial layer have etching selectivity. Therefore, when the elongated opening in the second mask layer 109 is used to etch the sacrificial layer and capping layer 117 directly below it, the sacrificial layer 1 can be selectively etched to form a contact hole structure, so that one elongated opening can correspond to two contact hole structures on both sides of the same bit line 107. Furthermore, the capping layer 117 can also be located on the sidewall of the bit line 107 and the surface of the active region 106. When the contact hole structure 40 is subsequently formed, the capping layer 117 on the surface of the active region 106 needs to be removed so that the formed contact structure can directly contact the active region 106.

[0074] refer to Figure 14 A sacrificial layer 108 is formed between adjacent bit lines 107.

[0075] In this embodiment, the material forming the sacrificial layer 108 includes silicon dioxide, and the sacrificial layer 108 is also located above the bit line 107. In other embodiments, the top of the sacrificial layer may also be flush with the top of the bit line.

[0076] refer to Figure 15 and Figure 16 , Figure 15 This is a top view schematic diagram of a structure with a second mask layer on the sacrificial layer. Figure 16 for Figure 15 A partial cross-sectional structural schematic diagram along the DD1 direction. A second mask layer 109 with a second mask pattern 119 is formed on the sacrificial layer 108, and the first mask pattern 111 (reference) Figure 3 The first mask pattern 111 and the second mask pattern 119 are complementary. Specifically, the first mask pattern 111 and the second mask pattern 119 have approximately the same size and shape, but the properties of the mask patterns are opposite. For example, the first mask pattern 111 is the mask retained after etching the first mask layer 101, and the second mask pattern 119 is the opening formed by etching the second mask layer 109.

[0077] The second mask pattern 119 is used to define the pattern and position of the subsequently formed contact hole structure. Specifically, in this embodiment, the second mask pattern 119 includes elongated openings, and multiple elongated openings are arranged in an array. In the subsequent process steps of forming the contact hole structure, the sacrificial layer 108 directly below the elongated opening is etched, while the sacrificial layer 108 directly below the area between adjacent elongated openings is not etched, thereby forming multiple contact hole structures corresponding to the active area.

[0078] Long strip-shaped graphic (reference) Figure 3 The size and shape of the elongated pattern and the elongated opening are consistent, and the elongated pattern and the elongated opening are at 100 (reference) on the base. Figure 1 The projections on the substrate 100 coincide. In this embodiment, the elongated pattern and the elongated opening overlap. Figure 1 The projection onto the surface is an orthographic projection.

[0079] In this embodiment, a second mask pattern is also formed using a first photomask and a second photomask. The steps for forming the second mask pattern will be described in detail below with reference to the accompanying drawings.

[0080] Figures 17-23 This is a schematic diagram of the structure corresponding to each step in forming the second mask pattern using the first and second photomasks in this embodiment.

[0081] refer to Figure 17 An unpatterned second mask layer 109 is formed on the sacrificial layer 108.

[0082] Specifically, the second mask layer 109 is located on the sacrificial layer 108 and serves to provide a process basis for the subsequent formation of a patterned second mask layer. Furthermore, the material of the second mask layer 109 can be a hard mask material such as silicon oxide, silicon nitride, or titanium nitride.

[0083] In order to form a second mask layer 109 having a second mask pattern 119, in this embodiment, a third mask layer 118 is also formed on the second mask layer 109, and the material of the third mask layer 118 is different from the material of the second mask layer 109.

[0084] refer to Figure 18 and Figure 19 , Figure 18 This is a top view of the fourth mask layer with the first photoresist opening. Figure 19 for Figure 18 A cross-sectional structural diagram along the FF1 direction is provided, showing the first photomask 2 (reference). Figure 5 The first photoresist opening 129 extending in the first direction is formed on the third mask layer 118 using the first photomask 2.

[0085] The first photomask 2 includes a first light-blocking area 21 and a first light-transmitting area 22. In this embodiment, a first photoresist line 103 is formed (see reference). Figure 6 The photoresist properties of the first photoresist opening 129 and the first photoresist line 103 are different. Therefore, the first photoresist opening 129 and the first photoresist line 103 are parallel to the substrate 100 (reference). Figure 1 The surfaces are in the same position.

[0086] Specifically, the first photoresist opening 129 is located in the photoresist 139. In this embodiment, the aforementioned first photoresist line is a positive photoresist, and correspondingly, the photoresist 139 forming the first photoresist opening 129 is a negative photoresist.

[0087] The steps of forming the first photoresist opening 129 include: forming a covering photoresist 139, the photoresist 139 having an exposed area and a non-exposed area; exposing the photoresist 139 using a first photomask 2, the first light-transmitting area 22 corresponding to the exposed area and the first light-shielding area 21 corresponding to the non-exposed area, during the exposure process, the material properties of the photoresist 139 in the exposed area change; after the exposure process, performing a development process to remove the photoresist 139 in the non-exposed area, that is, removing the photoresist 139 corresponding to the first light-shielding area 21, thus forming the first photoresist opening 129.

[0088] It should be noted that, in other embodiments, the photoresist forming the first photoresist line can be a negative photoresist, and the photoresist forming the first photoresist opening can be a positive photoresist.

[0089] Reference 20 and Figure 21 , Figure 20 This is a top view of the third mask layer after etching. Figure 21 for Figure 20 A cross-sectional view along the EE1 direction shows that the first mask opening 149 is formed by etching the third mask layer 118 using the first photoresist opening 129.

[0090] In this embodiment, the process steps for forming the first mask opening 149 include: etching the third mask layer 118 using the photoresist 139 that forms the first photoresist opening 129 as a mask, so that the third mask layer 118 has the first mask opening 149.

[0091] In this embodiment, the first mask opening 149 and the aforementioned first photoresist line 103 (reference) Figure 6 All of them are directly opposite the first light-shielding area 21, so the size and shape of the first mask opening 149 and the first photoresist line 103 are consistent, and are on the substrate 100 (reference). Figure 1 The projections on the substrate 100 coincide. In this embodiment, the first mask opening 149 and the first photoresist line 103 overlap on the substrate 100 (reference). Figure 1 The projection onto the surface is an orthographic projection.

[0092] refer to Figures 22 to 23 , Figure 22 This is a top view of the first mask opening, which has a second photoresist opening. Figure 23 for Figure 22A cross-sectional view along the GG1 direction shows a second photomask 3, which forms a second photoresist opening 159 extending in the second direction on the first mask opening 149.

[0093] The second photomask 3 includes a second light-blocking area 31 and a second light-transmitting area 32.

[0094] In this embodiment, the second photoresist line 104 is formed (reference). Figure 10 The photoresist properties of the second photoresist opening 159 are also different. Specifically, in this embodiment, the photoresist forming the second photoresist line 104 is a positive photoresist, and the photoresist forming the second photoresist opening 159 is a negative photoresist.

[0095] The process steps for forming the second photoresist opening include: forming a covering photoresist 139, which has an exposed area and a non-exposed area; exposing the photoresist 139 using a second photomask 3, wherein the second light-transmitting area 32 corresponds to the exposed area and the second light-shielding area 31 corresponds to the non-exposed area, and the material properties of the photoresist 139 in the exposed area change during the exposure process; and performing a development process after the exposure process to remove the photoresist 139 in the non-exposed area, i.e., removing the photoresist 139 corresponding to the second light-shielding area 31, thereby forming the second photoresist opening 159.

[0096] It should be noted that, in other embodiments, the photoresist forming the second photoresist line can be a negative photoresist, and the photoresist forming the second photoresist opening can be a positive photoresist.

[0097] In this embodiment, the photoresist 139 in the exposure area is also located in a portion of the first mask opening 149, so that when the second mask layer 109 is subsequently etched using the second photoresist opening 159 and the first mask opening 149 as masks, a layer can be formed as shown in the image. Figure 15 The image shows long, narrow openings.

[0098] In this embodiment, the second photoresist opening 159 and the aforementioned second photoresist line 104 (reference) Figure 10 Both are directly opposite the second light-shielding area 31, therefore the second photoresist opening 159 and the second photoresist line 104 are the same size and shape, and are on the substrate 100 (reference). Figure 1 The projections on the substrate 100 coincide. In this embodiment, the second photoresist opening 159 and the second photoresist line 104 overlap on the substrate 100 (reference). Figure 1 The projection onto the surface is an orthographic projection.

[0099] refer to Figure 16 and Figure 23 The second mask layer 109 is etched using the second photoresist opening 159 and the first mask opening 149 to form an elongated opening.

[0100] Specifically, when etching the second mask layer 109 using the combined pattern of the second photoresist opening 159 and the first mask opening 149 as a mask, the opening at the overlap of the second photoresist opening 159 and the first mask opening 149 exposes the second mask layer 109 directly below it, and the second mask layer 109 at that location is etched away, forming a shape as shown in the image. Figure 15 The elongated opening shown.

[0101] In this embodiment, since the first mask opening 149 is the same size and shape as the first photoresist line 103, and on the substrate 100 (reference) Figure 1 The projections on the substrate 100 coincide, and the second photoresist opening 159 and the second photoresist line 104 are the same in size and shape, and are on the substrate 100 (reference). Figure 1 The projections on the substrate 100 coincide, thus the subsequent elongated pattern and elongated opening are the same in size and shape, and are on the substrate 100 (reference). Figure 1 The projections on the plane coincide.

[0102] In this embodiment, the sidewall of the elongated graphic has a repair layer 105 (reference). Figure 11 Then, with a repair layer 105 (reference) Figure 11 The first mask layer 101 (reference) Figure 2 ) is used for mask etching of substrate 100 (reference) Figure 1 ) Formation of active region 106 (reference) Figure 13 When ), the active region is 106 (reference). Figure 13 The size of the pattern is larger than the size of the elongated opening, but the active area is 106 (reference). Figure 13 ) on substrate 100 (reference) Figure 1 The projection on the substrate 100 (reference) completely covers the elongated opening. Figure 1 The projection on the surface facilitates the subsequent formation of the contact hole structure and the active region 106 (reference). Figure 13 () alignment.

[0103] refer to Figure 16 and Figure 24 Using the second mask layer 109 and bit line 107 as a mask, the sacrificial layer 108 is etched to form multiple contact hole structures 40.

[0104] In this embodiment, the sacrificial layer 108 is etched using dry etching, and the entire sacrificial layer 108 located directly below the elongated opening is etched away to form the contact hole structure 40.

[0105] In this embodiment, a first mask layer 101 with a first mask pattern 111 is prepared using a first photomask 2 and a second photomask 3. The active region 106 of the semiconductor structure is prepared using the first mask layer 101. A second mask layer 109 with a second mask pattern 119 is prepared again using the first photomask 2 and the second photomask 3. The contact hole structure 40 of the semiconductor structure is prepared using the second mask layer 109. This reduces the number of photomasks required to prepare the active region 106 and the contact hole structure 40 of the semiconductor structure, thereby reducing the manufacturing cost of the semiconductor structure.

[0106] Furthermore, due to the complementarity of the first mask pattern 111 and the second mask pattern 119, the size and shape of the subsequently formed elongated patterns and elongated openings are consistent, and on the substrate 100 (reference) Figure 1 The projections on the second mask layer 109 coincide, which is beneficial for the alignment of the active region 106 and the contact hole structure 40 formed subsequently. Furthermore, an elongated opening in the second mask layer 109 can be used to form two contact hole structures 40 on both sides of the same position line 107.

[0107] In other embodiments, the size of the second mask pattern 119 is larger than that of the first mask pattern 111, such that the projection of the second mask pattern 119 onto the substrate 100 completely covers the projection of the first mask pattern 111 onto the substrate 100. This increases the opening size of the subsequently formed contact hole structure 40, increasing the contact area between the contact structure and the active region 106 while also increasing the process window for forming the contact structure. Specifically, the size of the second mask pattern 119 can be adjusted by fine-tuning the photolithography or etching process conditions, making the size of the second mask pattern 119 slightly larger than that of the first mask pattern 111. For example, this can be achieved by increasing the exposure energy or extending the etching time.

[0108] In other embodiments, the angle between the extending direction of the second mask pattern 119 and the extending direction of the first mask pattern 111 is less than 30 degrees. By adjusting the rotation angle of the first and second photomasks during exposure, the angle between the extending direction of the formed second mask pattern 119 and the extending direction of the first mask pattern 111 can be adjusted, making the position of the subsequently formed contact hole structure 40 on the active region 106 adjustable, further increasing the flexibility of the process.

[0109] In other embodiments, the first mask pattern 111 and the second mask pattern 109 can also be formed by a double pattern self-alignment (SADP) process and a reverse double pattern self-alignment (Reverse-SADP) process. For example, the first mask pattern 111 is formed by overlapping etching of a first mask pattern formed by a Reverse-SADP process and a second mask pattern formed by a Reverse-SADP process; the second mask pattern 109 is formed by overlapping etching of a second mask pattern formed by an SADP process and a second mask pattern formed by an SADP process; the photomasks used to form the first mask pattern and the second mask pattern are the same, and the photomasks used to form the first mask pattern and the second mask pattern are the same.

[0110] In this embodiment, since bit line 107 includes capping layer 117, capping layer 117 is located at the top of bit line 107 and capping layer 117 and sacrificial layer 108 have etching selectivity, when the elongated opening in the second mask layer 109 is used to etch the sacrificial layer 108 and capping layer 117 directly below it, the sacrificial layer 108 can be selectively etched to form contact hole structure 40, so that one elongated opening can correspond to the formation of two contact hole structures 40 on both sides of the same bit line 107.

[0111] refer to Figure 25 In this embodiment, an initial first conductive layer is filled into the contact hole structure, the initial conductive layer completely fills the contact hole structure, and the top of the initial first conductive layer is flush with the top of the sacrificial layer 108; the sacrificial layer 108 and the first conductive layer are mechanically ground so that the tops of the sacrificial layer 108 and the first conductive layer are flush with the capping layer 117; the initial first conductive layer is etched to form a first conductive layer 41; a diffusion barrier layer 42 and a second conductive layer 43 are sequentially formed on the first conductive layer 41 to form a contact structure.

[0112] In this embodiment, the material of the first conductive layer includes polycrystalline silicon, the material of the diffusion barrier layer includes titanium nitride, and the material of the second conductive layer includes tungsten.

[0113] Those skilled in the art will understand that the above embodiments are specific examples of implementing the present invention, and in practical applications, various changes in form and detail can be made without departing from the spirit and scope of the present invention. Any person skilled in the art can make their own modifications and alterations without departing from the spirit and scope of the present invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A method for fabricating a semiconductor structure, characterized in that, include: Provide a base; A first mask layer with a first mask pattern is formed on the substrate, and the substrate is etched using the first mask layer as a mask to form an active region; Several discrete bit lines are formed on the active region; A sacrificial layer is formed between adjacent bit lines; A second mask layer having a second mask pattern is formed on the sacrificial layer, wherein the first mask pattern and the second mask pattern are complementary; The sacrificial layer is etched using the second mask layer and the bit line as a mask to form a plurality of contact hole structures.

2. The method for fabricating a semiconductor structure according to claim 1, characterized in that, The photomasks used to form the first mask pattern and the second mask pattern are the same.

3. The method for fabricating a semiconductor structure according to claim 2, characterized in that, The first mask pattern includes an elongated shape, and the second mask pattern includes an elongated opening.

4. The method for fabricating a semiconductor structure according to claim 3, characterized in that, The elongated shapes and the elongated openings are arranged in an array.

5. The method for fabricating a semiconductor structure according to claim 4, characterized in that, The elongated graphic and the elongated opening are the same size and shape.

6. The method for fabricating a semiconductor structure according to claim 4, characterized in that, The projections of the elongated pattern and the elongated opening onto the substrate overlap.

7. The method for fabricating a semiconductor structure according to claim 1, characterized in that, The bit line includes a capping layer located on top of the bit line, and the capping layer has etch selectivity with the sacrificial layer.

8. The method for fabricating a semiconductor structure according to claim 3, characterized in that, The first mask pattern is formed using a first photomask and a second photomask; the second mask pattern is formed using the first photomask and the second photomask.

9. The method for fabricating a semiconductor structure according to claim 8, characterized in that, The process of forming the first mask pattern using a first photomask and a second photomask includes: An unpatterned first mask layer is formed on the substrate; A first photoresist line extending in a first direction is formed on the first mask layer using a first photomask; The first mask line is formed by etching the first mask layer using the first photoresist line; A second photoresist line extending in a second direction is formed on the first mask line using a second photomask; The elongated pattern is formed by etching the first mask lines using the second photoresist lines.

10. The method for fabricating a semiconductor structure according to claim 9, characterized in that, The process of forming the second mask pattern using a first photomask and a second photomask includes: An unpatterned second mask layer is formed on the sacrificial layer; A third mask layer is formed on the second mask layer; A first photoresist opening extending in a first direction is formed on the third mask layer using a first photomask; The first mask opening is formed by etching the third mask layer using the first photoresist opening. A second photoresist opening extending in a second direction is formed on the opening of the first photomask using a second photomask; The elongated opening is formed by etching the second mask layer using the second photoresist opening and the first mask opening.

11. The method for fabricating a semiconductor structure according to claim 10, characterized in that, The photoresist that forms the first photoresist line and the first photoresist opening has different properties; The photoresist that forms the second photoresist lines and the second photoresist openings has different properties.

12. The method for fabricating a semiconductor structure according to claim 3, characterized in that, Also includes: A repair layer is formed on the sidewall of the elongated graphic.

13. The method for fabricating a semiconductor structure according to claim 2, characterized in that, The projection of the second mask pattern onto the substrate completely covers the projection of the first mask pattern onto the substrate.

14. The method for fabricating a semiconductor structure according to claim 2, characterized in that, The angle between the extension direction of the second mask pattern and the extension direction of the first mask pattern is less than 30 degrees.

15. The method for fabricating a semiconductor structure according to claim 2, characterized in that, The method for forming the first mask pattern and the second mask pattern includes one or a combination of a double pattern self-alignment process and a reverse double pattern self-alignment process.

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