Frame transfer CCD with multi-p-well structure and manufacturing method thereof
By making multiple p-well structures with different doping concentrations and junction depths on the N-type silicon substrate material, the problem of difficulty in optimizing the doping distribution of each region of the frame transfer CCD in the prior art is solved, and the device performance is improved and the halo resistance is enhanced.
Patent Information
- Application Number
- CN202111545999.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-12-16
- Publication Date
- 2025-03-28
- Estimated Expiration
- 2041-12-16
AI Technical Summary
The existing frame transfer CCD made on N-type silicon substrates is difficult to optimize the doping distribution of the photosensitive region, memory region, horizontal CCD and output amplifier region separately, resulting in limited device performance.
By making multiple p-well structures on the N-type silicon substrate material, including the first, second and third p-wells, the doping concentration and junction depth of each region are different, thereby achieving the depletion voltage difference of each region and optimizing the doping distribution of each region separately.
The doping distribution optimization of each area of the frame transfer CCD is achieved, the device performance is improved, and the stability and anti-halo ability of the photosensitive area, memory area and other areas under different bias voltage conditions are ensured.
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Figure CN114220827B_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of frame transfer CCD, and relates to a frame transfer CCD with a multi-p-well structure and a manufacturing method thereof. Background Art
[0002] As an important branch of area array CCD, frame transfer CCD based on N-type silicon substrate has been widely used in photoelectric imaging fields such as astronomical observation and space remote sensing. The existing frame transfer CCD based on N-type silicon substrate is made of single p-well on N-type silicon substrate. Figure 1 and Figure 2 As shown, the frame transfer CCD architecture of a single p-well structure in the prior art is made based on an N-type silicon substrate material. A frame transfer CCD with a single p-well is made on the N-type substrate material. The frame transfer CCD is composed of a single p-well. As can be seen from the figure, the photosensitive area, storage area, horizontal CCD and output amplifier area of the frame transfer CCD are all located in the p-well. The p-well doping distribution in each area is the same, making it difficult to optimize the doping distribution of the photosensitive area, storage area, horizontal CCD and output amplifier area separately, which is not convenient for improving device performance. Summary of the invention
[0003] In view of this, an object of the present invention is to provide a frame transfer CCD with a multi-p-well structure and a manufacturing method thereof, so as to meet the application requirements of a camera imaging system with a CCD image sensor as a core component.
[0004] In order to achieve the above object, the present invention provides the following technical solutions:
[0005] A method for manufacturing a frame transfer CCD with a multi-p-well structure comprises the following steps:
[0006] S1, take an N-type silicon substrate material for making a frame transfer CCD;
[0007] S2, performing a boron ion implantation process on the horizontal CCD region, the dummy region and the output amplifier region of the silicon substrate material to form a first p-well with a high doping concentration;
[0008] S3, using a push-junction process to push the first p-well to form a first p-well with a deep junction and a high doping concentration;
[0009] S4, performing a boron ion implantation process in the photosensitive region and the storage region of the silicon substrate material to form a second p-well penetrating the photosensitive region and the storage region; the doping concentration of the second p-well is less than that of the first p-well;
[0010] S5, placing the silicon substrate material in a high temperature environment and performing a push-junction process to push the junction of the second p-well, and simultaneously pushing the junction of the first p-well again, wherein the junction depth of the second p-well is smaller than that of the first p-well;
[0011] S6, implanting boron ions into the second p-well in the storage area to form a third p-well that penetrates the storage area; the doping concentration of the third p-well is greater than that of the second p-well, and the junction depth of the third p-well is less than that of the second p-well;
[0012] S7. Fabricate a frame transfer CCD on a silicon substrate material.
[0013] Furthermore, in the step S2, a first p-well is formed by a boron ion implantation process with an implantation energy of 1.0 MeV to 2.0 MeV, and the doping concentration of the formed first p-well is 1e15 cm -3 ~1e16cm -3 .
[0014] Furthermore, in the step S3, the silicon substrate material is placed in a high temperature environment of 1100° C. to 1200° C. to perform a push-bonding process, and the push-bonding time is 8 h to 10 h.
[0015] Furthermore, after the junction-pushing process in step S3, the junction depth of the first p-well is 5 μm to 8 μm.
[0016] Furthermore, in the step S4, a second p-well is formed by a boron ion implantation process with an implantation energy of 1.0 MeV to 2.0 MeV, and the doping concentration of the formed second p-well is 5e14 cm -3 ~1e15cm -3 .
[0017] Furthermore, in the step S5, the silicon substrate material is placed in a high temperature environment of 1100° C. to 1200° C. to perform a push-bonding process, and the push-bonding time is 2 h to 3 h.
[0018] Furthermore, after the junction-pushing process in step S5, the junction depth of the second p-well is 2.5 μm to 3.5 μm, and the junction depth of the first p-well is 8 μm to 8.5 μm.
[0019] Furthermore, in the step S6, a third p-well is formed by a boron ion implantation process with an implantation energy of 200keV to 300keV, the junction depth of the third p-well is 1.5μm to 2.0μm, and the doping concentration is 1e15cm -3 ~1e16cm -3 .
[0020] A frame transfer CCD with a multi-p-well structure comprises a substrate, on which a photosensitive area, a storage area, a horizontal CCD, a dummy element and an output amplifier are arranged; a first p-well formed by a boron ion implantation process is arranged in the area where the horizontal CCD, the dummy element and the output amplifier are located, and the junction depth of the first p-well is 5μm to 8μm; a second p-well formed by a boron ion implantation process is arranged in the area where the photosensitive area and the storage area are located, the junction depth of the second p-well is 2.5μm to 3.5μm, and the doping concentration of the second p-well is less than that of the first p-well; a third p-well formed by a boron ion implantation process is arranged on the second p-well in the area where the storage area is located, the junction depth of the third p-well is 1.5μm to 2.0μm, and the doping concentration of the third p-well is greater than that of the second p-well.
[0021] Furthermore, the doping concentration of the first p-well is 1e15cm -3 ~1e16cm -3 The doping concentration of the second p-well is 5e14cm -3 ~1e15cm -3 The doping concentration of the third p-well is 1e15cm -3 ~1e16cm -3 .
[0022] In the present invention, by respectively manufacturing p-well structures in different regions on an N-type silicon substrate material, the doping concentration and junction depth of the p-well in each region of the frame transfer CCD can be different, so that each region of the frame transfer CCD has a different depletion voltage, and the doping distribution of regions such as the photosensitive area, storage area, horizontal CCD and output amplifier can be optimized separately according to application requirements, thereby facilitating the improvement of device performance. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention will be described in detail below in conjunction with the accompanying drawings, wherein:
[0024] Figure 1 FIG. 1 is a schematic diagram of a frame transfer CCD architecture with a single p-well structure in the prior art.
[0025] Figure 2 for Figure 1 Schematic diagram of the A-A' cross section.
[0026] Figure 3 The flowchart is a preferred embodiment of the method for manufacturing a frame transfer CCD with a multi-p-well structure of the present invention.
[0027] Figure 4 FIG. 4 is a schematic diagram of a frame transfer CCD architecture with a multi-p-well structure according to the present invention.
[0028] Figure 5 for Figure 4 Schematic diagram of the B-B' section.
[0029] Figure 6 This is the doping distribution diagram of the first p-well after the first push-junction.
[0030] Figure 7 is the doping profile of the second p-well.
[0031] Figure 8 This is a comparison diagram of the doping distribution of the first p-well before and after the push-up junction.
[0032] Fig. 9 Graph showing the doping profiles of the second P-well and the third P-well in the storage region.
[0033] In the figure: 101. first p-well, 102. second p-well, 103. third p-well. DETAILED DESCRIPTION
[0034] The following describes the implementation methods of the present invention through specific examples. The illustrations provided in the following embodiments are only used to schematically illustrate the basic concept of the present invention. The following embodiments and features in the embodiments may be combined with each other without conflict.
[0035] like Figure 3 As shown, a preferred embodiment of the method for manufacturing a frame transfer CCD with a multi-p-well structure of the present invention comprises the following steps:
[0036] S1. Take a silicon substrate material for making a frame transfer CCD; the silicon substrate material is preferably an N-type silicon substrate material, which is the same as the silicon substrate material for making a frame transfer CCD in the prior art.
[0037] S2, such as Figure 4 and Figure 5 As shown, a high-energy boron ion implantation process is performed in the horizontal CCD area, dummy area and output amplifier area of the silicon substrate material to form a first p-well 101 with a high doping concentration; wherein the horizontal CCD area refers to the area on the silicon substrate material where the horizontal CCD is to be made, and similarly, the following dummy area, output amplifier area, photosensitive area area and storage area also refer to the area on the silicon substrate material where the dummy, output amplifier, photosensitive area and storage area are to be made. The implantation energy used in the boron ion implantation process in this step is preferably 1.0MeV to 2.0MeV, and the doping concentration of the formed first p-well 101 is preferably 1e15cm -3 ~1e16cm -3 .
[0038] S3, first push-junction. The first p-well 101 is pushed for a long time in a high temperature environment by using a push-junction process to form a first p-well 101 with a deep junction and high doping concentration. Preferably, the silicon substrate material is placed in a high temperature environment of 1100°C to 1200°C for a push-junction process, and the push-junction time is 8h to 10h, so that the junction depth of the first p-well 101 reaches 5μm to 8μm. Figure 6 As shown, it is a doping distribution diagram of the first p-well 101 after the first push-junction. Since the first p-well 101 is a deep junction with high doping concentration, when the N-type silicon substrate bias voltage is 0-30V, the first p-well 101 will not be depleted, thereby ensuring that the horizontal CCD, dummy element and output amplifier are not disturbed by the N-type silicon substrate bias voltage.
[0039] S4, a boron ion implantation process is performed in the photosensitive region and the storage region of the silicon substrate material to form a second p-well 102 penetrating the photosensitive region and the storage region; the doping concentration of the second p-well 102 is less than that of the first p-well 101. The implantation energy used in the boron ion implantation process in this step is preferably 1.0 MeV to 2.0 MeV, and the doping concentration of the formed second p-well 102 is preferably 5e14 cm -3 ~1e15cm -3 .
[0040] S5, second push-junction. The silicon substrate material is placed in a high temperature environment and a short time push-junction process is performed to push the second p-well 102. Preferably, the silicon substrate material is placed in a high temperature environment of 1100°C to 1200°C and the push-junction process is performed. The push-junction time is preferably 2h to 3h. The junction depth of the second p-well 102 is smaller than that of the first p-well 101. The junction depth of the second p-well 102 is preferably 2.5μm to 3.5μm. Figure 7 As shown, it is the doping distribution diagram of the second p-well 102 after the second push-junction; under the doping distribution condition of the second p-well 102, when the bias voltage of the N-type silicon substrate is 10V~20V, the second p-well 102 in the photosensitive area is depleted to form an anti-blooming barrier, thereby realizing the longitudinal anti-blooming function of the frame transfer CCD with a multi-p-well structure.
[0041] During this process, the first p-well 101 is pushed back to make the junction depth of the first p-well 101 reach 8μm to 8.5μm. This makes it more difficult for the first p-well 101 to be depleted, which is more conducive to ensuring that the horizontal CCD, dummy element, and output amplifier area are not disturbed by the N-type silicon substrate bias voltage. Figure 8 , which is a comparison diagram of the doping distribution of the first p-well 101 before and after the second push-junction.
[0042] S6. Perform boron ion implantation on the second p-well 102 in the storage area to form a third p-well 103 that penetrates the storage area; the doping concentration of the third p-well 103 is greater than that of the second p-well 102, and the junction depth of the third p-well 103 is less than that of the second p-well 102. Preferably, the third p-well 103 is formed by a boron ion implantation process with an implantation energy of 200keV to 300keV, the junction depth of the third p-well 103 is 1.5μm to 2.0μm, and the doping concentration is 1e15cm -3 ~1e16cm -3 .like Fig. 9 As shown, it is a doping distribution diagram of the third p-well 103; under the doping distribution condition of the third p-well 103, it can be realized that when the N-type silicon substrate bias voltage is 0-30V, the third p-well 103 in the storage area will not be exhausted. By forming a third p-well 103 with a higher doping concentration on the upper layer of the second p-well 102 in the storage area, when the silicon substrate bias voltage causes the second p-well 102 in the photosensitive area to be depleted to form an anti-corona barrier (for example, when the silicon substrate bias voltage is 30V), the third p-well 103 in the storage area will not be exhausted, thereby ensuring that the storage area is not disturbed by the substrate bias voltage. In addition, when forming the third p-well 103, no push-junction process is performed, which can prevent the boron ion doping of the third p-well 103 from lateral diffusion to the photosensitive area, resulting in uneven doping of the second p-well 102 in the photosensitive area, forming a built-in barrier, and affecting the signal transfer in the photosensitive area.
[0043] S7, using the remaining frame transfer CCD manufacturing process to manufacture a frame transfer CCD on a silicon substrate material according to the conventional frame transfer CCD manufacturing process, including buried channel implantation, polysilicon manufacturing and metal lead manufacturing, etc., thereby obtaining a multi-p-well frame transfer CCD. These frame transfer CCD manufacturing processes are all existing technologies and will not be described in detail here.
[0044] In the present embodiment, since a single p-well is fabricated on an N-type silicon substrate in the existing frame transfer CCD, it is difficult to individually optimize the doping distribution problem of the photosensitive area, storage area, horizontal CCD and output amplifier area. By fabricating p-well structures in different areas on the N-type silicon substrate material, the doping concentration and junction depth of the p-well in each area of the frame transfer CCD can be different, so that each area of the frame transfer CCD has a different depletion voltage, and the doping distribution of the photosensitive area, storage area, horizontal CCD and output amplifier area can be individually optimized according to application requirements. When the p-well in the photosensitive area is depleted to form an anti-halo barrier, the p-wells in other areas are not depleted and are not disturbed by the bias voltage of the N-type silicon substrate, thereby facilitating the improvement of device performance.
[0045] like Figure 4 and Figure 5As shown, the present invention also discloses a frame transfer CCD with a multi-p-well structure. A preferred embodiment of the frame transfer CCD with a multi-p-well structure of the present invention includes a substrate, on which a photosensitive area, a storage area, a horizontal CCD, a dummy element and an output amplifier are provided; a first p-well 101 formed by a boron ion implantation process is provided in the area where the horizontal CCD, the dummy element and the output amplifier are located, and the junction depth of the first p-well 101 is 5μm to 8μm, as shown in FIG. Figure 8 As shown, the doping concentration of the first p-well 101 is 1e15cm -3 ~1e16cm -3 Therefore, when the bias voltage of the N-type silicon substrate is 0-30V, the first p-well 101 will not be exhausted, which can ensure that the horizontal CCD, the dummy element and the output amplifier are not disturbed by the bias voltage of the N-type silicon substrate.
[0046] A second p-well 102 formed by a boron ion implantation process is disposed in the region where the photosensitive region and the storage region are located. The junction depth of the second p-well 102 is 2.5 μm to 3.5 μm, and the doping concentration of the second p-well 102 is less than that of the first p-well 101. Figure 7 As shown, the doping concentration of the second p-well 102 is preferably 5e14cm -3 ~1e15cm -3 Therefore, when the bias voltage of the N-type silicon substrate is 10V to 20V, the second p-well 102 of the photosensitive region is depleted to form an anti-blooming barrier, so as to realize the longitudinal anti-blooming function of the frame transfer CCD with a multi-p-well structure.
[0047] A third p-well 103 formed by a boron ion implantation process is disposed on the second p-well 102 in the storage area. The junction depth of the third p-well 103 is 1.5 μm to 2.0 μm, and the doping concentration of the third p-well 103 is greater than that of the second p-well 102. Fig. 9 As shown, the doping concentration of the third p-well 103 is preferably 1e15 cm -3 ~1e16cm -3 Therefore, when the silicon substrate bias voltage causes the second p-well 102 in the photosensitive area to be depleted to form an anti-corona barrier (for example, when the silicon substrate bias voltage is 30V), the third p-well 103 in the storage area will not be depleted, thereby ensuring that the storage area is not disturbed by the substrate bias voltage.
[0048] In this embodiment, by making p-well structures in different areas on the N-type silicon substrate material, the doping concentration and junction depth of the p-well in each area of the frame transfer CCD can be different, so that each area of the frame transfer CCD has a different depletion voltage, which is convenient for improving device performance.
[0049] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solution of the present invention can be modified or replaced by equivalents without departing from the purpose and scope of the technical solution, which should be included in the scope of the claims of the present invention.
Claims
1. A method for manufacturing a frame transfer CCD with a multi-p-well structure, characterized in that: The following steps are involved: S1, take an N-type silicon substrate material for making a frame transfer CCD; S2, performing a boron ion implantation process on the horizontal CCD region, the dummy region and the output amplifier region of the silicon substrate material to form a first p-well with a high doping concentration; S3, using a push-junction process to push the first p-well to form a first p-well with a deep junction and a high doping concentration; S4, performing a boron ion implantation process in the photosensitive region and the storage region of the silicon substrate material to form a second p-well penetrating the photosensitive region and the storage region; the doping concentration of the second p-well is less than that of the first p-well; S5, placing the silicon substrate material in a high temperature environment and performing a push-junction process to push the junction of the second p-well, and simultaneously pushing the junction of the first p-well again, wherein the junction depth of the second p-well is smaller than that of the first p-well; S6, implanting boron ions into the second p-well in the storage area to form a third p-well that penetrates the storage area; the doping concentration of the third p-well is greater than that of the second p-well, and the junction depth of the third p-well is less than that of the second p-well; S7. Fabricate a frame transfer CCD on a silicon substrate material.
2. The method for manufacturing a frame transfer CCD with a multi-p-well structure according to claim 1, characterized in that: In the step S2, a first p-well is formed by a boron ion implantation process with an implantation energy of 1.0 MeV to 2.0 MeV. The doping concentration of the formed first p-well is 1e15 cm -3 ~1e16cm -3 .
3. The method for manufacturing a frame transfer CCD with a multi-p-well structure according to claim 1, characterized in that: In the step S3, the silicon substrate material is placed in a high temperature environment of 1100° C. to 1200° C. to perform a push-bonding process, and the push-bonding time is 8 h to 10 h.
4. The method for manufacturing a frame transfer CCD with a multi-p-well structure according to claim 1, characterized in that: After the junction-pushing process in step S3 , the junction depth of the first p-well is 5 μm to 8 μm.
5. The method for manufacturing a frame transfer CCD with a multi-p-well structure according to claim 1, characterized in that: In the step S4, a second p-well is formed by a boron ion implantation process with an implantation energy of 1.0 MeV to 2.0 MeV. The doping concentration of the formed second p-well is 5e14 cm -3 ~1e15cm -3 .
6. The method for manufacturing a frame transfer CCD with a multi-p-well structure according to claim 1, characterized in that: In the step S5, the silicon substrate material is placed in a high temperature environment of 1100° C. to 1200° C. to perform a push-bonding process, and the push-bonding time is 2 h to 3 h.
7. The method for manufacturing a frame transfer CCD with a multi-p-well structure according to claim 1, characterized in that: After the junction-pushing process in step S5 , the junction depth of the second p-well is 2.5 μm to 3.5 μm, and the junction depth of the first p-well is 8 μm to 8.5 μm.
8. The method for manufacturing a frame transfer CCD with a multi-p-well structure according to claim 1, characterized in that: In the step S6, a third p-well is formed by a boron ion implantation process with an implantation energy of 200keV to 300keV. The junction depth of the third p-well is 1.5μm to 2.0μm, and the doping concentration is 1e15cm -3 ~1e16cm -3 .
9. A frame transfer CCD with a multi-p-well structure, comprising a substrate, on which a photosensitive area, a storage area, a horizontal CCD, a dummy element and an output amplifier are arranged; characterized in that: A first p-well formed by a boron ion implantation process is arranged in the area where the horizontal CCD, dummy element and output amplifier are located, and the junction depth of the first p-well is 5μm to 8μm; a second p-well formed by a boron ion implantation process is arranged in the area where the photosensitive area and the storage area are located, and the junction depth of the second p-well is 2.5μm to 3.5μm, and the doping concentration of the second p-well is less than that of the first p-well; a third p-well formed by a boron ion implantation process is arranged on the second p-well in the area where the storage area is located, and the junction depth of the third p-well is 1.5μm to 2.0μm, and the doping concentration of the third p-well is greater than that of the second p-well.
10. The frame transfer CCD with a multi-p-well structure according to claim 9, characterized in that: The doping concentration of the first p-well is 1e15cm -3 ~1e16cm -3 The doping concentration of the second p-well is 5e14cm -3 ~1e15cm -3 The doping concentration of the third p-well is 1e15cm -3 ~1e16cm -3 .
Citation Information
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